Index: include/llvm/CodeGen/GlobalISel/GISelWorkList.h
===================================================================
--- include/llvm/CodeGen/GlobalISel/GISelWorkList.h
+++ include/llvm/CodeGen/GlobalISel/GISelWorkList.h
@@ -39,6 +39,13 @@
 
   unsigned size() const { return WorklistMap.size(); }
 
+  void reserve(unsigned Size) {
+    if (Size > N) {
+      Worklist.reserve(Size);
+      WorklistMap.reserve(Size);
+    }
+  }
+
   /// Add the specified instruction to the worklist if it isn't already in it.
   void insert(MachineInstr *I) {
     if (WorklistMap.try_emplace(I, Worklist.size()).second)
Index: lib/CodeGen/GlobalISel/Combiner.cpp
===================================================================
--- lib/CodeGen/GlobalISel/Combiner.cpp
+++ lib/CodeGen/GlobalISel/Combiner.cpp
@@ -111,7 +111,11 @@
     // insert with list bottom up, so while we pop_back_val, we'll traverse top
     // down RPOT.
     Changed = false;
+    unsigned MF_Size = 0;
+    for (auto &MBB : MF)
+      MF_Size += MBB.size();
     GISelWorkList<512> WorkList;
+    WorkList.reserve(MF_Size);
     WorkListMaintainer Observer(WorkList);
     GISelObserverWrapper WrapperObserver(&Observer);
     if (CSEInfo)
Index: lib/CodeGen/GlobalISel/Legalizer.cpp
===================================================================
--- lib/CodeGen/GlobalISel/Legalizer.cpp
+++ lib/CodeGen/GlobalISel/Legalizer.cpp
@@ -129,7 +129,6 @@
   if (MF.getProperties().hasProperty(
           MachineFunctionProperties::Property::FailedISel))
     return false;
-  LLVM_DEBUG(dbgs() << "Legalize Machine IR for: " << MF.getName() << '\n');
   init(MF);
   const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
   GISelCSEAnalysisWrapper &Wrapper =
@@ -142,6 +141,12 @@
   // Populate Insts
   InstListTy InstList;
   ArtifactListTy ArtifactList;
+  LLVM_DEBUG(dbgs() << "Legalize Machine IR for: " << MF.getName() << '\n');
+  unsigned MF_Size = 0;
+  for (auto &MBB : MF)
+    MF_Size += MBB.size();
+  InstList.reserve(MF_Size);
+  ArtifactList.reserve(MF_Size);
   ReversePostOrderTraversal<MachineFunction *> RPOT(&MF);
   // Perform legalization bottom up so we can DCE as we legalize.
   // Traverse BB in RPOT and within each basic block, add insts top down,