Index: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td =================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td +++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td @@ -243,14 +243,14 @@ } class BC1F_FT : + SDPatternOperator Op = null_frag, bit DelaySlot = 1> : InstSE<(outs), (ins FCCRegsOpnd:$fcc, opnd:$offset), !strconcat(opstr, "\t$fcc, $offset"), [(MipsFPBrcond Op, FCCRegsOpnd:$fcc, bb:$offset)], Itin, FrmFI, opstr> { let isBranch = 1; let isTerminator = 1; - let hasDelaySlot = 1; + let hasDelaySlot = DelaySlot; let Defs = [AT]; } @@ -562,8 +562,12 @@ def BC1F : MMRel, BC1F_FT<"bc1f", brtarget, IIBranch, MIPS_BRANCH_F>, BC1F_FM<0, 0>, ISA_MIPS1_NOT_32R6_64R6; +def BC1FL : MMRel, BC1F_FT<"bc1fl", brtarget, IIBranch, MIPS_BRANCH_F, 0>, + BC1F_FM<1, 0>, ISA_MIPS2_NOT_32R6_64R6; def BC1T : MMRel, BC1F_FT<"bc1t", brtarget, IIBranch, MIPS_BRANCH_T>, BC1F_FM<0, 1>, ISA_MIPS1_NOT_32R6_64R6; +def BC1TL : MMRel, BC1F_FT<"bc1tl", brtarget, IIBranch, MIPS_BRANCH_T, 0>, + BC1F_FM<1, 1>, ISA_MIPS2_NOT_32R6_64R6; //===----------------------------------------------------------------------===// // Floating Point Flag Conditions @@ -629,8 +633,12 @@ //===----------------------------------------------------------------------===// def : MipsInstAlias<"bc1t $offset", (BC1T FCC0, brtarget:$offset)>, ISA_MIPS1_NOT_32R6_64R6; +def : MipsInstAlias<"bc1tl $offset", (BC1TL FCC0, brtarget:$offset)>, + ISA_MIPS2_NOT_32R6_64R6; def : MipsInstAlias<"bc1f $offset", (BC1F FCC0, brtarget:$offset)>, ISA_MIPS1_NOT_32R6_64R6; +def : MipsInstAlias<"bc1fl $offset", (BC1FL FCC0, brtarget:$offset)>, + ISA_MIPS2_NOT_32R6_64R6; //===----------------------------------------------------------------------===// // Floating Point Patterns Index: llvm/trunk/test/MC/Mips/mips-jump-delay-slots.s =================================================================== --- llvm/trunk/test/MC/Mips/mips-jump-delay-slots.s +++ llvm/trunk/test/MC/Mips/mips-jump-delay-slots.s @@ -47,6 +47,24 @@ # CHECK: nop beqz $11,1332 + # CHECK: bc1fl 1332 + # CHECK-NOT: nop + bc1fl 1332 + # CHECK: bc1fl 1332 + # CHECK-NOT: nop + bc1fl $fcc0, 1332 + # CHECK: bc1fl $fcc3, 1332 + # CHECK-NOT: nop + bc1fl $fcc3, 1332 + # CHECK: bc1tl 1332 + # CHECK-NOT: nop + bc1tl 1332 + # CHECK: bc1tl 1332 + # CHECK-NOT: nop + bc1tl $fcc0, 1332 + # CHECK: bc1tl $fcc3, 1332 + # CHECK-NOT: nop + bc1tl $fcc3, 1332 # CHECK: beql $9, $6, 1332 # CHECK-NOT: nop beql $9,$6,1332 Index: llvm/trunk/test/MC/Mips/mips1/invalid-mips2.s =================================================================== --- llvm/trunk/test/MC/Mips/mips1/invalid-mips2.s +++ llvm/trunk/test/MC/Mips/mips1/invalid-mips2.s @@ -5,6 +5,10 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: llvm/trunk/test/MC/Mips/mips1/invalid-mips4-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips1/invalid-mips4-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips1/invalid-mips4-wrong-error.s @@ -6,6 +6,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction Index: llvm/trunk/test/MC/Mips/mips2/invalid-mips4-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips2/invalid-mips4-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips2/invalid-mips4-wrong-error.s @@ -6,6 +6,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction scd $15,-8243($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction Index: llvm/trunk/test/MC/Mips/mips2/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips2/valid.s +++ llvm/trunk/test/MC/Mips/mips2/valid.s @@ -18,8 +18,12 @@ and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] + bc1fl 50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,-8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] + bc1tl -8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips3/invalid-mips4-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips3/invalid-mips4-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips3/invalid-mips4-wrong-error.s @@ -0,0 +1,10 @@ +# Instructions that are invalid and are correctly rejected but use the wrong +# error message at the moment. +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips3 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction Index: llvm/trunk/test/MC/Mips/mips3/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips3/valid.s +++ llvm/trunk/test/MC/Mips/mips3/valid.s @@ -18,8 +18,12 @@ and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] + bc1fl 50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,-8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] + bc1tl -8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips32/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32/valid.s +++ llvm/trunk/test/MC/Mips/mips32/valid.s @@ -19,9 +19,15 @@ bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips32r2/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r2/valid.s +++ llvm/trunk/test/MC/Mips/mips32r2/valid.s @@ -19,9 +19,15 @@ bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s @@ -6,7 +6,5 @@ # RUN: FileCheck %s < %t1 .set noat - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: llvm/trunk/test/MC/Mips/mips32r6/invalid-mips2.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r6/invalid-mips2.s +++ llvm/trunk/test/MC/Mips/mips32r6/invalid-mips2.s @@ -6,6 +6,10 @@ .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: llvm/trunk/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s @@ -6,10 +6,6 @@ # RUN: FileCheck %s < %t1 .set noat - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: llvm/trunk/test/MC/Mips/mips32r6/invalid-mips32.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r6/invalid-mips32.s +++ llvm/trunk/test/MC/Mips/mips32r6/invalid-mips32.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled maddu $s3,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: llvm/trunk/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s @@ -6,8 +6,6 @@ # RUN: FileCheck %s < %t1 .set noat - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: llvm/trunk/test/MC/Mips/mips32r6/invalid-mips4.s =================================================================== --- llvm/trunk/test/MC/Mips/mips32r6/invalid-mips4.s +++ llvm/trunk/test/MC/Mips/mips32r6/invalid-mips4.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ldxc1 $f8,$s7($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled sdxc1 $f11,$10($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: llvm/trunk/test/MC/Mips/mips4/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips4/valid.s +++ llvm/trunk/test/MC/Mips/mips4/valid.s @@ -19,9 +19,15 @@ bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips5/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips5/valid.s +++ llvm/trunk/test/MC/Mips/mips5/valid.s @@ -19,9 +19,15 @@ bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips64/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips64/valid.s +++ llvm/trunk/test/MC/Mips/mips64/valid.s @@ -19,9 +19,15 @@ bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips64r2/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/mips64r2/valid.s +++ llvm/trunk/test/MC/Mips/mips64r2/valid.s @@ -19,9 +19,15 @@ bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] Index: llvm/trunk/test/MC/Mips/mips64r6/invalid-mips2.s =================================================================== --- llvm/trunk/test/MC/Mips/mips64r6/invalid-mips2.s +++ llvm/trunk/test/MC/Mips/mips64r6/invalid-mips2.s @@ -6,6 +6,10 @@ .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: llvm/trunk/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s @@ -6,10 +6,6 @@ # RUN: FileCheck %s < %t1 .set noat - bc1fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: llvm/trunk/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s =================================================================== --- llvm/trunk/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s +++ llvm/trunk/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s @@ -6,8 +6,6 @@ # RUN: FileCheck %s < %t1 .set noat - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: llvm/trunk/test/MC/Mips/mips64r6/invalid-mips4.s =================================================================== --- llvm/trunk/test/MC/Mips/mips64r6/invalid-mips4.s +++ llvm/trunk/test/MC/Mips/mips64r6/invalid-mips4.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled