Index: lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsInstrInfo.td +++ lib/Target/Mips/MicroMipsInstrInfo.td @@ -30,6 +30,8 @@ let EncoderMethod = "getUImm4AndValue"; } +def immSExtAddius5 : ImmLeaf= -8 && Imm <= 7;}]>; + def immZExtAndi16 : ImmLeaf= 1 && Imm <= 4) || Imm == 7 || Imm == 8 || Imm == 15 || Imm == 16 || Imm == 31 || Imm == 32 || Imm == 63 || @@ -169,7 +171,6 @@ MicroMipsInst16<(outs RO:$dst), (ins RO:$rd, simm4:$imm), !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR> { let Constraints = "$rd = $dst"; - let isCommutable = 1; } class LoadMM16, COP0_TLB_FM_MM<0xcd>; } +def : MipsPat<(add GPR32:$src, immSExtAddius5:$imm), + (ADDIUS5_MM GPR32:$src, imm:$imm)>; +def : MipsPat<(add GPR32:$src, immSExt16:$imm), + (ADDiu_MM GPR32:$src, imm:$imm)>; + def : MipsPat<(and GPRMM16:$src, immZExtAndi16:$imm), (ANDI16_MM GPRMM16:$src, imm:$imm)>; def : MipsPat<(and GPR32:$src, immZExt16:$imm), Index: lib/Target/Mips/MipsInstrInfo.td =================================================================== --- lib/Target/Mips/MipsInstrInfo.td +++ lib/Target/Mips/MipsInstrInfo.td @@ -1059,9 +1059,10 @@ //===----------------------------------------------------------------------===// /// Arithmetic Instructions (ALU Immediate) +let AdditionalPredicates = [NotInMicroMips, HasStdEnc] in { def ADDiu : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd, II_ADDIU, immSExt16, - add>, - ADDI_FM<0x9>, IsAsCheapAsAMove; + add>, ADDI_FM<0x9>, IsAsCheapAsAMove; +} def ADDi : MMRel, ArithLogicI<"addi", simm16, GPR32Opnd>, ADDI_FM<0x8>, ISA_MIPS1_NOT_32R6_64R6; def SLTi : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>, Index: test/CodeGen/Mips/micromips-addiu.ll =================================================================== --- /dev/null +++ test/CodeGen/Mips/micromips-addiu.ll @@ -0,0 +1,25 @@ +; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips +; RUN -relocation-model=pic -O3 < %s | FileCheck %s + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %addiu1 = add i32 %0, -7 + %call1 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds + ([7 x i8]* @.str, i32 0, i32 0), i32 %addiu1) + + %1 = load i32* @y, align 4 + %addiu2 = add i32 %1, 55 + %call2 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds + ([7 x i8]* @.str, i32 0, i32 0), i32 %addiu2) + ret i32 0 +} + +declare i32 @printf(i8*, ...) + +; CHECK: addius5 ${{[0-9]+}}, -7 +; CHECK: addiu ${{[0-9]+}}, 55