Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp =================================================================== --- lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp +++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp @@ -18,8 +18,10 @@ #include "llvm/MC/MCObjectWriter.h" #include "llvm/MC/MCValue.h" #include "llvm/Support/TargetRegistry.h" +#include "Utils/AMDGPUBaseInfo.h" using namespace llvm; +using namespace llvm::AMDGPU; namespace { @@ -172,11 +174,13 @@ bool Is64Bit; bool HasRelocationAddend; uint8_t OSABI = ELF::ELFOSABI_NONE; + uint8_t ABIVersion = 0; public: - ELFAMDGPUAsmBackend(const Target &T, const Triple &TT) : + ELFAMDGPUAsmBackend(const Target &T, const Triple &TT, uint8_t ABIVersion) : AMDGPUAsmBackend(T), Is64Bit(TT.getArch() == Triple::amdgcn), - HasRelocationAddend(TT.getOS() == Triple::AMDHSA) { + HasRelocationAddend(TT.getOS() == Triple::AMDHSA), + ABIVersion(ABIVersion) { switch (TT.getOS()) { case Triple::AMDHSA: OSABI = ELF::ELFOSABI_AMDGPU_HSA; @@ -194,7 +198,8 @@ std::unique_ptr createObjectTargetWriter() const override { - return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend); + return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend, + ABIVersion); } }; @@ -205,5 +210,6 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options) { // Use 64-bit ELF for amdgcn - return new ELFAMDGPUAsmBackend(T, STI.getTargetTriple()); + return new ELFAMDGPUAsmBackend(T, STI.getTargetTriple(), + IsaInfo::hasCodeObjectV3(&STI) ? 1 : 0); } Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp =================================================================== --- lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp +++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp @@ -22,7 +22,8 @@ class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter { public: - AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend); + AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend, + uint8_t ABIVersion); protected: unsigned getRelocType(MCContext &Ctx, const MCValue &Target, @@ -34,9 +35,10 @@ AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, - bool HasRelocationAddend) + bool HasRelocationAddend, + uint8_t ABIVersion) : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU, - HasRelocationAddend) {} + HasRelocationAddend, ABIVersion) {} unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target, @@ -83,7 +85,9 @@ std::unique_ptr llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, - bool HasRelocationAddend) { + bool HasRelocationAddend, + uint8_t ABIVersion) { return llvm::make_unique(Is64Bit, OSABI, - HasRelocationAddend); + HasRelocationAddend, + ABIVersion); } Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h =================================================================== --- lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h +++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h @@ -52,7 +52,7 @@ std::unique_ptr createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, - bool HasRelocationAddend); + bool HasRelocationAddend, uint8_t ABIVersion); } // End llvm namespace #define GET_REGINFO_ENUM Index: test/CodeGen/AMDGPU/elf-header-osabi.ll =================================================================== --- test/CodeGen/AMDGPU/elf-header-osabi.ll +++ test/CodeGen/AMDGPU/elf-header-osabi.ll @@ -13,8 +13,11 @@ ; NONE: OS/ABI: SystemV (0x0) ; HSA: OS/ABI: AMDGPU_HSA (0x40) +; HSA: ABIVersion: 1 ; PAL: OS/ABI: AMDGPU_PAL (0x41) +; PAL: ABIVersion: 0 ; MESA3D: OS/ABI: AMDGPU_MESA3D (0x42) +; MESA3D: ABIVersion: 0 define amdgpu_kernel void @elf_header() { ret void