Index: tools/llvm-exegesis/lib/Analysis.cpp =================================================================== --- tools/llvm-exegesis/lib/Analysis.cpp +++ tools/llvm-exegesis/lib/Analysis.cpp @@ -316,6 +316,7 @@ writeLatencySnippetHtml(OS, Point.Key.Instructions, *InstrInfo_); break; case InstructionBenchmark::Uops: + case InstructionBenchmark::InverseThroughput: writeUopsSnippetHtml(OS, Point.Key.Instructions, *InstrInfo_); break; default: @@ -507,9 +508,14 @@ } ClusterCenterPoint[I].PerInstructionValue = Representative[I].avg(); } + } else if (Mode == InstructionBenchmark::InverseThroughput) { + for (int I = 0, E = Representative.size(); I < E; ++I) { + SchedClassPoint[I].PerInstructionValue = + MCSchedModel::getReciprocalThroughput(STI, *RSC.SCDesc); + ClusterCenterPoint[I].PerInstructionValue = Representative[I].min(); + } } else { - llvm::errs() << "unimplemented measurement matching for mode " << Mode - << "\n"; + llvm_unreachable("unimplemented measurement matching mode"); return false; } return Clustering.isNeighbour(ClusterCenterPoint, SchedClassPoint); @@ -519,9 +525,9 @@ llvm::raw_ostream &OS) const { OS << ""; OS << ""; + "th>"; if (RSC.SCDesc->isValid()) { const auto &SM = SubtargetInfo_->getSchedModel(); OS << ""; @@ -540,6 +546,12 @@ OS << ""; } OS << ""; + // inverse throughput. + OS << ""; // WriteProcRes. OS << "
ValidVariantNumMicroOpsLatencyWriteProcResIdealized " - "Resource Pressure
RThroughputWriteProcResIdealized Resource Pressure
"; + writeMeasurementValue( + OS, + MCSchedModel::getReciprocalThroughput(*SubtargetInfo_, *RSC.SCDesc)); + OS << "
    "; for (const auto &WPR : RSC.NonRedundantWriteProcRes) {