Index: lib/CodeGen/LiveRegUnits.cpp =================================================================== --- lib/CodeGen/LiveRegUnits.cpp +++ lib/CodeGen/LiveRegUnits.cpp @@ -130,8 +130,9 @@ // To get the live-outs we simply merge the live-ins of all successors. for (const MachineBasicBlock *Succ : MBB.successors()) addBlockLiveIns(*this, *Succ); - } else if (MBB.isReturnBlock()) { - // For the return block: Add all callee saved registers. + } else if (MBB.isReturnBlock() || !MF.getFunction().doesNotThrow()) { + // For the return block, or a block whose end should be unreachable in a + // function which might throw: Add all callee saved registers. const MachineFrameInfo &MFI = MF.getFrameInfo(); if (MFI.isCalleeSavedInfoValid()) addCalleeSavedRegs(*this, MF); Index: test/CodeGen/ARM/register-scavenger-exceptions.mir =================================================================== --- /dev/null +++ test/CodeGen/ARM/register-scavenger-exceptions.mir @@ -0,0 +1,85 @@ +# RUN: llc -o - %s -run-pass=prologepilog | FileCheck %s + +--- | + target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" + target triple = "armv7--none-eabi" + + define hidden void @_Z3foov(i32 %P0, ...) { + entry: + %V1 = alloca [4075 x i8], align 8 + %tmp3 = alloca i8, i32 undef, align 8 + unreachable + } + + define hidden void @_Z3bazv(i32 %P0, ...) nounwind { + entry: + %V1 = alloca [4075 x i8], align 8 + %tmp3 = alloca i8, i32 undef, align 8 + unreachable + } + + declare dso_local void @_Z3barv() noreturn + declare dso_local i8* @__cxa_allocate_exception(i32) + declare dso_local void @__cxa_throw(i8*, i8*, i8*) + +... +--- +# Check that the register scavenger does pick r5 (not preserved in prolog) for +# materialising a stack frame address when the function ends in throwing an +# exception. +# CHECK: $sp = frame-setup STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r10, killed $r11, killed $lr +# CHECK-NOT: $r5 +name: _Z3foov +stack: + - { id: 0, name: V1, type: default, offset: 0, size: 5000, alignment: 8, + stack-id: 0, callee-saved-register: '', callee-saved-restored: true, + local-offset: -4080, debug-info-variable: '', debug-info-expression: '', + debug-info-location: '' } + - { id: 1, name: tmp3, type: variable-sized, offset: 0, alignment: 1, + stack-id: 0, callee-saved-register: '', callee-saved-restored: true, + local-offset: -4112, debug-info-variable: '', debug-info-expression: '', + debug-info-location: '' } + - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +body: | + bb.0.entry: + + $r0 = MOVi 0, 14, $noreg, $noreg + $r1 = MOVi 0, 14, $noreg, $noreg + $r2 = MOVi 0, 14, $noreg, $noreg + $r3 = MOVi 0, 14, $noreg, $noreg + $r4 = MOVi 0, 14, $noreg, $noreg + STRi12 killed $lr, %stack.2, 0, 14, $noreg :: (store 4 into %stack.2) + BL @_Z3barv, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit killed $r3, implicit killed $r4, implicit-def $sp + +... +# In a nounwind function, we can use non-saved registers in blocks with +# unreachable ends. +# CHECK: $sp = frame-setup STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r10, killed $r11, killed $lr +# CHECK: $r5 = SUBri killed $r11, 4096 +name: _Z3bazv +stack: + - { id: 0, name: V1, type: default, offset: 0, size: 5000, alignment: 8, + stack-id: 0, callee-saved-register: '', callee-saved-restored: true, + local-offset: -4080, debug-info-variable: '', debug-info-expression: '', + debug-info-location: '' } + - { id: 1, name: tmp3, type: variable-sized, offset: 0, alignment: 1, + stack-id: 0, callee-saved-register: '', callee-saved-restored: true, + local-offset: -4112, debug-info-variable: '', debug-info-expression: '', + debug-info-location: '' } + - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +body: | + bb.0.entry: + + $r0 = MOVi 0, 14, $noreg, $noreg + $r1 = MOVi 0, 14, $noreg, $noreg + $r2 = MOVi 0, 14, $noreg, $noreg + $r3 = MOVi 0, 14, $noreg, $noreg + $r4 = MOVi 0, 14, $noreg, $noreg + STRi12 killed $lr, %stack.2, 0, 14, $noreg :: (store 4 into %stack.2) + BL @_Z3barv, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit killed $r3, implicit killed $r4, implicit-def $sp + +...