Index: include/llvm/CodeGen/ValueTypes.td =================================================================== --- include/llvm/CodeGen/ValueTypes.td +++ include/llvm/CodeGen/ValueTypes.td @@ -167,3 +167,14 @@ // Pseudo valuetype to represent "any type of any size". def Any : ValueType<0 , 255>; + +/// This class is for targets that want to use pointer types in patterns +/// with the GlobalISelEmitter. Targets must define their own pointer +/// derived from this class. The scalar argument should be an +/// integer type with the same bit size as the ponter. +/// e.g. def p0 : PtrValueType ; + +class PtrValueType : + ValueType { + int AddrSpace = addrspace; +} Index: test/TableGen/GlobalISelEmitter.td =================================================================== --- test/TableGen/GlobalISelEmitter.td +++ test/TableGen/GlobalISelEmitter.td @@ -128,10 +128,12 @@ // CHECK-LABEL: // LLT Objects. // CHECK-NEXT: enum { +// CHECK-NEXT: GILLT_p0s32 // CHECK-NEXT: GILLT_s32, // CHECK-NEXT: } -// CHECK-NEXT: const static size_t NumTypeObjects = 1; +// CHECK-NEXT: const static size_t NumTypeObjects = 2; // CHECK-NEXT: const static LLT TypeObjects[] = { +// CHECK-NEXT: LLT::pointer(0, 32), // CHECK-NEXT: LLT::scalar(32), // CHECK-NEXT: }; @@ -829,7 +831,7 @@ // NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 // NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0, // NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0, -// NOOPT-NEXT: // GIR_Coverage, 25, +// NOOPT-NEXT: // GIR_Coverage, 26, // NOOPT-NEXT: GIR_Done, // NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]] @@ -974,6 +976,31 @@ def LOAD : I<(outs GPR32:$dst), (ins GPR32:$src1), [(set GPR32:$dst, (load GPR32:$src1))]>; +//===- Test a simple pattern with explicit pointer operands. ---------------===// + +// NOOPT-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ [[LABEL:[0-9]+]], +// NOOPT-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2, +// NOOPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LOAD, +// NOOPT-NEXT: GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0, +// NOOPT-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic, +// NOOPT-NEXT: // MIs[0] dst +// NOOPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_p0s32, +// NOOPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID, +// NOOPT-NEXT: // MIs[0] src +// NOOPT-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32, +// NOOPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID, +// NOOPT-NEXT: // (ld:{ *:[i32] } GPR32:{ *:[i32] }:$src)<><> => (LOAD:{ *:[i32] } GPR32:{ *:[i32] }:$src) +// NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/MyTarget::LOAD, +// NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0, +// NOOPT-NEXT: // GIR_Coverage, 23, +// NOOPT-NEXT: GIR_Done, +// NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]] + +def p0 : PtrValueType ; + +def : Pat<(load GPR32:$src), + (p0 (LOAD GPR32:$src))>; + //===- Test a simple pattern with a sextload -------------------------------===// // // NOOPT-NEXT: GIM_Try, /*On fail goto*//*Label [[LABEL_NUM:[0-9]+]]*/ [[LABEL:[0-9]+]], @@ -1061,7 +1088,7 @@ // NOOPT-NEXT: // (add:{ *:[i32] } i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) => (ADD:{ *:[i32] } i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) // NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/MyTarget::ADD, // NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0, -// NOOPT-NEXT: // GIR_Coverage, 23, +// NOOPT-NEXT: // GIR_Coverage, 24, // NOOPT-NEXT: GIR_Done, // NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]] @@ -1113,7 +1140,7 @@ // NOOPT-NEXT: // (bitconvert:{ *:[i32] } FPR32:{ *:[f32] }:$src1) => (COPY_TO_REGCLASS:{ *:[i32] } FPR32:{ *:[f32] }:$src1, GPR32:{ *:[i32] }) // NOOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY, // NOOPT-NEXT: GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR32*/1, -// NOOPT-NEXT: // GIR_Coverage, 24, +// NOOPT-NEXT: // GIR_Coverage, 25, // NOOPT-NEXT: GIR_Done, // NOOPT-NEXT: // Label [[LABEL_NUM]]: @[[LABEL]] Index: utils/TableGen/CodeGenDAGPatterns.h =================================================================== --- utils/TableGen/CodeGenDAGPatterns.h +++ utils/TableGen/CodeGenDAGPatterns.h @@ -191,6 +191,7 @@ struct TypeSetByHwMode : public InfoByHwMode { using SetType = MachineValueTypeSet; + std::vector AddrSpaces; TypeSetByHwMode() = default; TypeSetByHwMode(const TypeSetByHwMode &VTS) = default; @@ -227,6 +228,15 @@ return Map.size() == 1 && Map.begin()->first == DefaultMode; } + bool isPointer() const { + return getValueTypeByHwMode().isPointer(); + } + + unsigned getPtrAddrSpace() const { + assert(isPointer()); + return getValueTypeByHwMode().PtrAddrSpace; + } + bool insert(const ValueTypeByHwMode &VVT); bool constrain(const TypeSetByHwMode &VTS); template bool constrain(Predicate P); @@ -243,6 +253,7 @@ bool validate() const; private: + unsigned PtrAddrSpace = std::numeric_limits::max(); /// Intersect two sets. Return true if anything has changed. bool intersect(SetType &Out, const SetType &In); }; Index: utils/TableGen/CodeGenDAGPatterns.cpp =================================================================== --- utils/TableGen/CodeGenDAGPatterns.cpp +++ utils/TableGen/CodeGenDAGPatterns.cpp @@ -68,8 +68,10 @@ // inference will apply to each mode separately. TypeSetByHwMode::TypeSetByHwMode(ArrayRef VTList) { - for (const ValueTypeByHwMode &VVT : VTList) + for (const ValueTypeByHwMode &VVT : VTList) { insert(VVT); + AddrSpaces.push_back(VVT.PtrAddrSpace); + } } bool TypeSetByHwMode::isValueTypeByHwMode(bool AllowEmpty) const { @@ -86,9 +88,13 @@ assert(isValueTypeByHwMode(true) && "The type set has multiple types for at least one HW mode"); ValueTypeByHwMode VVT; + auto ASI = AddrSpaces.begin(); + for (const auto &I : *this) { MVT T = I.second.empty() ? MVT::Other : *I.second.begin(); VVT.getOrCreateTypeForMode(I.first, T); + if (ASI != AddrSpaces.end()) + VVT.PtrAddrSpace = *ASI++; } return VVT; } Index: utils/TableGen/GlobalISelEmitter.cpp =================================================================== --- utils/TableGen/GlobalISelEmitter.cpp +++ utils/TableGen/GlobalISelEmitter.cpp @@ -1507,6 +1507,9 @@ if (OperandIsAPointer) addPredicate(OpTyOrNone->get().getSizeInBits()); + else if (VTy.isPointer()) + addPredicate(LLT::pointer(VTy.getPtrAddrSpace(), + OpTyOrNone->get().getSizeInBits())); else addPredicate(*OpTyOrNone); return Error::success(); Index: utils/TableGen/InfoByHwMode.h =================================================================== --- utils/TableGen/InfoByHwMode.h +++ utils/TableGen/InfoByHwMode.h @@ -120,6 +120,7 @@ struct ValueTypeByHwMode : public InfoByHwMode { ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH); + ValueTypeByHwMode(Record *R, MVT T); ValueTypeByHwMode(MVT T) { Map.insert({DefaultMode,T}); } ValueTypeByHwMode() = default; @@ -135,6 +136,11 @@ static StringRef getMVTName(MVT T); void writeToStream(raw_ostream &OS) const; void dump() const; + + unsigned PtrAddrSpace = std::numeric_limits::max(); + bool isPointer() const { + return PtrAddrSpace != std::numeric_limits::max(); + } }; ValueTypeByHwMode getValueTypeByHwMode(Record *Rec, Index: utils/TableGen/InfoByHwMode.cpp =================================================================== --- utils/TableGen/InfoByHwMode.cpp +++ utils/TableGen/InfoByHwMode.cpp @@ -39,6 +39,11 @@ } } +ValueTypeByHwMode::ValueTypeByHwMode(Record *R, MVT T) : ValueTypeByHwMode(T) { + if (R->isSubClassOf("PtrValueType")) + PtrAddrSpace = R->getValueAsInt("AddrSpace"); +} + bool ValueTypeByHwMode::operator== (const ValueTypeByHwMode &T) const { assert(isValid() && T.isValid() && "Invalid type in assignment"); bool Simple = isSimple(); @@ -112,7 +117,7 @@ "Record must be derived from ValueType"); if (Rec->isSubClassOf("HwModeSelect")) return ValueTypeByHwMode(Rec, CGH); - return ValueTypeByHwMode(llvm::getValueType(Rec)); + return ValueTypeByHwMode(Rec, llvm::getValueType(Rec)); } RegSizeInfo::RegSizeInfo(Record *R, const CodeGenHwModes &CGH) {