Index: lib/Target/X86/X86ScheduleBtVer2.td =================================================================== --- lib/Target/X86/X86ScheduleBtVer2.td +++ lib/Target/X86/X86ScheduleBtVer2.td @@ -264,14 +264,14 @@ // Loads, stores, and moves, not folded with other operations. //////////////////////////////////////////////////////////////////////////////// -def : WriteRes { let Latency = 5; } +def : WriteRes { let Latency = 3; } def : WriteRes; def : WriteRes; def : WriteRes; // Load/store MXCSR. // FIXME: These are copy and pasted from WriteLoad/Store. -def : WriteRes { let Latency = 5; } +def : WriteRes { let Latency = 3; } def : WriteRes; // Treat misc copies as a move. Index: test/CodeGen/X86/schedule-x86-64-shld.ll =================================================================== --- test/CodeGen/X86/schedule-x86-64-shld.ll +++ test/CodeGen/X86/schedule-x86-64-shld.ll @@ -330,7 +330,7 @@ ; ; BTVER2-LABEL: lshift_mem_cl: ; BTVER2: # %bb.0: # %entry -; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [3:1.00] ; BTVER2-NEXT: movq %rsi, %rcx # sched: [1:0.50] ; BTVER2-NEXT: shlq %cl, %rax # sched: [1:0.50] ; BTVER2-NEXT: negb %cl # sched: [1:0.50] @@ -366,7 +366,7 @@ ; ; BTVER2-LABEL: lshift_mem: ; BTVER2: # %bb.0: # %entry -; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [3:1.00] ; BTVER2-NEXT: shrq $54, %rdi # sched: [1:0.50] ; BTVER2-NEXT: shlq $10, %rax # sched: [1:0.50] ; BTVER2-NEXT: orq %rax, %rdi # sched: [1:0.50] @@ -424,7 +424,7 @@ ; ; BTVER2-LABEL: lshift_mem_b: ; BTVER2: # %bb.0: # %entry -; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [3:1.00] ; BTVER2-NEXT: shlq $10, %rdi # sched: [1:0.50] ; BTVER2-NEXT: shrq $54, %rax # sched: [1:0.50] ; BTVER2-NEXT: orq %rdi, %rax # sched: [1:0.50] @@ -456,7 +456,7 @@ ; ; BTVER2-LABEL: lshift_mem_b_optsize: ; BTVER2: # %bb.0: # %entry -; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [3:1.00] ; BTVER2-NEXT: shrdq $54, %rdi, %rax # sched: [3:3.00] ; BTVER2-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] Index: test/CodeGen/X86/schedule-x86_32.ll =================================================================== --- test/CodeGen/X86/schedule-x86_32.ll +++ test/CodeGen/X86/schedule-x86_32.ll @@ -87,7 +87,7 @@ ; ; BTVER2-LABEL: test_aaa: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] +; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: aaa # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP @@ -291,7 +291,7 @@ ; ; BTVER2-LABEL: test_aam: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] +; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: aam # sched: [100:0.50] ; BTVER2-NEXT: aam $16 # sched: [100:0.50] @@ -385,7 +385,7 @@ ; ; BTVER2-LABEL: test_aas: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] +; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: aas # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP @@ -487,7 +487,7 @@ ; BTVER2-LABEL: test_arpl: ; BTVER2: # %bb.0: ; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: arpl %ax, (%ecx) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP @@ -665,14 +665,14 @@ ; BTVER2-NEXT: .cfi_def_cfa_offset 8 ; BTVER2-NEXT: .cfi_offset %esi, -8 ; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %esi # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %esi # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: bound %ax, (%esi) # sched: [100:0.50] ; BTVER2-NEXT: bound %ecx, (%edx) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP -; BTVER2-NEXT: popl %esi # sched: [5:1.00] +; BTVER2-NEXT: popl %esi # sched: [3:1.00] ; BTVER2-NEXT: .cfi_def_cfa_offset 4 ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -773,7 +773,7 @@ ; ; BTVER2-LABEL: test_daa: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] +; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: daa # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP @@ -865,7 +865,7 @@ ; ; BTVER2-LABEL: test_das: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:1.00] +; BTVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: das # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP @@ -976,7 +976,7 @@ ; BTVER2-LABEL: test_dec16: ; BTVER2: # %bb.0: ; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: decw %ax # sched: [1:0.50] ; BTVER2-NEXT: decw (%ecx) # sched: [5:1.00] @@ -1088,8 +1088,8 @@ ; ; BTVER2-LABEL: test_dec32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: decl %eax # sched: [1:0.50] ; BTVER2-NEXT: decl (%ecx) # sched: [5:1.00] @@ -1203,7 +1203,7 @@ ; BTVER2-LABEL: test_inc16: ; BTVER2: # %bb.0: ; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: incw %ax # sched: [1:0.50] ; BTVER2-NEXT: incw (%ecx) # sched: [5:1.00] @@ -1315,8 +1315,8 @@ ; ; BTVER2-LABEL: test_inc32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: incl %eax # sched: [1:0.50] ; BTVER2-NEXT: incl (%ecx) # sched: [5:1.00] @@ -1935,12 +1935,12 @@ ; BTVER2-LABEL: test_pop_push_16: ; BTVER2: # %bb.0: ; BTVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [4:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popw %ax # sched: [5:1.00] -; BTVER2-NEXT: popw (%ecx) # sched: [6:1.00] +; BTVER2-NEXT: popw %ax # sched: [3:1.00] +; BTVER2-NEXT: popw (%ecx) # sched: [4:1.00] ; BTVER2-NEXT: pushw %ax # sched: [1:1.00] -; BTVER2-NEXT: pushw (%ecx) # sched: [6:1.00] +; BTVER2-NEXT: pushw (%ecx) # sched: [4:1.00] ; BTVER2-NEXT: pushw $4095 # imm = 0xFFF ; BTVER2-NEXT: # sched: [1:1.00] ; BTVER2-NEXT: pushw $7 # sched: [1:1.00] @@ -2101,13 +2101,13 @@ ; ; BTVER2-LABEL: test_pop_push_32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popl %eax # sched: [5:1.00] -; BTVER2-NEXT: popl (%ecx) # sched: [6:1.00] +; BTVER2-NEXT: popl %eax # sched: [3:1.00] +; BTVER2-NEXT: popl (%ecx) # sched: [4:1.00] ; BTVER2-NEXT: pushl %eax # sched: [1:1.00] -; BTVER2-NEXT: pushl (%ecx) # sched: [6:1.00] +; BTVER2-NEXT: pushl (%ecx) # sched: [4:1.00] ; BTVER2-NEXT: pushl $4095 # imm = 0xFFF ; BTVER2-NEXT: # sched: [1:1.00] ; BTVER2-NEXT: pushl $7 # sched: [1:1.00] @@ -2226,8 +2226,8 @@ ; BTVER2-LABEL: test_popa_popf_pusha_pushf: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popal # sched: [5:1.00] -; BTVER2-NEXT: popfl # sched: [5:1.00] +; BTVER2-NEXT: popal # sched: [3:1.00] +; BTVER2-NEXT: popfl # sched: [3:1.00] ; BTVER2-NEXT: pushal # sched: [1:1.00] ; BTVER2-NEXT: pushfl # sched: [1:1.00] ; BTVER2-NEXT: #NO_APP @@ -2575,9 +2575,9 @@ ; ; BTVER2-LABEL: test_xchg_32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: xchgl %eax, %eax # sched: [1:0.50] ; BTVER2-NEXT: xchgl %ecx, %eax # sched: [1:0.50] Index: test/CodeGen/X86/schedule-x86_64.ll =================================================================== --- test/CodeGen/X86/schedule-x86_64.ll +++ test/CodeGen/X86/schedule-x86_64.ll @@ -5769,8 +5769,8 @@ ; ; BTVER2-LABEL: test_div: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:1.00] -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [3:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: divb %dil # sched: [12:12.00] ; BTVER2-NEXT: divb (%r8) # sched: [15:12.00] @@ -6041,8 +6041,8 @@ ; ; BTVER2-LABEL: test_idiv: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:1.00] -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [3:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: idivb %dil # sched: [12:12.00] ; BTVER2-NEXT: idivb (%r8) # sched: [15:12.00] @@ -8869,8 +8869,8 @@ ; ; BTVER2-LABEL: test_mul: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:1.00] -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [3:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: mulb %dil # sched: [3:1.00] ; BTVER2-NEXT: mulb (%r8) # sched: [6:1.00] @@ -9049,8 +9049,8 @@ ; ; BTVER2-LABEL: test_neg: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:1.00] -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [3:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: negb %dil # sched: [1:0.50] ; BTVER2-NEXT: negb (%r8) # sched: [5:1.00] @@ -9376,8 +9376,8 @@ ; ; BTVER2-LABEL: test_not: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:1.00] -; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [3:1.00] +; BTVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: notb %dil # sched: [1:0.50] ; BTVER2-NEXT: notb (%r8) # sched: [5:1.00] @@ -10669,10 +10669,10 @@ ; BTVER2-LABEL: test_pop_push_16: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popw %ax # sched: [5:1.00] -; BTVER2-NEXT: popw (%rsi) # sched: [6:1.00] +; BTVER2-NEXT: popw %ax # sched: [3:1.00] +; BTVER2-NEXT: popw (%rsi) # sched: [4:1.00] ; BTVER2-NEXT: pushw %di # sched: [1:1.00] -; BTVER2-NEXT: pushw (%rsi) # sched: [6:1.00] +; BTVER2-NEXT: pushw (%rsi) # sched: [4:1.00] ; BTVER2-NEXT: pushw $4095 # imm = 0xFFF ; BTVER2-NEXT: # sched: [1:1.00] ; BTVER2-NEXT: pushw $7 # sched: [1:1.00] @@ -10815,10 +10815,10 @@ ; BTVER2-LABEL: test_pop_push_64: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popq %rax # sched: [5:1.00] -; BTVER2-NEXT: popq (%rsi) # sched: [6:1.00] +; BTVER2-NEXT: popq %rax # sched: [3:1.00] +; BTVER2-NEXT: popq (%rsi) # sched: [4:1.00] ; BTVER2-NEXT: pushq %rdi # sched: [1:1.00] -; BTVER2-NEXT: pushq (%rsi) # sched: [6:1.00] +; BTVER2-NEXT: pushq (%rsi) # sched: [4:1.00] ; BTVER2-NEXT: pushq $4095 # imm = 0xFFF ; BTVER2-NEXT: # sched: [1:1.00] ; BTVER2-NEXT: pushq $7 # sched: [1:1.00] @@ -10917,7 +10917,7 @@ ; BTVER2-LABEL: test_popf_pushf: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: popfq # sched: [5:1.00] +; BTVER2-NEXT: popfq # sched: [3:1.00] ; BTVER2-NEXT: pushfq # sched: [1:1.00] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] @@ -18172,7 +18172,7 @@ ; BTVER2-LABEL: test_xlat: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: xlatb # sched: [5:1.00] +; BTVER2-NEXT: xlatb # sched: [3:1.00] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; Index: test/CodeGen/X86/sse-schedule.ll =================================================================== --- test/CodeGen/X86/sse-schedule.ll +++ test/CodeGen/X86/sse-schedule.ll @@ -2243,13 +2243,13 @@ ; BTVER2-SSE-LABEL: test_ldmxcsr: ; BTVER2-SSE: # %bb.0: ; BTVER2-SSE-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:1.00] -; BTVER2-SSE-NEXT: ldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:1.00] +; BTVER2-SSE-NEXT: ldmxcsr -{{[0-9]+}}(%rsp) # sched: [3:1.00] ; BTVER2-SSE-NEXT: retq # sched: [4:1.00] ; ; BTVER2-LABEL: test_ldmxcsr: ; BTVER2: # %bb.0: ; BTVER2-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:1.00] -; BTVER2-NEXT: vldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:1.00] +; BTVER2-NEXT: vldmxcsr -{{[0-9]+}}(%rsp) # sched: [3:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-SSE-LABEL: test_ldmxcsr: @@ -4562,20 +4562,20 @@ ; BTVER2-SSE-LABEL: test_prefetch: ; BTVER2-SSE: # %bb.0: ; BTVER2-SSE-NEXT: #APP -; BTVER2-SSE-NEXT: prefetchnta (%rdi) # sched: [5:1.00] -; BTVER2-SSE-NEXT: prefetcht0 (%rdi) # sched: [5:1.00] -; BTVER2-SSE-NEXT: prefetcht1 (%rdi) # sched: [5:1.00] -; BTVER2-SSE-NEXT: prefetcht2 (%rdi) # sched: [5:1.00] +; BTVER2-SSE-NEXT: prefetchnta (%rdi) # sched: [3:1.00] +; BTVER2-SSE-NEXT: prefetcht0 (%rdi) # sched: [3:1.00] +; BTVER2-SSE-NEXT: prefetcht1 (%rdi) # sched: [3:1.00] +; BTVER2-SSE-NEXT: prefetcht2 (%rdi) # sched: [3:1.00] ; BTVER2-SSE-NEXT: #NO_APP ; BTVER2-SSE-NEXT: retq # sched: [4:1.00] ; ; BTVER2-LABEL: test_prefetch: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: prefetchnta (%rdi) # sched: [5:1.00] -; BTVER2-NEXT: prefetcht0 (%rdi) # sched: [5:1.00] -; BTVER2-NEXT: prefetcht1 (%rdi) # sched: [5:1.00] -; BTVER2-NEXT: prefetcht2 (%rdi) # sched: [5:1.00] +; BTVER2-NEXT: prefetchnta (%rdi) # sched: [3:1.00] +; BTVER2-NEXT: prefetcht0 (%rdi) # sched: [3:1.00] +; BTVER2-NEXT: prefetcht1 (%rdi) # sched: [3:1.00] +; BTVER2-NEXT: prefetcht2 (%rdi) # sched: [3:1.00] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -5860,13 +5860,13 @@ ; BTVER2-SSE-LABEL: test_stmxcsr: ; BTVER2-SSE: # %bb.0: ; BTVER2-SSE-NEXT: stmxcsr -{{[0-9]+}}(%rsp) # sched: [1:1.00] -; BTVER2-SSE-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [5:1.00] +; BTVER2-SSE-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [3:1.00] ; BTVER2-SSE-NEXT: retq # sched: [4:1.00] ; ; BTVER2-LABEL: test_stmxcsr: ; BTVER2: # %bb.0: ; BTVER2-NEXT: vstmxcsr -{{[0-9]+}}(%rsp) # sched: [1:1.00] -; BTVER2-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [3:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-SSE-LABEL: test_stmxcsr: Index: test/CodeGen/X86/sse2-schedule.ll =================================================================== --- test/CodeGen/X86/sse2-schedule.ll +++ test/CodeGen/X86/sse2-schedule.ll @@ -635,12 +635,12 @@ ; ; BTVER2-SSE-LABEL: test_clflush: ; BTVER2-SSE: # %bb.0: -; BTVER2-SSE-NEXT: clflush (%rdi) # sched: [5:1.00] +; BTVER2-SSE-NEXT: clflush (%rdi) # sched: [3:1.00] ; BTVER2-SSE-NEXT: retq # sched: [4:1.00] ; ; BTVER2-LABEL: test_clflush: ; BTVER2: # %bb.0: -; BTVER2-NEXT: clflush (%rdi) # sched: [5:1.00] +; BTVER2-NEXT: clflush (%rdi) # sched: [3:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-SSE-LABEL: test_clflush: Index: test/CodeGen/X86/x87-schedule.ll =================================================================== --- test/CodeGen/X86/x87-schedule.ll +++ test/CodeGen/X86/x87-schedule.ll @@ -285,8 +285,8 @@ ; ; BTVER2-LABEL: test_fadd: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fadd %st(0), %st(1) # sched: [3:1.00] ; BTVER2-NEXT: fadd %st(2) # sched: [3:1.00] @@ -421,8 +421,8 @@ ; ; BTVER2-LABEL: test_faddp_fiadd: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: faddp %st(1) # sched: [3:1.00] ; BTVER2-NEXT: faddp %st(2) # sched: [3:1.00] @@ -530,7 +530,7 @@ ; ; BTVER2-LABEL: test_fbld_fbstp: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fbld (%eax) # sched: [100:0.50] ; BTVER2-NEXT: fbstp (%eax) # sched: [100:0.50] @@ -1072,8 +1072,8 @@ ; ; BTVER2-LABEL: test_fcom: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fcom %st(1) # sched: [3:1.00] ; BTVER2-NEXT: fcom %st(3) # sched: [3:1.00] @@ -1217,8 +1217,8 @@ ; ; BTVER2-LABEL: test_fcomp_fcompp: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fcomp %st(1) # sched: [3:1.00] ; BTVER2-NEXT: fcomp %st(3) # sched: [3:1.00] @@ -1609,8 +1609,8 @@ ; ; BTVER2-LABEL: test_fdiv: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fdiv %st(0), %st(1) # sched: [19:19.00] ; BTVER2-NEXT: fdiv %st(2) # sched: [19:19.00] @@ -1745,8 +1745,8 @@ ; ; BTVER2-LABEL: test_fdivp_fidiv: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fdivp %st(1) # sched: [19:19.00] ; BTVER2-NEXT: fdivp %st(2) # sched: [19:19.00] @@ -1881,8 +1881,8 @@ ; ; BTVER2-LABEL: test_fdivr: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fdivr %st(0), %st(1) # sched: [19:19.00] ; BTVER2-NEXT: fdivr %st(2) # sched: [19:19.00] @@ -2017,8 +2017,8 @@ ; ; BTVER2-LABEL: test_fdivrp_fidivr: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fdivrp %st(1) # sched: [19:19.00] ; BTVER2-NEXT: fdivrp %st(2) # sched: [19:19.00] @@ -2234,8 +2234,8 @@ ; ; BTVER2-LABEL: test_ficom: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: ficoms (%ecx) # sched: [8:1.00] ; BTVER2-NEXT: ficoml (%eax) # sched: [8:1.00] @@ -2370,13 +2370,13 @@ ; ; BTVER2-LABEL: test_fild: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00] -; BTVER2-NEXT: #APP -; BTVER2-NEXT: filds (%edx) # sched: [5:1.00] -; BTVER2-NEXT: fildl (%ecx) # sched: [5:1.00] -; BTVER2-NEXT: fildll (%eax) # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00] +; BTVER2-NEXT: #APP +; BTVER2-NEXT: filds (%edx) # sched: [3:1.00] +; BTVER2-NEXT: fildl (%ecx) # sched: [3:1.00] +; BTVER2-NEXT: fildll (%eax) # sched: [3:1.00] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -2805,9 +2805,9 @@ ; ; BTVER2-LABEL: test_fist_fistp_fisttp: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fists (%edx) # sched: [1:1.00] ; BTVER2-NEXT: fistl (%ecx) # sched: [1:1.00] @@ -2960,14 +2960,14 @@ ; ; BTVER2-LABEL: test_fld: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fld %st(0) # sched: [1:0.50] -; BTVER2-NEXT: flds (%edx) # sched: [5:1.00] -; BTVER2-NEXT: fldl (%ecx) # sched: [5:1.00] -; BTVER2-NEXT: fldt (%eax) # sched: [5:1.00] +; BTVER2-NEXT: flds (%edx) # sched: [3:1.00] +; BTVER2-NEXT: fldl (%ecx) # sched: [3:1.00] +; BTVER2-NEXT: fldt (%eax) # sched: [3:1.00] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] ; @@ -3071,9 +3071,9 @@ ; ; BTVER2-LABEL: test_fldcw_fldenv: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP -; BTVER2-NEXT: fldcw (%eax) # sched: [5:1.00] +; BTVER2-NEXT: fldcw (%eax) # sched: [3:1.00] ; BTVER2-NEXT: fldenv (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retl # sched: [4:1.00] @@ -3348,8 +3348,8 @@ ; ; BTVER2-LABEL: test_fmul: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fmul %st(0), %st(1) # sched: [2:1.00] ; BTVER2-NEXT: fmul %st(2) # sched: [2:1.00] @@ -3484,8 +3484,8 @@ ; ; BTVER2-LABEL: test_fmulp_fimul: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fmulp %st(1) # sched: [2:1.00] ; BTVER2-NEXT: fmulp %st(2) # sched: [2:1.00] @@ -4000,7 +4000,7 @@ ; ; BTVER2-LABEL: test_frstor: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: frstor (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP @@ -4101,7 +4101,7 @@ ; ; BTVER2-LABEL: test_fsave: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: wait # sched: [100:0.50] ; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50] @@ -4195,7 +4195,7 @@ ; ; BTVER2-LABEL: test_fnsave: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fnsave (%eax) # sched: [100:0.50] ; BTVER2-NEXT: #NO_APP @@ -4683,9 +4683,9 @@ ; ; BTVER2-LABEL: test_fst_fstp: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fst %st(0) # sched: [1:0.50] ; BTVER2-NEXT: fsts (%edx) # sched: [1:1.00] @@ -4836,7 +4836,7 @@ ; ; BTVER2-LABEL: test_fstcw_fstenv_fstsw: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: wait # sched: [100:0.50] ; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50] @@ -4956,7 +4956,7 @@ ; ; BTVER2-LABEL: test_fnstcw_fnstenv_fnstsw: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fnstcw (%eax) # sched: [1:0.50] ; BTVER2-NEXT: fnstenv (%eax) # sched: [100:0.50] @@ -5088,8 +5088,8 @@ ; ; BTVER2-LABEL: test_fsub: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fsub %st(0), %st(1) # sched: [3:1.00] ; BTVER2-NEXT: fsub %st(2) # sched: [3:1.00] @@ -5224,8 +5224,8 @@ ; ; BTVER2-LABEL: test_fsubp_fisub: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fsubp %st(1) # sched: [3:1.00] ; BTVER2-NEXT: fsubp %st(2) # sched: [3:1.00] @@ -5360,8 +5360,8 @@ ; ; BTVER2-LABEL: test_fsubr: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fsubr %st(0), %st(1) # sched: [3:1.00] ; BTVER2-NEXT: fsubr %st(2) # sched: [3:1.00] @@ -5496,8 +5496,8 @@ ; ; BTVER2-LABEL: test_fsubrp_fisubr: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fsubrp %st(1) # sched: [3:1.00] ; BTVER2-NEXT: fsubrp %st(2) # sched: [3:1.00] @@ -6157,7 +6157,7 @@ ; ; BTVER2-LABEL: test_fxrstor_fxsave: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00] +; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00] ; BTVER2-NEXT: #APP ; BTVER2-NEXT: fxrstor (%eax) # sched: [100:0.50] ; BTVER2-NEXT: fxsave (%eax) # sched: [100:0.50] Index: test/tools/llvm-mca/X86/BtVer2/resources-avx1.s =================================================================== --- test/tools/llvm-mca/X86/BtVer2/resources-avx1.s +++ test/tools/llvm-mca/X86/BtVer2/resources-avx1.s @@ -1218,7 +1218,7 @@ # CHECK-NEXT: 1 6 1.00 * vinsertps $1, (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 1.00 * vlddqu (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 * vlddqu (%rax), %ymm2 -# CHECK-NEXT: 1 5 1.00 * * U vldmxcsr (%rax) +# CHECK-NEXT: 1 3 1.00 * * U vldmxcsr (%rax) # CHECK-NEXT: 1 1 1.00 * * U vmaskmovdqu %xmm0, %xmm1 # CHECK-NEXT: 1 6 1.00 * vmaskmovpd (%rax), %xmm0, %xmm2 # CHECK-NEXT: 2 6 2.00 * vmaskmovpd (%rax), %ymm0, %ymm2 Index: test/tools/llvm-mca/X86/BtVer2/resources-prefetchw.s =================================================================== --- test/tools/llvm-mca/X86/BtVer2/resources-prefetchw.s +++ test/tools/llvm-mca/X86/BtVer2/resources-prefetchw.s @@ -13,8 +13,8 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 5 1.00 * * prefetch (%rax) -# CHECK-NEXT: 1 5 1.00 * * prefetchw (%rax) +# CHECK-NEXT: 1 3 1.00 * * prefetch (%rax) +# CHECK-NEXT: 1 3 1.00 * * prefetchw (%rax) # CHECK: Resources: # CHECK-NEXT: [0] - JALU0 Index: test/tools/llvm-mca/X86/BtVer2/resources-sse1.s =================================================================== --- test/tools/llvm-mca/X86/BtVer2/resources-sse1.s +++ test/tools/llvm-mca/X86/BtVer2/resources-sse1.s @@ -230,7 +230,7 @@ # CHECK-NEXT: 1 24 19.00 * divps (%rax), %xmm2 # CHECK-NEXT: 1 19 19.00 divss %xmm0, %xmm2 # CHECK-NEXT: 1 24 19.00 * divss (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 * * U ldmxcsr (%rax) +# CHECK-NEXT: 1 3 1.00 * * U ldmxcsr (%rax) # CHECK-NEXT: 1 1 0.50 * * U maskmovq %mm0, %mm1 # CHECK-NEXT: 1 2 1.00 maxps %xmm0, %xmm2 # CHECK-NEXT: 1 7 1.00 * maxps (%rax), %xmm2 @@ -282,10 +282,10 @@ # CHECK-NEXT: 1 3 1.00 pmovmskb %xmm0, %ecx # CHECK-NEXT: 1 2 1.00 pmulhuw %mm0, %mm2 # CHECK-NEXT: 1 7 1.00 * pmulhuw (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 * * prefetcht0 (%rax) -# CHECK-NEXT: 1 5 1.00 * * prefetcht1 (%rax) -# CHECK-NEXT: 1 5 1.00 * * prefetcht2 (%rax) -# CHECK-NEXT: 1 5 1.00 * * prefetchnta (%rax) +# CHECK-NEXT: 1 3 1.00 * * prefetcht0 (%rax) +# CHECK-NEXT: 1 3 1.00 * * prefetcht1 (%rax) +# CHECK-NEXT: 1 3 1.00 * * prefetcht2 (%rax) +# CHECK-NEXT: 1 3 1.00 * * prefetchnta (%rax) # CHECK-NEXT: 1 2 0.50 psadbw %mm0, %mm2 # CHECK-NEXT: 1 7 1.00 * psadbw (%rax), %mm2 # CHECK-NEXT: 1 1 0.50 pshufw $1, %mm0, %mm2 Index: test/tools/llvm-mca/X86/BtVer2/resources-sse2.s =================================================================== --- test/tools/llvm-mca/X86/BtVer2/resources-sse2.s +++ test/tools/llvm-mca/X86/BtVer2/resources-sse2.s @@ -410,7 +410,7 @@ # CHECK-NEXT: 1 6 1.00 * andnpd (%rax), %xmm2 # CHECK-NEXT: 1 1 0.50 andpd %xmm0, %xmm2 # CHECK-NEXT: 1 6 1.00 * andpd (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 * * U clflush (%rax) +# CHECK-NEXT: 1 3 1.00 * * U clflush (%rax) # CHECK-NEXT: 1 2 1.00 cmppd $0, %xmm0, %xmm2 # CHECK-NEXT: 1 7 1.00 * cmppd $0, (%rax), %xmm2 # CHECK-NEXT: 1 2 1.00 cmpsd $0, %xmm0, %xmm2 Index: test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s =================================================================== --- test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s +++ test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s @@ -1576,7 +1576,7 @@ # CHECK-NEXT: 1 1 0.50 xchgq %rbx, %rax # CHECK-NEXT: 1 1 0.50 xchgq %rbx, %rcx # CHECK-NEXT: 1 4 1.00 * * xchgq %rax, (%rbx) -# CHECK-NEXT: 1 5 1.00 * xlatb +# CHECK-NEXT: 1 3 1.00 * xlatb # CHECK-NEXT: 1 1 0.50 xorb $7, %al # CHECK-NEXT: 1 1 0.50 xorb $7, %dil # CHECK-NEXT: 1 5 1.00 * * xorb $7, (%rax) Index: test/tools/llvm-mca/X86/BtVer2/resources-x87.s =================================================================== --- test/tools/llvm-mca/X86/BtVer2/resources-x87.s +++ test/tools/llvm-mca/X86/BtVer2/resources-x87.s @@ -262,9 +262,9 @@ # CHECK-NEXT: 1 8 1.00 U ficoml (%eax) # CHECK-NEXT: 1 8 1.00 U ficomps (%ecx) # CHECK-NEXT: 1 8 1.00 U ficompl (%eax) -# CHECK-NEXT: 1 5 1.00 * U filds (%edx) -# CHECK-NEXT: 1 5 1.00 * U fildl (%ecx) -# CHECK-NEXT: 1 5 1.00 * U fildll (%eax) +# CHECK-NEXT: 1 3 1.00 * U filds (%edx) +# CHECK-NEXT: 1 3 1.00 * U fildl (%ecx) +# CHECK-NEXT: 1 3 1.00 * U fildll (%eax) # CHECK-NEXT: 1 100 0.50 U fincstp # CHECK-NEXT: 1 100 0.50 U fninit # CHECK-NEXT: 1 1 1.00 * U fists (%edx) @@ -276,10 +276,10 @@ # CHECK-NEXT: 1 1 1.00 * U fisttpl (%ecx) # CHECK-NEXT: 1 1 1.00 * U fisttpll (%eax) # CHECK-NEXT: 1 1 0.50 U fld %st(0) -# CHECK-NEXT: 1 5 1.00 * U flds (%edx) -# CHECK-NEXT: 1 5 1.00 * U fldl (%ecx) -# CHECK-NEXT: 1 5 1.00 * U fldt (%eax) -# CHECK-NEXT: 1 5 1.00 * U fldcw (%eax) +# CHECK-NEXT: 1 3 1.00 * U flds (%edx) +# CHECK-NEXT: 1 3 1.00 * U fldl (%ecx) +# CHECK-NEXT: 1 3 1.00 * U fldt (%eax) +# CHECK-NEXT: 1 3 1.00 * U fldcw (%eax) # CHECK-NEXT: 1 100 0.50 U fldenv (%eax) # CHECK-NEXT: 1 3 1.00 U fld1 # CHECK-NEXT: 1 3 1.00 U fldl2e