Index: lib/Target/AMDGPU/AMDGPU.td =================================================================== --- lib/Target/AMDGPU/AMDGPU.td +++ lib/Target/AMDGPU/AMDGPU.td @@ -764,7 +764,6 @@ include "SISchedule.td" include "GCNProcessors.td" include "AMDGPUInstrInfo.td" -include "SIIntrinsics.td" include "AMDGPURegisterInfo.td" include "AMDGPURegisterBanks.td" include "AMDGPUInstructions.td" Index: lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp =================================================================== --- lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp +++ lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp @@ -14,7 +14,6 @@ //===----------------------------------------------------------------------===// #include "AMDGPU.h" -#include "AMDGPUIntrinsicInfo.h" #include "llvm/ADT/SetVector.h" #include "llvm/Analysis/LegacyDivergenceAnalysis.h" #include "llvm/Analysis/LoopInfo.h" Index: lib/Target/AMDGPU/AMDGPUISelLowering.cpp =================================================================== --- lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -21,7 +21,6 @@ #include "AMDGPU.h" #include "AMDGPUCallLowering.h" #include "AMDGPUFrameLowering.h" -#include "AMDGPUIntrinsicInfo.h" #include "AMDGPURegisterInfo.h" #include "AMDGPUSubtarget.h" #include "AMDGPUTargetMachine.h" Index: lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h =================================================================== --- lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h +++ /dev/null @@ -1,58 +0,0 @@ -//===- AMDGPUIntrinsicInfo.h - AMDGPU Intrinsic Information ------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//==-----------------------------------------------------------------------===// -// -/// \file -/// Interface for the AMDGPU Implementation of the Intrinsic Info class. -// -//===-----------------------------------------------------------------------===// -#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINTRINSICINFO_H -#define LLVM_LIB_TARGET_AMDGPU_AMDGPUINTRINSICINFO_H - -#include "llvm/IR/Intrinsics.h" -#include "llvm/Target/TargetIntrinsicInfo.h" - -namespace llvm { -class TargetMachine; - -namespace SIIntrinsic { -enum ID { - last_non_AMDGPU_intrinsic = Intrinsic::num_intrinsics - 1, -#define GET_INTRINSIC_ENUM_VALUES -#include "AMDGPUGenIntrinsicEnums.inc" -#undef GET_INTRINSIC_ENUM_VALUES - , num_AMDGPU_intrinsics -}; - -} // end namespace AMDGPUIntrinsic - -class AMDGPUIntrinsicInfo final : public TargetIntrinsicInfo { -public: - AMDGPUIntrinsicInfo(); - - StringRef getName(unsigned IntrId, ArrayRef Tys = None) const; - - std::string getName(unsigned IntrId, Type **Tys = nullptr, - unsigned NumTys = 0) const override; - - unsigned lookupName(const char *Name, unsigned Len) const override; - bool isOverloaded(unsigned IID) const override; - Function *getDeclaration(Module *M, unsigned ID, - Type **Tys = nullptr, - unsigned NumTys = 0) const override; - - Function *getDeclaration(Module *M, unsigned ID, - ArrayRef = None) const; - - FunctionType *getType(LLVMContext &Context, unsigned ID, - ArrayRef Tys = None) const; -}; - -} // end namespace llvm - -#endif Index: lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp =================================================================== --- lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp +++ /dev/null @@ -1,103 +0,0 @@ -//===- AMDGPUIntrinsicInfo.cpp - AMDGPU Intrinsic Information ---*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//==-----------------------------------------------------------------------===// -// -/// \file -/// AMDGPU Implementation of the IntrinsicInfo class. -// -//===-----------------------------------------------------------------------===// - -#include "AMDGPUIntrinsicInfo.h" -#include "AMDGPUSubtarget.h" -#include "llvm/IR/DerivedTypes.h" -#include "llvm/IR/Intrinsics.h" -#include "llvm/IR/Module.h" - -using namespace llvm; - -AMDGPUIntrinsicInfo::AMDGPUIntrinsicInfo() - : TargetIntrinsicInfo() {} - -static const char *const IntrinsicNameTable[] = { -#define GET_INTRINSIC_NAME_TABLE -#include "AMDGPUGenIntrinsicImpl.inc" -#undef GET_INTRINSIC_NAME_TABLE -}; - -namespace { -#define GET_INTRINSIC_ATTRIBUTES -#include "AMDGPUGenIntrinsicImpl.inc" -#undef GET_INTRINSIC_ATTRIBUTES -} - -StringRef AMDGPUIntrinsicInfo::getName(unsigned IntrID, - ArrayRef Tys) const { - if (IntrID < Intrinsic::num_intrinsics) - return StringRef(); - - assert(IntrID < SIIntrinsic::num_AMDGPU_intrinsics && - "Invalid intrinsic ID"); - - return IntrinsicNameTable[IntrID - Intrinsic::num_intrinsics]; -} - -std::string AMDGPUIntrinsicInfo::getName(unsigned IntrID, Type **Tys, - unsigned NumTys) const { - return getName(IntrID, makeArrayRef(Tys, NumTys)).str(); -} - -FunctionType *AMDGPUIntrinsicInfo::getType(LLVMContext &Context, unsigned ID, - ArrayRef Tys) const { - // FIXME: Re-use Intrinsic::getType machinery - llvm_unreachable("unhandled intrinsic"); -} - -unsigned AMDGPUIntrinsicInfo::lookupName(const char *NameData, - unsigned Len) const { - StringRef Name(NameData, Len); - if (!Name.startswith("llvm.")) - return 0; // All intrinsics start with 'llvm.' - - // Look for a name match in our table. If the intrinsic is not overloaded, - // require an exact match. If it is overloaded, require a prefix match. The - // AMDGPU enum enum starts at Intrinsic::num_intrinsics. - int Idx = Intrinsic::lookupLLVMIntrinsicByName(IntrinsicNameTable, Name); - if (Idx >= 0) { - bool IsPrefixMatch = Name.size() > strlen(IntrinsicNameTable[Idx]); - return IsPrefixMatch == isOverloaded(Idx + 1) - ? Intrinsic::num_intrinsics + Idx - : 0; - } - - return 0; -} - -bool AMDGPUIntrinsicInfo::isOverloaded(unsigned id) const { -// Overload Table -#define GET_INTRINSIC_OVERLOAD_TABLE -#include "AMDGPUGenIntrinsicImpl.inc" -#undef GET_INTRINSIC_OVERLOAD_TABLE -} - -Function *AMDGPUIntrinsicInfo::getDeclaration(Module *M, unsigned IntrID, - ArrayRef Tys) const { - FunctionType *FTy = getType(M->getContext(), IntrID, Tys); - Function *F - = cast(M->getOrInsertFunction(getName(IntrID, Tys), FTy)); - - AttributeList AS = - getAttributes(M->getContext(), static_cast(IntrID)); - F->setAttributes(AS); - return F; -} - -Function *AMDGPUIntrinsicInfo::getDeclaration(Module *M, unsigned IntrID, - Type **Tys, - unsigned NumTys) const { - return getDeclaration(M, IntrID, makeArrayRef(Tys, NumTys)); -} Index: lib/Target/AMDGPU/AMDGPUTargetMachine.h =================================================================== --- lib/Target/AMDGPU/AMDGPUTargetMachine.h +++ lib/Target/AMDGPU/AMDGPUTargetMachine.h @@ -15,7 +15,6 @@ #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H -#include "AMDGPUIntrinsicInfo.h" #include "AMDGPUSubtarget.h" #include "llvm/ADT/Optional.h" #include "llvm/ADT/StringMap.h" @@ -95,7 +94,6 @@ class GCNTargetMachine final : public AMDGPUTargetMachine { private: - AMDGPUIntrinsicInfo IntrinsicInfo; mutable StringMap> SubtargetMap; public: @@ -110,10 +108,6 @@ TargetTransformInfo getTargetTransformInfo(const Function &F) override; - const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override { - return &IntrinsicInfo; - } - bool useIPRA() const override { return true; } Index: lib/Target/AMDGPU/CMakeLists.txt =================================================================== --- lib/Target/AMDGPU/CMakeLists.txt +++ lib/Target/AMDGPU/CMakeLists.txt @@ -45,7 +45,6 @@ AMDGPUHSAMetadataStreamer.cpp AMDGPUInstrInfo.cpp AMDGPUInstructionSelector.cpp - AMDGPUIntrinsicInfo.cpp AMDGPUISelDAGToDAG.cpp AMDGPUISelLowering.cpp AMDGPULegalizerInfo.cpp Index: lib/Target/AMDGPU/SIISelLowering.cpp =================================================================== --- lib/Target/AMDGPU/SIISelLowering.cpp +++ lib/Target/AMDGPU/SIISelLowering.cpp @@ -19,7 +19,6 @@ #include "SIISelLowering.h" #include "AMDGPU.h" -#include "AMDGPUIntrinsicInfo.h" #include "AMDGPUSubtarget.h" #include "AMDGPUTargetMachine.h" #include "SIDefines.h" @@ -5066,12 +5065,6 @@ return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, SDLoc(DAG.getEntryNode()), MFI->getArgInfo().WorkItemIDZ); - case SIIntrinsic::SI_load_const: { - SDValue Load = - lowerSBuffer(MVT::i32, DL, Op.getOperand(1), Op.getOperand(2), - DAG.getTargetConstant(0, DL, MVT::i1), DAG); - return DAG.getNode(ISD::BITCAST, DL, MVT::f32, Load); - } case Intrinsic::amdgcn_s_buffer_load: { unsigned Cache = cast(Op.getOperand(3))->getZExtValue(); return lowerSBuffer(VT, DL, Op.getOperand(1), Op.getOperand(2), Index: lib/Target/AMDGPU/SIInstrInfo.cpp =================================================================== --- lib/Target/AMDGPU/SIInstrInfo.cpp +++ lib/Target/AMDGPU/SIInstrInfo.cpp @@ -14,7 +14,6 @@ #include "SIInstrInfo.h" #include "AMDGPU.h" -#include "AMDGPUIntrinsicInfo.h" #include "AMDGPUSubtarget.h" #include "GCNHazardRecognizer.h" #include "SIDefines.h" Index: lib/Target/AMDGPU/SIIntrinsics.td =================================================================== --- lib/Target/AMDGPU/SIIntrinsics.td +++ /dev/null @@ -1,19 +0,0 @@ -//===-- SIIntrinsics.td - SI Intrinsic defs ----------------*- tablegen -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Backend internal SI Intrinsic Definitions. User code should not -// directly use these. -// -//===----------------------------------------------------------------------===// - - -let TargetPrefix = "SI", isTarget = 1 in { - def int_SI_load_const : Intrinsic <[llvm_float_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>; - -} // End TargetPrefix = "SI", isTarget = 1