Index: include/llvm/Target/GenericOpcodes.td
===================================================================
--- include/llvm/Target/GenericOpcodes.td
+++ include/llvm/Target/GenericOpcodes.td
@@ -93,12 +93,14 @@
   let hasSideEffects = 0;
 }
 
+// Only supports scalar result types
 def G_CONSTANT : GenericInstruction {
   let OutOperandList = (outs type0:$dst);
   let InOperandList = (ins unknown:$imm);
   let hasSideEffects = 0;
 }
 
+// Only supports scalar result types
 def G_FCONSTANT : GenericInstruction {
   let OutOperandList = (outs type0:$dst);
   let InOperandList = (ins unknown:$imm);
Index: lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
===================================================================
--- lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -243,10 +243,8 @@
                                                     const ConstantInt &Val) {
   LLT Ty = Res.getLLTTy(*getMRI());
 
-  assert((Ty.isScalar() || Ty.isPointer()) && "invalid operand type");
-
   const ConstantInt *NewVal = &Val;
-  if (Ty.getSizeInBits() != Val.getBitWidth())
+  if (Ty.getScalarSizeInBits() != Val.getBitWidth())
     NewVal = ConstantInt::get(getMF().getFunction().getContext(),
                               Val.getValue().sextOrTrunc(Ty.getSizeInBits()));
 
@@ -266,7 +264,7 @@
 
 MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
                                                      const ConstantFP &Val) {
-  assert(Res.getLLTTy(*getMRI()).isScalar() && "invalid operand type");
+  assert(!Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
 
   auto MIB = buildInstr(TargetOpcode::G_FCONSTANT);
   Res.addDefToMIB(*getMRI(), MIB);
Index: lib/CodeGen/MachineVerifier.cpp
===================================================================
--- lib/CodeGen/MachineVerifier.cpp
+++ lib/CodeGen/MachineVerifier.cpp
@@ -984,6 +984,16 @@
   switch(MI->getOpcode()) {
   default:
     break;
+  case TargetOpcode::G_CONSTANT:
+  case TargetOpcode::G_FCONSTANT: {
+    if (MI->getNumOperands() < MCID.getNumOperands())
+      break;
+
+    LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
+    if (DstTy.isVector())
+      report("Instruction cannot use a vector result type", MI);
+    break;
+  }
   case TargetOpcode::G_LOAD:
   case TargetOpcode::G_STORE:
   case TargetOpcode::G_ZEXTLOAD:
Index: test/Verifier/test_g_constant.mir
===================================================================
--- /dev/null
+++ test/Verifier/test_g_constant.mir
@@ -0,0 +1,15 @@
+#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: global-isel, aarch64-registered-target
+
+---
+name:            test_constant_vector
+legalized:       true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+    ; CHECK: Bad machine code: Instruction cannot use a vector result type
+    %0:_(<2 x s32>) = G_CONSTANT i32 0
+...
Index: test/Verifier/test_g_fconstant.mir
===================================================================
--- /dev/null
+++ test/Verifier/test_g_fconstant.mir
@@ -0,0 +1,15 @@
+#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: global-isel, aarch64-registered-target
+
+---
+name:            test_fconstant_vector
+legalized:       true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+    ; CHECK: Bad machine code: Instruction cannot use a vector result type
+    %0:_(<2 x s32>) = G_FCONSTANT float 0.0
+...