Index: lib/Target/X86/X86ISelDAGToDAG.cpp =================================================================== --- lib/Target/X86/X86ISelDAGToDAG.cpp +++ lib/Target/X86/X86ISelDAGToDAG.cpp @@ -34,6 +34,7 @@ #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" +#include using namespace llvm; #define DEBUG_TYPE "x86-isel" @@ -1712,6 +1713,12 @@ // Quit if not 32-bit imm. if ((int32_t)CNVal != CNVal) return Val; + // Quit if INT32_MIN: it would be negated as it is negative and overflow, + // producing an immediate that does not fit in the 32 bits available for + // an immediate operand to sub. However, it still fits in 32 bits for the + // add (since it is not negated) so we can return target-constant. + if (CNVal == INT32_MIN) + return CurDAG->getTargetConstant(CNVal, NVT); // For atomic-load-add, we could do some optimizations. if (Op == ADD) { // Translate to INC/DEC if ADD by 1 or -1. @@ -1824,6 +1831,8 @@ Opc = AtomicOpcTbl[Op][SextConstantI64]; else if (i64immSExt32(Val.getNode())) Opc = AtomicOpcTbl[Op][ConstantI64]; + else + llvm_unreachable("True 64 bits constant in SelectAtomicLoadArith"); } else Opc = AtomicOpcTbl[Op][I64]; break; Index: test/CodeGen/X86/pr21099.ll =================================================================== --- /dev/null +++ test/CodeGen/X86/pr21099.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -O2 -march=x86-64 -verify-machineinstrs | FileCheck %s + +define void @pr21099(i64* %p) { +; CHECK-LABEL: pr21099 +; CHECK: lock +; CHECK-NEXT: addq $-2147483648 +; This number is INT32_MIN: 0x80000000UL + %1 = atomicrmw add i64* %p, i64 -2147483648 seq_cst + ret void +}