Index: ELF/Arch/MSP430.cpp
===================================================================
--- /dev/null
+++ ELF/Arch/MSP430.cpp
@@ -0,0 +1,97 @@
+//===- MSP430.cpp ---------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// The MSP430 is a 16-bit microcontroller RISC architecture. The instruction set
+// has only 27 core instructions orthogonally augmented with a variety
+// of addressing modes for source and destination operands. Entire address space
+// of MSP430 is 64KB (extended MSP430X architecture is not considered here).
+//
+// A typical MSP430 MCU has several kilobytes of RAM and ROM, plenty
+// of peripherals and is generally optimized for low power consumption.
+//
+// The current MSP430 support is sufficient to link simple programs and has been
+// tested on a simulator only.
+//
+//===----------------------------------------------------------------------===//
+
+#include "InputFiles.h"
+#include "Symbols.h"
+#include "Target.h"
+#include "lld/Common/ErrorHandler.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::object;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class MSP430 final : public TargetInfo {
+public:
+  MSP430();
+  RelExpr getRelExpr(RelType Type, const Symbol &S,
+                     const uint8_t *Loc) const override;
+  void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+};
+} // namespace
+
+MSP430::MSP430() {
+  // mov.b #0, r3
+  TrapInstr = {0x43, 0x43};
+}
+
+RelExpr MSP430::getRelExpr(RelType Type, const Symbol &S,
+                           const uint8_t *Loc) const {
+  switch (Type) {
+  case R_MSP430_10_PCREL:
+  case R_MSP430_16_PCREL:
+  case R_MSP430_16_PCREL_BYTE:
+  case R_MSP430_2X_PCREL:
+  case R_MSP430_RL_PCREL:
+  case R_MSP430_SYM_DIFF:
+    return R_PC;
+  default:
+    return R_ABS;
+  }
+}
+
+void MSP430::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
+  switch (Type) {
+  case R_MSP430_8:
+    checkIntUInt(Loc, Val, 8, Type);
+    *Loc = Val;
+    break;
+  case R_MSP430_16:
+  case R_MSP430_16_PCREL:
+  case R_MSP430_16_BYTE:
+  case R_MSP430_16_PCREL_BYTE:
+    checkIntUInt(Loc, Val, 16, Type);
+    write16le(Loc, Val);
+    break;
+  case R_MSP430_32:
+    checkIntUInt(Loc, Val, 32, Type);
+    write32le(Loc, Val);
+    break;
+  case R_MSP430_10_PCREL: {
+    checkInt(Loc, Offset, 10, Type);
+    write16le(Loc, (read16le(Loc) & 0xFC00) | (Offset & 0x3FF));
+    break;
+  }
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + toString(Type));
+  }
+}
+
+TargetInfo *elf::getMSP430TargetInfo() {
+  static MSP430 Target;
+  return &Target;
+}
Index: ELF/CMakeLists.txt
===================================================================
--- ELF/CMakeLists.txt
+++ ELF/CMakeLists.txt
@@ -15,6 +15,7 @@
   Arch/Hexagon.cpp
   Arch/Mips.cpp
   Arch/MipsArchTree.cpp
+  Arch/MSP430.cpp
   Arch/PPC.cpp
   Arch/PPC64.cpp
   Arch/RISCV.cpp
Index: ELF/InputFiles.cpp
===================================================================
--- ELF/InputFiles.cpp
+++ ELF/InputFiles.cpp
@@ -1081,6 +1081,8 @@
   case Triple::mips64:
   case Triple::mips64el:
     return EM_MIPS;
+  case Triple::msp430:
+    return EM_MSP430;
   case Triple::ppc:
     return EM_PPC;
   case Triple::ppc64:
Index: ELF/Target.h
===================================================================
--- ELF/Target.h
+++ ELF/Target.h
@@ -146,6 +146,7 @@
 TargetInfo *getARMTargetInfo();
 TargetInfo *getAVRTargetInfo();
 TargetInfo *getHexagonTargetInfo();
+TargetInfo *getMSP430TargetInfo();
 TargetInfo *getPPC64TargetInfo();
 TargetInfo *getPPCTargetInfo();
 TargetInfo *getRISCVTargetInfo();
Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -75,6 +75,8 @@
     default:
       llvm_unreachable("unsupported MIPS target");
     }
+  case EM_MSP430:
+    return getMSP430TargetInfo();
   case EM_PPC:
     return getPPCTargetInfo();
   case EM_PPC64:
Index: test/ELF/Inputs/msp430.s
===================================================================
--- /dev/null
+++ test/ELF/Inputs/msp430.s
@@ -0,0 +1,4 @@
+  .text
+  .global _start
+_start:
+  nop
Index: test/ELF/msp430.s
===================================================================
--- /dev/null
+++ test/ELF/msp430.s
@@ -0,0 +1,40 @@
+; REQUIRES: msp430
+; RUN: llvm-mc -filetype=obj -triple=msp430-elf %s -o %t
+; RUN: llvm-mc -filetype=obj -triple=msp430-elf %S/Inputs/msp430.s -o %t2
+; RUN: ld.lld --Tdata=0x2000 --Ttext=0x8000 --defsym=_byte=0x21 %t2 %t -o %t3
+; RUN: llvm-objdump -s -d %t3 | FileCheck %s
+
+;; Check handling of basic msp430 relocation types.
+
+  .text
+  .global foo
+foo:
+;; R_MSP430_10_PCREL
+  jmp _start
+
+; CHECK:      Disassembly of section .text:
+; CHECK-NEXT: _start:
+; CHECK-NEXT: 8000: {{.*}} nop
+; CHECK:      foo:
+; CHECK-NEXT: 8004: {{.*}} jmp $-4
+
+;; R_MSP430_16_BYTE
+  call #_start
+
+; CHECK:      call #32768
+
+;; R_MSP430_16_PCREL_BYTE
+  mov #-1, _start
+
+; CHECK:      800a: {{.*}} mov #-1, -12
+
+  .data
+;; R_MSP430_8
+  .byte _byte
+;; R_MSP430_16
+  .word _start
+;; R_MSP430_32
+  .long _start
+
+; CHECK:      Contents of section .data:
+; CHECK-NEXT: 2000 21008000 800000
Index: test/lit.cfg.py
===================================================================
--- test/lit.cfg.py
+++ test/lit.cfg.py
@@ -72,6 +72,7 @@
                           'AVR': 'avr',
                           'Hexagon': 'hexagon',
                           'Mips': 'mips',
+                          'MSP430': 'msp430',
                           'PowerPC': 'ppc',
                           'RISCV': 'riscv',
                           'Sparc': 'sparc',