Index: lib/Target/AArch64/AArch64.td =================================================================== --- lib/Target/AArch64/AArch64.td +++ lib/Target/AArch64/AArch64.td @@ -312,8 +312,8 @@ def FeatureSSBS : SubtargetFeature<"ssbs", "HasSSBS", "true", "Enable Speculative Store Bypass Safe bit" >; -def FeaturePredCtrl : SubtargetFeature<"predctrl", "HasPredCtrl", "true", - "Enable execution and data prediction invalidation instructions" >; +def FeaturePredRes : SubtargetFeature<"predres", "HasPredRes", "true", + "Enable v8.5a execution and data prediction invalidation instructions" >; def FeatureCacheDeepPersist : SubtargetFeature<"ccdp", "HasCCDP", "true", "Enable v8.5 Cache Clean to Point of Deep Persistence" >; @@ -352,7 +352,7 @@ def HasV8_5aOps : SubtargetFeature< "v8.5a", "HasV8_5aOps", "true", "Support ARM v8.5a instructions", [HasV8_4aOps, FeatureAltFPCmp, FeatureFRInt3264, FeatureSpecRestrict, - FeatureSSBS, FeatureSB, FeaturePredCtrl, FeatureCacheDeepPersist, + FeatureSSBS, FeatureSB, FeaturePredRes, FeatureCacheDeepPersist, FeatureBranchTargetId] >; Index: lib/Target/AArch64/AArch64InstrInfo.td =================================================================== --- lib/Target/AArch64/AArch64InstrInfo.td +++ lib/Target/AArch64/AArch64InstrInfo.td @@ -116,8 +116,8 @@ AssemblerPredicate<"FeatureFRInt3264", "frint3264">; def HasSB : Predicate<"Subtarget->hasSB()">, AssemblerPredicate<"FeatureSB", "sb">; -def HasPredCtrl : Predicate<"Subtarget->hasPredCtrl()">, - AssemblerPredicate<"FeaturePredCtrl", "predctrl">; +def HasPredRes : Predicate<"Subtarget->hasPredRes()">, + AssemblerPredicate<"FeaturePredRes", "predres">; def HasCCDP : Predicate<"Subtarget->hasCCDP()">, AssemblerPredicate<"FeatureCacheDeepPersist", "ccdp">; def HasBTI : Predicate<"Subtarget->hasBTI()">, Index: lib/Target/AArch64/AArch64Subtarget.h =================================================================== --- lib/Target/AArch64/AArch64Subtarget.h +++ lib/Target/AArch64/AArch64Subtarget.h @@ -128,7 +128,7 @@ bool HasSpecRestrict = false; bool HasSSBS = false; bool HasSB = false; - bool HasPredCtrl = false; + bool HasPredRes = false; bool HasCCDP = false; bool HasBTI = false; bool HasRandGen = false; @@ -357,7 +357,7 @@ bool hasSpecRestrict() const { return HasSpecRestrict; } bool hasSSBS() const { return HasSSBS; } bool hasSB() const { return HasSB; } - bool hasPredCtrl() const { return HasPredCtrl; } + bool hasPredRes() const { return HasPredRes; } bool hasCCDP() const { return HasCCDP; } bool hasBTI() const { return HasBTI; } bool hasRandGen() const { return HasRandGen; } Index: lib/Target/AArch64/AArch64SystemOperands.td =================================================================== --- lib/Target/AArch64/AArch64SystemOperands.td +++ lib/Target/AArch64/AArch64SystemOperands.td @@ -501,7 +501,7 @@ code Requires = [{ {} }]; } -let Requires = [{ {AArch64::FeaturePredCtrl} }] in { +let Requires = [{ {AArch64::FeaturePredRes} }] in { def : PRCTX<"RCTX", 0b0011>; } Index: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp =================================================================== --- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -2826,7 +2826,7 @@ {"simd", {AArch64::FeatureNEON}}, {"ras", {AArch64::FeatureRAS}}, {"lse", {AArch64::FeatureLSE}}, - {"predctrl", {AArch64::FeaturePredCtrl}}, + {"predres", {AArch64::FeaturePredRes}}, {"ccdp", {AArch64::FeatureCacheDeepPersist}}, {"mte", {AArch64::FeatureMTE}}, {"tlb-rmi", {AArch64::FeatureTLB_RMI}}, Index: test/MC/AArch64/armv8.5a-predres-error.s =================================================================== --- test/MC/AArch64/armv8.5a-predres-error.s +++ test/MC/AArch64/armv8.5a-predres-error.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s 2>&1| FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predres < %s 2>&1| FileCheck %s cfp rctx dvp rctx Index: test/MC/AArch64/armv8.5a-predres.s =================================================================== --- test/MC/AArch64/armv8.5a-predres.s +++ test/MC/AArch64/armv8.5a-predres.s @@ -1,6 +1,6 @@ -// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predres < %s | FileCheck %s // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-predctrl < %s 2>&1 | FileCheck %s --check-prefix=NOPREDCTRL +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-predres < %s 2>&1 | FileCheck %s --check-prefix=NOPREDRES cfp rctx, x0 dvp rctx, x1 @@ -10,9 +10,9 @@ // CHECK: dvp rctx, x1 // encoding: [0xa1,0x73,0x0b,0xd5] // CHECK: cpp rctx, x2 // encoding: [0xe2,0x73,0x0b,0xd5] -// NOPREDCTRL: CFPRCTX requires predctrl -// NOPREDCTRL-NEXT: cfp -// NOPREDCTRL: DVPRCTX requires predctrl -// NOPREDCTRL-NEXT: dvp -// NOPREDCTRL: CPPRCTX requires predctrl -// NOPREDCTRL-NEXT: cpp +// NOPREDRES: CFPRCTX requires predres +// NOPREDRES-NEXT: cfp +// NOPREDRES: DVPRCTX requires predres +// NOPREDRES-NEXT: dvp +// NOPREDRES: CPPRCTX requires predres +// NOPREDRES-NEXT: cpp Index: test/MC/Disassembler/AArch64/armv8.5a-predres.txt =================================================================== --- test/MC/Disassembler/AArch64/armv8.5a-predres.txt +++ test/MC/Disassembler/AArch64/armv8.5a-predres.txt @@ -1,6 +1,6 @@ -# RUN: llvm-mc -triple=aarch64 -mattr=+predctrl -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=+predres -disassemble < %s | FileCheck %s # RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s -# RUN: llvm-mc -triple=aarch64 -mattr=-predctrl -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB +# RUN: llvm-mc -triple=aarch64 -mattr=-predres -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB [0x80 0x73 0x0b 0xd5] [0xa1 0x73 0x0b 0xd5]