Index: clang/include/clang/Driver/Options.td
===================================================================
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -2118,7 +2118,7 @@
 def mno_fix_cortex_a53_835769 : Flag<["-"], "mno-fix-cortex-a53-835769">,
   Group<m_aarch64_Features_Group>,
   HelpText<"Don't workaround Cortex-A53 erratum 835769 (AArch64 only)">;
-foreach i = {1-7,18,20} in
+foreach i = {0-7,9-15,18,20-28} in
   def ffixed_x#i : Flag<["-"], "ffixed-x"#i>, Group<m_aarch64_Features_Group>,
     HelpText<"Reserve the "#i#" register (AArch64 only)">;
 
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -315,6 +315,9 @@
     if (A->getOption().matches(options::OPT_mno_unaligned_access))
       Features.push_back("+strict-align");
 
+  if (Args.hasArg(options::OPT_ffixed_x0))
+    Features.push_back("+reserve-x0");
+
   if (Args.hasArg(options::OPT_ffixed_x1))
     Features.push_back("+reserve-x1");
 
@@ -336,12 +339,54 @@
   if (Args.hasArg(options::OPT_ffixed_x7))
     Features.push_back("+reserve-x7");
 
+  if (Args.hasArg(options::OPT_ffixed_x9))
+    Features.push_back("+reserve-x9");
+
+  if (Args.hasArg(options::OPT_ffixed_x10))
+    Features.push_back("+reserve-x10");
+
+  if (Args.hasArg(options::OPT_ffixed_x11))
+    Features.push_back("+reserve-x11");
+
+  if (Args.hasArg(options::OPT_ffixed_x12))
+    Features.push_back("+reserve-x12");
+
+  if (Args.hasArg(options::OPT_ffixed_x13))
+    Features.push_back("+reserve-x13");
+
+  if (Args.hasArg(options::OPT_ffixed_x14))
+    Features.push_back("+reserve-x14");
+
+  if (Args.hasArg(options::OPT_ffixed_x15))
+    Features.push_back("+reserve-x15");
+
   if (Args.hasArg(options::OPT_ffixed_x18))
     Features.push_back("+reserve-x18");
 
   if (Args.hasArg(options::OPT_ffixed_x20))
     Features.push_back("+reserve-x20");
 
+  if (Args.hasArg(options::OPT_ffixed_x21))
+    Features.push_back("+reserve-x21");
+
+  if (Args.hasArg(options::OPT_ffixed_x22))
+    Features.push_back("+reserve-x22");
+
+  if (Args.hasArg(options::OPT_ffixed_x23))
+    Features.push_back("+reserve-x23");
+
+  if (Args.hasArg(options::OPT_ffixed_x24))
+    Features.push_back("+reserve-x24");
+
+  if (Args.hasArg(options::OPT_ffixed_x26))
+    Features.push_back("+reserve-x26");
+
+  if (Args.hasArg(options::OPT_ffixed_x27))
+    Features.push_back("+reserve-x27");
+
+  if (Args.hasArg(options::OPT_ffixed_x28))
+    Features.push_back("+reserve-x28");
+
   if (Args.hasArg(options::OPT_fcall_saved_x8))
     Features.push_back("+call-saved-x8");
 
Index: clang/test/Driver/aarch64-fixed-x-register.c
===================================================================
--- clang/test/Driver/aarch64-fixed-x-register.c
+++ clang/test/Driver/aarch64-fixed-x-register.c
@@ -1,4 +1,8 @@
 // RUN: %clang -target aarch64-none-gnu -ffixed-x1 -### %s 2> %t
+
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X0 < %t %s
+// CHECK-FIXED-X0: "-target-feature" "+reserve-x0"
+
 // RUN: FileCheck --check-prefix=CHECK-FIXED-X1 < %t %s
 // CHECK-FIXED-X1: "-target-feature" "+reserve-x1"
 
@@ -26,6 +30,34 @@
 // RUN: FileCheck --check-prefix=CHECK-FIXED-X7 < %t %s
 // CHECK-FIXED-X7: "-target-feature" "+reserve-x7"
 
+// RUN: %clang -target aarch64-none-gnu -ffixed-x9 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X9 < %t %s
+// CHECK-FIXED-X9: "-target-feature" "+reserve-x9"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x10 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X10 < %t %s
+// CHECK-FIXED-X10: "-target-feature" "+reserve-x10"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x11 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X11 < %t %s
+// CHECK-FIXED-X11: "-target-feature" "+reserve-x11"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x12 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X12 < %t %s
+// CHECK-FIXED-X12: "-target-feature" "+reserve-x12"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x13 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X13 < %t %s
+// CHECK-FIXED-X13: "-target-feature" "+reserve-x13"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x14 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X14 < %t %s
+// CHECK-FIXED-X14: "-target-feature" "+reserve-x14"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x15 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X15 < %t %s
+// CHECK-FIXED-X15: "-target-feature" "+reserve-x15"
+
 // RUN: %clang -target aarch64-none-gnu -ffixed-x18 -### %s 2> %t
 // RUN: FileCheck --check-prefix=CHECK-FIXED-X18 < %t %s
 // CHECK-FIXED-X18: "-target-feature" "+reserve-x18"
@@ -34,6 +66,38 @@
 // RUN: FileCheck --check-prefix=CHECK-FIXED-X20 < %t %s
 // CHECK-FIXED-X20: "-target-feature" "+reserve-x20"
 
+// RUN: %clang -target aarch64-none-gnu -ffixed-x21 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X21 < %t %s
+// CHECK-FIXED-X21: "-target-feature" "+reserve-x21"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x22 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X22 < %t %s
+// CHECK-FIXED-X22: "-target-feature" "+reserve-x22"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x23 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X23 < %t %s
+// CHECK-FIXED-X23: "-target-feature" "+reserve-x23"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x24 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X24 < %t %s
+// CHECK-FIXED-X24: "-target-feature" "+reserve-x24"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x25 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X25 < %t %s
+// CHECK-FIXED-X25: "-target-feature" "+reserve-x25"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x26 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X26 < %t %s
+// CHECK-FIXED-X26: "-target-feature" "+reserve-x26"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x27 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X27 < %t %s
+// CHECK-FIXED-X27: "-target-feature" "+reserve-x27"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x28 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X28 < %t %s
+// CHECK-FIXED-X28: "-target-feature" "+reserve-x28"
+
 // Test multiple of reserve-x# options together.
 // RUN: %clang -target aarch64-none-gnu \
 // RUN: -ffixed-x1 \
@@ -48,6 +112,7 @@
 
 // Test all reserve-x# options together.
 // RUN: %clang -target aarch64-none-gnu \
+// RUN: -ffixed-x0 \
 // RUN: -ffixed-x1 \
 // RUN: -ffixed-x2 \
 // RUN: -ffixed-x3 \
@@ -55,10 +120,26 @@
 // RUN: -ffixed-x5 \
 // RUN: -ffixed-x6 \
 // RUN: -ffixed-x7 \
+// RUN: -ffixed-x9 \
+// RUN: -ffixed-x10 \
+// RUN: -ffixed-x11 \
+// RUN: -ffixed-x12 \
+// RUN: -ffixed-x13 \
+// RUN: -ffixed-x14 \
+// RUN: -ffixed-x15 \
 // RUN: -ffixed-x18 \
 // RUN: -ffixed-x20 \
+// RUN: -ffixed-x21 \
+// RUN: -ffixed-x22 \
+// RUN: -ffixed-x23 \
+// RUN: -ffixed-x24 \
+// RUN: -ffixed-x25 \
+// RUN: -ffixed-x26 \
+// RUN: -ffixed-x27 \
+// RUN: -ffixed-x28 \
 // RUN: -### %s 2> %t
 // RUN: FileCheck \
+// RUN: --check-prefix=CHECK-FIXED-X0 \
 // RUN: --check-prefix=CHECK-FIXED-X1 \
 // RUN: --check-prefix=CHECK-FIXED-X2 \
 // RUN: --check-prefix=CHECK-FIXED-X3 \
@@ -66,6 +147,21 @@
 // RUN: --check-prefix=CHECK-FIXED-X5 \
 // RUN: --check-prefix=CHECK-FIXED-X6 \
 // RUN: --check-prefix=CHECK-FIXED-X7 \
+// RUN: --check-prefix=CHECK-FIXED-X9 \
+// RUN: --check-prefix=CHECK-FIXED-X10 \
+// RUN: --check-prefix=CHECK-FIXED-X11 \
+// RUN: --check-prefix=CHECK-FIXED-X12 \
+// RUN: --check-prefix=CHECK-FIXED-X13 \
+// RUN: --check-prefix=CHECK-FIXED-X14 \
+// RUN: --check-prefix=CHECK-FIXED-X15 \
 // RUN: --check-prefix=CHECK-FIXED-X18 \
 // RUN: --check-prefix=CHECK-FIXED-X20 \
+// RUN: --check-prefix=CHECK-FIXED-X21 \
+// RUN: --check-prefix=CHECK-FIXED-X22 \
+// RUN: --check-prefix=CHECK-FIXED-X23 \
+// RUN: --check-prefix=CHECK-FIXED-X24 \
+// RUN: --check-prefix=CHECK-FIXED-X25 \
+// RUN: --check-prefix=CHECK-FIXED-X26 \
+// RUN: --check-prefix=CHECK-FIXED-X27 \
+// RUN: --check-prefix=CHECK-FIXED-X28 \
 // RUN: < %t %s
Index: llvm/lib/Target/AArch64/AArch64.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -127,7 +127,7 @@
                                           "Disallow all unaligned memory "
                                           "access">;
 
-foreach i = {1-7,18,20} in
+foreach i = {0-7,9-15,18,20-28} in
     def FeatureReserveX#i : SubtargetFeature<"reserve-x"#i, "ReserveXRegister["#i#"]", "true",
                                              "Reserve X"#i#", making it unavailable "
                                              "as a GPR">;
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -5185,50 +5185,20 @@
   return DAG.getFrameIndex(FI, VT);
 }
 
+#define GET_REGISTER_MATCHER
+#include "AArch64GenAsmMatcher.inc"
+
 // FIXME? Maybe this could be a TableGen attribute on some registers and
 // this table could be generated automatically from RegInfo.
 unsigned AArch64TargetLowering::getRegisterByName(const char* RegName, EVT VT,
                                                   SelectionDAG &DAG) const {
-  unsigned Reg = StringSwitch<unsigned>(RegName)
-                       .Case("sp", AArch64::SP)
-                       .Case("x1", AArch64::X1)
-                       .Case("w1", AArch64::W1)
-                       .Case("x2", AArch64::X2)
-                       .Case("w2", AArch64::W2)
-                       .Case("x3", AArch64::X3)
-                       .Case("w3", AArch64::W3)
-                       .Case("x4", AArch64::X4)
-                       .Case("w4", AArch64::W4)
-                       .Case("x5", AArch64::X5)
-                       .Case("w5", AArch64::W5)
-                       .Case("x6", AArch64::X6)
-                       .Case("w6", AArch64::W6)
-                       .Case("x7", AArch64::X7)
-                       .Case("w7", AArch64::W7)
-                       .Case("x18", AArch64::X18)
-                       .Case("w18", AArch64::W18)
-                       .Case("x20", AArch64::X20)
-                       .Case("w20", AArch64::W20)
-                       .Default(0);
-  if (((Reg == AArch64::X1 || Reg == AArch64::W1) &&
-      !Subtarget->isXRegisterReserved(1)) ||
-      ((Reg == AArch64::X2 || Reg == AArch64::W2) &&
-      !Subtarget->isXRegisterReserved(2)) ||
-      ((Reg == AArch64::X3 || Reg == AArch64::W3) &&
-      !Subtarget->isXRegisterReserved(3)) ||
-      ((Reg == AArch64::X4 || Reg == AArch64::W4) &&
-      !Subtarget->isXRegisterReserved(4)) ||
-      ((Reg == AArch64::X5 || Reg == AArch64::W5) &&
-      !Subtarget->isXRegisterReserved(5)) ||
-      ((Reg == AArch64::X6 || Reg == AArch64::W6) &&
-      !Subtarget->isXRegisterReserved(6)) ||
-      ((Reg == AArch64::X7 || Reg == AArch64::W7) &&
-      !Subtarget->isXRegisterReserved(7)) ||
-      ((Reg == AArch64::X18 || Reg == AArch64::W18) &&
-      !Subtarget->isXRegisterReserved(18)) ||
-      ((Reg == AArch64::X20 || Reg == AArch64::W20) &&
-      !Subtarget->isXRegisterReserved(20)))
-    Reg = 0;
+  unsigned Reg = MatchRegisterName(RegName);
+  if (Reg) {
+    const MCRegisterInfo *MRI = Subtarget->getRegisterInfo();
+    unsigned DwarfRegNum = MRI->getDwarfRegNum(Reg, false);
+    if (!Subtarget->isXRegisterReserved(DwarfRegNum))
+      Reg = 0;
+  }
   if (Reg)
     return Reg;
   report_fatal_error(Twine("Invalid register name \""
Index: llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
@@ -243,11 +243,13 @@
   case AArch64::GPR32RegClassID:
   case AArch64::GPR32spRegClassID:
   case AArch64::GPR32sponlyRegClassID:
+  case AArch64::GPR32argRegClassID:
   case AArch64::GPR32allRegClassID:
   case AArch64::GPR64commonRegClassID:
   case AArch64::GPR64RegClassID:
   case AArch64::GPR64spRegClassID:
   case AArch64::GPR64sponlyRegClassID:
+  case AArch64::GPR64argRegClassID:
   case AArch64::GPR64allRegClassID:
   case AArch64::tcGPR64RegClassID:
   case AArch64::WSeqPairsClassRegClassID:
Index: llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -217,11 +217,8 @@
 }
 
 bool AArch64RegisterInfo::isAnyArgRegReserved(const MachineFunction &MF) const {
-  // FIXME: Get the list of argument registers from TableGen.
-  static const MCPhysReg GPRArgRegs[] = { AArch64::X0, AArch64::X1, AArch64::X2,
-                                          AArch64::X3, AArch64::X4, AArch64::X5,
-                                          AArch64::X6, AArch64::X7 };
-  return std::any_of(std::begin(GPRArgRegs), std::end(GPRArgRegs),
+  return std::any_of(std::begin(*AArch64::GPR64argRegClass.MC),
+                     std::end(*AArch64::GPR64argRegClass.MC),
                      [this, &MF](MCPhysReg r){return isReservedReg(MF, r);});
 }
 
Index: llvm/lib/Target/AArch64/AArch64RegisterInfo.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+++ llvm/lib/Target/AArch64/AArch64RegisterInfo.td
@@ -188,6 +188,10 @@
   let GIZeroRegister = XZR;
 }
 
+// GPR argument registers.
+def GPR32arg : RegisterClass<"AArch64", [i32], 32, (sequence "W%u", 0, 7)>;
+def GPR64arg : RegisterClass<"AArch64", [i64], 64, (sequence "X%u", 0, 7)>;
+
 // GPR register classes which include WZR/XZR AND SP/WSP. This is not a
 // constraint used by any instructions, it is used as a common super-class.
 def GPR32all : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WZR, WSP)>;
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -166,6 +166,7 @@
       TargetTriple(TT), FrameLowering(),
       InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
       TLInfo(TM, *this) {
+  ReserveXRegister.resize(AArch64::GPR64RegClass.getNumRegs());
   if (AArch64::isX18ReservedByDefault(TT))
     ReserveXRegister.set(18);
 
Index: llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
+++ llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
@@ -1,13 +1,12 @@
 ; RUN: llc -mtriple=arm64-apple-ios -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=arm64-freebsd-gnu -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
-; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x20 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X20
-; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18,+reserve-x20 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18 --check-prefix=CHECK-RESERVE-X20
 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-android -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=aarch64-fuchsia -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=aarch64-windows -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 
 ; Test reserve-x# options individually.
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x0 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X0
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x1 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X1
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x2 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X2
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x3 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X3
@@ -15,6 +14,22 @@
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x5 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X5
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x6 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X6
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x7 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X7
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x9 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X9
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x10 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X10
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x11 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X11
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x12 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X12
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x13 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X13
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x14 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X14
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x15 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X15
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x20 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X20
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x21 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X21
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x22 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X22
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x23 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X23
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x24 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X24
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x25 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X25
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x26 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X26
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x27 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X27
+; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x28 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X28
 
 ; Test multiple of reserve-x# options together.
 ; RUN: llc -mtriple=arm64-linux-gnu \
@@ -29,6 +44,7 @@
 
 ; Test all reserve-x# options together.
 ; RUN: llc -mtriple=arm64-linux-gnu \
+; RUN: -mattr=+reserve-x0 \
 ; RUN: -mattr=+reserve-x1 \
 ; RUN: -mattr=+reserve-x2 \
 ; RUN: -mattr=+reserve-x3 \
@@ -36,10 +52,26 @@
 ; RUN: -mattr=+reserve-x5 \
 ; RUN: -mattr=+reserve-x6 \
 ; RUN: -mattr=+reserve-x7 \
+; RUN: -mattr=+reserve-x9 \
+; RUN: -mattr=+reserve-x10 \
+; RUN: -mattr=+reserve-x11 \
+; RUN: -mattr=+reserve-x12 \
+; RUN: -mattr=+reserve-x13 \
+; RUN: -mattr=+reserve-x14 \
+; RUN: -mattr=+reserve-x15 \
 ; RUN: -mattr=+reserve-x18 \
 ; RUN: -mattr=+reserve-x20 \
+; RUN: -mattr=+reserve-x21 \
+; RUN: -mattr=+reserve-x22 \
+; RUN: -mattr=+reserve-x23 \
+; RUN: -mattr=+reserve-x24 \
+; RUN: -mattr=+reserve-x25 \
+; RUN: -mattr=+reserve-x26 \
+; RUN: -mattr=+reserve-x27 \
+; RUN: -mattr=+reserve-x28 \
 ; RUN: -o - %s | FileCheck %s \
 ; RUN: --check-prefix=CHECK-RESERVE \
+; RUN: --check-prefix=CHECK-RESERVE-X0 \
 ; RUN: --check-prefix=CHECK-RESERVE-X1 \
 ; RUN: --check-prefix=CHECK-RESERVE-X2 \
 ; RUN: --check-prefix=CHECK-RESERVE-X3 \
@@ -47,8 +79,23 @@
 ; RUN: --check-prefix=CHECK-RESERVE-X5 \
 ; RUN: --check-prefix=CHECK-RESERVE-X6 \
 ; RUN: --check-prefix=CHECK-RESERVE-X7 \
+; RUN: --check-prefix=CHECK-RESERVE-X9 \
+; RUN: --check-prefix=CHECK-RESERVE-X10 \
+; RUN: --check-prefix=CHECK-RESERVE-X11 \
+; RUN: --check-prefix=CHECK-RESERVE-X12 \
+; RUN: --check-prefix=CHECK-RESERVE-X13 \
+; RUN: --check-prefix=CHECK-RESERVE-X14 \
+; RUN: --check-prefix=CHECK-RESERVE-X15 \
 ; RUN: --check-prefix=CHECK-RESERVE-X18 \
-; RUN: --check-prefix=CHECK-RESERVE-X20
+; RUN: --check-prefix=CHECK-RESERVE-X20 \
+; RUN: --check-prefix=CHECK-RESERVE-X21 \
+; RUN: --check-prefix=CHECK-RESERVE-X22 \
+; RUN: --check-prefix=CHECK-RESERVE-X23 \
+; RUN: --check-prefix=CHECK-RESERVE-X24 \
+; RUN: --check-prefix=CHECK-RESERVE-X25 \
+; RUN: --check-prefix=CHECK-RESERVE-X26 \
+; RUN: --check-prefix=CHECK-RESERVE-X27 \
+; RUN: --check-prefix=CHECK-RESERVE-X28
 
 ; x18 is reserved as a platform register on Darwin but not on other
 ; systems. Create loads of register pressure and make sure this is respected.
@@ -66,6 +113,7 @@
 ; CHECK: str x18
 
 ; CHECK-RESERVE-NOT: ldr fp
+; CHECK-RESERVE-X0-NOT: ldr x0,
 ; CHECK-RESERVE-X1-NOT: ldr x1,
 ; CHECK-RESERVE-X2-NOT: ldr x2,
 ; CHECK-RESERVE-X3-NOT: ldr x3,
@@ -73,10 +121,26 @@
 ; CHECK-RESERVE-X5-NOT: ldr x5,
 ; CHECK-RESERVE-X6-NOT: ldr x6,
 ; CHECK-RESERVE-X7-NOT: ldr x7,
+; CHECK-RESERVE-X9-NOT: ldr x9,
+; CHECK-RESERVE-X10-NOT: ldr x10,
+; CHECK-RESERVE-X11-NOT: ldr x11,
+; CHECK-RESERVE-X12-NOT: ldr x12,
+; CHECK-RESERVE-X13-NOT: ldr x13,
+; CHECK-RESERVE-X14-NOT: ldr x14,
+; CHECK-RESERVE-X15-NOT: ldr x15,
 ; CHECK-RESERVE-X18-NOT: ldr x18
 ; CHECK-RESERVE-X20-NOT: ldr x20
+; CHECK-RESERVE-X21-NOT: ldr x21
+; CHECK-RESERVE-X22-NOT: ldr x22
+; CHECK-RESERVE-X23-NOT: ldr x23
+; CHECK-RESERVE-X24-NOT: ldr x24
+; CHECK-RESERVE-X25-NOT: ldr x25
+; CHECK-RESERVE-X26-NOT: ldr x26
+; CHECK-RESERVE-X27-NOT: ldr x27
+; CHECK-RESERVE-X28-NOT: ldr x28
 ; CHECK-RESERVE: Spill
 ; CHECK-RESERVE-NOT: ldr fp
+; CHECK-RESERVE-X0-NOT: ldr x0,
 ; CHECK-RESERVE-X1-NOT: ldr x1,
 ; CHECK-RESERVE-X2-NOT: ldr x2,
 ; CHECK-RESERVE-X3-NOT: ldr x3,
@@ -84,8 +148,23 @@
 ; CHECK-RESERVE-X5-NOT: ldr x5,
 ; CHECK-RESERVE-X6-NOT: ldr x6,
 ; CHECK-RESERVE-X7-NOT: ldr x7,
+; CHECK-RESERVE-X9-NOT: ldr x9,
+; CHECK-RESERVE-X10-NOT: ldr x10,
+; CHECK-RESERVE-X11-NOT: ldr x11,
+; CHECK-RESERVE-X12-NOT: ldr x12,
+; CHECK-RESERVE-X13-NOT: ldr x13,
+; CHECK-RESERVE-X14-NOT: ldr x14,
+; CHECK-RESERVE-X15-NOT: ldr x15,
 ; CHECK-RESERVE-X18-NOT: ldr x18
 ; CHECK-RESERVE-X20-NOT: ldr x20
+; CHECK-RESERVE-X21-NOT: ldr x21
+; CHECK-RESERVE-X22-NOT: ldr x22
+; CHECK-RESERVE-X23-NOT: ldr x23
+; CHECK-RESERVE-X24-NOT: ldr x24
+; CHECK-RESERVE-X25-NOT: ldr x25
+; CHECK-RESERVE-X26-NOT: ldr x26
+; CHECK-RESERVE-X27-NOT: ldr x27
+; CHECK-RESERVE-X28-NOT: ldr x28
 ; CHECK-RESERVE: ret
   ret void
 }