Index: lib/Transforms/Scalar/GVN.cpp =================================================================== --- lib/Transforms/Scalar/GVN.cpp +++ lib/Transforms/Scalar/GVN.cpp @@ -2156,6 +2156,16 @@ if (isa(CurInst)) return false; + // Don't do PRE on GEPs. The inserted PHI would prevent CodeGenPrepare from + // sinking the addressing mode computation back to its uses. Extending the + // GEP's live range increases the register pressure, and therefore it can + // introduce unnecessary spills. + // + // This doesn't prevent Load PRE. PHI translation will make the GEP available + // to the load by moving it to the predecessor block if necessary. + if (isa(CurInst)) + return false; + // We don't currently value number ANY inline asm calls. if (CallInst *CallI = dyn_cast(CurInst)) if (CallI->isInlineAsm()) Index: test/Transforms/GVN/PRE/pre-gep-load.ll =================================================================== --- test/Transforms/GVN/PRE/pre-gep-load.ll +++ test/Transforms/GVN/PRE/pre-gep-load.ll @@ -32,12 +32,12 @@ ; CHECK: if.end: ; CHECK-NEXT: br label [[SW_BB2]] ; CHECK: sw.bb2: -; CHECK-NEXT: [[ARRAYIDX5_PRE_PHI:%.*]] = phi double* [ [[ARRAYIDX5_PHI_TRANS_INSERT]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[ARRAYIDX1]], [[IF_END]] ] ; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE2]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP1]], [[IF_END]] ] ; CHECK-NEXT: [[IDXPROM3_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE1]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[IDXPROM]], [[IF_END]] ] ; CHECK-NEXT: [[TMP3:%.*]] = phi double* [ [[DOTPRE]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP0]], [[IF_END]] ] +; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP3]], i64 [[IDXPROM3_PRE_PHI]] ; CHECK-NEXT: [[SUB6:%.*]] = fsub double 3.000000e+00, [[TMP2]] -; CHECK-NEXT: store double [[SUB6]], double* [[ARRAYIDX5_PRE_PHI]] +; CHECK-NEXT: store double [[SUB6]], double* [[ARRAYIDX5]] ; CHECK-NEXT: br label [[RETURN]] ; CHECK: sw.default: ; CHECK-NEXT: br label [[RETURN]]