Index: llvm/test/Transforms/SimplifyCFG/branch-fold-three.ll =================================================================== --- /dev/null +++ llvm/test/Transforms/SimplifyCFG/branch-fold-three.ll @@ -0,0 +1,260 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -simplifycfg -instcombine -simplifycfg -S | FileCheck %s +; s >= t, s != t, s <= t +define void @_Z4foo1ii(i32 signext %s, i32 signext %t) #0 { +; CHECK-LABEL: @_Z4foo1ii( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[S:%.*]], [[T:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]] +; CHECK: if.then2: +; CHECK-NEXT: call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]] +; CHECK: if.then4: +; CHECK-NEXT: call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: br label [[IF_END6]] +; CHECK: if.end6: +; CHECK-NEXT: ret void +; +entry: + %cmp = icmp sge i32 %s, %t + br i1 %cmp, label %if.then, label %if.end6 + +if.then: ; preds = %entry + call void @_Z4bar1ii(i32 signext %s, i32 signext %t) + %cmp1 = icmp ne i32 %s, %t + br i1 %cmp1, label %if.then2, label %if.end6 + +if.then2: ; preds = %if.then + call void @_Z4bar2ii(i32 signext %s, i32 signext %t) + %cmp3 = icmp sle i32 %s, %t + br i1 %cmp3, label %if.then4, label %if.end6 + +if.then4: ; preds = %if.then2 + call void @_Z4bar3ii(i32 signext %s, i32 signext %t) + br label %if.end6 + +if.end6: ; preds = %if.then, %if.then4, %if.then2, %entry + ret void +} + +; s != t, s >= t, s <= t +define void @_Z5foo11ii(i32 signext %s, i32 signext %t) #0 { +; CHECK-LABEL: @_Z5foo11ii( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[S:%.*]], [[T:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]] +; CHECK: if.then2: +; CHECK-NEXT: call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]] +; CHECK: if.then4: +; CHECK-NEXT: call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: br label [[IF_END6]] +; CHECK: if.end6: +; CHECK-NEXT: ret void +; +entry: + %cmp = icmp ne i32 %s, %t + br i1 %cmp, label %if.then, label %if.end6 + +if.then: ; preds = %entry + call void @_Z4bar1ii(i32 signext %s, i32 signext %t) + %cmp1 = icmp sge i32 %s, %t + br i1 %cmp1, label %if.then2, label %if.end6 + +if.then2: ; preds = %if.then + call void @_Z4bar2ii(i32 signext %s, i32 signext %t) + %cmp3 = icmp sle i32 %s, %t + br i1 %cmp3, label %if.then4, label %if.end6 + +if.then4: ; preds = %if.then2 + call void @_Z4bar3ii(i32 signext %s, i32 signext %t) + br label %if.end6 + +if.end6: ; preds = %if.then, %if.then4, %if.then2, %entry + ret void +} + +; s >= t, t != s, s <= t +define void @_Z4foo2ii(i32 signext %s, i32 signext %t) #0 { +; CHECK-LABEL: @_Z4foo2ii( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[S:%.*]], [[T:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[T]], [[S]] +; CHECK-NEXT: br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]] +; CHECK: if.then2: +; CHECK-NEXT: call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]] +; CHECK: if.then4: +; CHECK-NEXT: call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: br label [[IF_END6]] +; CHECK: if.end6: +; CHECK-NEXT: ret void +; +entry: + %cmp = icmp sge i32 %s, %t + br i1 %cmp, label %if.then, label %if.end6 + +if.then: ; preds = %entry + call void @_Z4bar1ii(i32 signext %s, i32 signext %t) + %cmp1 = icmp ne i32 %t, %s + br i1 %cmp1, label %if.then2, label %if.end6 + +if.then2: ; preds = %if.then + call void @_Z4bar2ii(i32 signext %s, i32 signext %t) + %cmp3 = icmp sle i32 %s, %t + br i1 %cmp3, label %if.then4, label %if.end6 + +if.then4: ; preds = %if.then2 + call void @_Z4bar3ii(i32 signext %s, i32 signext %t) + br label %if.end6 + +if.end6: ; preds = %if.then, %if.then4, %if.then2, %entry + ret void +} + +; s != t, t <= s, s <= t +define void @_Z5foo21ii(i32 signext %s, i32 signext %t) #0 { +; CHECK-LABEL: @_Z5foo21ii( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[S:%.*]], [[T:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[T]], [[S]] +; CHECK-NEXT: br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]] +; CHECK: if.then2: +; CHECK-NEXT: call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]] +; CHECK: if.then4: +; CHECK-NEXT: call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: br label [[IF_END6]] +; CHECK: if.end6: +; CHECK-NEXT: ret void +; +entry: + %cmp = icmp ne i32 %s, %t + br i1 %cmp, label %if.then, label %if.end6 + +if.then: ; preds = %entry + call void @_Z4bar1ii(i32 signext %s, i32 signext %t) + %cmp1 = icmp sle i32 %t, %s + br i1 %cmp1, label %if.then2, label %if.end6 + +if.then2: ; preds = %if.then + call void @_Z4bar2ii(i32 signext %s, i32 signext %t) + %cmp3 = icmp sle i32 %s, %t + br i1 %cmp3, label %if.then4, label %if.end6 + +if.then4: ; preds = %if.then2 + call void @_Z4bar3ii(i32 signext %s, i32 signext %t) + br label %if.end6 + +if.end6: ; preds = %if.then, %if.then4, %if.then2, %entry + ret void +} + +; t <= s, t != s, s <= t +define void @_Z4foo3ii(i32 signext %s, i32 signext %t) #0 { +; CHECK-LABEL: @_Z4foo3ii( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[T:%.*]], [[S:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[T]], [[S]] +; CHECK-NEXT: br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]] +; CHECK: if.then2: +; CHECK-NEXT: call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]] +; CHECK: if.then4: +; CHECK-NEXT: call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: br label [[IF_END6]] +; CHECK: if.end6: +; CHECK-NEXT: ret void +; +entry: + %cmp = icmp sle i32 %t, %s + br i1 %cmp, label %if.then, label %if.end6 + +if.then: ; preds = %entry + call void @_Z4bar1ii(i32 signext %s, i32 signext %t) + %cmp1 = icmp ne i32 %t, %s + br i1 %cmp1, label %if.then2, label %if.end6 + +if.then2: ; preds = %if.then + call void @_Z4bar2ii(i32 signext %s, i32 signext %t) + %cmp3 = icmp sle i32 %s, %t + br i1 %cmp3, label %if.then4, label %if.end6 + +if.then4: ; preds = %if.then2 + call void @_Z4bar3ii(i32 signext %s, i32 signext %t) + br label %if.end6 + +if.end6: ; preds = %if.then, %if.then4, %if.then2, %entry + ret void +} + +; t != s, t <= s, s <= t +define void @_Z5foo31ii(i32 signext %s, i32 signext %t) #0 { +; CHECK-LABEL: @_Z5foo31ii( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T:%.*]], [[S:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[T]], [[S]] +; CHECK-NEXT: br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]] +; CHECK: if.then2: +; CHECK-NEXT: call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]] +; CHECK-NEXT: br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]] +; CHECK: if.then4: +; CHECK-NEXT: call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]]) +; CHECK-NEXT: br label [[IF_END6]] +; CHECK: if.end6: +; CHECK-NEXT: ret void +; +entry: + %cmp = icmp ne i32 %t, %s + br i1 %cmp, label %if.then, label %if.end6 + +if.then: ; preds = %entry + call void @_Z4bar1ii(i32 signext %s, i32 signext %t) + %cmp1 = icmp sle i32 %t, %s + br i1 %cmp1, label %if.then2, label %if.end6 + +if.then2: ; preds = %if.then + call void @_Z4bar2ii(i32 signext %s, i32 signext %t) + %cmp3 = icmp sle i32 %s, %t + br i1 %cmp3, label %if.then4, label %if.end6 + +if.then4: ; preds = %if.then2 + call void @_Z4bar3ii(i32 signext %s, i32 signext %t) + br label %if.end6 + +if.end6: ; preds = %if.then, %if.then4, %if.then2, %entry + ret void +} + +declare void @_Z4bar1ii(i32 signext, i32 signext) #1 + +declare void @_Z4bar2ii(i32 signext, i32 signext) #1 + +declare void @_Z4bar3ii(i32 signext, i32 signext) #1 +