Index: llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
+++ llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
@@ -520,7 +520,6 @@
     // loops beforehand.
     for (auto *BB : DeadLoopBlocks)
       if (LI.isLoopHeader(BB)) {
-        assert(LI.getLoopFor(BB) != &L && "Attempt to remove current loop!");
         Loop *DL = LI.getLoopFor(BB);
         if (DL->getParentLoop()) {
           for (auto *PL = DL->getParentLoop(); PL; PL = PL->getParentLoop())
@@ -533,8 +532,6 @@
       }
 
     for (auto *BB : DeadLoopBlocks) {
-      assert(BB != L.getHeader() &&
-             "Header of the current loop cannot be dead!");
       LLVM_DEBUG(dbgs() << "Deleting dead loop block " << BB->getName()
                         << "\n");
       LI.removeBlock(BB);
@@ -630,15 +627,6 @@
       return false;
     }
 
-    // TODO: Support deletion of the current loop.
-    if (DeleteCurrentLoop) {
-      LLVM_DEBUG(
-          dbgs()
-          << "Give up constant terminator folding in loop " << Header->getName()
-          << ": we don't currently support deletion of the current loop.\n");
-      return false;
-    }
-
     SE.forgetTopmostLoop(&L);
     // Dump analysis results.
     LLVM_DEBUG(dump());
@@ -659,6 +647,8 @@
       // If we didn't do updates inside deleteDeadLoopBlocks, do them here.
       DTU.applyUpdates(DTUpdates);
       DTUpdates.clear();
+      if (DeleteCurrentLoop)
+        LI.erase(&L);
     }
 
 #ifndef NDEBUG
Index: llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
===================================================================
--- llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
+++ llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
@@ -335,16 +335,12 @@
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br i1 true, label [[BACKEDGE]], label [[DEAD:%.*]]
-; CHECK:       dead:
-; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT:    br label [[BACKEDGE]]
+; CHECK-NEXT:    br label [[BACKEDGE:%.*]]
 ; CHECK:       backedge:
-; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
-; CHECK-NEXT:    [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ 0, [[HEADER]] ]
+; CHECK-NEXT:    [[I_INC:%.*]] = add i32 [[I_1]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
-; CHECK-NEXT:    br i1 false, label [[HEADER]], label [[EXIT:%.*]]
+; CHECK-NEXT:    br label [[EXIT:%.*]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
 ; CHECK-NEXT:    ret i32 [[I_INC_LCSSA]]
@@ -379,20 +375,12 @@
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT:    switch i32 1, label [[DEAD:%.*]] [
-; CHECK-NEXT:    i32 0, label [[DEAD]]
-; CHECK-NEXT:    i32 1, label [[BACKEDGE]]
-; CHECK-NEXT:    i32 2, label [[DEAD]]
-; CHECK-NEXT:    ]
-; CHECK:       dead:
-; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT:    br label [[BACKEDGE]]
+; CHECK-NEXT:    br label [[BACKEDGE:%.*]]
 ; CHECK:       backedge:
-; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
-; CHECK-NEXT:    [[I_INC]] = add i32 [[I_1]], 1
+; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ 0, [[HEADER]] ]
+; CHECK-NEXT:    [[I_INC:%.*]] = add i32 [[I_1]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
-; CHECK-NEXT:    br i1 false, label [[HEADER]], label [[EXIT:%.*]]
+; CHECK-NEXT:    br label [[EXIT:%.*]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
 ; CHECK-NEXT:    ret i32 [[I_INC_LCSSA]]
@@ -930,26 +918,15 @@
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br label [[HEADER:%.*]]
-; CHECK:       header:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
-; CHECK-NEXT:    br i1 false, label [[BACKEDGE]], label [[DEAD:%.*]]
-; CHECK:       dead:
-; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT:    br label [[BACKEDGE]]
-; CHECK:       backedge:
-; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
-; CHECK-NEXT:    [[I_INC]] = add i32 [[I_1]], 1
-; CHECK-NEXT:    br i1 false, label [[HEADER]], label [[OUTER_BACKEDGE]]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_HEADER]] ]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i32 0, 0
+; CHECK-NEXT:    [[I_2:%.*]] = add i32 0, 1
+; CHECK-NEXT:    [[I_INC:%.*]] = add i32 [[I_2]], 1
 ; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
 ; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[OUTER_HEADER]] ]
 ; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
 ;
 entry:
@@ -993,30 +970,15 @@
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br label [[HEADER:%.*]]
-; CHECK:       header:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
-; CHECK-NEXT:    switch i32 1, label [[DEAD:%.*]] [
-; CHECK-NEXT:    i32 0, label [[BACKEDGE]]
-; CHECK-NEXT:    ]
-; CHECK:       dead:
-; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT:    br label [[BACKEDGE]]
-; CHECK:       backedge:
-; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
-; CHECK-NEXT:    [[I_INC]] = add i32 [[I_1]], 1
-; CHECK-NEXT:    switch i32 1, label [[OUTER_BACKEDGE]] [
-; CHECK-NEXT:    i32 0, label [[HEADER]]
-; CHECK-NEXT:    ]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_HEADER]] ]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i32 0, 0
+; CHECK-NEXT:    [[I_2:%.*]] = add i32 0, 1
+; CHECK-NEXT:    [[I_INC:%.*]] = add i32 [[I_2]], 1
 ; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
 ; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[OUTER_HEADER]] ]
 ; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
 ;
 entry:
@@ -1061,26 +1023,14 @@
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br label [[HEADER:%.*]]
-; CHECK:       header:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
-; CHECK-NEXT:    br i1 true, label [[BACKEDGE]], label [[DEAD:%.*]]
-; CHECK:       dead:
-; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT:    br label [[BACKEDGE]]
-; CHECK:       backedge:
-; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
-; CHECK-NEXT:    [[I_INC]] = add i32 [[I_1]], 1
-; CHECK-NEXT:    br i1 false, label [[HEADER]], label [[OUTER_BACKEDGE]]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_HEADER]] ]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i32 0, 0
+; CHECK-NEXT:    [[I_INC:%.*]] = add i32 0, 1
 ; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
 ; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[OUTER_HEADER]] ]
 ; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
 ;
 entry:
@@ -1124,30 +1074,14 @@
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br label [[HEADER:%.*]]
-; CHECK:       header:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
-; CHECK-NEXT:    switch i32 1, label [[BACKEDGE]] [
-; CHECK-NEXT:    i32 0, label [[DEAD:%.*]]
-; CHECK-NEXT:    ]
-; CHECK:       dead:
-; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT:    br label [[BACKEDGE]]
-; CHECK:       backedge:
-; CHECK-NEXT:    [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ]
-; CHECK-NEXT:    [[I_INC]] = add i32 [[I_1]], 1
-; CHECK-NEXT:    switch i32 1, label [[OUTER_BACKEDGE]] [
-; CHECK-NEXT:    i32 0, label [[HEADER]]
-; CHECK-NEXT:    ]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_HEADER]] ]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i32 0, 0
+; CHECK-NEXT:    [[I_INC:%.*]] = add i32 0, 1
 ; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
 ; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC_LCSSA]], [[OUTER_BACKEDGE]] ]
+; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[OUTER_HEADER]] ]
 ; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
 ;
 entry:
@@ -1189,12 +1123,16 @@
 define i32 @full_sub_loop_test_branch_loop_inverse_2(i32 %end) {
 ; CHECK-LABEL: @full_sub_loop_test_branch_loop_inverse_2(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
+; CHECK-NEXT:    i32 1, label [[EXIT:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       entry-split:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
-; CHECK-NEXT:    ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ]
+; CHECK-NEXT:    br label [[PREHEADER:%.*]]
+; CHECK:       preheader:
+; CHECK-NEXT:    br label [[PREHEADER_SPLIT:%.*]]
 ; CHECK:       preheader-split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
@@ -1203,13 +1141,8 @@
 ; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I_2]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
-; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
-; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
-; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
+; CHECK-NEXT:    ret i32 undef
 ;
 entry:
   br label %outer_header
@@ -1250,12 +1183,16 @@
 define i32 @full_sub_loop_test_switch_loop_inverse_2(i32 %end) {
 ; CHECK-LABEL: @full_sub_loop_test_switch_loop_inverse_2(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
+; CHECK-NEXT:    i32 1, label [[EXIT:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       entry-split:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
-; CHECK-NEXT:    ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ]
+; CHECK-NEXT:    br label [[PREHEADER:%.*]]
+; CHECK:       preheader:
+; CHECK-NEXT:    br label [[PREHEADER_SPLIT:%.*]]
 ; CHECK:       preheader-split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
@@ -1264,13 +1201,8 @@
 ; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I_2]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
-; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
-; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
-; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
+; CHECK-NEXT:    ret i32 undef
 ;
 entry:
   br label %outer_header
@@ -1312,12 +1244,16 @@
 define i32 @full_sub_loop_test_branch_loop_inverse_3(i32 %end) {
 ; CHECK-LABEL: @full_sub_loop_test_branch_loop_inverse_3(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
+; CHECK-NEXT:    i32 1, label [[EXIT:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       entry-split:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
-; CHECK-NEXT:    ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ]
+; CHECK-NEXT:    br label [[PREHEADER:%.*]]
+; CHECK:       preheader:
+; CHECK-NEXT:    br label [[PREHEADER_SPLIT:%.*]]
 ; CHECK:       preheader-split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
@@ -1325,13 +1261,8 @@
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
-; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
-; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
-; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
+; CHECK-NEXT:    ret i32 undef
 ;
 entry:
   br label %outer_header
@@ -1372,12 +1303,16 @@
 define i32 @full_sub_loop_test_switch_loop_inverse_3(i32 %end) {
 ; CHECK-LABEL: @full_sub_loop_test_switch_loop_inverse_3(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
+; CHECK-NEXT:    i32 1, label [[EXIT:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       entry-split:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
-; CHECK-NEXT:    ]
+; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ]
+; CHECK-NEXT:    br label [[PREHEADER:%.*]]
+; CHECK:       preheader:
+; CHECK-NEXT:    br label [[PREHEADER_SPLIT:%.*]]
 ; CHECK:       preheader-split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
@@ -1385,13 +1320,8 @@
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
-; CHECK:       outer_backedge:
-; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1
-; CHECK-NEXT:    [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], [[END:%.*]]
-; CHECK-NEXT:    br i1 [[CMP_J]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_INC_LCSSA_LCSSA:%.*]] = phi i32 [ undef, [[OUTER_BACKEDGE]] ]
-; CHECK-NEXT:    ret i32 [[I_INC_LCSSA_LCSSA]]
+; CHECK-NEXT:    ret i32 undef
 ;
 entry:
   br label %outer_header
@@ -1434,35 +1364,20 @@
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    br label [[LOOP_1:%.*]]
 ; CHECK:       loop_1:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br label [[LOOP_2:%.*]]
-; CHECK:       loop_2:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    switch i32 0, label [[LOOP_2_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[LOOP_2_BACKEDGE]]
-; CHECK-NEXT:    ]
-; CHECK:       loop_2-split:
+; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] ]
 ; CHECK-NEXT:    br label [[LOOP_3:%.*]]
 ; CHECK:       loop_3:
-; CHECK-NEXT:    [[K:%.*]] = phi i32 [ 0, [[LOOP_2_SPLIT]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
+; CHECK-NEXT:    [[K:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT:    br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT]]
 ; CHECK:       loop_3_backedge:
 ; CHECK-NEXT:    [[K_NEXT]] = add i32 [[K]], 1
 ; CHECK-NEXT:    br label [[LOOP_3]]
-; CHECK:       loop_2_backedge:
-; CHECK-NEXT:    [[J_NEXT]] = add i32 [[J]], 1
-; CHECK-NEXT:    [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
-; CHECK-NEXT:    br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
 ; CHECK:       loop_1_backedge.loopexit:
-; CHECK-NEXT:    br label [[LOOP_1_BACKEDGE]]
-; CHECK:       loop_1_backedge.loopexit1:
-; CHECK-NEXT:    br label [[LOOP_1_BACKEDGE]]
-; CHECK:       loop_1_backedge:
 ; CHECK-NEXT:    [[I_NEXT]] = add i32 [[I]], 1
-; CHECK-NEXT:    [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT:    [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N:%.*]]
 ; CHECK-NEXT:    br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT:    [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE_LOOPEXIT]] ]
 ; CHECK-NEXT:    ret i32 [[I_LCSSA]]
 ;
 preheader:
@@ -1503,35 +1418,20 @@
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    br label [[LOOP_1:%.*]]
 ; CHECK:       loop_1:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br label [[LOOP_2:%.*]]
-; CHECK:       loop_2:
-; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    switch i32 0, label [[LOOP_2_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[LOOP_2_BACKEDGE]]
-; CHECK-NEXT:    ]
-; CHECK:       loop_2-split:
+; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] ]
 ; CHECK-NEXT:    br label [[LOOP_3:%.*]]
 ; CHECK:       loop_3:
-; CHECK-NEXT:    [[K:%.*]] = phi i32 [ 0, [[LOOP_2_SPLIT]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
-; CHECK-NEXT:    br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
+; CHECK-NEXT:    [[K:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
+; CHECK-NEXT:    br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT]]
 ; CHECK:       loop_3_backedge:
 ; CHECK-NEXT:    [[K_NEXT]] = add i32 [[K]], 1
 ; CHECK-NEXT:    br label [[LOOP_3]]
-; CHECK:       loop_2_backedge:
-; CHECK-NEXT:    [[J_NEXT]] = add i32 [[J]], 1
-; CHECK-NEXT:    [[C_2:%.*]] = icmp slt i32 [[J_NEXT]], [[N:%.*]]
-; CHECK-NEXT:    br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_1_BACKEDGE_LOOPEXIT1:%.*]]
 ; CHECK:       loop_1_backedge.loopexit:
-; CHECK-NEXT:    br label [[LOOP_1_BACKEDGE]]
-; CHECK:       loop_1_backedge.loopexit1:
-; CHECK-NEXT:    br label [[LOOP_1_BACKEDGE]]
-; CHECK:       loop_1_backedge:
 ; CHECK-NEXT:    [[I_NEXT]] = add i32 [[I]], 1
-; CHECK-NEXT:    [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N]]
+; CHECK-NEXT:    [[C_1:%.*]] = icmp slt i32 [[I_NEXT]], [[N:%.*]]
 ; CHECK-NEXT:    br i1 [[C_1]], label [[LOOP_1]], label [[EXIT:%.*]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE]] ]
+; CHECK-NEXT:    [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[LOOP_1_BACKEDGE_LOOPEXIT]] ]
 ; CHECK-NEXT:    ret i32 [[I_LCSSA]]
 ;
 preheader:
Index: llvm/test/Transforms/LoopSimplifyCFG/lcssa.ll
===================================================================
--- llvm/test/Transforms/LoopSimplifyCFG/lcssa.ll
+++ llvm/test/Transforms/LoopSimplifyCFG/lcssa.ll
@@ -55,13 +55,9 @@
 ; CHECK-LABEL: @test_01(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[FOR_COND:%.*]]
-; CHECK:       for.cond.loopexit:
-; CHECK-NEXT:    br label [[FOR_COND]]
 ; CHECK:       for.cond:
-; CHECK-NEXT:    [[INC41_LCSSA3:%.*]] = phi i16 [ undef, [[FOR_COND_LOOPEXIT:%.*]] ], [ undef, [[ENTRY:%.*]] ]
-; CHECK-NEXT:    switch i32 0, label [[FOR_COND_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[FOR_COND_LOOPEXIT]]
-; CHECK-NEXT:    ]
+; CHECK-NEXT:    [[INC41_LCSSA3:%.*]] = phi i16 [ undef, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    br label [[FOR_COND_SPLIT:%.*]]
 ; CHECK:       for.cond-split:
 ; CHECK-NEXT:    [[INC41_LCSSA3_LCSSA:%.*]] = phi i16 [ [[INC41_LCSSA3]], [[FOR_COND]] ]
 ; CHECK-NEXT:    br label [[WHILE_COND:%.*]]
Index: llvm/test/Transforms/LoopSimplifyCFG/live_block_marking.ll
===================================================================
--- llvm/test/Transforms/LoopSimplifyCFG/live_block_marking.ll
+++ llvm/test/Transforms/LoopSimplifyCFG/live_block_marking.ll
@@ -17,14 +17,6 @@
 ; CHECK:       to_fold:
 ; CHECK-NEXT:    br i1 [[C]], label [[LATCH]], label [[INNER_PREHEADER:%.*]]
 ; CHECK:       inner.preheader:
-; CHECK-NEXT:    br label [[INNER:%.*]]
-; CHECK:       inner:
-; CHECK-NEXT:    br i1 false, label [[INNER_LATCH:%.*]], label [[UNDEAD:%.*]]
-; CHECK:       inner_latch:
-; CHECK-NEXT:    br i1 true, label [[INNER]], label [[LATCH_LOOPEXIT:%.*]]
-; CHECK:       undead:
-; CHECK-NEXT:    br label [[LATCH]]
-; CHECK:       latch.loopexit:
 ; CHECK-NEXT:    br label [[LATCH]]
 ; CHECK:       latch:
 ; CHECK-NEXT:    br label [[OUTER]]
Index: llvm/test/Transforms/LoopSimplifyCFG/update_parents.ll
===================================================================
--- llvm/test/Transforms/LoopSimplifyCFG/update_parents.ll
+++ llvm/test/Transforms/LoopSimplifyCFG/update_parents.ll
@@ -9,17 +9,12 @@
 define void @test() {
 ; CHECK-LABEL: @test(
 ; CHECK-NEXT:    br label [[BB1:%.*]]
-; CHECK:       bb1.loopexit:
-; CHECK-NEXT:    br label [[BB1]]
 ; CHECK:       bb1:
+; CHECK-NEXT:    br label [[BB1_SPLIT:%.*]]
+; CHECK:       bb1-split:
 ; CHECK-NEXT:    br label [[BB2:%.*]]
-; CHECK:       bb2.loopexit:
-; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    switch i32 0, label [[BB2_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[BB1_LOOPEXIT:%.*]]
-; CHECK-NEXT:    i32 2, label [[BB2_LOOPEXIT:%.*]]
-; CHECK-NEXT:    ]
+; CHECK-NEXT:    br label [[BB2_SPLIT:%.*]]
 ; CHECK:       bb2-split:
 ; CHECK-NEXT:    br label [[BB3:%.*]]
 ; CHECK:       bb3:
@@ -50,17 +45,12 @@
 define void @test_many_subloops(i1 %c) {
 ; CHECK-LABEL: @test_many_subloops(
 ; CHECK-NEXT:    br label [[BB1:%.*]]
-; CHECK:       bb1.loopexit:
-; CHECK-NEXT:    br label [[BB1]]
 ; CHECK:       bb1:
+; CHECK-NEXT:    br label [[BB1_SPLIT:%.*]]
+; CHECK:       bb1-split:
 ; CHECK-NEXT:    br label [[BB2:%.*]]
-; CHECK:       bb2.loopexit:
-; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    switch i32 0, label [[BB2_SPLIT:%.*]] [
-; CHECK-NEXT:    i32 1, label [[BB1_LOOPEXIT:%.*]]
-; CHECK-NEXT:    i32 2, label [[BB2_LOOPEXIT:%.*]]
-; CHECK-NEXT:    ]
+; CHECK-NEXT:    br label [[BB2_SPLIT:%.*]]
 ; CHECK:       bb2-split:
 ; CHECK-NEXT:    br label [[BB3:%.*]]
 ; CHECK:       bb3: