Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -4832,6 +4832,15 @@
       case PPC::PRED_NE: Opc = PPC::CRXOR;  Swap = false; break;
       }
 
+      // A signed comparison of i1 values produces the opposite result to an
+      // unsigned one if the condition code includes less-than or greater-than.
+      // This is because 1 is the most negative signed i1 number and the most
+      // positive unsigned i1 number. The CR-logical operations used for such
+      // comparisons are non-commutative so for signed comparisons vs. unsigned
+      // ones, the input operands just need to be swapped.
+      if (ISD::isSignedIntSetCC(CC))
+        Swap = !Swap;
+
       SDValue BitComp(CurDAG->getMachineNode(Opc, dl, MVT::i1,
                                              N->getOperand(Swap ? 3 : 2),
                                              N->getOperand(Swap ? 2 : 3)), 0);
Index: llvm/test/CodeGen/PowerPC/brcond.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/brcond.ll
+++ llvm/test/CodeGen/PowerPC/brcond.ll
@@ -7,7 +7,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpw 0, 5, 6
 ; CHECK-NEXT:    cmpw 1, 3, 4
-; CHECK-NEXT:    crorc 20, 6, 2
+; CHECK-NEXT:    crorc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB0_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    extsw 3, 7
@@ -55,7 +55,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpw 0, 5, 6
 ; CHECK-NEXT:    cmpw 1, 3, 4
-; CHECK-NEXT:    crandc 20, 6, 2
+; CHECK-NEXT:    crandc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB2_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    extsw 3, 7
@@ -127,7 +127,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpw 0, 5, 6
 ; CHECK-NEXT:    cmpw 1, 3, 4
-; CHECK-NEXT:    crandc 20, 2, 6
+; CHECK-NEXT:    crandc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB5_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    extsw 3, 7
@@ -175,7 +175,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpw 0, 5, 6
 ; CHECK-NEXT:    cmpw 1, 3, 4
-; CHECK-NEXT:    crorc 20, 2, 6
+; CHECK-NEXT:    crorc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB7_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    extsw 3, 7
@@ -247,7 +247,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpd 5, 6
 ; CHECK-NEXT:    cmpd 1, 3, 4
-; CHECK-NEXT:    crorc 20, 6, 2
+; CHECK-NEXT:    crorc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB10_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    mr 3, 7
@@ -295,7 +295,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpd 5, 6
 ; CHECK-NEXT:    cmpd 1, 3, 4
-; CHECK-NEXT:    crandc 20, 6, 2
+; CHECK-NEXT:    crandc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB12_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    mr 3, 7
@@ -367,7 +367,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpd 5, 6
 ; CHECK-NEXT:    cmpd 1, 3, 4
-; CHECK-NEXT:    crandc 20, 2, 6
+; CHECK-NEXT:    crandc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB15_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    mr 3, 7
@@ -415,7 +415,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpd 5, 6
 ; CHECK-NEXT:    cmpd 1, 3, 4
-; CHECK-NEXT:    crorc 20, 2, 6
+; CHECK-NEXT:    crorc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB17_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    mr 3, 7
@@ -487,7 +487,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crorc 20, 6, 2
+; CHECK-NEXT:    crorc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB20_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5
@@ -535,7 +535,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crandc 20, 6, 2
+; CHECK-NEXT:    crandc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB22_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5
@@ -607,7 +607,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crandc 20, 2, 6
+; CHECK-NEXT:    crandc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB25_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5
@@ -655,7 +655,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crorc 20, 2, 6
+; CHECK-NEXT:    crorc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB27_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5
@@ -727,7 +727,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crorc 20, 6, 2
+; CHECK-NEXT:    crorc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB30_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5
@@ -775,7 +775,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crandc 20, 6, 2
+; CHECK-NEXT:    crandc 20, 2, 6
 ; CHECK-NEXT:    bc 12, 20, .LBB32_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5
@@ -847,7 +847,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crandc 20, 2, 6
+; CHECK-NEXT:    crandc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB35_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5
@@ -895,7 +895,7 @@
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    fcmpu 0, 3, 4
 ; CHECK-NEXT:    fcmpu 1, 1, 2
-; CHECK-NEXT:    crorc 20, 2, 6
+; CHECK-NEXT:    crorc 20, 6, 2
 ; CHECK-NEXT:    bc 12, 20, .LBB37_2
 ; CHECK-NEXT:  # %bb.1: # %iftrue
 ; CHECK-NEXT:    fmr 1, 5