Index: include/clang-c/Index.h =================================================================== --- include/clang-c/Index.h +++ include/clang-c/Index.h @@ -3336,6 +3336,7 @@ CXCallingConv_Swift = 13, CXCallingConv_PreserveMost = 14, CXCallingConv_PreserveAll = 15, + CXCallingConv_AArch64VectorCall = 16, CXCallingConv_Invalid = 100, CXCallingConv_Unexposed = 200 Index: include/clang/Basic/Attr.td =================================================================== --- include/clang/Basic/Attr.td +++ include/clang/Basic/Attr.td @@ -1785,6 +1785,11 @@ let Documentation = [PcsDocs]; } +def AArch64VectorPcs: DeclOrTypeAttr { + let Spellings = [Clang<"aarch64_vector_pcs">]; + let Documentation = [AArch64VectorPcsDocs]; +} + def Pure : InheritableAttr { let Spellings = [GCC<"pure">]; let Documentation = [Undocumented]; Index: include/clang/Basic/AttrDocs.td =================================================================== --- include/clang/Basic/AttrDocs.td +++ include/clang/Basic/AttrDocs.td @@ -1742,6 +1742,31 @@ }]; } +def AArch64VectorPcsDocs : Documentation { + let Category = DocCatCallingConvs; + let Content = [{ +On AArch64 targets, this attribute changes the calling convention of a +function to preserve additional floating-point and Advanced SIMD registers +relative to the default calling convention used for AArch64. + +This means it is more efficient to call such functions from code that performs +extensive floating-point and vector calculations, because fewer live SIMD and FP +registers need to be saved. This property makes it well-suited for e.g. +floating-point or vector math library functions, which are typically leaf +functions that require a small number of registers. + +However, using this attribute also means that it is more expensive to call +a function that adheres to the default calling convention from within such +a function. Therefore, it is recommended that this attribute is only used +for leaf functions. + +For more information, see the documentation for `aarch64_vector_pcs`_ on +the Arm Developer website. + +.. _`aarch64_vector_pcs`: https://developer.arm.com/products/software-development-tools/hpc/arm-compiler-for-hpc/vector-function-abi + }]; +} + def RegparmDocs : Documentation { let Category = DocCatCallingConvs; let Content = [{ Index: include/clang/Basic/Specifiers.h =================================================================== --- include/clang/Basic/Specifiers.h +++ include/clang/Basic/Specifiers.h @@ -251,6 +251,7 @@ CC_Swift, // __attribute__((swiftcall)) CC_PreserveMost, // __attribute__((preserve_most)) CC_PreserveAll, // __attribute__((preserve_all)) + CC_AArch64VectorCall, // __attribute__((aarch64_vector_pcs)) }; /// Checks whether the given calling convention supports variadic Index: lib/AST/ItaniumMangle.cpp =================================================================== --- lib/AST/ItaniumMangle.cpp +++ lib/AST/ItaniumMangle.cpp @@ -2659,6 +2659,7 @@ case CC_X86RegCall: case CC_AAPCS: case CC_AAPCS_VFP: + case CC_AArch64VectorCall: case CC_IntelOclBicc: case CC_SpirFunction: case CC_OpenCLKernel: Index: lib/AST/Type.cpp =================================================================== --- lib/AST/Type.cpp +++ lib/AST/Type.cpp @@ -2824,6 +2824,7 @@ case CC_X86RegCall : return "regcall"; case CC_AAPCS: return "aapcs"; case CC_AAPCS_VFP: return "aapcs-vfp"; + case CC_AArch64VectorCall: return "aarch64_vector_pcs"; case CC_IntelOclBicc: return "intel_ocl_bicc"; case CC_SpirFunction: return "spir_function"; case CC_OpenCLKernel: return "opencl_kernel"; @@ -3216,6 +3217,7 @@ case attr::RegCall: case attr::SwiftCall: case attr::VectorCall: + case attr::AArch64VectorPcs: case attr::Pascal: case attr::MSABI: case attr::SysVABI: Index: lib/AST/TypePrinter.cpp =================================================================== --- lib/AST/TypePrinter.cpp +++ lib/AST/TypePrinter.cpp @@ -861,6 +861,9 @@ case CC_AAPCS_VFP: OS << " __attribute__((pcs(\"aapcs-vfp\")))"; break; + case CC_AArch64VectorCall: + OS << "__attribute__((aarch64_vector_pcs))"; + break; case CC_IntelOclBicc: OS << " __attribute__((intel_ocl_bicc))"; break; @@ -1492,7 +1495,7 @@ OS << ')'; break; } - + case attr::AArch64VectorPcs: OS << "aarch64_vector_pcs"; break; case attr::IntelOclBicc: OS << "inteloclbicc"; break; case attr::PreserveMost: OS << "preserve_most"; Index: lib/Basic/Targets/AArch64.cpp =================================================================== --- lib/Basic/Targets/AArch64.cpp +++ lib/Basic/Targets/AArch64.cpp @@ -273,6 +273,7 @@ case CC_PreserveMost: case CC_PreserveAll: case CC_OpenCLKernel: + case CC_AArch64VectorCall: case CC_Win64: return CCCR_OK; default: Index: lib/CodeGen/CGCall.cpp =================================================================== --- lib/CodeGen/CGCall.cpp +++ lib/CodeGen/CGCall.cpp @@ -59,6 +59,7 @@ case CC_X86Pascal: return llvm::CallingConv::C; // TODO: Add support for __vectorcall to LLVM. case CC_X86VectorCall: return llvm::CallingConv::X86_VectorCall; + case CC_AArch64VectorCall: return llvm::CallingConv::AArch64_VectorCall; case CC_SpirFunction: return llvm::CallingConv::SPIR_FUNC; case CC_OpenCLKernel: return CGM.getTargetCodeGenInfo().getOpenCLKernelCallingConv(); case CC_PreserveMost: return llvm::CallingConv::PreserveMost; @@ -214,6 +215,9 @@ if (PcsAttr *PCS = D->getAttr()) return (PCS->getPCS() == PcsAttr::AAPCS ? CC_AAPCS : CC_AAPCS_VFP); + if (D->hasAttr()) + return CC_AArch64VectorCall; + if (D->hasAttr()) return CC_IntelOclBicc; Index: lib/CodeGen/CGDebugInfo.cpp =================================================================== --- lib/CodeGen/CGDebugInfo.cpp +++ lib/CodeGen/CGDebugInfo.cpp @@ -1102,6 +1102,7 @@ case CC_X86_64SysV: return llvm::dwarf::DW_CC_LLVM_X86_64SysV; case CC_AAPCS: + case CC_AArch64VectorCall: return llvm::dwarf::DW_CC_LLVM_AAPCS; case CC_AAPCS_VFP: return llvm::dwarf::DW_CC_LLVM_AAPCS_VFP; Index: lib/Sema/SemaDeclAttr.cpp =================================================================== --- lib/Sema/SemaDeclAttr.cpp +++ lib/Sema/SemaDeclAttr.cpp @@ -4291,6 +4291,11 @@ AL.getAttributeSpellingListIndex())); return; } + case ParsedAttr::AT_AArch64VectorPcs: + D->addAttr(::new(S.Context) + AArch64VectorPcsAttr(AL.getRange(), S.Context, + AL.getAttributeSpellingListIndex())); + return; case ParsedAttr::AT_IntelOclBicc: D->addAttr(::new (S.Context) IntelOclBiccAttr(AL.getRange(), S.Context, @@ -4368,6 +4373,9 @@ case ParsedAttr::AT_VectorCall: CC = CC_X86VectorCall; break; + case ParsedAttr::AT_AArch64VectorPcs: + CC = CC_AArch64VectorCall; + break; case ParsedAttr::AT_RegCall: CC = CC_X86RegCall; break; @@ -5840,14 +5848,14 @@ if (AL.isDeclspecAttribute() || AL.isCXX11Attribute()) checkAttributeAtMostNumArgs(S, AL, 1); else if (AL.isArgExpr(1) && AL.getArgAsExpr(1) && - !S.checkStringLiteralArgumentAttr(AL, 1, Replacement)) - return; - - if (!S.getLangOpts().CPlusPlus14 && AL.isCXX11Attribute() && !AL.isGNUScope()) - S.Diag(AL.getLoc(), diag::ext_cxx14_attr) << AL; - - D->addAttr(::new (S.Context) - DeprecatedAttr(AL.getRange(), S.Context, Str, Replacement, + !S.checkStringLiteralArgumentAttr(AL, 1, Replacement)) + return; + + if (!S.getLangOpts().CPlusPlus14 && AL.isCXX11Attribute() && !AL.isGNUScope()) + S.Diag(AL.getLoc(), diag::ext_cxx14_attr) << AL; + + D->addAttr(::new (S.Context) + DeprecatedAttr(AL.getRange(), S.Context, Str, Replacement, AL.getAttributeSpellingListIndex())); } @@ -6493,6 +6501,7 @@ case ParsedAttr::AT_IntelOclBicc: case ParsedAttr::AT_PreserveMost: case ParsedAttr::AT_PreserveAll: + case ParsedAttr::AT_AArch64VectorPcs: handleCallConvAttr(S, D, AL); break; case ParsedAttr::AT_Suppress: Index: lib/Sema/SemaType.cpp =================================================================== --- lib/Sema/SemaType.cpp +++ lib/Sema/SemaType.cpp @@ -116,6 +116,7 @@ case ParsedAttr::AT_Pascal: \ case ParsedAttr::AT_SwiftCall: \ case ParsedAttr::AT_VectorCall: \ + case ParsedAttr::AT_AArch64VectorPcs: \ case ParsedAttr::AT_MSABI: \ case ParsedAttr::AT_SysVABI: \ case ParsedAttr::AT_Pcs: \ @@ -6653,6 +6654,8 @@ return createSimpleAttr(Ctx, Attr); case ParsedAttr::AT_VectorCall: return createSimpleAttr(Ctx, Attr); + case ParsedAttr::AT_AArch64VectorPcs: + return createSimpleAttr(Ctx, Attr); case ParsedAttr::AT_Pcs: { // The attribute may have had a fixit applied where we treated an // identifier as a string literal. The contents of the string are valid, Index: test/CodeGen/aarch64-vpcs.c =================================================================== --- test/CodeGen/aarch64-vpcs.c +++ test/CodeGen/aarch64-vpcs.c @@ -0,0 +1,23 @@ +// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECKC +// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -check-prefix=CHECKCXX +// RUN: %clang_cc1 -triple i686-pc-linux-gnu -verify %s + +void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}} + +// CHECKC: define void @g( +// CHECKCXX: define void @_Z1gPi( +void g(int *a) { + +// CHECKC: call aarch64_vector_pcs void @f( +// CHECKCXX: call aarch64_vector_pcs void @_Z1fPi + f(a); +} + +// CHECKC: declare aarch64_vector_pcs void @f( +// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi + +void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}} +// CHECKC: define aarch64_vector_pcs void @h( +// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi( + f(a); +} Index: test/Sema/aarch64-vpcs.c =================================================================== --- test/Sema/aarch64-vpcs.c +++ test/Sema/aarch64-vpcs.c @@ -0,0 +1,19 @@ +// RUN: %clang_cc1 -triple aarch64-linux-gnu -verify %s + +typedef __attribute__((aarch64_vector_pcs)) int invalid_typedef; // expected-warning {{'aarch64_vector_pcs' only applies to function types; type here is 'int'}} + +void __attribute__((aarch64_vector_pcs(0))) foo0(void); // expected-error {{'aarch64_vector_pcs' attribute takes no arguments}} + +void __attribute__((aarch64_vector_pcs, preserve_all)) foo1(void); // expected-error {{not compatible}} + +void __attribute__((cdecl)) foo2(void); // expected-note {{previous declaration is here}} +void __attribute__((aarch64_vector_pcs)) foo2(void) {} // expected-error {{function declared 'aarch64_vector_pcs' here was previously declared 'cdecl'}} + +void foo3(void); // expected-note {{previous declaration is here}} +void __attribute__((aarch64_vector_pcs)) foo3(void) {} // expected-error {{function declared 'aarch64_vector_pcs' here was previously declared without calling convention}} + +typedef int (*fn_ty)(void); +typedef int __attribute__((aarch64_vector_pcs)) (*aavpcs_fn_ty)(void); +void foo4(fn_ty ptr1, aavpcs_fn_ty ptr2) { + ptr1 = ptr2; // expected-warning {{incompatible function pointer types}} +} Index: test/Sema/callingconv.c =================================================================== --- test/Sema/callingconv.c +++ test/Sema/callingconv.c @@ -51,6 +51,8 @@ int __attribute__((pcs("aapcs-vfp"))) pcs6(void); // expected-warning {{calling convention 'pcs' ignored for this target}} int __attribute__((pcs("foo"))) pcs7(void); // expected-error {{invalid PCS type}} +int __attribute__((aarch64_vector_pcs)) aavpcs(void); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}} + // PR6361 void ctest3(); void __attribute__((cdecl)) ctest3() {} Index: tools/libclang/CXType.cpp =================================================================== --- tools/libclang/CXType.cpp +++ tools/libclang/CXType.cpp @@ -651,6 +651,7 @@ TCALLINGCONV(X86Pascal); TCALLINGCONV(X86RegCall); TCALLINGCONV(X86VectorCall); + TCALLINGCONV(AArch64VectorCall); TCALLINGCONV(Win64); TCALLINGCONV(X86_64SysV); TCALLINGCONV(AAPCS);