Index: include/llvm/CodeGen/MachineMemOperand.h =================================================================== --- include/llvm/CodeGen/MachineMemOperand.h +++ include/llvm/CodeGen/MachineMemOperand.h @@ -61,8 +61,8 @@ AddrSpace = v ? v->getAddressSpace() : 0; } - explicit MachinePointerInfo(unsigned AddressSpace = 0) - : V((const Value *)nullptr), Offset(0), StackID(0), + explicit MachinePointerInfo(unsigned AddressSpace = 0, int64_t offset = 0) + : V((const Value *)nullptr), Offset(offset), StackID(0), AddrSpace(AddressSpace) {} explicit MachinePointerInfo( @@ -80,7 +80,7 @@ MachinePointerInfo getWithOffset(int64_t O) const { if (V.isNull()) - return MachinePointerInfo(AddrSpace); + return MachinePointerInfo(AddrSpace, Offset+O); if (V.is()) return MachinePointerInfo(V.get(), Offset+O, StackID); return MachinePointerInfo(V.get(), Offset+O, Index: test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir =================================================================== --- test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir +++ test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir @@ -15,7 +15,7 @@ ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 8, align 16) ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64) - ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8) + ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8 + 8) ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) ; CHECK: G_STORE [[COPY1]](s64), [[COPY]](p0) :: (store 8) ; CHECK: RET_ReallyLR @@ -40,7 +40,7 @@ ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 8, align 16) ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64) - ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8) + ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8 + 8) ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[LOAD1]](s64), 0 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[EXTRACT]](s32) Index: test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir =================================================================== --- test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir +++ test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir @@ -16,11 +16,11 @@ ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 8, align 4) ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64) - ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8, align 4) + ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8 + 8, align 4) ; CHECK: G_STORE [[LOAD]](s64), [[COPY1]](p0) :: (store 8, align 4) ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[COPY1]], [[C1]](s64) - ; CHECK: G_STORE [[LOAD1]](s64), [[GEP1]](p0) :: (store 8, align 4) + ; CHECK: G_STORE [[LOAD1]](s64), [[GEP1]](p0) :: (store 8 + 8, align 4) ; CHECK: RET_ReallyLR %0:_(p0) = COPY $x0 %1:_(p0) = COPY $x1 Index: test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir =================================================================== --- test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir +++ test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir @@ -30,7 +30,7 @@ ; CHECK: [[LOAD6:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 8, align 16) ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64) - ; CHECK: [[LOAD7:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8) + ; CHECK: [[LOAD7:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8 + 8) ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[LOAD6]](s64), [[LOAD7]](s64) ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[MV]](s128) ; CHECK: $x0 = COPY [[TRUNC]](s64) @@ -86,7 +86,7 @@ ; CHECK: G_STORE [[PTRTOINT1]](s64), [[COPY]](p0) :: (store 8, align 16) ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C1]](s64) - ; CHECK: G_STORE [[PTRTOINT1]](s64), [[GEP]](p0) :: (store 8) + ; CHECK: G_STORE [[PTRTOINT1]](s64), [[GEP]](p0) :: (store 8 + 8) %0:_(p0) = COPY $x0 %1:_(s32) = COPY $w1 %2:_(s1) = G_TRUNC %1(s32) Index: test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir =================================================================== --- test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir +++ test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir @@ -99,11 +99,11 @@ ; X32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[DEF]](p0) :: (load 4, align 8) ; X32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 ; X32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[C]](s32) - ; X32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p0) :: (load 4) + ; X32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p0) :: (load 4 + 4) ; X32: G_STORE [[LOAD]](s32), [[DEF]](p0) :: (store 4, align 8) ; X32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 ; X32: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[C1]](s32) - ; X32: G_STORE [[LOAD1]](s32), [[GEP1]](p0) :: (store 4) + ; X32: G_STORE [[LOAD1]](s32), [[GEP1]](p0) :: (store 4 + 4) %0(p0) = IMPLICIT_DEF %1(s64) = G_LOAD %0(p0) :: (load 8) Index: test/CodeGen/X86/GlobalISel/legalize-undef.mir =================================================================== --- test/CodeGen/X86/GlobalISel/legalize-undef.mir +++ test/CodeGen/X86/GlobalISel/legalize-undef.mir @@ -36,7 +36,7 @@ ; X32: G_STORE [[DEF4]](s32), [[DEF]](p0) :: (store 4, align 8) ; X32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 ; X32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[C1]](s32) - ; X32: G_STORE [[DEF5]](s32), [[GEP]](p0) :: (store 4) + ; X32: G_STORE [[DEF5]](s32), [[GEP]](p0) :: (store 4 + 4) %5:_(p0) = G_IMPLICIT_DEF %0:_(s1) = G_IMPLICIT_DEF G_STORE %0, %5 ::(store 1) Index: test/CodeGen/X86/byval-odd-size.ll =================================================================== --- /dev/null +++ test/CodeGen/X86/byval-odd-size.ll @@ -0,0 +1,20 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=haswell | FileCheck %s +%struct = type { [31 x i8] } + +declare void @foo(%struct* align 16 byval) nounwind + +define void @test1(%struct* nocapture %x) nounwind { +; CHECK-LABEL: test1: +; CHECK: # %bb.0: +; CHECK-NEXT: subq $40, %rsp +; CHECK-NEXT: vmovups 15(%rdi), %xmm0 +; CHECK-NEXT: vmovups %xmm0, {{[0-9]+}}(%rsp) +; CHECK-NEXT: vmovaps (%rdi), %xmm0 +; CHECK-NEXT: vmovaps %xmm0, (%rsp) +; CHECK-NEXT: callq foo +; CHECK-NEXT: addq $40, %rsp +; CHECK-NEXT: retq + call void @foo(%struct* align 16 byval %x) + ret void +}