Index: lib/CodeGen/RegAllocFast.cpp =================================================================== --- lib/CodeGen/RegAllocFast.cpp +++ lib/CodeGen/RegAllocFast.cpp @@ -155,6 +155,7 @@ enum : unsigned { spillClean = 50, spillDirty = 100, + spillPrefBonus = 20, spillImpossible = ~0u }; @@ -215,6 +216,9 @@ void spillAll(MachineBasicBlock::iterator MI, bool OnlyLiveOut); bool setPhysReg(MachineInstr &MI, MachineOperand &MO, MCPhysReg PhysReg); + unsigned traceCopies(unsigned VirtReg) const; + unsigned traceCopyChain(unsigned Reg) const; + int getStackSpaceFor(unsigned VirtReg); void spill(MachineBasicBlock::iterator Before, unsigned VirtReg, MCPhysReg AssignedReg, bool Kill); @@ -593,8 +597,48 @@ setPhysRegState(PhysReg, VirtReg); } +static bool isCoalescable(const MachineInstr &MI) { + return MI.isFullCopy(); +} + +unsigned RegAllocFast::traceCopyChain(unsigned Reg) const { + static const unsigned ChainLengthLimit = 3; + unsigned C = 0; + do { + if (TargetRegisterInfo::isPhysicalRegister(Reg)) + return Reg; + assert(TargetRegisterInfo::isVirtualRegister(Reg)); + + MachineInstr *VRegDef = MRI->getUniqueVRegDef(Reg); + if (!VRegDef || !isCoalescable(*VRegDef)) + return 0; + Reg = VRegDef->getOperand(1).getReg(); + } while (++C <= ChainLengthLimit); + return 0; +} + +/// Check if any of \p VirtReg's definitions is a copy. If it is follow the +/// chain of copies to check whether we reach a physical register we can +/// coalesce with. +unsigned RegAllocFast::traceCopies(unsigned VirtReg) const { + static const unsigned DefLimit = 3; + unsigned C = 0; + for (const MachineInstr &MI : MRI->def_instructions(VirtReg)) { + if (isCoalescable(MI)) { + unsigned Reg = MI.getOperand(1).getReg(); + Reg = traceCopyChain(Reg); + if (Reg != 0) + return Reg; + } + + if (++C >= DefLimit) + break; + } + return 0; +} + /// Allocates a physical register for VirtReg. -void RegAllocFast::allocVirtReg(MachineInstr &MI, LiveReg &LR, unsigned Hint) { +void RegAllocFast::allocVirtReg(MachineInstr &MI, LiveReg &LR, unsigned Hint0) { const unsigned VirtReg = LR.VirtReg; assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && @@ -603,19 +647,48 @@ const TargetRegisterClass &RC = *MRI->getRegClass(VirtReg); LLVM_DEBUG(dbgs() << "Search register for " << printReg(VirtReg) << " in class " << TRI->getRegClassName(&RC) - << " with hint " << printReg(Hint, TRI) << '\n'); + << " with hint " << printReg(Hint0, TRI) << '\n'); // Take hint when possible. - if (TargetRegisterInfo::isPhysicalRegister(Hint) && - MRI->isAllocatable(Hint) && RC.contains(Hint)) { + if (TargetRegisterInfo::isPhysicalRegister(Hint0) && + MRI->isAllocatable(Hint0) && RC.contains(Hint0)) { + // Ignore the hint if we would have to spill a dirty register. + unsigned Cost = calcSpillCost(Hint0); + if (Cost < spillDirty) { + LLVM_DEBUG(dbgs() << "\tPreferred Register 1: " << printReg(Hint0, TRI) + << '\n'); + if (Cost) + definePhysReg(MI, Hint0, regFree); + assignVirtToPhysReg(LR, Hint0); + return; + } else { + LLVM_DEBUG(dbgs() << "\tPreferred Register 1: " << printReg(Hint0, TRI) + << "occupied\n"); + } + } else { + Hint0 = 0; + } + + // Try other hint. + unsigned Hint1 = traceCopies(VirtReg); + if (TargetRegisterInfo::isPhysicalRegister(Hint1) && + MRI->isAllocatable(Hint1) && RC.contains(Hint1) && + !isRegUsedInInstr(Hint1)) { // Ignore the hint if we would have to spill a dirty register. - unsigned Cost = calcSpillCost(Hint); + unsigned Cost = calcSpillCost(Hint1); if (Cost < spillDirty) { + LLVM_DEBUG(dbgs() << "\tPreferred Register 0: " << printReg(Hint1, TRI) + << '\n'); if (Cost) - definePhysReg(MI, Hint, regFree); - assignVirtToPhysReg(LR, Hint); + definePhysReg(MI, Hint1, regFree); + assignVirtToPhysReg(LR, Hint1); return; + } else { + LLVM_DEBUG(dbgs() << "\tPreferred Register 0: " << printReg(Hint1, TRI) + << "occupied\n"); } + } else { + Hint1 = 0; } MCPhysReg BestReg = 0; @@ -630,6 +703,10 @@ assignVirtToPhysReg(LR, PhysReg); return; } + + if (PhysReg == Hint1 || PhysReg == Hint0) + Cost -= spillPrefBonus; + if (Cost < BestCost) { BestReg = PhysReg; BestCost = Cost; Index: test/CodeGen/AArch64/arm64-fast-isel-br.ll =================================================================== --- test/CodeGen/AArch64/arm64-fast-isel-br.ll +++ test/CodeGen/AArch64/arm64-fast-isel-br.ll @@ -132,9 +132,8 @@ ; rdar://15174028 define i32 @trunc64(i64 %foo) nounwind { ; CHECK: trunc64 -; CHECK: and [[REG1:x[0-9]+]], x0, #0x1 -; CHECK: mov x[[REG2:[0-9]+]], [[REG1]] -; CHECK: tbz w[[REG2]], #0, LBB5_2 +; CHECK: and x[[REG1:[0-9]+]], x0, #0x1 +; CHECK: tbz w[[REG1]], #0, LBB5_2 %a = and i64 %foo, 1 %b = trunc i64 %a to i1 br i1 %b, label %if.then, label %if.else Index: test/CodeGen/AArch64/arm64-fast-isel-conversion.ll =================================================================== --- test/CodeGen/AArch64/arm64-fast-isel-conversion.ll +++ test/CodeGen/AArch64/arm64-fast-isel-conversion.ll @@ -10,12 +10,12 @@ ; CHECK: str w2, [sp, #8] ; CHECK: str x3, [sp] ; CHECK: ldr x8, [sp] -; CHECK: mov x9, x8 -; CHECK: str w9, [sp, #8] -; CHECK: ldr w9, [sp, #8] -; CHECK: strh w9, [sp, #12] -; CHECK: ldrh w9, [sp, #12] -; CHECK: strb w9, [sp, #15] +; CHECK: ; kill: def $w8 killed $w8 killed $x8 +; CHECK: str w8, [sp, #8] +; CHECK: ldr w8, [sp, #8] +; CHECK: strh w8, [sp, #12] +; CHECK: ldrh w8, [sp, #12] +; CHECK: strb w8, [sp, #15] ; CHECK: ldrb w0, [sp, #15] ; CHECK: add sp, sp, #16 ; CHECK: ret @@ -365,7 +365,8 @@ define i32 @i64_trunc_i32(i64 %a) nounwind ssp { entry: ; CHECK-LABEL: i64_trunc_i32 -; CHECK: mov x1, x0 +; CHECK-NOT: mov +; CHECK: ret %conv = trunc i64 %a to i32 ret i32 %conv } @@ -373,8 +374,7 @@ define zeroext i16 @i64_trunc_i16(i64 %a) nounwind ssp { entry: ; CHECK-LABEL: i64_trunc_i16 -; CHECK: mov x[[REG:[0-9]+]], x0 -; CHECK: and [[REG2:w[0-9]+]], w[[REG]], #0xffff +; CHECK: and [[REG2:w[0-9]+]], w0, #0xffff ; CHECK: uxth w0, [[REG2]] %conv = trunc i64 %a to i16 ret i16 %conv @@ -383,8 +383,7 @@ define zeroext i8 @i64_trunc_i8(i64 %a) nounwind ssp { entry: ; CHECK-LABEL: i64_trunc_i8 -; CHECK: mov x[[REG:[0-9]+]], x0 -; CHECK: and [[REG2:w[0-9]+]], w[[REG]], #0xff +; CHECK: and [[REG2:w[0-9]+]], w0, #0xff ; CHECK: uxtb w0, [[REG2]] %conv = trunc i64 %a to i8 ret i8 %conv @@ -393,8 +392,7 @@ define zeroext i1 @i64_trunc_i1(i64 %a) nounwind ssp { entry: ; CHECK-LABEL: i64_trunc_i1 -; CHECK: mov x[[REG:[0-9]+]], x0 -; CHECK: and [[REG2:w[0-9]+]], w[[REG]], #0x1 +; CHECK: and [[REG2:w[0-9]+]], w0, #0x1 ; CHECK: and w0, [[REG2]], #0x1 %conv = trunc i64 %a to i1 ret i1 %conv @@ -404,9 +402,8 @@ define void @stack_trunc() nounwind { ; CHECK-LABEL: stack_trunc ; CHECK: sub sp, sp, #16 -; CHECK: ldr [[REG:x[0-9]+]], [sp] -; CHECK: mov x[[REG2:[0-9]+]], [[REG]] -; CHECK: and [[REG3:w[0-9]+]], w[[REG2]], #0xff +; CHECK: ldr x[[REG:[0-9]+]], [sp] +; CHECK: and [[REG3:w[0-9]+]], w[[REG]], #0xff ; CHECK: strb [[REG3]], [sp, #15] ; CHECK: add sp, sp, #16 %a = alloca i8, align 1 Index: test/CodeGen/AMDGPU/indirect-addressing-term.ll =================================================================== --- test/CodeGen/AMDGPU/indirect-addressing-term.ll +++ test/CodeGen/AMDGPU/indirect-addressing-term.ll @@ -14,45 +14,45 @@ ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 ; GCN: renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed renamable $sgpr0_sgpr1, 36, 0, 0 :: (dereferenceable invariant load 8 from %ir.out.kernarg.offset.cast, align 4, addrspace 4) ; GCN: renamable $sgpr2 = COPY renamable $sgpr1 - ; GCN: renamable $sgpr4 = COPY renamable $sgpr0, implicit killed $sgpr0_sgpr1 - ; GCN: renamable $sgpr5 = S_MOV_B32 61440 - ; GCN: renamable $sgpr6 = S_MOV_B32 -1 - ; GCN: undef renamable $sgpr8 = COPY killed renamable $sgpr4, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 + ; GCN: renamable $sgpr0 = COPY renamable $sgpr0, implicit killed $sgpr0_sgpr1 + ; GCN: renamable $sgpr1 = S_MOV_B32 61440 + ; GCN: renamable $sgpr4 = S_MOV_B32 -1 + ; GCN: undef renamable $sgpr8 = COPY killed renamable $sgpr0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GCN: renamable $sgpr9 = COPY killed renamable $sgpr2 - ; GCN: renamable $sgpr10 = COPY killed renamable $sgpr6 - ; GCN: renamable $sgpr11 = COPY killed renamable $sgpr5 - ; GCN: renamable $sgpr2 = S_MOV_B32 16 - ; GCN: renamable $sgpr4 = S_MOV_B32 15 - ; GCN: renamable $sgpr5 = S_MOV_B32 14 - ; GCN: renamable $sgpr6 = S_MOV_B32 13 - ; GCN: renamable $sgpr7 = S_MOV_B32 12 - ; GCN: renamable $sgpr12 = S_MOV_B32 11 - ; GCN: renamable $sgpr13 = S_MOV_B32 10 - ; GCN: renamable $sgpr14 = S_MOV_B32 9 - ; GCN: renamable $sgpr15 = S_MOV_B32 8 - ; GCN: renamable $sgpr16 = S_MOV_B32 7 - ; GCN: renamable $sgpr17 = S_MOV_B32 6 - ; GCN: renamable $sgpr18 = S_MOV_B32 5 - ; GCN: renamable $sgpr19 = S_MOV_B32 3 - ; GCN: renamable $sgpr20 = S_MOV_B32 2 - ; GCN: renamable $sgpr21 = S_MOV_B32 1 - ; GCN: renamable $sgpr22 = S_MOV_B32 0 - ; GCN: renamable $vgpr1 = COPY killed renamable $sgpr22 - ; GCN: renamable $vgpr2 = COPY killed renamable $sgpr21 - ; GCN: renamable $vgpr3 = COPY killed renamable $sgpr20 - ; GCN: renamable $vgpr4 = COPY killed renamable $sgpr19 - ; GCN: renamable $vgpr5 = COPY killed renamable $sgpr18 - ; GCN: renamable $vgpr6 = COPY killed renamable $sgpr17 - ; GCN: renamable $vgpr7 = COPY killed renamable $sgpr16 - ; GCN: renamable $vgpr8 = COPY killed renamable $sgpr15 - ; GCN: renamable $vgpr9 = COPY killed renamable $sgpr14 - ; GCN: renamable $vgpr10 = COPY killed renamable $sgpr13 - ; GCN: renamable $vgpr11 = COPY killed renamable $sgpr12 - ; GCN: renamable $vgpr12 = COPY killed renamable $sgpr7 - ; GCN: renamable $vgpr13 = COPY killed renamable $sgpr6 - ; GCN: renamable $vgpr14 = COPY killed renamable $sgpr5 - ; GCN: renamable $vgpr15 = COPY killed renamable $sgpr4 - ; GCN: renamable $vgpr16 = COPY killed renamable $sgpr2 + ; GCN: renamable $sgpr10 = COPY killed renamable $sgpr4 + ; GCN: renamable $sgpr11 = COPY killed renamable $sgpr1 + ; GCN: renamable $sgpr0 = S_MOV_B32 16 + ; GCN: renamable $sgpr1 = S_MOV_B32 15 + ; GCN: renamable $sgpr2 = S_MOV_B32 14 + ; GCN: renamable $sgpr4 = S_MOV_B32 13 + ; GCN: renamable $sgpr5 = S_MOV_B32 12 + ; GCN: renamable $sgpr6 = S_MOV_B32 11 + ; GCN: renamable $sgpr7 = S_MOV_B32 10 + ; GCN: renamable $sgpr12 = S_MOV_B32 9 + ; GCN: renamable $sgpr13 = S_MOV_B32 8 + ; GCN: renamable $sgpr14 = S_MOV_B32 7 + ; GCN: renamable $sgpr15 = S_MOV_B32 6 + ; GCN: renamable $sgpr16 = S_MOV_B32 5 + ; GCN: renamable $sgpr17 = S_MOV_B32 3 + ; GCN: renamable $sgpr18 = S_MOV_B32 2 + ; GCN: renamable $sgpr19 = S_MOV_B32 1 + ; GCN: renamable $sgpr20 = S_MOV_B32 0 + ; GCN: renamable $vgpr1 = COPY killed renamable $sgpr20 + ; GCN: renamable $vgpr2 = COPY killed renamable $sgpr19 + ; GCN: renamable $vgpr3 = COPY killed renamable $sgpr18 + ; GCN: renamable $vgpr4 = COPY killed renamable $sgpr17 + ; GCN: renamable $vgpr5 = COPY killed renamable $sgpr16 + ; GCN: renamable $vgpr6 = COPY killed renamable $sgpr15 + ; GCN: renamable $vgpr7 = COPY killed renamable $sgpr14 + ; GCN: renamable $vgpr8 = COPY killed renamable $sgpr13 + ; GCN: renamable $vgpr9 = COPY killed renamable $sgpr12 + ; GCN: renamable $vgpr10 = COPY killed renamable $sgpr7 + ; GCN: renamable $vgpr11 = COPY killed renamable $sgpr6 + ; GCN: renamable $vgpr12 = COPY killed renamable $sgpr5 + ; GCN: renamable $vgpr13 = COPY killed renamable $sgpr4 + ; GCN: renamable $vgpr14 = COPY killed renamable $sgpr2 + ; GCN: renamable $vgpr15 = COPY killed renamable $sgpr1 + ; GCN: renamable $vgpr16 = COPY killed renamable $sgpr0 ; GCN: undef renamable $vgpr17 = COPY killed renamable $vgpr1, implicit-def $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32 ; GCN: renamable $vgpr18 = COPY killed renamable $vgpr2 ; GCN: renamable $vgpr19 = COPY killed renamable $vgpr3 @@ -69,13 +69,13 @@ ; GCN: renamable $vgpr30 = COPY killed renamable $vgpr14 ; GCN: renamable $vgpr31 = COPY killed renamable $vgpr15 ; GCN: renamable $vgpr32 = COPY killed renamable $vgpr16 - ; GCN: renamable $sgpr0_sgpr1 = S_MOV_B64 $exec + ; GCN: renamable $sgpr22_sgpr23 = S_MOV_B64 $exec ; GCN: renamable $vgpr1 = IMPLICIT_DEF ; GCN: renamable $sgpr24_sgpr25 = IMPLICIT_DEF ; GCN: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr3, 0, implicit $exec :: (store 4 into %stack.0, addrspace 5) ; GCN: SI_SPILL_S128_SAVE killed $sgpr8_sgpr9_sgpr10_sgpr11, %stack.1, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr3, implicit-def dead $m0 :: (store 16 into %stack.1, align 4, addrspace 5) ; GCN: SI_SPILL_V512_SAVE killed $vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32, %stack.2, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr3, 0, implicit $exec :: (store 64 into %stack.2, align 4, addrspace 5) - ; GCN: SI_SPILL_S64_SAVE killed $sgpr0_sgpr1, %stack.3, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr3, implicit-def dead $m0 :: (store 8 into %stack.3, align 4, addrspace 5) + ; GCN: SI_SPILL_S64_SAVE killed $sgpr22_sgpr23, %stack.3, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr3, implicit-def dead $m0 :: (store 8 into %stack.3, align 4, addrspace 5) ; GCN: SI_SPILL_V32_SAVE killed $vgpr1, %stack.4, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr3, 0, implicit $exec :: (store 4 into %stack.4, addrspace 5) ; GCN: SI_SPILL_S64_SAVE killed $sgpr24_sgpr25, %stack.5, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr3, implicit-def dead $m0 :: (store 8 into %stack.5, align 4, addrspace 5) ; GCN: bb.1: Index: test/CodeGen/Mips/atomic.ll =================================================================== --- test/CodeGen/Mips/atomic.ll +++ test/CodeGen/Mips/atomic.ll @@ -194,16 +194,16 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadAdd32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd32))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB0_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: addu $5, $3, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB0_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: addu $3, $2, $4 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB0_1 +; MIPS64R6O0-NEXT: nop ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: AtomicLoadAdd32: @@ -454,16 +454,16 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadSub32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadSub32))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB1_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: subu $5, $3, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB1_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: subu $3, $2, $4 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB1_1 +; MIPS64R6O0-NEXT: nop ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: AtomicLoadSub32: @@ -714,16 +714,16 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadXor32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadXor32))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB2_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: xor $5, $3, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB2_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: xor $3, $2, $4 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB2_1 +; MIPS64R6O0-NEXT: nop ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: AtomicLoadXor32: @@ -973,16 +973,16 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadOr32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadOr32))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB3_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: or $5, $3, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB3_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: or $3, $2, $4 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB3_1 +; MIPS64R6O0-NEXT: nop ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: AtomicLoadOr32: @@ -1232,16 +1232,16 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadAnd32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAnd32))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB4_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: and $5, $3, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB4_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: and $3, $2, $4 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB4_1 +; MIPS64R6O0-NEXT: nop ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: AtomicLoadAnd32: @@ -1500,17 +1500,17 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadNand32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadNand32))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB5_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: and $5, $3, $2 -; MIPS64R6O0-NEXT: nor $5, $zero, $5 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB5_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: and $3, $2, $4 +; MIPS64R6O0-NEXT: nor $3, $zero, $3 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB5_1 +; MIPS64R6O0-NEXT: nop ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: AtomicLoadNand32: @@ -1790,16 +1790,16 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicSwap32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicSwap32))) -; MIPS64R6O0-NEXT: move $2, $4 -; MIPS64R6O0-NEXT: sw $2, 12($sp) +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 +; MIPS64R6O0-NEXT: sw $4, 12($sp) ; MIPS64R6O0-NEXT: lw $2, 12($sp) ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB6_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 ; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: move $5, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB6_1 +; MIPS64R6O0-NEXT: move $4, $2 +; MIPS64R6O0-NEXT: sc $4, 0($1) +; MIPS64R6O0-NEXT: beqzc $4, .LBB6_1 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16 @@ -2128,22 +2128,22 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicCmpSwap32))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicCmpSwap32))) -; MIPS64R6O0-NEXT: move $2, $4 -; MIPS64R6O0-NEXT: move $3, $5 -; MIPS64R6O0-NEXT: sw $3, 12($sp) -; MIPS64R6O0-NEXT: lw $3, 12($sp) +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 +; MIPS64R6O0-NEXT: # kill: def $a1 killed $a1 killed $a1_64 +; MIPS64R6O0-NEXT: sw $5, 12($sp) +; MIPS64R6O0-NEXT: lw $2, 12($sp) ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: .LBB7_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $6, 0($1) -; MIPS64R6O0-NEXT: bnec $6, $2, .LBB7_3 +; MIPS64R6O0-NEXT: ll $3, 0($1) +; MIPS64R6O0-NEXT: bnec $3, $4, .LBB7_3 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: # in Loop: Header=BB7_1 Depth=1 -; MIPS64R6O0-NEXT: move $7, $3 -; MIPS64R6O0-NEXT: sc $7, 0($1) -; MIPS64R6O0-NEXT: beqzc $7, .LBB7_1 +; MIPS64R6O0-NEXT: move $5, $2 +; MIPS64R6O0-NEXT: sc $5, 0($1) +; MIPS64R6O0-NEXT: beqzc $5, .LBB7_1 ; MIPS64R6O0-NEXT: .LBB7_3: # %entry -; MIPS64R6O0-NEXT: move $2, $6 +; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16 ; MIPS64R6O0-NEXT: jrc $ra ; @@ -2584,32 +2584,32 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadAdd8))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd8))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(y)($1) -; MIPS64R6O0-NEXT: daddiu $3, $zero, -4 -; MIPS64R6O0-NEXT: and $3, $1, $3 -; MIPS64R6O0-NEXT: andi $5, $1, 3 -; MIPS64R6O0-NEXT: xori $5, $5, 3 -; MIPS64R6O0-NEXT: sll $5, $5, 3 -; MIPS64R6O0-NEXT: ori $6, $zero, 255 -; MIPS64R6O0-NEXT: sllv $6, $6, $5 -; MIPS64R6O0-NEXT: nor $7, $zero, $6 -; MIPS64R6O0-NEXT: sllv $2, $2, $5 +; MIPS64R6O0-NEXT: daddiu $2, $zero, -4 +; MIPS64R6O0-NEXT: and $2, $1, $2 +; MIPS64R6O0-NEXT: andi $3, $1, 3 +; MIPS64R6O0-NEXT: xori $3, $3, 3 +; MIPS64R6O0-NEXT: sll $3, $3, 3 +; MIPS64R6O0-NEXT: ori $5, $zero, 255 +; MIPS64R6O0-NEXT: sllv $5, $5, $3 +; MIPS64R6O0-NEXT: nor $6, $zero, $5 +; MIPS64R6O0-NEXT: sllv $4, $4, $3 ; MIPS64R6O0-NEXT: .LBB8_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $9, 0($3) -; MIPS64R6O0-NEXT: addu $10, $9, $2 -; MIPS64R6O0-NEXT: and $10, $10, $6 -; MIPS64R6O0-NEXT: and $11, $9, $7 -; MIPS64R6O0-NEXT: or $11, $11, $10 -; MIPS64R6O0-NEXT: sc $11, 0($3) -; MIPS64R6O0-NEXT: beqzc $11, .LBB8_1 +; MIPS64R6O0-NEXT: ll $8, 0($2) +; MIPS64R6O0-NEXT: addu $9, $8, $4 +; MIPS64R6O0-NEXT: and $9, $9, $5 +; MIPS64R6O0-NEXT: and $10, $8, $6 +; MIPS64R6O0-NEXT: or $10, $10, $9 +; MIPS64R6O0-NEXT: sc $10, 0($2) +; MIPS64R6O0-NEXT: beqzc $10, .LBB8_1 ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: and $8, $9, $6 -; MIPS64R6O0-NEXT: srlv $8, $8, $5 -; MIPS64R6O0-NEXT: seb $8, $8 +; MIPS64R6O0-NEXT: and $7, $8, $5 +; MIPS64R6O0-NEXT: srlv $7, $7, $3 +; MIPS64R6O0-NEXT: seb $7, $7 ; MIPS64R6O0-NEXT: # %bb.3: # %entry -; MIPS64R6O0-NEXT: sw $8, 12($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $7, 12($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.4: # %entry ; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: seb $2, $1 @@ -3100,32 +3100,32 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadSub8))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadSub8))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(y)($1) -; MIPS64R6O0-NEXT: daddiu $3, $zero, -4 -; MIPS64R6O0-NEXT: and $3, $1, $3 -; MIPS64R6O0-NEXT: andi $5, $1, 3 -; MIPS64R6O0-NEXT: xori $5, $5, 3 -; MIPS64R6O0-NEXT: sll $5, $5, 3 -; MIPS64R6O0-NEXT: ori $6, $zero, 255 -; MIPS64R6O0-NEXT: sllv $6, $6, $5 -; MIPS64R6O0-NEXT: nor $7, $zero, $6 -; MIPS64R6O0-NEXT: sllv $2, $2, $5 +; MIPS64R6O0-NEXT: daddiu $2, $zero, -4 +; MIPS64R6O0-NEXT: and $2, $1, $2 +; MIPS64R6O0-NEXT: andi $3, $1, 3 +; MIPS64R6O0-NEXT: xori $3, $3, 3 +; MIPS64R6O0-NEXT: sll $3, $3, 3 +; MIPS64R6O0-NEXT: ori $5, $zero, 255 +; MIPS64R6O0-NEXT: sllv $5, $5, $3 +; MIPS64R6O0-NEXT: nor $6, $zero, $5 +; MIPS64R6O0-NEXT: sllv $4, $4, $3 ; MIPS64R6O0-NEXT: .LBB9_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $9, 0($3) -; MIPS64R6O0-NEXT: subu $10, $9, $2 -; MIPS64R6O0-NEXT: and $10, $10, $6 -; MIPS64R6O0-NEXT: and $11, $9, $7 -; MIPS64R6O0-NEXT: or $11, $11, $10 -; MIPS64R6O0-NEXT: sc $11, 0($3) -; MIPS64R6O0-NEXT: beqzc $11, .LBB9_1 +; MIPS64R6O0-NEXT: ll $8, 0($2) +; MIPS64R6O0-NEXT: subu $9, $8, $4 +; MIPS64R6O0-NEXT: and $9, $9, $5 +; MIPS64R6O0-NEXT: and $10, $8, $6 +; MIPS64R6O0-NEXT: or $10, $10, $9 +; MIPS64R6O0-NEXT: sc $10, 0($2) +; MIPS64R6O0-NEXT: beqzc $10, .LBB9_1 ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: and $8, $9, $6 -; MIPS64R6O0-NEXT: srlv $8, $8, $5 -; MIPS64R6O0-NEXT: seb $8, $8 +; MIPS64R6O0-NEXT: and $7, $8, $5 +; MIPS64R6O0-NEXT: srlv $7, $7, $3 +; MIPS64R6O0-NEXT: seb $7, $7 ; MIPS64R6O0-NEXT: # %bb.3: # %entry -; MIPS64R6O0-NEXT: sw $8, 12($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $7, 12($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.4: # %entry ; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: seb $2, $1 @@ -3626,33 +3626,33 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadNand8))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadNand8))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(y)($1) -; MIPS64R6O0-NEXT: daddiu $3, $zero, -4 -; MIPS64R6O0-NEXT: and $3, $1, $3 -; MIPS64R6O0-NEXT: andi $5, $1, 3 -; MIPS64R6O0-NEXT: xori $5, $5, 3 -; MIPS64R6O0-NEXT: sll $5, $5, 3 -; MIPS64R6O0-NEXT: ori $6, $zero, 255 -; MIPS64R6O0-NEXT: sllv $6, $6, $5 -; MIPS64R6O0-NEXT: nor $7, $zero, $6 -; MIPS64R6O0-NEXT: sllv $2, $2, $5 +; MIPS64R6O0-NEXT: daddiu $2, $zero, -4 +; MIPS64R6O0-NEXT: and $2, $1, $2 +; MIPS64R6O0-NEXT: andi $3, $1, 3 +; MIPS64R6O0-NEXT: xori $3, $3, 3 +; MIPS64R6O0-NEXT: sll $3, $3, 3 +; MIPS64R6O0-NEXT: ori $5, $zero, 255 +; MIPS64R6O0-NEXT: sllv $5, $5, $3 +; MIPS64R6O0-NEXT: nor $6, $zero, $5 +; MIPS64R6O0-NEXT: sllv $4, $4, $3 ; MIPS64R6O0-NEXT: .LBB10_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $9, 0($3) -; MIPS64R6O0-NEXT: and $10, $9, $2 -; MIPS64R6O0-NEXT: nor $10, $zero, $10 -; MIPS64R6O0-NEXT: and $10, $10, $6 -; MIPS64R6O0-NEXT: and $11, $9, $7 -; MIPS64R6O0-NEXT: or $11, $11, $10 -; MIPS64R6O0-NEXT: sc $11, 0($3) -; MIPS64R6O0-NEXT: beqzc $11, .LBB10_1 +; MIPS64R6O0-NEXT: ll $8, 0($2) +; MIPS64R6O0-NEXT: and $9, $8, $4 +; MIPS64R6O0-NEXT: nor $9, $zero, $9 +; MIPS64R6O0-NEXT: and $9, $9, $5 +; MIPS64R6O0-NEXT: and $10, $8, $6 +; MIPS64R6O0-NEXT: or $10, $10, $9 +; MIPS64R6O0-NEXT: sc $10, 0($2) +; MIPS64R6O0-NEXT: beqzc $10, .LBB10_1 ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: and $8, $9, $6 -; MIPS64R6O0-NEXT: srlv $8, $8, $5 -; MIPS64R6O0-NEXT: seb $8, $8 +; MIPS64R6O0-NEXT: and $7, $8, $5 +; MIPS64R6O0-NEXT: srlv $7, $7, $3 +; MIPS64R6O0-NEXT: seb $7, $7 ; MIPS64R6O0-NEXT: # %bb.3: # %entry -; MIPS64R6O0-NEXT: sw $8, 12($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $7, 12($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.4: # %entry ; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: seb $2, $1 @@ -4140,31 +4140,31 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicSwap8))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicSwap8))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(y)($1) -; MIPS64R6O0-NEXT: daddiu $3, $zero, -4 -; MIPS64R6O0-NEXT: and $3, $1, $3 -; MIPS64R6O0-NEXT: andi $5, $1, 3 -; MIPS64R6O0-NEXT: xori $5, $5, 3 -; MIPS64R6O0-NEXT: sll $5, $5, 3 -; MIPS64R6O0-NEXT: ori $6, $zero, 255 -; MIPS64R6O0-NEXT: sllv $6, $6, $5 -; MIPS64R6O0-NEXT: nor $7, $zero, $6 -; MIPS64R6O0-NEXT: sllv $2, $2, $5 +; MIPS64R6O0-NEXT: daddiu $2, $zero, -4 +; MIPS64R6O0-NEXT: and $2, $1, $2 +; MIPS64R6O0-NEXT: andi $3, $1, 3 +; MIPS64R6O0-NEXT: xori $3, $3, 3 +; MIPS64R6O0-NEXT: sll $3, $3, 3 +; MIPS64R6O0-NEXT: ori $5, $zero, 255 +; MIPS64R6O0-NEXT: sllv $5, $5, $3 +; MIPS64R6O0-NEXT: nor $6, $zero, $5 +; MIPS64R6O0-NEXT: sllv $4, $4, $3 ; MIPS64R6O0-NEXT: .LBB11_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $9, 0($3) -; MIPS64R6O0-NEXT: and $10, $2, $6 -; MIPS64R6O0-NEXT: and $11, $9, $7 -; MIPS64R6O0-NEXT: or $11, $11, $10 -; MIPS64R6O0-NEXT: sc $11, 0($3) -; MIPS64R6O0-NEXT: beqzc $11, .LBB11_1 +; MIPS64R6O0-NEXT: ll $8, 0($2) +; MIPS64R6O0-NEXT: and $9, $4, $5 +; MIPS64R6O0-NEXT: and $10, $8, $6 +; MIPS64R6O0-NEXT: or $10, $10, $9 +; MIPS64R6O0-NEXT: sc $10, 0($2) +; MIPS64R6O0-NEXT: beqzc $10, .LBB11_1 ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: and $8, $9, $6 -; MIPS64R6O0-NEXT: srlv $8, $8, $5 -; MIPS64R6O0-NEXT: seb $8, $8 +; MIPS64R6O0-NEXT: and $7, $8, $5 +; MIPS64R6O0-NEXT: srlv $7, $7, $3 +; MIPS64R6O0-NEXT: seb $7, $7 ; MIPS64R6O0-NEXT: # %bb.3: # %entry -; MIPS64R6O0-NEXT: sw $8, 12($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $7, 12($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.4: # %entry ; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: seb $2, $1 @@ -4690,37 +4690,37 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicCmpSwap8))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicCmpSwap8))) -; MIPS64R6O0-NEXT: move $2, $5 -; MIPS64R6O0-NEXT: move $3, $4 +; MIPS64R6O0-NEXT: # kill: def $a1 killed $a1 killed $a1_64 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(y)($1) -; MIPS64R6O0-NEXT: daddiu $4, $zero, -4 -; MIPS64R6O0-NEXT: and $4, $1, $4 -; MIPS64R6O0-NEXT: andi $6, $1, 3 -; MIPS64R6O0-NEXT: xori $6, $6, 3 -; MIPS64R6O0-NEXT: sll $6, $6, 3 -; MIPS64R6O0-NEXT: ori $7, $zero, 255 -; MIPS64R6O0-NEXT: sllv $7, $7, $6 -; MIPS64R6O0-NEXT: nor $8, $zero, $7 -; MIPS64R6O0-NEXT: andi $3, $3, 255 -; MIPS64R6O0-NEXT: sllv $3, $3, $6 -; MIPS64R6O0-NEXT: andi $2, $2, 255 -; MIPS64R6O0-NEXT: sllv $2, $2, $6 +; MIPS64R6O0-NEXT: daddiu $2, $zero, -4 +; MIPS64R6O0-NEXT: and $2, $1, $2 +; MIPS64R6O0-NEXT: andi $3, $1, 3 +; MIPS64R6O0-NEXT: xori $3, $3, 3 +; MIPS64R6O0-NEXT: sll $3, $3, 3 +; MIPS64R6O0-NEXT: ori $6, $zero, 255 +; MIPS64R6O0-NEXT: sllv $6, $6, $3 +; MIPS64R6O0-NEXT: nor $7, $zero, $6 +; MIPS64R6O0-NEXT: andi $4, $4, 255 +; MIPS64R6O0-NEXT: sllv $4, $4, $3 +; MIPS64R6O0-NEXT: andi $5, $5, 255 +; MIPS64R6O0-NEXT: sllv $5, $5, $3 ; MIPS64R6O0-NEXT: .LBB12_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $10, 0($4) -; MIPS64R6O0-NEXT: and $11, $10, $7 -; MIPS64R6O0-NEXT: bnec $11, $3, .LBB12_3 +; MIPS64R6O0-NEXT: ll $9, 0($2) +; MIPS64R6O0-NEXT: and $10, $9, $6 +; MIPS64R6O0-NEXT: bnec $10, $4, .LBB12_3 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: # in Loop: Header=BB12_1 Depth=1 -; MIPS64R6O0-NEXT: and $10, $10, $8 -; MIPS64R6O0-NEXT: or $10, $10, $2 -; MIPS64R6O0-NEXT: sc $10, 0($4) -; MIPS64R6O0-NEXT: beqzc $10, .LBB12_1 +; MIPS64R6O0-NEXT: and $9, $9, $7 +; MIPS64R6O0-NEXT: or $9, $9, $5 +; MIPS64R6O0-NEXT: sc $9, 0($2) +; MIPS64R6O0-NEXT: beqzc $9, .LBB12_1 ; MIPS64R6O0-NEXT: .LBB12_3: # %entry -; MIPS64R6O0-NEXT: srlv $9, $11, $6 -; MIPS64R6O0-NEXT: seb $9, $9 +; MIPS64R6O0-NEXT: srlv $8, $10, $3 +; MIPS64R6O0-NEXT: seb $8, $8 ; MIPS64R6O0-NEXT: # %bb.4: # %entry -; MIPS64R6O0-NEXT: sw $9, 12($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $8, 12($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.5: # %entry ; MIPS64R6O0-NEXT: lw $2, 12($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16 @@ -5257,38 +5257,38 @@ ; MIPS64R6O0-LABEL: AtomicCmpSwapRes8: ; MIPS64R6O0: # %bb.0: # %entry ; MIPS64R6O0-NEXT: daddiu $sp, $sp, -16 -; MIPS64R6O0-NEXT: move $1, $6 -; MIPS64R6O0-NEXT: move $2, $5 -; MIPS64R6O0-NEXT: move $3, $4 -; MIPS64R6O0-NEXT: daddiu $5, $zero, -4 -; MIPS64R6O0-NEXT: and $5, $4, $5 -; MIPS64R6O0-NEXT: andi $7, $4, 3 -; MIPS64R6O0-NEXT: xori $7, $7, 3 -; MIPS64R6O0-NEXT: sll $7, $7, 3 -; MIPS64R6O0-NEXT: ori $8, $zero, 255 -; MIPS64R6O0-NEXT: sllv $8, $8, $7 -; MIPS64R6O0-NEXT: nor $9, $zero, $8 -; MIPS64R6O0-NEXT: andi $10, $2, 255 -; MIPS64R6O0-NEXT: sllv $10, $10, $7 -; MIPS64R6O0-NEXT: andi $1, $1, 255 -; MIPS64R6O0-NEXT: sllv $1, $1, $7 +; MIPS64R6O0-NEXT: # kill: def $a2 killed $a2 killed $a2_64 +; MIPS64R6O0-NEXT: # kill: def $a1 killed $a1 killed $a1_64 +; MIPS64R6O0-NEXT: move $1, $4 +; MIPS64R6O0-NEXT: daddiu $2, $zero, -4 +; MIPS64R6O0-NEXT: and $2, $4, $2 +; MIPS64R6O0-NEXT: andi $3, $4, 3 +; MIPS64R6O0-NEXT: xori $3, $3, 3 +; MIPS64R6O0-NEXT: sll $3, $3, 3 +; MIPS64R6O0-NEXT: ori $7, $zero, 255 +; MIPS64R6O0-NEXT: sllv $7, $7, $3 +; MIPS64R6O0-NEXT: nor $8, $zero, $7 +; MIPS64R6O0-NEXT: andi $9, $5, 255 +; MIPS64R6O0-NEXT: sllv $9, $9, $3 +; MIPS64R6O0-NEXT: andi $6, $6, 255 +; MIPS64R6O0-NEXT: sllv $6, $6, $3 ; MIPS64R6O0-NEXT: .LBB13_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $12, 0($5) -; MIPS64R6O0-NEXT: and $13, $12, $8 -; MIPS64R6O0-NEXT: bnec $13, $10, .LBB13_3 +; MIPS64R6O0-NEXT: ll $11, 0($2) +; MIPS64R6O0-NEXT: and $12, $11, $7 +; MIPS64R6O0-NEXT: bnec $12, $9, .LBB13_3 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: # in Loop: Header=BB13_1 Depth=1 -; MIPS64R6O0-NEXT: and $12, $12, $9 -; MIPS64R6O0-NEXT: or $12, $12, $1 -; MIPS64R6O0-NEXT: sc $12, 0($5) -; MIPS64R6O0-NEXT: beqzc $12, .LBB13_1 +; MIPS64R6O0-NEXT: and $11, $11, $8 +; MIPS64R6O0-NEXT: or $11, $11, $6 +; MIPS64R6O0-NEXT: sc $11, 0($2) +; MIPS64R6O0-NEXT: beqzc $11, .LBB13_1 ; MIPS64R6O0-NEXT: .LBB13_3: # %entry -; MIPS64R6O0-NEXT: srlv $11, $13, $7 -; MIPS64R6O0-NEXT: seb $11, $11 +; MIPS64R6O0-NEXT: srlv $10, $12, $3 +; MIPS64R6O0-NEXT: seb $10, $10 ; MIPS64R6O0-NEXT: # %bb.4: # %entry -; MIPS64R6O0-NEXT: sw $2, 12($sp) # 4-byte Folded Spill -; MIPS64R6O0-NEXT: sw $11, 8($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $5, 12($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $10, 8($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.5: # %entry ; MIPS64R6O0-NEXT: lw $1, 8($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: lw $2, 12($sp) # 4-byte Folded Reload @@ -5802,32 +5802,32 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadAdd16))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd16))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(z)($1) -; MIPS64R6O0-NEXT: daddiu $3, $zero, -4 -; MIPS64R6O0-NEXT: and $3, $1, $3 -; MIPS64R6O0-NEXT: andi $5, $1, 3 -; MIPS64R6O0-NEXT: xori $5, $5, 2 -; MIPS64R6O0-NEXT: sll $5, $5, 3 -; MIPS64R6O0-NEXT: ori $6, $zero, 65535 -; MIPS64R6O0-NEXT: sllv $6, $6, $5 -; MIPS64R6O0-NEXT: nor $7, $zero, $6 -; MIPS64R6O0-NEXT: sllv $2, $2, $5 +; MIPS64R6O0-NEXT: daddiu $2, $zero, -4 +; MIPS64R6O0-NEXT: and $2, $1, $2 +; MIPS64R6O0-NEXT: andi $3, $1, 3 +; MIPS64R6O0-NEXT: xori $3, $3, 2 +; MIPS64R6O0-NEXT: sll $3, $3, 3 +; MIPS64R6O0-NEXT: ori $5, $zero, 65535 +; MIPS64R6O0-NEXT: sllv $5, $5, $3 +; MIPS64R6O0-NEXT: nor $6, $zero, $5 +; MIPS64R6O0-NEXT: sllv $4, $4, $3 ; MIPS64R6O0-NEXT: .LBB14_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $9, 0($3) -; MIPS64R6O0-NEXT: addu $10, $9, $2 -; MIPS64R6O0-NEXT: and $10, $10, $6 -; MIPS64R6O0-NEXT: and $11, $9, $7 -; MIPS64R6O0-NEXT: or $11, $11, $10 -; MIPS64R6O0-NEXT: sc $11, 0($3) -; MIPS64R6O0-NEXT: beqzc $11, .LBB14_1 +; MIPS64R6O0-NEXT: ll $8, 0($2) +; MIPS64R6O0-NEXT: addu $9, $8, $4 +; MIPS64R6O0-NEXT: and $9, $9, $5 +; MIPS64R6O0-NEXT: and $10, $8, $6 +; MIPS64R6O0-NEXT: or $10, $10, $9 +; MIPS64R6O0-NEXT: sc $10, 0($2) +; MIPS64R6O0-NEXT: beqzc $10, .LBB14_1 ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: and $8, $9, $6 -; MIPS64R6O0-NEXT: srlv $8, $8, $5 -; MIPS64R6O0-NEXT: seh $8, $8 +; MIPS64R6O0-NEXT: and $7, $8, $5 +; MIPS64R6O0-NEXT: srlv $7, $7, $3 +; MIPS64R6O0-NEXT: seh $7, $7 ; MIPS64R6O0-NEXT: # %bb.3: # %entry -; MIPS64R6O0-NEXT: sw $8, 12($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $7, 12($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.4: # %entry ; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: seh $2, $1 @@ -6383,42 +6383,42 @@ ; MIPS64R6O0: # %bb.0: ; MIPS64R6O0-NEXT: daddiu $sp, $sp, -16 ; MIPS64R6O0-NEXT: .cfi_def_cfa_offset 16 -; MIPS64R6O0-NEXT: move $1, $7 -; MIPS64R6O0-NEXT: sll $1, $1, 0 -; MIPS64R6O0-NEXT: move $2, $6 -; MIPS64R6O0-NEXT: sll $2, $2, 0 -; MIPS64R6O0-NEXT: move $3, $5 -; MIPS64R6O0-NEXT: sll $3, $3, 0 -; MIPS64R6O0-NEXT: move $5, $4 +; MIPS64R6O0-NEXT: # kill: def $a3 killed $a3 killed $a3_64 +; MIPS64R6O0-NEXT: sll $1, $7, 0 +; MIPS64R6O0-NEXT: # kill: def $a2 killed $a2 killed $a2_64 +; MIPS64R6O0-NEXT: sll $2, $6, 0 +; MIPS64R6O0-NEXT: # kill: def $a1 killed $a1 killed $a1_64 +; MIPS64R6O0-NEXT: sll $3, $5, 0 +; MIPS64R6O0-NEXT: move $8, $4 ; MIPS64R6O0-NEXT: addu $2, $3, $2 ; MIPS64R6O0-NEXT: sync -; MIPS64R6O0-NEXT: daddiu $6, $zero, -4 -; MIPS64R6O0-NEXT: and $6, $4, $6 +; MIPS64R6O0-NEXT: daddiu $9, $zero, -4 +; MIPS64R6O0-NEXT: and $9, $4, $9 ; MIPS64R6O0-NEXT: andi $3, $4, 3 ; MIPS64R6O0-NEXT: xori $3, $3, 2 ; MIPS64R6O0-NEXT: sll $3, $3, 3 -; MIPS64R6O0-NEXT: ori $8, $zero, 65535 -; MIPS64R6O0-NEXT: sllv $8, $8, $3 -; MIPS64R6O0-NEXT: nor $9, $zero, $8 -; MIPS64R6O0-NEXT: andi $10, $2, 65535 -; MIPS64R6O0-NEXT: sllv $10, $10, $3 +; MIPS64R6O0-NEXT: ori $5, $zero, 65535 +; MIPS64R6O0-NEXT: sllv $5, $5, $3 +; MIPS64R6O0-NEXT: nor $6, $zero, $5 +; MIPS64R6O0-NEXT: andi $7, $2, 65535 +; MIPS64R6O0-NEXT: sllv $7, $7, $3 ; MIPS64R6O0-NEXT: andi $1, $1, 65535 ; MIPS64R6O0-NEXT: sllv $1, $1, $3 ; MIPS64R6O0-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $12, 0($6) -; MIPS64R6O0-NEXT: and $13, $12, $8 -; MIPS64R6O0-NEXT: bnec $13, $10, .LBB15_3 +; MIPS64R6O0-NEXT: ll $11, 0($9) +; MIPS64R6O0-NEXT: and $12, $11, $5 +; MIPS64R6O0-NEXT: bnec $12, $7, .LBB15_3 ; MIPS64R6O0-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1 -; MIPS64R6O0-NEXT: and $12, $12, $9 -; MIPS64R6O0-NEXT: or $12, $12, $1 -; MIPS64R6O0-NEXT: sc $12, 0($6) -; MIPS64R6O0-NEXT: beqzc $12, .LBB15_1 +; MIPS64R6O0-NEXT: and $11, $11, $6 +; MIPS64R6O0-NEXT: or $11, $11, $1 +; MIPS64R6O0-NEXT: sc $11, 0($9) +; MIPS64R6O0-NEXT: beqzc $11, .LBB15_1 ; MIPS64R6O0-NEXT: .LBB15_3: -; MIPS64R6O0-NEXT: srlv $11, $13, $3 -; MIPS64R6O0-NEXT: seh $11, $11 +; MIPS64R6O0-NEXT: srlv $10, $12, $3 +; MIPS64R6O0-NEXT: seh $10, $10 ; MIPS64R6O0-NEXT: # %bb.4: ; MIPS64R6O0-NEXT: sw $2, 12($sp) # 4-byte Folded Spill -; MIPS64R6O0-NEXT: sw $11, 8($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: sw $10, 8($sp) # 4-byte Folded Spill ; MIPS64R6O0-NEXT: # %bb.5: ; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: seh $2, $1 @@ -6803,18 +6803,17 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(CheckSync))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(CheckSync))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: sync ; MIPS64R6O0-NEXT: ld $1, %got_disp(countsint)($1) ; MIPS64R6O0-NEXT: .LBB16_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: addu $5, $3, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB16_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: addu $3, $2, $4 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB16_1 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: sync -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: CheckSync: @@ -7499,17 +7498,17 @@ ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadAdd32_OffGt9Bit))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd32_OffGt9Bit))) -; MIPS64R6O0-NEXT: move $2, $4 +; MIPS64R6O0-NEXT: # kill: def $a0 killed $a0 killed $a0_64 ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) ; MIPS64R6O0-NEXT: daddiu $1, $1, 1024 ; MIPS64R6O0-NEXT: .LBB18_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $3, 0($1) -; MIPS64R6O0-NEXT: addu $5, $3, $2 -; MIPS64R6O0-NEXT: sc $5, 0($1) -; MIPS64R6O0-NEXT: beqzc $5, .LBB18_1 +; MIPS64R6O0-NEXT: ll $2, 0($1) +; MIPS64R6O0-NEXT: addu $3, $2, $4 +; MIPS64R6O0-NEXT: sc $3, 0($1) +; MIPS64R6O0-NEXT: beqzc $3, .LBB18_1 +; MIPS64R6O0-NEXT: nop ; MIPS64R6O0-NEXT: # %bb.2: # %entry -; MIPS64R6O0-NEXT: move $2, $3 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: AtomicLoadAdd32_OffGt9Bit: Index: test/CodeGen/Mips/atomicCmpSwapPW.ll =================================================================== --- test/CodeGen/Mips/atomicCmpSwapPW.ll +++ test/CodeGen/Mips/atomicCmpSwapPW.ll @@ -34,23 +34,23 @@ ; ; N32-LABEL: foo: ; N32: # %bb.0: # %entry -; N32-NEXT: move $1, $5 -; N32-NEXT: sll $1, $1, 0 -; N32-NEXT: move $2, $4 -; N32-NEXT: sll $2, $2, 0 +; N32-NEXT: # kill: def $a1 killed $a1 killed $a1_64 +; N32-NEXT: sll $1, $5, 0 +; N32-NEXT: # kill: def $a0 killed $a0 killed $a0_64 +; N32-NEXT: sll $2, $4, 0 ; N32-NEXT: lui $3, %hi(sym) ; N32-NEXT: lw $3, %lo(sym)($3) ; N32-NEXT: sync ; N32-NEXT: .LBB0_1: # %entry ; N32-NEXT: # =>This Inner Loop Header: Depth=1 -; N32-NEXT: ll $6, 0($3) -; N32-NEXT: bne $6, $2, .LBB0_3 +; N32-NEXT: ll $4, 0($3) +; N32-NEXT: bne $4, $2, .LBB0_3 ; N32-NEXT: nop ; N32-NEXT: # %bb.2: # %entry ; N32-NEXT: # in Loop: Header=BB0_1 Depth=1 -; N32-NEXT: move $7, $1 -; N32-NEXT: sc $7, 0($3) -; N32-NEXT: beqz $7, .LBB0_1 +; N32-NEXT: move $5, $1 +; N32-NEXT: sc $5, 0($3) +; N32-NEXT: beqz $5, .LBB0_1 ; N32-NEXT: nop ; N32-NEXT: .LBB0_3: # %entry ; N32-NEXT: sync @@ -59,10 +59,10 @@ ; ; N64-LABEL: foo: ; N64: # %bb.0: # %entry -; N64-NEXT: move $1, $5 -; N64-NEXT: sll $1, $1, 0 -; N64-NEXT: move $2, $4 -; N64-NEXT: sll $2, $2, 0 +; N64-NEXT: # kill: def $a1 killed $a1 killed $a1_64 +; N64-NEXT: sll $1, $5, 0 +; N64-NEXT: # kill: def $a0 killed $a0 killed $a0_64 +; N64-NEXT: sll $2, $4, 0 ; N64-NEXT: lui $3, %highest(sym) ; N64-NEXT: daddiu $3, $3, %higher(sym) ; N64-NEXT: dsll $3, $3, 16 @@ -72,14 +72,14 @@ ; N64-NEXT: sync ; N64-NEXT: .LBB0_1: # %entry ; N64-NEXT: # =>This Inner Loop Header: Depth=1 -; N64-NEXT: ll $6, 0($3) -; N64-NEXT: bne $6, $2, .LBB0_3 +; N64-NEXT: ll $4, 0($3) +; N64-NEXT: bne $4, $2, .LBB0_3 ; N64-NEXT: nop ; N64-NEXT: # %bb.2: # %entry ; N64-NEXT: # in Loop: Header=BB0_1 Depth=1 -; N64-NEXT: move $7, $1 -; N64-NEXT: sc $7, 0($3) -; N64-NEXT: beqz $7, .LBB0_1 +; N64-NEXT: move $5, $1 +; N64-NEXT: sc $5, 0($3) +; N64-NEXT: beqz $5, .LBB0_1 ; N64-NEXT: nop ; N64-NEXT: .LBB0_3: # %entry ; N64-NEXT: sync Index: test/CodeGen/PowerPC/vsx.ll =================================================================== --- test/CodeGen/PowerPC/vsx.ll +++ test/CodeGen/PowerPC/vsx.ll @@ -2033,8 +2033,8 @@ ; ; CHECK-FISL-LABEL: test63: ; CHECK-FISL: # %bb.0: -; CHECK-FISL-NEXT: xxlor f0, v2, v2 -; CHECK-FISL-NEXT: fmr f1, f0 +; CHECK-FISL-NEXT: # kill: def $vf2 killed $vf2 killed $v2 +; CHECK-FISL-NEXT: xxlor f1, v2, v2 ; CHECK-FISL-NEXT: blr ; ; CHECK-LE-LABEL: test63: @@ -2065,6 +2065,7 @@ ; CHECK-FISL-LABEL: test64: ; CHECK-FISL: # %bb.0: ; CHECK-FISL-NEXT: xxswapd vs0, v2 +; CHECK-FISL-NEXT: # kill: def $f0 killed $f0 killed $vsl0 ; CHECK-FISL-NEXT: fmr f1, f0 ; CHECK-FISL-NEXT: blr ; @@ -2429,14 +2430,14 @@ ; ; CHECK-FISL-LABEL: test80: ; CHECK-FISL: # %bb.0: -; CHECK-FISL-NEXT: mr r4, r3 -; CHECK-FISL-NEXT: stw r4, -16(r1) -; CHECK-FISL-NEXT: addi r3, r1, -16 -; CHECK-FISL-NEXT: lxvw4x vs0, 0, r3 +; CHECK-FISL-NEXT: # kill: def $r3 killed $r3 killed $x3 +; CHECK-FISL-NEXT: stw r3, -16(r1) +; CHECK-FISL-NEXT: addi r4, r1, -16 +; CHECK-FISL-NEXT: lxvw4x vs0, 0, r4 ; CHECK-FISL-NEXT: xxspltw v2, vs0, 0 -; CHECK-FISL-NEXT: addis r3, r2, .LCPI65_0@toc@ha -; CHECK-FISL-NEXT: addi r3, r3, .LCPI65_0@toc@l -; CHECK-FISL-NEXT: lxvw4x v3, 0, r3 +; CHECK-FISL-NEXT: addis r4, r2, .LCPI65_0@toc@ha +; CHECK-FISL-NEXT: addi r4, r4, .LCPI65_0@toc@l +; CHECK-FISL-NEXT: lxvw4x v3, 0, r4 ; CHECK-FISL-NEXT: vadduwm v2, v2, v3 ; CHECK-FISL-NEXT: blr ; Index: test/CodeGen/X86/atomic-monotonic.ll =================================================================== --- test/CodeGen/X86/atomic-monotonic.ll +++ test/CodeGen/X86/atomic-monotonic.ll @@ -19,8 +19,8 @@ define void @store_i8(i8* %ptr, i8 %v) { ; CHECK-O0-LABEL: store_i8: ; CHECK-O0: # %bb.0: -; CHECK-O0-NEXT: movb %sil, %al -; CHECK-O0-NEXT: movb %al, (%rdi) +; CHECK-O0-NEXT: # kill: def $sil killed $sil killed $esi +; CHECK-O0-NEXT: movb %sil, (%rdi) ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: store_i8: @@ -49,8 +49,8 @@ define void @store_i16(i16* %ptr, i16 %v) { ; CHECK-O0-LABEL: store_i16: ; CHECK-O0: # %bb.0: -; CHECK-O0-NEXT: movw %si, %ax -; CHECK-O0-NEXT: movw %ax, (%rdi) +; CHECK-O0-NEXT: # kill: def $si killed $si killed $esi +; CHECK-O0-NEXT: movw %si, (%rdi) ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: store_i16: Index: test/CodeGen/X86/atomic-unordered.ll =================================================================== --- test/CodeGen/X86/atomic-unordered.ll +++ test/CodeGen/X86/atomic-unordered.ll @@ -19,8 +19,8 @@ define void @store_i8(i8* %ptr, i8 %v) { ; CHECK-O0-LABEL: store_i8: ; CHECK-O0: # %bb.0: -; CHECK-O0-NEXT: movb %sil, %al -; CHECK-O0-NEXT: movb %al, (%rdi) +; CHECK-O0-NEXT: # kill: def $sil killed $sil killed $esi +; CHECK-O0-NEXT: movb %sil, (%rdi) ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: store_i8: @@ -49,8 +49,8 @@ define void @store_i16(i16* %ptr, i16 %v) { ; CHECK-O0-LABEL: store_i16: ; CHECK-O0: # %bb.0: -; CHECK-O0-NEXT: movw %si, %ax -; CHECK-O0-NEXT: movw %ax, (%rdi) +; CHECK-O0-NEXT: # kill: def $si killed $si killed $esi +; CHECK-O0-NEXT: movw %si, (%rdi) ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: store_i16: @@ -147,10 +147,10 @@ ; CHECK-O0-LABEL: narrow_writeback_and: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax +; CHECK-O0-NEXT: # kill: def $eax killed $eax killed $rax +; CHECK-O0-NEXT: andl $-256, %eax ; CHECK-O0-NEXT: movl %eax, %ecx -; CHECK-O0-NEXT: andl $-256, %ecx -; CHECK-O0-NEXT: movl %ecx, %eax -; CHECK-O0-NEXT: movq %rax, (%rdi) +; CHECK-O0-NEXT: movq %rcx, (%rdi) ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: narrow_writeback_and: @@ -322,11 +322,8 @@ ; CHECK-O0-NEXT: jmp .LBB16_1 ; CHECK-O0-NEXT: .LBB16_1: # %atomicrmw.start ; CHECK-O0-NEXT: # =>This Inner Loop Header: Depth=1 -; CHECK-O0-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload -; CHECK-O0-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload -; CHECK-O0-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; CHECK-O0-NEXT: movq %rcx, %rax ; CHECK-O0-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload +; CHECK-O0-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; CHECK-O0-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; CHECK-O0-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload ; CHECK-O0-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload @@ -1950,10 +1947,10 @@ ; CHECK-O0-LABEL: rmw_fold_shl2: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax +; CHECK-O0-NEXT: # kill: def $sil killed $sil killed $rsi +; CHECK-O0-NEXT: # implicit-def: $rcx ; CHECK-O0-NEXT: movb %sil, %cl -; CHECK-O0-NEXT: # implicit-def: $rdx -; CHECK-O0-NEXT: movb %cl, %dl -; CHECK-O0-NEXT: shlxq %rdx, %rax, %rax +; CHECK-O0-NEXT: shlxq %rcx, %rax, %rax ; CHECK-O0-NEXT: movq %rax, (%rdi) ; CHECK-O0-NEXT: retq ; @@ -1994,10 +1991,10 @@ ; CHECK-O0-LABEL: rmw_fold_lshr2: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax +; CHECK-O0-NEXT: # kill: def $sil killed $sil killed $rsi +; CHECK-O0-NEXT: # implicit-def: $rcx ; CHECK-O0-NEXT: movb %sil, %cl -; CHECK-O0-NEXT: # implicit-def: $rdx -; CHECK-O0-NEXT: movb %cl, %dl -; CHECK-O0-NEXT: shrxq %rdx, %rax, %rax +; CHECK-O0-NEXT: shrxq %rcx, %rax, %rax ; CHECK-O0-NEXT: movq %rax, (%rdi) ; CHECK-O0-NEXT: retq ; @@ -2038,10 +2035,10 @@ ; CHECK-O0-LABEL: rmw_fold_ashr2: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax +; CHECK-O0-NEXT: # kill: def $sil killed $sil killed $rsi +; CHECK-O0-NEXT: # implicit-def: $rcx ; CHECK-O0-NEXT: movb %sil, %cl -; CHECK-O0-NEXT: # implicit-def: $rdx -; CHECK-O0-NEXT: movb %cl, %dl -; CHECK-O0-NEXT: sarxq %rdx, %rax, %rax +; CHECK-O0-NEXT: sarxq %rcx, %rax, %rax ; CHECK-O0-NEXT: movq %rax, (%rdi) ; CHECK-O0-NEXT: retq ; @@ -2061,10 +2058,10 @@ ; CHECK-O0-LABEL: rmw_fold_and1: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax +; CHECK-O0-NEXT: # kill: def $eax killed $eax killed $rax +; CHECK-O0-NEXT: andl $15, %eax ; CHECK-O0-NEXT: movl %eax, %ecx -; CHECK-O0-NEXT: andl $15, %ecx -; CHECK-O0-NEXT: movl %ecx, %eax -; CHECK-O0-NEXT: movq %rax, (%rdi) +; CHECK-O0-NEXT: movq %rcx, (%rdi) ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: rmw_fold_and1: @@ -2180,8 +2177,7 @@ ; CHECK-O0-LABEL: fold_trunc: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax -; CHECK-O0-NEXT: movl %eax, %ecx -; CHECK-O0-NEXT: movl %ecx, %eax +; CHECK-O0-NEXT: # kill: def $eax killed $eax killed $rax ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: fold_trunc: @@ -2199,9 +2195,8 @@ ; CHECK-O0-LABEL: fold_trunc_add: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax -; CHECK-O0-NEXT: movl %eax, %ecx -; CHECK-O0-NEXT: addl %esi, %ecx -; CHECK-O0-NEXT: movl %ecx, %eax +; CHECK-O0-NEXT: # kill: def $eax killed $eax killed $rax +; CHECK-O0-NEXT: addl %esi, %eax ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: fold_trunc_add: @@ -2221,9 +2216,8 @@ ; CHECK-O0-LABEL: fold_trunc_and: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax -; CHECK-O0-NEXT: movl %eax, %ecx -; CHECK-O0-NEXT: andl %esi, %ecx -; CHECK-O0-NEXT: movl %ecx, %eax +; CHECK-O0-NEXT: # kill: def $eax killed $eax killed $rax +; CHECK-O0-NEXT: andl %esi, %eax ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: fold_trunc_and: @@ -2243,9 +2237,8 @@ ; CHECK-O0-LABEL: fold_trunc_or: ; CHECK-O0: # %bb.0: ; CHECK-O0-NEXT: movq (%rdi), %rax -; CHECK-O0-NEXT: movl %eax, %ecx -; CHECK-O0-NEXT: orl %esi, %ecx -; CHECK-O0-NEXT: movl %ecx, %eax +; CHECK-O0-NEXT: # kill: def $eax killed $eax killed $rax +; CHECK-O0-NEXT: orl %esi, %eax ; CHECK-O0-NEXT: retq ; ; CHECK-O3-LABEL: fold_trunc_or: @@ -2268,8 +2261,8 @@ ; CHECK-O0-NEXT: movq (%rdi), %rax ; CHECK-O0-NEXT: movb %al, %cl ; CHECK-O0-NEXT: shrq $32, %rax -; CHECK-O0-NEXT: movb %al, %dl -; CHECK-O0-NEXT: orb %dl, %cl +; CHECK-O0-NEXT: # kill: def $al killed $al killed $rax +; CHECK-O0-NEXT: orb %al, %cl ; CHECK-O0-NEXT: movzbl %cl, %eax ; CHECK-O0-NEXT: retq ; Index: test/CodeGen/X86/atomic6432.ll =================================================================== --- test/CodeGen/X86/atomic6432.ll +++ test/CodeGen/X86/atomic6432.ll @@ -9,7 +9,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $72, %esp +; X32-NEXT: subl $56, %esp ; X32-NEXT: movl sc64+4, %eax ; X32-NEXT: movl sc64, %ecx ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -17,17 +17,13 @@ ; X32-NEXT: jmp .LBB0_1 ; X32-NEXT: .LBB0_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: addl $1, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: addl $1, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: adcl $0, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -43,17 +39,13 @@ ; X32-NEXT: jmp .LBB0_3 ; X32-NEXT: .LBB0_3: # %atomicrmw.start2 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: addl $3, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: addl $3, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: adcl $0, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -69,17 +61,13 @@ ; X32-NEXT: jmp .LBB0_5 ; X32-NEXT: .LBB0_5: # %atomicrmw.start8 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: addl $5, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: addl $5, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: adcl $0, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -99,19 +87,15 @@ ; X32-NEXT: jmp .LBB0_7 ; X32-NEXT: .LBB0_7: # %atomicrmw.start14 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: addl %esi, %edx -; X32-NEXT: movl %eax, %edi +; X32-NEXT: addl %esi, %ecx +; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: adcl %ebx, %edi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -120,7 +104,7 @@ ; X32-NEXT: jne .LBB0_7 ; X32-NEXT: jmp .LBB0_8 ; X32-NEXT: .LBB0_8: # %atomicrmw.end13 -; X32-NEXT: addl $72, %esp +; X32-NEXT: addl $56, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -139,7 +123,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $72, %esp +; X32-NEXT: subl $56, %esp ; X32-NEXT: movl sc64+4, %eax ; X32-NEXT: movl sc64, %ecx ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -147,17 +131,13 @@ ; X32-NEXT: jmp .LBB1_1 ; X32-NEXT: .LBB1_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: addl $-1, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: addl $-1, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: adcl $-1, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -173,17 +153,13 @@ ; X32-NEXT: jmp .LBB1_3 ; X32-NEXT: .LBB1_3: # %atomicrmw.start2 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: addl $-3, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: addl $-3, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: adcl $-1, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -199,17 +175,13 @@ ; X32-NEXT: jmp .LBB1_5 ; X32-NEXT: .LBB1_5: # %atomicrmw.start8 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: addl $-5, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: addl $-5, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: adcl $-1, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -229,19 +201,15 @@ ; X32-NEXT: jmp .LBB1_7 ; X32-NEXT: .LBB1_7: # %atomicrmw.start14 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: subl %esi, %edx -; X32-NEXT: movl %eax, %edi +; X32-NEXT: subl %esi, %ecx +; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: sbbl %ebx, %edi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -250,7 +218,7 @@ ; X32-NEXT: jne .LBB1_7 ; X32-NEXT: jmp .LBB1_8 ; X32-NEXT: .LBB1_8: # %atomicrmw.end13 -; X32-NEXT: addl $72, %esp +; X32-NEXT: addl $56, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -268,7 +236,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $56, %esp +; X32-NEXT: subl $44, %esp ; X32-NEXT: movl sc64+4, %eax ; X32-NEXT: movl sc64, %ecx ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -276,16 +244,12 @@ ; X32-NEXT: jmp .LBB2_1 ; X32-NEXT: .LBB2_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: andl $3, %edx +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: andl $3, %ecx ; X32-NEXT: xorl %esi, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -301,17 +265,13 @@ ; X32-NEXT: jmp .LBB2_3 ; X32-NEXT: .LBB2_3: # %atomicrmw.start2 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: andl $1, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: andl $1, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: andl $1, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -331,19 +291,15 @@ ; X32-NEXT: jmp .LBB2_5 ; X32-NEXT: .LBB2_5: # %atomicrmw.start8 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: andl %esi, %edx -; X32-NEXT: movl %eax, %edi +; X32-NEXT: andl %esi, %ecx +; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: andl %ebx, %edi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -352,7 +308,7 @@ ; X32-NEXT: jne .LBB2_5 ; X32-NEXT: jmp .LBB2_6 ; X32-NEXT: .LBB2_6: # %atomicrmw.end7 -; X32-NEXT: addl $56, %esp +; X32-NEXT: addl $44, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -369,7 +325,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $56, %esp +; X32-NEXT: subl $48, %esp ; X32-NEXT: movl sc64+4, %eax ; X32-NEXT: movl sc64, %ecx ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -377,15 +333,14 @@ ; X32-NEXT: jmp .LBB3_1 ; X32-NEXT: .LBB3_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: orl $3, %edx -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: orl $3, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -400,17 +355,13 @@ ; X32-NEXT: jmp .LBB3_3 ; X32-NEXT: .LBB3_3: # %atomicrmw.start2 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: orl $1, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: orl $1, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: orl $1, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -430,19 +381,15 @@ ; X32-NEXT: jmp .LBB3_5 ; X32-NEXT: .LBB3_5: # %atomicrmw.start8 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: orl %esi, %edx -; X32-NEXT: movl %eax, %edi +; X32-NEXT: orl %esi, %ecx +; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: orl %ebx, %edi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -451,7 +398,7 @@ ; X32-NEXT: jne .LBB3_5 ; X32-NEXT: jmp .LBB3_6 ; X32-NEXT: .LBB3_6: # %atomicrmw.end7 -; X32-NEXT: addl $56, %esp +; X32-NEXT: addl $48, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -468,7 +415,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $56, %esp +; X32-NEXT: subl $48, %esp ; X32-NEXT: movl sc64+4, %eax ; X32-NEXT: movl sc64, %ecx ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -476,15 +423,14 @@ ; X32-NEXT: jmp .LBB4_1 ; X32-NEXT: .LBB4_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: xorl $3, %edx -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: xorl $3, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -499,17 +445,13 @@ ; X32-NEXT: jmp .LBB4_3 ; X32-NEXT: .LBB4_3: # %atomicrmw.start2 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: xorl $1, %edx -; X32-NEXT: movl %eax, %esi +; X32-NEXT: movl %eax, %ecx +; X32-NEXT: xorl $1, %ecx +; X32-NEXT: movl %edx, %esi ; X32-NEXT: xorl $1, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -529,19 +471,15 @@ ; X32-NEXT: jmp .LBB4_5 ; X32-NEXT: .LBB4_5: # %atomicrmw.start8 ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: xorl %esi, %edx -; X32-NEXT: movl %eax, %edi +; X32-NEXT: xorl %esi, %ecx +; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: xorl %ebx, %edi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 @@ -550,7 +488,7 @@ ; X32-NEXT: jne .LBB4_5 ; X32-NEXT: jmp .LBB4_6 ; X32-NEXT: .LBB4_6: # %atomicrmw.end7 -; X32-NEXT: addl $56, %esp +; X32-NEXT: addl $48, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -567,7 +505,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $24, %esp +; X32-NEXT: subl $16, %esp ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl sc64+4, %edx @@ -575,34 +513,28 @@ ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: jmp .LBB5_1 ; X32-NEXT: .LBB5_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl (%esp), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %eax, %edx +; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: andl %esi, %edx -; X32-NEXT: movl %ecx, %edi +; X32-NEXT: andl %esi, %ecx +; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: andl %ebx, %edi ; X32-NEXT: notl %edi -; X32-NEXT: notl %edx -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx -; X32-NEXT: movl (%esp), %ecx # 4-byte Reload +; X32-NEXT: notl %ecx ; X32-NEXT: movl %edi, %ebx ; X32-NEXT: lock cmpxchg8b sc64 -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: jne .LBB5_1 ; X32-NEXT: jmp .LBB5_2 ; X32-NEXT: .LBB5_2: # %atomicrmw.end -; X32-NEXT: addl $24, %esp +; X32-NEXT: addl $16, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -617,7 +549,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $28, %esp +; X32-NEXT: subl $24, %esp ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl sc64+4, %edx @@ -629,21 +561,17 @@ ; X32-NEXT: jmp .LBB6_1 ; X32-NEXT: .LBB6_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: subl %esi, %edx -; X32-NEXT: movl %eax, %edi +; X32-NEXT: subl %esi, %ecx +; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: sbbl %ebx, %edi -; X32-NEXT: cmovgel %eax, %ebx -; X32-NEXT: cmovgel %ecx, %esi -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: cmovgel %edx, %ebx +; X32-NEXT: cmovgel %eax, %esi +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, %ecx ; X32-NEXT: movl %esi, %ebx ; X32-NEXT: lock cmpxchg8b sc64 @@ -653,7 +581,7 @@ ; X32-NEXT: jne .LBB6_1 ; X32-NEXT: jmp .LBB6_2 ; X32-NEXT: .LBB6_2: # %atomicrmw.end -; X32-NEXT: addl $28, %esp +; X32-NEXT: addl $24, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -668,7 +596,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $28, %esp +; X32-NEXT: subl $24, %esp ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl sc64+4, %edx @@ -680,21 +608,17 @@ ; X32-NEXT: jmp .LBB7_1 ; X32-NEXT: .LBB7_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload -; X32-NEXT: subl %ecx, %edx +; X32-NEXT: subl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: sbbl %eax, %esi +; X32-NEXT: sbbl %edx, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload -; X32-NEXT: cmovgel %eax, %edi +; X32-NEXT: cmovgel %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload -; X32-NEXT: cmovgel %ecx, %ebx -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: cmovgel %eax, %ebx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: lock cmpxchg8b sc64 ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -703,7 +627,7 @@ ; X32-NEXT: jne .LBB7_1 ; X32-NEXT: jmp .LBB7_2 ; X32-NEXT: .LBB7_2: # %atomicrmw.end -; X32-NEXT: addl $28, %esp +; X32-NEXT: addl $24, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -718,7 +642,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $28, %esp +; X32-NEXT: subl $24, %esp ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl sc64+4, %edx @@ -730,21 +654,17 @@ ; X32-NEXT: jmp .LBB8_1 ; X32-NEXT: .LBB8_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload -; X32-NEXT: subl %ecx, %edx +; X32-NEXT: subl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: sbbl %eax, %esi +; X32-NEXT: sbbl %edx, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload -; X32-NEXT: cmovbl %eax, %edi +; X32-NEXT: cmovbl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload -; X32-NEXT: cmovbl %ecx, %ebx -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: cmovbl %eax, %ebx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: lock cmpxchg8b sc64 ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -753,7 +673,7 @@ ; X32-NEXT: jne .LBB8_1 ; X32-NEXT: jmp .LBB8_2 ; X32-NEXT: .LBB8_2: # %atomicrmw.end -; X32-NEXT: addl $28, %esp +; X32-NEXT: addl $24, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -768,7 +688,7 @@ ; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %edi ; X32-NEXT: pushl %esi -; X32-NEXT: subl $28, %esp +; X32-NEXT: subl $24, %esp ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl sc64+4, %edx @@ -780,21 +700,17 @@ ; X32-NEXT: jmp .LBB9_1 ; X32-NEXT: .LBB9_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload -; X32-NEXT: subl %ecx, %edx +; X32-NEXT: subl %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload -; X32-NEXT: sbbl %eax, %esi +; X32-NEXT: sbbl %edx, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload -; X32-NEXT: cmovael %eax, %edi +; X32-NEXT: cmovael %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload -; X32-NEXT: cmovael %ecx, %ebx -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %ecx, %edx +; X32-NEXT: cmovael %eax, %ebx +; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, %ecx ; X32-NEXT: lock cmpxchg8b sc64 ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill @@ -803,7 +719,7 @@ ; X32-NEXT: jne .LBB9_1 ; X32-NEXT: jmp .LBB9_2 ; X32-NEXT: .LBB9_2: # %atomicrmw.end -; X32-NEXT: addl $28, %esp +; X32-NEXT: addl $24, %esp ; X32-NEXT: popl %esi ; X32-NEXT: popl %edi ; X32-NEXT: popl %ebx @@ -847,7 +763,7 @@ ; X32-LABEL: atomic_fetch_swap64: ; X32: # %bb.0: ; X32-NEXT: pushl %ebx -; X32-NEXT: subl $20, %esp +; X32-NEXT: subl $16, %esp ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X32-NEXT: movl sc64+4, %eax @@ -855,24 +771,21 @@ ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: jmp .LBB12_1 ; X32-NEXT: .LBB12_1: # %atomicrmw.start ; X32-NEXT: # =>This Inner Loop Header: Depth=1 -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload -; X32-NEXT: movl %eax, (%esp) # 4-byte Spill -; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl (%esp), %edx # 4-byte Reload +; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: lock cmpxchg8b sc64 -; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: jne .LBB12_1 ; X32-NEXT: jmp .LBB12_2 ; X32-NEXT: .LBB12_2: # %atomicrmw.end -; X32-NEXT: addl $20, %esp +; X32-NEXT: addl $16, %esp ; X32-NEXT: popl %ebx ; X32-NEXT: retl %t1 = atomicrmw xchg i64* @sc64, i64 %x acquire Index: test/CodeGen/X86/avx512-mask-zext-bugfix.ll =================================================================== --- test/CodeGen/X86/avx512-mask-zext-bugfix.ll +++ test/CodeGen/X86/avx512-mask-zext-bugfix.ll @@ -29,9 +29,9 @@ ; CHECK-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill ; CHECK-NEXT: kmovw %k0, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill ; CHECK-NEXT: callq _calc_expected_mask_val -; CHECK-NEXT: movl %eax, %edx -; CHECK-NEXT: movw %dx, %r8w -; CHECK-NEXT: movzwl %r8w, %esi +; CHECK-NEXT: ## kill: def $eax killed $eax killed $rax +; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax +; CHECK-NEXT: movzwl %ax, %esi ; CHECK-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 ## 2-byte Reload ; CHECK-NEXT: kmovb %k0, %edi ; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx ## 8-byte Reload @@ -41,21 +41,22 @@ ; CHECK-NEXT: vpmovd2m %xmm0, %k0 ; CHECK-NEXT: kmovq %k0, %k1 ; CHECK-NEXT: kmovd %k0, %esi -; CHECK-NEXT: movb %sil, %r9b -; CHECK-NEXT: movzbl %r9b, %esi -; CHECK-NEXT: movw %si, %r8w -; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi ## 8-byte Reload -; CHECK-NEXT: movl $4, %esi -; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) ## 4-byte Spill -; CHECK-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %edx ## 4-byte Reload +; CHECK-NEXT: ## kill: def $sil killed $sil killed $esi +; CHECK-NEXT: movzbl %sil, %edi +; CHECK-NEXT: ## kill: def $di killed $di killed $edi +; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload +; CHECK-NEXT: movw %di, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill +; CHECK-NEXT: movq %rcx, %rdi +; CHECK-NEXT: movl $4, %r8d +; CHECK-NEXT: movl %r8d, %esi +; CHECK-NEXT: movl %r8d, %edx ; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) ## 4-byte Spill ; CHECK-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) ## 2-byte Spill -; CHECK-NEXT: movw %r8w, (%rsp) ## 2-byte Spill ; CHECK-NEXT: callq _calc_expected_mask_val -; CHECK-NEXT: movw %ax, %r8w -; CHECK-NEXT: movw (%rsp), %r10w ## 2-byte Reload -; CHECK-NEXT: movzwl %r10w, %edi -; CHECK-NEXT: movzwl %r8w, %esi +; CHECK-NEXT: ## kill: def $ax killed $ax killed $rax +; CHECK-NEXT: movw {{[-0-9]+}}(%r{{[sb]}}p), %r9w ## 2-byte Reload +; CHECK-NEXT: movzwl %r9w, %edi +; CHECK-NEXT: movzwl %ax, %esi ; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx ## 8-byte Reload ; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload ; CHECK-NEXT: callq _check_mask16 Index: test/CodeGen/X86/crash-O0.ll =================================================================== --- test/CodeGen/X86/crash-O0.ll +++ test/CodeGen/X86/crash-O0.ll @@ -15,17 +15,19 @@ ; CHECK-NEXT: pushq %rbp ; CHECK-NEXT: movq %rsp, %rbp ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: movb %al, %cl -; CHECK-NEXT: ## implicit-def: $rdx -; CHECK-NEXT: movb %dl, %sil -; CHECK-NEXT: movzbw %cl, %ax -; CHECK-NEXT: divb %sil +; CHECK-NEXT: ## kill: def $al killed $al killed $eax +; CHECK-NEXT: ## implicit-def: $rcx +; CHECK-NEXT: ## kill: def $cl killed $cl killed $rcx ; CHECK-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) ## 1-byte Spill -; CHECK-NEXT: movzbw %cl, %ax -; CHECK-NEXT: divb %sil +; CHECK-NEXT: movzbw %al, %ax +; CHECK-NEXT: divb %cl +; CHECK-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %dl ## 1-byte Reload +; CHECK-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) ## 1-byte Spill +; CHECK-NEXT: movzbw %dl, %ax +; CHECK-NEXT: divb %cl ; CHECK-NEXT: shrw $8, %ax -; CHECK-NEXT: movb %al, %cl -; CHECK-NEXT: cmpb %sil, %cl +; CHECK-NEXT: ## kill: def $al killed $al killed $ax +; CHECK-NEXT: cmpb %cl, %al ; CHECK-NEXT: jae LBB0_2 ; CHECK-NEXT: ## %bb.1: ## %"39" ; CHECK-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al ## 1-byte Reload Index: test/CodeGen/X86/fast-isel-ret-ext.ll =================================================================== --- test/CodeGen/X86/fast-isel-ret-ext.ll +++ test/CodeGen/X86/fast-isel-ret-ext.ll @@ -26,7 +26,7 @@ %conv = trunc i32 %y to i16 ret i16 %conv ; CHECK-LABEL: test4: - ; CHECK: {{(movswl.%.x, %eax|cwtl)}} + ; CHECK: {{(movswl.%di, %eax|cwtl)}} } define zeroext i1 @test5(i32 %y) nounwind { Index: test/CodeGen/X86/fast-isel-select.ll =================================================================== --- test/CodeGen/X86/fast-isel-select.ll +++ test/CodeGen/X86/fast-isel-select.ll @@ -9,14 +9,13 @@ define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) { ; CHECK-LABEL: fastisel_select: ; CHECK: ## %bb.0: -; CHECK-NEXT: movb %sil, %al -; CHECK-NEXT: movb %dil, %cl -; CHECK-NEXT: xorl %edx, %edx -; CHECK-NEXT: subb %al, %cl -; CHECK-NEXT: testb $1, %cl -; CHECK-NEXT: movl $1204476887, %esi ## imm = 0x47CADBD7 -; CHECK-NEXT: cmovnel %esi, %edx -; CHECK-NEXT: movl %edx, %eax +; CHECK-NEXT: ## kill: def $sil killed $sil killed $esi +; CHECK-NEXT: ## kill: def $dil killed $dil killed $edi +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: subb %sil, %dil +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: movl $1204476887, %ecx ## imm = 0x47CADBD7 +; CHECK-NEXT: cmovnel %ecx, %eax ; CHECK-NEXT: retq %shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766 %counter_diff1345 = select i1 %shuffleInternal15257_8932, i32 1204476887, i32 0 Index: test/CodeGen/X86/pr32241.ll =================================================================== --- test/CodeGen/X86/pr32241.ll +++ test/CodeGen/X86/pr32241.ll @@ -12,19 +12,19 @@ ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: cmpw $0, {{[0-9]+}}(%esp) ; CHECK-NEXT: movb $1, %cl -; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill -; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill +; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; CHECK-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill ; CHECK-NEXT: jne .LBB0_2 ; CHECK-NEXT: # %bb.1: # %lor.rhs ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: movb %al, %cl -; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill ; CHECK-NEXT: jmp .LBB0_2 ; CHECK-NEXT: .LBB0_2: # %lor.end -; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al # 1-byte Reload +; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload ; CHECK-NEXT: andb $1, %al ; CHECK-NEXT: movzbl %al, %ecx -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx # 4-byte Reload +; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; CHECK-NEXT: cmpl %ecx, %edx ; CHECK-NEXT: setl %al ; CHECK-NEXT: andb $1, %al @@ -32,19 +32,19 @@ ; CHECK-NEXT: xorl $-1, %ecx ; CHECK-NEXT: cmpl $0, %ecx ; CHECK-NEXT: movb $1, %al -; CHECK-NEXT: movb %al, {{[0-9]+}}(%esp) # 1-byte Spill +; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill ; CHECK-NEXT: jne .LBB0_4 ; CHECK-NEXT: # %bb.3: # %lor.rhs4 ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: movb %al, %cl -; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill ; CHECK-NEXT: jmp .LBB0_4 ; CHECK-NEXT: .LBB0_4: # %lor.end5 -; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al # 1-byte Reload +; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload ; CHECK-NEXT: andb $1, %al ; CHECK-NEXT: movzbl %al, %ecx -; CHECK-NEXT: movw %cx, %dx -; CHECK-NEXT: movw %dx, {{[0-9]+}}(%esp) +; CHECK-NEXT: # kill: def $cx killed $cx killed $ecx +; CHECK-NEXT: movw %cx, {{[0-9]+}}(%esp) ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: addl $16, %esp ; CHECK-NEXT: .cfi_def_cfa_offset 4 Index: test/CodeGen/X86/pr32256.ll =================================================================== --- test/CodeGen/X86/pr32256.ll +++ test/CodeGen/X86/pr32256.ll @@ -10,17 +10,17 @@ ; CHECK-NEXT: subl $2, %esp ; CHECK-NEXT: .cfi_def_cfa_offset 6 ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: movb %al, %cl -; CHECK-NEXT: movb c, %dl -; CHECK-NEXT: xorb $-1, %dl -; CHECK-NEXT: testb $1, %dl -; CHECK-NEXT: movb %cl, (%esp) # 1-byte Spill +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: movb c, %cl +; CHECK-NEXT: xorb $-1, %cl +; CHECK-NEXT: testb $1, %cl +; CHECK-NEXT: movb %al, (%esp) # 1-byte Spill ; CHECK-NEXT: jne .LBB0_1 ; CHECK-NEXT: jmp .LBB0_2 ; CHECK-NEXT: .LBB0_1: # %land.rhs ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: movb %al, %cl -; CHECK-NEXT: movb %cl, (%esp) # 1-byte Spill +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: movb %al, (%esp) # 1-byte Spill ; CHECK-NEXT: jmp .LBB0_2 ; CHECK-NEXT: .LBB0_2: # %land.end ; CHECK-NEXT: movb (%esp), %al # 1-byte Reload Index: test/CodeGen/X86/pr32284.ll =================================================================== --- test/CodeGen/X86/pr32284.ll +++ test/CodeGen/X86/pr32284.ll @@ -16,22 +16,22 @@ ; X86-O0-NEXT: subl %edx, %eax ; X86-O0-NEXT: movslq %eax, %rsi ; X86-O0-NEXT: subq %rsi, %rcx -; X86-O0-NEXT: movb %cl, %dil -; X86-O0-NEXT: cmpb $0, %dil -; X86-O0-NEXT: setne %dil -; X86-O0-NEXT: andb $1, %dil -; X86-O0-NEXT: movb %dil, -{{[0-9]+}}(%rsp) +; X86-O0-NEXT: # kill: def $cl killed $cl killed $rcx +; X86-O0-NEXT: cmpb $0, %cl +; X86-O0-NEXT: setne %cl +; X86-O0-NEXT: andb $1, %cl +; X86-O0-NEXT: movb %cl, -{{[0-9]+}}(%rsp) ; X86-O0-NEXT: cmpb $0, c -; X86-O0-NEXT: setne %dil -; X86-O0-NEXT: xorb $-1, %dil -; X86-O0-NEXT: xorb $-1, %dil -; X86-O0-NEXT: andb $1, %dil -; X86-O0-NEXT: movzbl %dil, %eax +; X86-O0-NEXT: setne %cl +; X86-O0-NEXT: xorb $-1, %cl +; X86-O0-NEXT: xorb $-1, %cl +; X86-O0-NEXT: andb $1, %cl +; X86-O0-NEXT: movzbl %cl, %eax ; X86-O0-NEXT: movzbl c, %edx ; X86-O0-NEXT: cmpl %edx, %eax -; X86-O0-NEXT: setle %dil -; X86-O0-NEXT: andb $1, %dil -; X86-O0-NEXT: movzbl %dil, %eax +; X86-O0-NEXT: setle %cl +; X86-O0-NEXT: andb $1, %cl +; X86-O0-NEXT: movzbl %cl, %eax ; X86-O0-NEXT: movl %eax, -{{[0-9]+}}(%rsp) ; X86-O0-NEXT: retq ; @@ -312,23 +312,23 @@ ; X86-O0-NEXT: andb $1, %cl ; X86-O0-NEXT: movzbl %cl, %edx ; X86-O0-NEXT: xorl %edx, %eax -; X86-O0-NEXT: movw %ax, %si -; X86-O0-NEXT: movw %si, -{{[0-9]+}}(%rsp) -; X86-O0-NEXT: movzbl var_7, %eax -; X86-O0-NEXT: movw %ax, %si -; X86-O0-NEXT: cmpw $0, %si +; X86-O0-NEXT: # kill: def $ax killed $ax killed $eax +; X86-O0-NEXT: movw %ax, -{{[0-9]+}}(%rsp) +; X86-O0-NEXT: movzbl var_7, %edx +; X86-O0-NEXT: # kill: def $dx killed $dx killed $edx +; X86-O0-NEXT: cmpw $0, %dx ; X86-O0-NEXT: setne %cl ; X86-O0-NEXT: xorb $-1, %cl ; X86-O0-NEXT: andb $1, %cl -; X86-O0-NEXT: movzbl %cl, %eax -; X86-O0-NEXT: movzbl var_7, %edx -; X86-O0-NEXT: cmpl %edx, %eax +; X86-O0-NEXT: movzbl %cl, %esi +; X86-O0-NEXT: movzbl var_7, %edi +; X86-O0-NEXT: cmpl %edi, %esi ; X86-O0-NEXT: sete %cl ; X86-O0-NEXT: andb $1, %cl -; X86-O0-NEXT: movzbl %cl, %eax -; X86-O0-NEXT: movw %ax, %si -; X86-O0-NEXT: # implicit-def: $rdi -; X86-O0-NEXT: movw %si, (%rdi) +; X86-O0-NEXT: movzbl %cl, %esi +; X86-O0-NEXT: # kill: def $si killed $si killed $esi +; X86-O0-NEXT: # implicit-def: $r8 +; X86-O0-NEXT: movw %si, (%r8) ; X86-O0-NEXT: retq ; ; X64-LABEL: f2: @@ -350,11 +350,14 @@ ; ; 686-O0-LABEL: f2: ; 686-O0: # %bb.0: # %entry -; 686-O0-NEXT: pushl %esi +; 686-O0-NEXT: pushl %edi ; 686-O0-NEXT: .cfi_def_cfa_offset 8 +; 686-O0-NEXT: pushl %esi +; 686-O0-NEXT: .cfi_def_cfa_offset 12 ; 686-O0-NEXT: subl $2, %esp -; 686-O0-NEXT: .cfi_def_cfa_offset 10 -; 686-O0-NEXT: .cfi_offset %esi, -8 +; 686-O0-NEXT: .cfi_def_cfa_offset 14 +; 686-O0-NEXT: .cfi_offset %esi, -12 +; 686-O0-NEXT: .cfi_offset %edi, -8 ; 686-O0-NEXT: movzbl var_7, %eax ; 686-O0-NEXT: cmpb $0, var_7 ; 686-O0-NEXT: setne %cl @@ -362,26 +365,28 @@ ; 686-O0-NEXT: andb $1, %cl ; 686-O0-NEXT: movzbl %cl, %edx ; 686-O0-NEXT: xorl %edx, %eax -; 686-O0-NEXT: movw %ax, %si -; 686-O0-NEXT: movw %si, (%esp) -; 686-O0-NEXT: movzbl var_7, %eax -; 686-O0-NEXT: movw %ax, %si -; 686-O0-NEXT: cmpw $0, %si +; 686-O0-NEXT: # kill: def $ax killed $ax killed $eax +; 686-O0-NEXT: movw %ax, (%esp) +; 686-O0-NEXT: movzbl var_7, %edx +; 686-O0-NEXT: # kill: def $dx killed $dx killed $edx +; 686-O0-NEXT: cmpw $0, %dx ; 686-O0-NEXT: setne %cl ; 686-O0-NEXT: xorb $-1, %cl ; 686-O0-NEXT: andb $1, %cl -; 686-O0-NEXT: movzbl %cl, %eax -; 686-O0-NEXT: movzbl var_7, %edx -; 686-O0-NEXT: cmpl %edx, %eax +; 686-O0-NEXT: movzbl %cl, %esi +; 686-O0-NEXT: movzbl var_7, %edi +; 686-O0-NEXT: cmpl %edi, %esi ; 686-O0-NEXT: sete %cl ; 686-O0-NEXT: andb $1, %cl -; 686-O0-NEXT: movzbl %cl, %eax -; 686-O0-NEXT: movw %ax, %si -; 686-O0-NEXT: # implicit-def: $eax -; 686-O0-NEXT: movw %si, (%eax) +; 686-O0-NEXT: movzbl %cl, %esi +; 686-O0-NEXT: # kill: def $si killed $si killed $esi +; 686-O0-NEXT: # implicit-def: $edi +; 686-O0-NEXT: movw %si, (%edi) ; 686-O0-NEXT: addl $2, %esp -; 686-O0-NEXT: .cfi_def_cfa_offset 8 +; 686-O0-NEXT: .cfi_def_cfa_offset 12 ; 686-O0-NEXT: popl %esi +; 686-O0-NEXT: .cfi_def_cfa_offset 8 +; 686-O0-NEXT: popl %edi ; 686-O0-NEXT: .cfi_def_cfa_offset 4 ; 686-O0-NEXT: retl ; @@ -468,8 +473,8 @@ ; X86-O0-NEXT: movl %eax, %esi ; X86-O0-NEXT: andq $0, %rsi ; X86-O0-NEXT: orq %rsi, %rcx -; X86-O0-NEXT: movl %ecx, %eax -; X86-O0-NEXT: movl %eax, var_46 +; X86-O0-NEXT: # kill: def $ecx killed $ecx killed $rcx +; X86-O0-NEXT: movl %ecx, var_46 ; X86-O0-NEXT: retq ; ; X64-LABEL: f3: Index: test/CodeGen/X86/pr32340.ll =================================================================== --- test/CodeGen/X86/pr32340.ll +++ test/CodeGen/X86/pr32340.ll @@ -39,14 +39,14 @@ ; X64-NEXT: movq %rdi, %r8 ; X64-NEXT: orq var_57, %r8 ; X64-NEXT: orq %r8, %rdi -; X64-NEXT: movw %di, %r10w -; X64-NEXT: movw %r10w, var_900 +; X64-NEXT: # kill: def $di killed $di killed $rdi +; X64-NEXT: movw %di, var_900 ; X64-NEXT: cmpq var_28, %rcx -; X64-NEXT: setne %r11b -; X64-NEXT: andb $1, %r11b -; X64-NEXT: movzbl %r11b, %eax -; X64-NEXT: movw %ax, %r10w -; X64-NEXT: movw %r10w, var_827 +; X64-NEXT: setne %r10b +; X64-NEXT: andb $1, %r10b +; X64-NEXT: movzbl %r10b, %eax +; X64-NEXT: # kill: def $ax killed $ax killed $eax +; X64-NEXT: movw %ax, var_827 ; X64-NEXT: retq entry: store i16 0, i16* @var_825, align 2 Index: test/CodeGen/X86/pr32345.ll =================================================================== --- test/CodeGen/X86/pr32345.ll +++ test/CodeGen/X86/pr32345.ll @@ -29,9 +29,9 @@ ; X640-NEXT: movl %eax, %ecx ; X640-NEXT: # kill: def $cl killed $rcx ; X640-NEXT: sarq %cl, %rdx -; X640-NEXT: movb %dl, %cl -; X640-NEXT: # implicit-def: $rdx -; X640-NEXT: movb %cl, (%rdx) +; X640-NEXT: # kill: def $dl killed $dl killed $rdx +; X640-NEXT: # implicit-def: $rsi +; X640-NEXT: movb %dl, (%rsi) ; X640-NEXT: retq ; ; 6860-LABEL: foo: @@ -56,38 +56,37 @@ ; 6860-NEXT: # implicit-def: $esi ; 6860-NEXT: movw %ax, %si ; 6860-NEXT: xorl %ecx, %esi -; 6860-NEXT: movw %si, %ax -; 6860-NEXT: movzwl %ax, %ecx +; 6860-NEXT: # kill: def $si killed $si killed $esi +; 6860-NEXT: movzwl %si, %ecx ; 6860-NEXT: movl %ecx, {{[0-9]+}}(%esp) ; 6860-NEXT: movl $0, {{[0-9]+}}(%esp) ; 6860-NEXT: movw var_22, %ax ; 6860-NEXT: movzwl var_27, %ecx ; 6860-NEXT: movw %cx, %dx ; 6860-NEXT: xorw %dx, %ax -; 6860-NEXT: # implicit-def: $esi -; 6860-NEXT: movw %ax, %si -; 6860-NEXT: xorl %ecx, %esi -; 6860-NEXT: movw %si, %ax -; 6860-NEXT: movzwl %ax, %esi -; 6860-NEXT: movb %cl, %bl -; 6860-NEXT: addb $30, %bl -; 6860-NEXT: xorl %ecx, %ecx -; 6860-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; 6860-NEXT: movb %bl, %cl -; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload -; 6860-NEXT: shrdl %cl, %edi, %esi -; 6860-NEXT: testb $32, %bl -; 6860-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; 6860-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; 6860-NEXT: # implicit-def: $edi +; 6860-NEXT: movw %ax, %di +; 6860-NEXT: xorl %ecx, %edi +; 6860-NEXT: # kill: def $di killed $di killed $edi +; 6860-NEXT: movzwl %di, %ebx +; 6860-NEXT: # kill: def $cl killed $cl killed $ecx +; 6860-NEXT: addb $30, %cl +; 6860-NEXT: xorl %eax, %eax +; 6860-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill +; 6860-NEXT: shrdl %cl, %eax, %ebx +; 6860-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload +; 6860-NEXT: testb $32, %cl +; 6860-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; 6860-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 6860-NEXT: jne .LBB0_2 ; 6860-NEXT: # %bb.1: # %bb ; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; 6860-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 6860-NEXT: .LBB0_2: # %bb ; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload -; 6860-NEXT: movb %al, %cl -; 6860-NEXT: # implicit-def: $eax -; 6860-NEXT: movb %cl, (%eax) +; 6860-NEXT: # kill: def $al killed $al killed $eax +; 6860-NEXT: # implicit-def: $ecx +; 6860-NEXT: movb %al, (%ecx) ; 6860-NEXT: leal -12(%ebp), %esp ; 6860-NEXT: popl %esi ; 6860-NEXT: popl %edi Index: test/CodeGen/X86/pr34592.ll =================================================================== --- test/CodeGen/X86/pr34592.ll +++ test/CodeGen/X86/pr34592.ll @@ -27,14 +27,14 @@ ; CHECK-NEXT: vpalignr {{.*#+}} ymm11 = ymm2[8,9,10,11,12,13,14,15],ymm11[0,1,2,3,4,5,6,7],ymm2[24,25,26,27,28,29,30,31],ymm11[16,17,18,19,20,21,22,23] ; CHECK-NEXT: vpermq {{.*#+}} ymm11 = ymm11[2,3,2,0] ; CHECK-NEXT: vpblendd {{.*#+}} ymm0 = ymm11[0,1,2,3],ymm0[4,5],ymm11[6,7] -; CHECK-NEXT: vmovaps %xmm2, %xmm6 -; CHECK-NEXT: # implicit-def: $ymm2 -; CHECK-NEXT: vinserti128 $1, %xmm6, %ymm2, %ymm2 -; CHECK-NEXT: vextracti128 $1, %ymm7, %xmm6 -; CHECK-NEXT: vmovq {{.*#+}} xmm6 = xmm6[0],zero +; CHECK-NEXT: # kill: def $xmm2 killed $xmm2 killed $ymm2 ; CHECK-NEXT: # implicit-def: $ymm11 -; CHECK-NEXT: vmovaps %xmm6, %xmm11 -; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm11[0,1,2,3],ymm2[4,5,6,7] +; CHECK-NEXT: vinserti128 $1, %xmm2, %ymm11, %ymm11 +; CHECK-NEXT: vextracti128 $1, %ymm7, %xmm2 +; CHECK-NEXT: vmovq {{.*#+}} xmm2 = xmm2[0],zero +; CHECK-NEXT: # implicit-def: $ymm6 +; CHECK-NEXT: vmovaps %xmm2, %xmm6 +; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm6[0,1,2,3],ymm11[4,5,6,7] ; CHECK-NEXT: vmovaps %xmm7, %xmm6 ; CHECK-NEXT: vpslldq {{.*#+}} xmm6 = zero,zero,zero,zero,zero,zero,zero,zero,xmm6[0,1,2,3,4,5,6,7] ; CHECK-NEXT: # implicit-def: $ymm11 Index: test/CodeGen/X86/pr41678.ll =================================================================== --- test/CodeGen/X86/pr41678.ll +++ test/CodeGen/X86/pr41678.ll @@ -9,8 +9,8 @@ ; CHECK-NEXT: #APP ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: kmovw %k6, %eax -; CHECK-NEXT: movw %ax, %cx -; CHECK-NEXT: movw %cx, (%esp) +; CHECK-NEXT: # kill: def $ax killed $ax killed $eax +; CHECK-NEXT: movw %ax, (%esp) ; CHECK-NEXT: addl $2, %esp ; CHECK-NEXT: .cfi_def_cfa_offset 4 ; CHECK-NEXT: retl Index: test/CodeGen/X86/swift-return.ll =================================================================== --- test/CodeGen/X86/swift-return.ll +++ test/CodeGen/X86/swift-return.ll @@ -31,6 +31,7 @@ ; CHECK-O0-NEXT: movswl %ax, %ecx ; CHECK-O0-NEXT: movsbl %dl, %esi ; CHECK-O0-NEXT: addl %esi, %ecx +; CHECK-O0-NEXT: # kill: def $cx killed $cx killed $ecx ; CHECK-O0-NEXT: movw %cx, %ax ; CHECK-O0-NEXT: popq %rcx ; CHECK-O0-NEXT: .cfi_def_cfa_offset 8 @@ -464,11 +465,11 @@ ; ; CHECK-O0-LABEL: gen9: ; CHECK-O0: # %bb.0: +; CHECK-O0-NEXT: # kill: def $dil killed $dil killed $edi ; CHECK-O0-NEXT: movb %dil, %al -; CHECK-O0-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill -; CHECK-O0-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %dl # 1-byte Reload -; CHECK-O0-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload -; CHECK-O0-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %r8b # 1-byte Reload +; CHECK-O0-NEXT: movb %dil, %dl +; CHECK-O0-NEXT: movb %dil, %cl +; CHECK-O0-NEXT: movb %dil, %r8b ; CHECK-O0-NEXT: retq %v0 = insertvalue { i8, i8, i8, i8 } undef, i8 %key, 0 %v1 = insertvalue { i8, i8, i8, i8 } %v0, i8 %key, 1 Index: test/DebugInfo/X86/convert-debugloc.ll =================================================================== --- test/DebugInfo/X86/convert-debugloc.ll +++ test/DebugInfo/X86/convert-debugloc.ll @@ -2,7 +2,7 @@ ; RUN: llc -dwarf-version=4 -filetype=obj -O0 < %s | llvm-dwarfdump - | FileCheck %s --match-full-lines --check-prefix=DW4-CHECK ; DW5-CHECK: .debug_info contents: -; DW5-CHECK-NEXT: 0x00000000: Compile Unit: length = 0x0000005c version = 0x0005 unit_type = DW_UT_compile abbr_offset = 0x0000 addr_size = 0x08 (next unit at 0x00000060) +; DW5-CHECK-NEXT: 0x00000000: Compile Unit: length = 0x00000064 version = 0x0005 unit_type = DW_UT_compile abbr_offset = 0x0000 addr_size = 0x08 (next unit at 0x00000068) ; DW5-CHECK-EMPTY: ; DW5-CHECK-NEXT: 0x0000000c: DW_TAG_compile_unit ; DW5-CHECK-NEXT: DW_AT_producer ("clang version 9.0.0 (trunk 353791) (llvm/trunk 353801)") @@ -12,64 +12,61 @@ ; DW5-CHECK-NEXT: DW_AT_stmt_list (0x00000000) ; DW5-CHECK-NEXT: DW_AT_comp_dir {{.*}} ; DW5-CHECK-NEXT: DW_AT_low_pc (0x0000000000000000) -; DW5-CHECK-NEXT: DW_AT_high_pc (0x0000000000000007) +; DW5-CHECK-NEXT: DW_AT_high_pc (0x0000000000000005) ; DW5-CHECK-NEXT: DW_AT_addr_base (0x00000008) -; DW5-CHECK-NEXT: DW_AT_loclists_base (0x0000000c) ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x00000027: DW_TAG_base_type +; DW5-CHECK-NEXT: 0x00000023: DW_TAG_base_type ; DW5-CHECK-NEXT: DW_AT_name ("DW_ATE_signed_8") ; DW5-CHECK-NEXT: DW_AT_encoding (DW_ATE_signed) ; DW5-CHECK-NEXT: DW_AT_byte_size (0x01) ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x0000002b: DW_TAG_base_type +; DW5-CHECK-NEXT: 0x00000027: DW_TAG_base_type ; DW5-CHECK-NEXT: DW_AT_name ("DW_ATE_signed_32") ; DW5-CHECK-NEXT: DW_AT_encoding (DW_ATE_signed) ; DW5-CHECK-NEXT: DW_AT_byte_size (0x04) ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x0000002f: DW_TAG_subprogram +; DW5-CHECK-NEXT: 0x0000002b: DW_TAG_subprogram ; DW5-CHECK-NEXT: DW_AT_low_pc (0x0000000000000000) -; DW5-CHECK-NEXT: DW_AT_high_pc (0x0000000000000007) +; DW5-CHECK-NEXT: DW_AT_high_pc (0x0000000000000005) ; DW5-CHECK-NEXT: DW_AT_frame_base (DW_OP_reg7 RSP) ; DW5-CHECK-NEXT: DW_AT_name ("foo") ; DW5-CHECK-NEXT: DW_AT_decl_file {{.*}} ; DW5-CHECK-NEXT: DW_AT_decl_line (1) ; DW5-CHECK-NEXT: DW_AT_prototyped (true) -; DW5-CHECK-NEXT: DW_AT_type (0x00000057 "signed char") +; DW5-CHECK-NEXT: DW_AT_type (0x0000005f "signed char") ; DW5-CHECK-NEXT: DW_AT_external (true) ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x0000003e: DW_TAG_formal_parameter -; DW5-CHECK-NEXT: DW_AT_location (0x0000000c -; DW5-CHECK-NEXT: [0x0000000000000003, 0x0000000000000006): DW_OP_reg0 RAX) +; DW5-CHECK-NEXT: 0x0000003a: DW_TAG_formal_parameter +; DW5-CHECK-NEXT: DW_AT_location (DW_OP_reg5 RDI) ; DW5-CHECK-NEXT: DW_AT_name ("x") ; DW5-CHECK-NEXT: DW_AT_decl_file {{.*}} ; DW5-CHECK-NEXT: DW_AT_decl_line (1) -; DW5-CHECK-NEXT: DW_AT_type (0x00000057 "signed char") +; DW5-CHECK-NEXT: DW_AT_type (0x0000005f "signed char") ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x0000004a: DW_TAG_variable -; DW5-CHECK-NEXT: DW_AT_location (0x00000012 -; DW5-CHECK-NEXT: [0x0000000000000003, 0x0000000000000006): DW_OP_breg0 RAX+0, DW_OP_constu 0xff, DW_OP_and, DW_OP_convert (0x00000027) "DW_ATE_signed_8", DW_OP_convert (0x0000002b) "DW_ATE_signed_32", DW_OP_stack_value) +; DW5-CHECK-NEXT: 0x00000044: DW_TAG_variable +; DW5-CHECK-NEXT: DW_AT_location (DW_OP_breg5 RDI+0, DW_OP_constu 0xff, DW_OP_and, DW_OP_convert (0x00000023) "DW_ATE_signed_8", DW_OP_convert (0x00000027) "DW_ATE_signed_32", DW_OP_stack_value) ; DW5-CHECK-NEXT: DW_AT_name ("y") ; DW5-CHECK-NEXT: DW_AT_decl_file {{.*}} ; DW5-CHECK-NEXT: DW_AT_decl_line (3) -; DW5-CHECK-NEXT: DW_AT_type (0x0000005b "int") +; DW5-CHECK-NEXT: DW_AT_type (0x00000063 "int") ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x00000056: NULL +; DW5-CHECK-NEXT: 0x0000005e: NULL ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x00000057: DW_TAG_base_type +; DW5-CHECK-NEXT: 0x0000005f: DW_TAG_base_type ; DW5-CHECK-NEXT: DW_AT_name ("signed char") ; DW5-CHECK-NEXT: DW_AT_encoding (DW_ATE_signed_char) ; DW5-CHECK-NEXT: DW_AT_byte_size (0x01) ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x0000005b: DW_TAG_base_type +; DW5-CHECK-NEXT: 0x00000063: DW_TAG_base_type ; DW5-CHECK-NEXT: DW_AT_name ("int") ; DW5-CHECK-NEXT: DW_AT_encoding (DW_ATE_signed) ; DW5-CHECK-NEXT: DW_AT_byte_size (0x04) ; DW5-CHECK-EMPTY: -; DW5-CHECK-NEXT: 0x0000005f: NULL +; DW5-CHECK-NEXT: 0x00000067: NULL ; DW4-CHECK: .debug_info contents: -; DW4-CHECK-NEXT: 0x00000000: Compile Unit: length = 0x0000006d version = 0x0004 abbr_offset = 0x0000 addr_size = 0x08 (next unit at 0x00000071) +; DW4-CHECK-NEXT: 0x00000000: Compile Unit: length = 0x0000007a version = 0x0004 abbr_offset = 0x0000 addr_size = 0x08 (next unit at 0x0000007e) ; DW4-CHECK-EMPTY: ; DW4-CHECK-NEXT: 0x0000000b: DW_TAG_compile_unit ; DW4-CHECK-NEXT: DW_AT_producer ("clang version 9.0.0 (trunk 353791) (llvm/trunk 353801)") @@ -78,48 +75,46 @@ ; DW4-CHECK-NEXT: DW_AT_stmt_list (0x00000000) ; DW4-CHECK-NEXT: DW_AT_comp_dir {{.*}} ; DW4-CHECK-NEXT: DW_AT_low_pc (0x0000000000000000) -; DW4-CHECK-NEXT: DW_AT_high_pc (0x0000000000000007) +; DW4-CHECK-NEXT: DW_AT_high_pc (0x0000000000000005) ; DW4-CHECK-EMPTY: ; DW4-CHECK-NEXT: 0x0000002a: DW_TAG_subprogram ; DW4-CHECK-NEXT: DW_AT_low_pc (0x0000000000000000) -; DW4-CHECK-NEXT: DW_AT_high_pc (0x0000000000000007) +; DW4-CHECK-NEXT: DW_AT_high_pc (0x0000000000000005) ; DW4-CHECK-NEXT: DW_AT_frame_base (DW_OP_reg7 RSP) ; DW4-CHECK-NEXT: DW_AT_name ("foo") ; DW4-CHECK-NEXT: DW_AT_decl_file {{.*}} ; DW4-CHECK-NEXT: DW_AT_decl_line (1) ; DW4-CHECK-NEXT: DW_AT_prototyped (true) -; DW4-CHECK-NEXT: DW_AT_type (0x00000062 "signed char") +; DW4-CHECK-NEXT: DW_AT_type (0x0000006f "signed char") ; DW4-CHECK-NEXT: DW_AT_external (true) ; DW4-CHECK-EMPTY: ; DW4-CHECK-NEXT: 0x00000043: DW_TAG_formal_parameter -; DW4-CHECK-NEXT: DW_AT_location (0x00000000 -; DW4-CHECK-NEXT: [0x0000000000000003, 0x0000000000000006): DW_OP_reg0 RAX) +; DW4-CHECK-NEXT: DW_AT_location (DW_OP_reg5 RDI) ; DW4-CHECK-NEXT: DW_AT_name ("x") ; DW4-CHECK-NEXT: DW_AT_decl_file {{.*}} ; DW4-CHECK-NEXT: DW_AT_decl_line (1) -; DW4-CHECK-NEXT: DW_AT_type (0x00000062 "signed char") +; DW4-CHECK-NEXT: DW_AT_type (0x0000006f "signed char") ; DW4-CHECK-EMPTY: -; DW4-CHECK-NEXT: 0x00000052: DW_TAG_variable -; DW4-CHECK-NEXT: DW_AT_location (0x00000023 -; DW4-CHECK-NEXT: [0x0000000000000003, 0x0000000000000006): DW_OP_breg0 RAX+0, DW_OP_constu 0xff, DW_OP_and, DW_OP_dup, DW_OP_constu 0x7, DW_OP_shr, DW_OP_lit0, DW_OP_not, DW_OP_mul, DW_OP_constu 0x8, DW_OP_shl, DW_OP_or, DW_OP_stack_value) +; DW4-CHECK-NEXT: 0x00000050: DW_TAG_variable +; DW4-CHECK-NEXT: DW_AT_location (DW_OP_breg5 RDI+0, DW_OP_constu 0xff, DW_OP_and, DW_OP_dup, DW_OP_constu 0x7, DW_OP_shr, DW_OP_lit0, DW_OP_not, DW_OP_mul, DW_OP_constu 0x8, DW_OP_shl, DW_OP_or, DW_OP_stack_value) ; DW4-CHECK-NEXT: DW_AT_name ("y") ; DW4-CHECK-NEXT: DW_AT_decl_file {{.*}} ; DW4-CHECK-NEXT: DW_AT_decl_line (3) -; DW4-CHECK-NEXT: DW_AT_type (0x00000069 "int") +; DW4-CHECK-NEXT: DW_AT_type (0x00000076 "int") ; DW4-CHECK-EMPTY: -; DW4-CHECK-NEXT: 0x00000061: NULL +; DW4-CHECK-NEXT: 0x0000006e: NULL ; DW4-CHECK-EMPTY: -; DW4-CHECK-NEXT: 0x00000062: DW_TAG_base_type +; DW4-CHECK-NEXT: 0x0000006f: DW_TAG_base_type ; DW4-CHECK-NEXT: DW_AT_name ("signed char") ; DW4-CHECK-NEXT: DW_AT_encoding (DW_ATE_signed_char) ; DW4-CHECK-NEXT: DW_AT_byte_size (0x01) ; DW4-CHECK-EMPTY: -; DW4-CHECK-NEXT: 0x00000069: DW_TAG_base_type +; DW4-CHECK-NEXT: 0x00000076: DW_TAG_base_type ; DW4-CHECK-NEXT: DW_AT_name ("int") ; DW4-CHECK-NEXT: DW_AT_encoding (DW_ATE_signed) ; DW4-CHECK-NEXT: DW_AT_byte_size (0x04) ; DW4-CHECK-EMPTY: -; DW4-CHECK-NEXT: 0x00000070: NULL +; DW4-CHECK-NEXT: 0x0000007d: NULL ; ModuleID = 'dbg.ll' Index: test/DebugInfo/X86/subreg.ll =================================================================== --- test/DebugInfo/X86/subreg.ll +++ test/DebugInfo/X86/subreg.ll @@ -3,7 +3,7 @@ ; We are testing that a value in a 16 bit register gets reported as ; being in its superregister. -; CHECK: .byte 80 # super-register DW_OP_reg0 +; CHECK: .byte 85 # super-register DW_OP_reg5 ; No need to a piece at offset 0. ; CHECK-NOT: DW_OP_piece ; CHECK-NOT: DW_OP_bit_piece @@ -11,6 +11,9 @@ define i16 @f(i16 signext %zzz) nounwind !dbg !1 { entry: call void @llvm.dbg.value(metadata i16 %zzz, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1) + br label %exit + +exit: %conv = sext i16 %zzz to i32, !dbg !7 %conv1 = trunc i32 %conv to i16 ret i16 %conv1