Index: lib/CodeGen/RegisterCoalescer.cpp
===================================================================
--- lib/CodeGen/RegisterCoalescer.cpp
+++ lib/CodeGen/RegisterCoalescer.cpp
@@ -2787,8 +2787,6 @@
       continue;
     LLVM_DEBUG(dbgs() << "\t\tconflict at " << printReg(Reg) << ':' << i << '@'
                       << LR.getValNumInfo(i)->def << '\n');
-    if (SubRangeJoin)
-      return false;
 
     ++NumLaneConflicts;
     assert(V.OtherVNI && "Inconsistent conflict resolution.");
Index: test/CodeGen/AMDGPU/pytorch-cannot-join-subrange2.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/pytorch-cannot-join-subrange2.mir
@@ -0,0 +1,17 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-coalescing -run-pass=simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s
+---
+name:            couldnt_join_subrange
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: couldnt_join_subrange
+    ; CHECK: undef %0.sub0:sreg_64 = S_MOV_B32 0
+    ; CHECK: %0.sub1:sreg_64 = COPY %0.sub0
+    ; CHECK: S_ENDPGM implicit %0.sub1
+    undef %0.sub0:sreg_64 = S_MOV_B32 0
+    %1:sreg_64 = COPY %0:sreg_64
+    %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
+    S_ENDPGM implicit %1.sub1:sreg_64
+
+...