Index: lib/Target/WebAssembly/WebAssemblyISelLowering.h
===================================================================
--- lib/Target/WebAssembly/WebAssemblyISelLowering.h
+++ lib/Target/WebAssembly/WebAssemblyISelLowering.h
@@ -99,6 +99,7 @@
   SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
+  SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;
 };
 
Index: lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
===================================================================
--- lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -209,6 +209,20 @@
     }
   }
 
+  // Custom lower lane accesses to expand out variable indices
+  if (Subtarget->hasSIMD128()) {
+    for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32}) {
+      setOperationAction(ISD::EXTRACT_VECTOR_ELT, T, Custom);
+      setOperationAction(ISD::INSERT_VECTOR_ELT, T, Custom);
+    }
+    if (EnableUnimplementedWasmSIMDInstrs) {
+      for (auto T : {MVT::v2i64, MVT::v2f64}) {
+        setOperationAction(ISD::EXTRACT_VECTOR_ELT, T, Custom);
+        setOperationAction(ISD::INSERT_VECTOR_ELT, T, Custom);
+      }
+    }
+  }
+
   // Trap lowers to wasm unreachable
   setOperationAction(ISD::TRAP, MVT::Other, Legal);
 
@@ -859,6 +873,9 @@
     return LowerCopyToReg(Op, DAG);
   case ISD::INTRINSIC_WO_CHAIN:
     return LowerINTRINSIC_WO_CHAIN(Op, DAG);
+  case ISD::EXTRACT_VECTOR_ELT:
+  case ISD::INSERT_VECTOR_ELT:
+    return LowerAccessVectorElement(Op, DAG);
   case ISD::VECTOR_SHUFFLE:
     return LowerVECTOR_SHUFFLE(Op, DAG);
   case ISD::SHL:
@@ -1050,6 +1067,17 @@
   return DAG.getNode(WebAssemblyISD::SHUFFLE, DL, Op.getValueType(), Ops);
 }
 
+SDValue
+WebAssemblyTargetLowering::LowerAccessVectorElement(SDValue Op,
+                                                    SelectionDAG &DAG) const {
+  // Allow constant lane indices, expand variable lane indices
+  SDNode *IdxNode = Op.getOperand(Op.getNumOperands() - 1).getNode();
+  if (isa<ConstantSDNode>(IdxNode) || IdxNode->isUndef())
+    return Op;
+  else
+    return SDValue();
+}
+
 SDValue WebAssemblyTargetLowering::LowerShift(SDValue Op,
                                               SelectionDAG &DAG) const {
   SDLoc DL(Op);
Index: test/CodeGen/WebAssembly/simd.ll
===================================================================
--- test/CodeGen/WebAssembly/simd.ll
+++ test/CodeGen/WebAssembly/simd.ll
@@ -54,6 +54,26 @@
   ret i32 %a
 }
 
+; CHECK-LABEL: extract_var_v16i8_s:
+; NO-SIMD128-NOT: i8x16
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
+; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
+; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]])
+; SIMD128-NEXT: return $pop[[R]]
+define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) {
+  %elem = extractelement <16 x i8> %v, i32 %i
+  %a = sext i8 %elem to i32
+  ret i32 %a
+}
+
 ; CHECK-LABEL: extract_undef_v16i8_s:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .param v128{{$}}
@@ -78,6 +98,26 @@
   ret i32 %a
 }
 
+; CHECK-LABEL: extract_var_v16i8_u:
+; NO-SIMD128-NOT: i8x16
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
+; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
+; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]])
+; SIMD128-NEXT: return $pop[[R]]
+define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) {
+  %elem = extractelement <16 x i8> %v, i32 %i
+  %a = zext i8 %elem to i32
+  ret i32 %a
+}
+
 ; CHECK-LABEL: extract_undef_v16i8_u:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .param v128{{$}}
@@ -101,6 +141,25 @@
   ret i8 %elem
 }
 
+; CHECK-LABEL: extract_var_v16i8:
+; NO-SIMD128-NOT: i8x16
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
+; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
+; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]])
+; SIMD128-NEXT: return $pop[[R]]
+define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) {
+  %elem = extractelement <16 x i8> %v, i32 %i
+  ret i8 %elem
+}
+
 ; CHECK-LABEL: extract_undef_v16i8:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .param v128{{$}}
@@ -252,6 +311,28 @@
   ret i32 %a
 }
 
+; CHECK-LABEL: extract_var_v8i16_s:
+; NO-SIMD128-NOT: i16x8
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
+; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1
+; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]
+; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]
+; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]])
+; SIMD128-NEXT: return $pop[[R]]
+define i32 @extract_var_v8i16_s(<8 x i16> %v, i32 %i) {
+  %elem = extractelement <8 x i16> %v, i32 %i
+  %a = sext i16 %elem to i32
+  ret i32 %a
+}
+
 ; CHECK-LABEL: extract_undef_v8i16_s:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128-NEXT: .param v128{{$}}
@@ -276,6 +357,28 @@
   ret i32 %a
 }
 
+; CHECK-LABEL: extract_var_v8i16_u:
+; NO-SIMD128-NOT: i16x8
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
+; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1
+; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]
+; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]
+; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]])
+; SIMD128-NEXT: return $pop[[R]]
+define i32 @extract_var_v8i16_u(<8 x i16> %v, i32 %i) {
+  %elem = extractelement <8 x i16> %v, i32 %i
+  %a = zext i16 %elem to i32
+  ret i32 %a
+}
+
 ; CHECK-LABEL: extract_undef_v8i16_u:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128-NEXT: .param v128{{$}}
@@ -299,6 +402,27 @@
   ret i16 %elem
 }
 
+; CHECK-LABEL: extract_var_v8i16:
+; NO-SIMD128-NOT: i16x8
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
+; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1
+; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]
+; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]
+; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]])
+; SIMD128-NEXT: return $pop[[R]]
+define i16 @extract_var_v8i16(<8 x i16> %v, i32 %i) {
+  %elem = extractelement <8 x i16> %v, i32 %i
+  ret i16 %elem
+}
+
 ; CHECK-LABEL: extract_undef_v8i16:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128-NEXT: .param v128{{$}}
@@ -427,6 +551,27 @@
   ret i32 %elem
 }
 
+; CHECK-LABEL: extract_var_v4i32:
+; NO-SIMD128-NOT: i32x4
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
+; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2
+; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]
+; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]
+; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]])
+; SIMD128-NEXT: return $pop[[R]]
+define i32 @extract_var_v4i32(<4 x i32> %v, i32 %i) {
+  %elem = extractelement <4 x i32> %v, i32 %i
+  ret i32 %elem
+}
+
 ; CHECK-LABEL: extract_undef_v4i32:
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .param v128{{$}}
@@ -547,6 +692,27 @@
   ret i64 %elem
 }
 
+; CHECK-LABEL: extract_var_v2i64:
+; NO-SIMD128-NOT: i64x2
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result i64{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]
+; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3
+; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]
+; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]
+; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]])
+; SIMD128-NEXT: return $pop[[R]]
+define i64 @extract_var_v2i64(<2 x i64> %v, i32 %i) {
+  %elem = extractelement <2 x i64> %v, i32 %i
+  ret i64 %elem
+}
+
 ; CHECK-LABEL: extract_undef_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
@@ -666,6 +832,27 @@
   ret float %elem
 }
 
+; CHECK-LABEL: extract_var_v4f32:
+; NO-SIMD128-NOT: i64x2
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result f32{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]
+; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2
+; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]
+; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]
+; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]])
+; SIMD128-NEXT: return $pop[[R]]
+define float @extract_var_v4f32(<4 x float> %v, i32 %i) {
+  %elem = extractelement <4 x float> %v, i32 %i
+  ret float %elem
+}
+
 ; CHECK-LABEL: extract_undef_v4f32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .param v128{{$}}
@@ -785,6 +972,27 @@
   ret double %elem
 }
 
+; CHECK-LABEL: extract_var_v2f64:
+; NO-SIMD128-NOT: i62x2
+; SIMD128-NEXT: .param v128, i32{{$}}
+; SIMD128-NEXT: .result f64{{$}}
+; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
+; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
+; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
+; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1
+; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]
+; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3
+; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]
+; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]
+; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]])
+; SIMD128-NEXT: return $pop[[R]]
+define double @extract_var_v2f64(<2 x double> %v, i32 %i) {
+  %elem = extractelement <2 x double> %v, i32 %i
+  ret double %elem
+}
+
 ; CHECK-LABEL: extract_undef_v2f64:
 ; NO-SIMD128-NOT: f64x2
 ; SIMD128-VM-NOT: f64x2