Index: include/clang/Basic/X86Target.def
===================================================================
--- include/clang/Basic/X86Target.def
+++ include/clang/Basic/X86Target.def
@@ -145,6 +145,10 @@
 /// Broadwell microarchitecture based processors.
 PROC_WITH_FEAT(Broadwell, "broadwell", PROC_64_BIT, FEATURE_AVX2)
 
+/// \name CommonAVX512
+/// Intersection of SKX and KNL.
+PROC(CommonAVX512, "common-avx512", PROC_64_BIT)
+
 /// \name Skylake Client
 /// Skylake client microarchitecture based processors.
 PROC_WITH_FEAT(SkylakeClient, "skylake", PROC_64_BIT, FEATURE_AVX2)
Index: lib/Basic/Targets/X86.cpp
===================================================================
--- lib/Basic/Targets/X86.cpp
+++ lib/Basic/Targets/X86.cpp
@@ -268,12 +268,14 @@
     setFeatureEnabledImpl(Features, "avx512vpopcntdq", true);
     LLVM_FALLTHROUGH;
   case CK_KNL:
-    setFeatureEnabledImpl(Features, "avx512f", true);
-    setFeatureEnabledImpl(Features, "avx512cd", true);
     setFeatureEnabledImpl(Features, "avx512er", true);
     setFeatureEnabledImpl(Features, "avx512pf", true);
-    setFeatureEnabledImpl(Features, "prfchw", true);
     setFeatureEnabledImpl(Features, "prefetchwt1", true);
+    LLVM_FALLTHROUGH;
+  case CK_CommonAVX512:
+    setFeatureEnabledImpl(Features, "avx512f", true);
+    setFeatureEnabledImpl(Features, "avx512cd", true);
+    setFeatureEnabledImpl(Features, "prfchw", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     setFeatureEnabledImpl(Features, "rdseed", true);
     setFeatureEnabledImpl(Features, "adx", true);
@@ -957,6 +959,8 @@
     // recent primary x86 CPUs, and we should keep it that way.
     defineCPUMacros(Builder, "corei7");
     break;
+  case CK_CommonAVX512:
+    break;
   case CK_KNL:
     defineCPUMacros(Builder, "knl");
     break;
Index: test/Frontend/x86-target-cpu.c
===================================================================
--- test/Frontend/x86-target-cpu.c
+++ test/Frontend/x86-target-cpu.c
@@ -17,6 +17,7 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu icelake-server -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu knl -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu knm -verify %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu common-avx512 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu bonnell -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu silvermont -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu k8 -verify %s
Index: test/Misc/target-invalid-cpu-note.c
===================================================================
--- test/Misc/target-invalid-cpu-note.c
+++ test/Misc/target-invalid-cpu-note.c
@@ -15,7 +15,7 @@
 // X86-SAME: pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott,
 // X86-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont,
 // X86-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge,
-// X86-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512,
+// X86-SAME: core-avx-i, haswell, core-avx2, broadwell, common-avx512, skylake, skylake-avx512,
 // X86-SAME: skx, cannonlake, icelake-client, icelake-server, knl, knm, lakemont, k6, k6-2, k6-3,
 // X86-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64,
 // X86-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10,
@@ -27,7 +27,7 @@
 // X86_64: note: valid target CPU values are: nocona, core2, penryn, bonnell,
 // X86_64-SAME: atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere,
 // X86_64-SAME: sandybridge, corei7-avx, ivybridge, core-avx-i, haswell,
-// X86_64-SAME: core-avx2, broadwell, skylake, skylake-avx512, skx, cannonlake,
+// X86_64-SAME: core-avx2, broadwell, common-avx512, skylake, skylake-avx512, skx, cannonlake,
 // X86_64-SAME: icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3,
 // X86_64-SAME: athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1,
 // X86_64-SAME: btver2, bdver1, bdver2, bdver3, bdver4, znver1, x86-64
Index: test/Preprocessor/predefined-arch-macros.c
===================================================================
--- test/Preprocessor/predefined-arch-macros.c
+++ test/Preprocessor/predefined-arch-macros.c
@@ -648,6 +648,73 @@
 // CHECK_BROADWELL_M64: #define __x86_64 1
 // CHECK_BROADWELL_M64: #define __x86_64__ 1
 
+// RUN: %clang -march=common-avx512 -m32 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_COMMONAVX512_M32
+// CHECK_COMMONAVX512_M32: #define __ADX__ 1
+// CHECK_COMMONAVX512_M32: #define __AVX2__ 1
+// CHECK_COMMONAVX512_M32: #define __AVX512CD__ 1
+// CHECK_COMMONAVX512_M32: #define __AVX512F__ 1
+// CHECK_COMMONAVX512_M32: #define __AVX__ 1
+// CHECK_COMMONAVX512_M32: #define __BMI2__ 1
+// CHECK_COMMONAVX512_M32: #define __BMI__ 1
+// CHECK_COMMONAVX512_M32: #define __F16C__ 1
+// CHECK_COMMONAVX512_M32: #define __FMA__ 1
+// CHECK_COMMONAVX512_M32: #define __LZCNT__ 1
+// CHECK_COMMONAVX512_M32: #define __MMX__ 1
+// CHECK_COMMONAVX512_M32: #define __MOVBE__ 1
+// CHECK_COMMONAVX512_M32: #define __PCLMUL__ 1
+// CHECK_COMMONAVX512_M32: #define __POPCNT__ 1
+// CHECK_COMMONAVX512_M32: #define __PRFCHW__ 1
+// CHECK_COMMONAVX512_M32: #define __RDRND__ 1
+// CHECK_COMMONAVX512_M32: #define __RDSEED__ 1
+// CHECK_COMMONAVX512_M32: #define __SSE2__ 1
+// CHECK_COMMONAVX512_M32: #define __SSE3__ 1
+// CHECK_COMMONAVX512_M32: #define __SSE4_1__ 1
+// CHECK_COMMONAVX512_M32: #define __SSE4_2__ 1
+// CHECK_COMMONAVX512_M32: #define __SSE__ 1
+// CHECK_COMMONAVX512_M32: #define __SSSE3__ 1
+// CHECK_COMMONAVX512_M32: #define __XSAVEOPT__ 1
+// CHECK_COMMONAVX512_M32: #define __XSAVE__ 1
+// CHECK_COMMONAVX512_M32: #define __i386 1
+// CHECK_COMMONAVX512_M32: #define __i386__ 1
+// CHECK_COMMONAVX512_M32: #define i386 1
+
+// RUN: %clang -march=common-avx512 -m64 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_COMMONAVX512_M64
+// CHECK_COMMONAVX512_M64: #define __ADX__ 1
+// CHECK_COMMONAVX512_M64: #define __AVX2__ 1
+// CHECK_COMMONAVX512_M64: #define __AVX512CD__ 1
+// CHECK_COMMONAVX512_M64: #define __AVX512F__ 1
+// CHECK_COMMONAVX512_M64: #define __AVX__ 1
+// CHECK_COMMONAVX512_M64: #define __BMI2__ 1
+// CHECK_COMMONAVX512_M64: #define __BMI__ 1
+// CHECK_COMMONAVX512_M64: #define __F16C__ 1
+// CHECK_COMMONAVX512_M64: #define __FMA__ 1
+// CHECK_COMMONAVX512_M64: #define __LZCNT__ 1
+// CHECK_COMMONAVX512_M64: #define __MMX__ 1
+// CHECK_COMMONAVX512_M64: #define __MOVBE__ 1
+// CHECK_COMMONAVX512_M64: #define __PCLMUL__ 1
+// CHECK_COMMONAVX512_M64: #define __POPCNT__ 1
+// CHECK_COMMONAVX512_M64: #define __PRFCHW__ 1
+// CHECK_COMMONAVX512_M64: #define __RDRND__ 1
+// CHECK_COMMONAVX512_M64: #define __RDSEED__ 1
+// CHECK_COMMONAVX512_M64: #define __SSE2_MATH__ 1
+// CHECK_COMMONAVX512_M64: #define __SSE2__ 1
+// CHECK_COMMONAVX512_M64: #define __SSE3__ 1
+// CHECK_COMMONAVX512_M64: #define __SSE4_1__ 1
+// CHECK_COMMONAVX512_M64: #define __SSE4_2__ 1
+// CHECK_COMMONAVX512_M64: #define __SSE_MATH__ 1
+// CHECK_COMMONAVX512_M64: #define __SSE__ 1
+// CHECK_COMMONAVX512_M64: #define __SSSE3__ 1
+// CHECK_COMMONAVX512_M64: #define __XSAVEOPT__ 1
+// CHECK_COMMONAVX512_M64: #define __XSAVE__ 1
+// CHECK_COMMONAVX512_M64: #define __amd64 1
+// CHECK_COMMONAVX512_M64: #define __amd64__ 1
+// CHECK_COMMONAVX512_M64: #define __x86_64 1
+// CHECK_COMMONAVX512_M64: #define __x86_64__ 1
+
 // RUN: %clang -march=skylake -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_SKL_M32