Index: include/llvm/Support/ARMWinEH.h =================================================================== --- include/llvm/Support/ARMWinEH.h +++ include/llvm/Support/ARMWinEH.h @@ -207,6 +207,8 @@ /// ExceptionDataRecord - An entry in the table of exception data (.xdata) /// +/// The format on ARM is: +/// /// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 /// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 /// +-------+---------+-+-+-+---+-----------------------------------+ @@ -215,6 +217,16 @@ /// | Reserved |Ex. Code Words| (Extended Epilogue Count) | /// +-------+--------+--------------+-------------------------------+ /// +/// The format on ARM64 is: +/// +/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 +/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +/// +---------+---------+-+-+---+-----------------------------------+ +/// | C Wrd | Epi Cnt |E|X|Ver| Function Length | +/// +---------+------+--'-'-'---'---+-------------------------------+ +/// | Reserved |Ex. Code Words| (Extended Epilogue Count) | +/// +-------+--------+--------------+-------------------------------+ +/// /// Function Length : 18-bit field indicating the total length of the function /// in bytes divided by 2. If a function is larger than /// 512KB, then multiple pdata and xdata records must be used. @@ -225,7 +237,7 @@ /// header /// F : 1-bit field indicating that the record describes a function fragment /// (implies that no prologue is present, and prologue processing should be -/// skipped) +/// skipped) (ARM only) /// Epilogue Count : 5-bit field that differs in meaning based on the E field. /// /// If E is set, then this field specifies the index of the @@ -235,33 +247,43 @@ /// scopes. If more than 31 scopes exist, then this field and /// the Code Words field must both be set to 0 to indicate that /// an extension word is required. -/// Code Words : 4-bit field that species the number of 32-bit words needed to -/// contain all the unwind codes. If more than 15 words (63 code -/// bytes) are required, then this field and the Epilogue Count -/// field must both be set to 0 to indicate that an extension word -/// is required. +/// Code Words : 4-bit (5-bit on ARM64) field that specifies the number of +/// 32-bit words needed to contain all the unwind codes. If more +/// than 15 words (31 words on ARM64) are required, then this field +/// and the Epilogue Count field must both be set to 0 to indicate +/// that an extension word is required. /// Extended Epilogue Count, Extended Code Words : /// Valid only if Epilog Count and Code Words are both /// set to 0. Provides an 8-bit extended code word /// count and 16-bits for epilogue count /// +/// The epilogue scope format on ARM is: +/// /// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 /// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 /// +----------------+------+---+---+-------------------------------+ /// | Ep Start Idx | Cond |Res| Epilogue Start Offset | /// +----------------+------+---+-----------------------------------+ /// +/// The epilogue scope format on ARM64 is: +/// +/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 +/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +/// +-------------------+-------+---+-------------------------------+ +/// | Ep Start Idx | Res | Epilogue Start Offset | +/// +-------------------+-------+-----------------------------------+ +/// /// If the E bit is unset in the header, the header is followed by a series of /// epilogue scopes, which are sorted by their offset. /// /// Epilogue Start Offset: 18-bit field encoding the offset of epilogue relative /// to the start of the function in bytes divided by two /// Res : 2-bit field reserved for future expansion (must be set to 0) -/// Condition : 4-bit field providing the condition under which the epilogue is -/// executed. Unconditional epilogues should set this field to 0xe. -/// Epilogues must be entirely conditional or unconditional, and in -/// Thumb-2 mode. The epilogue beings with the first instruction -/// after the IT opcode. +/// Condition : (ARM only) 4-bit field providing the condition under which the +/// epilogue is executed. Unconditional epilogues should set this +/// field to 0xe. Epilogues must be entirely conditional or +/// unconditional, and in Thumb-2 mode. The epilogue begins with +/// the first instruction after the IT opcode. /// Epilogue Start Index : 8-bit field indicating the byte index of the first /// unwind code describing the epilogue /// @@ -293,18 +315,41 @@ const support::ulittle32_t ES; EpilogueScope(const support::ulittle32_t Data) : ES(Data) {} + // Same for both ARM and AArch64. uint32_t EpilogueStartOffset() const { return (ES & 0x0003ffff); } - uint8_t Res() const { + + // Different implementations for ARM and AArch64. + template + typename std::enable_if::type + Res() const { return ((ES & 0x000c0000) >> 18); } + + template + typename std::enable_if::type + Res() const { + return ((ES & 0x000f0000) >> 18); + } + + // Condition is only applicable to ARM. uint8_t Condition() const { return ((ES & 0x00f00000) >> 20); } - uint8_t EpilogueStartIndex() const { + + // Different implementations for ARM and AArch64. + template + typename std::enable_if::type + EpilogueStartIndex() const { return ((ES & 0xff000000) >> 24); } + + template + typename std::enable_if::type + EpilogueStartIndex() const { + return ((ES & 0xffc00000) >> 22); + } }; struct ExceptionDataRecord; @@ -312,8 +357,10 @@ struct ExceptionDataRecord { const support::ulittle32_t *Data; + bool isAArch64; - ExceptionDataRecord(const support::ulittle32_t *Data) : Data(Data) {} + ExceptionDataRecord(const support::ulittle32_t *Data, bool isAArch64) : + Data(Data), isAArch64(isAArch64) {} uint32_t FunctionLength() const { return (Data[0] & 0x0003ffff); @@ -332,18 +379,25 @@ } bool F() const { + assert(!isAArch64 && "Fragments are only supported on ARMv7 WinEH"); return ((Data[0] & 0x00400000) >> 22); } uint8_t EpilogueCount() const { - if (HeaderWords(*this) == 1) + if (HeaderWords(*this) == 1) { + if (isAArch64) + return (Data[0] & 0x07C00000) >> 22; return (Data[0] & 0x0f800000) >> 23; + } return Data[1] & 0x0000ffff; } uint8_t CodeWords() const { - if (HeaderWords(*this) == 1) + if (HeaderWords(*this) == 1) { + if (isAArch64) + return (Data[0] & 0xf8000000) >> 27; return (Data[0] & 0xf0000000) >> 28; + } return (Data[1] & 0x00ff0000) >> 16; } @@ -373,6 +427,8 @@ }; inline size_t HeaderWords(const ExceptionDataRecord &XR) { + if (XR.isAArch64) + return (XR.Data[0] & 0xffc0000) ? 1 : 2; return (XR.Data[0] & 0xff800000) ? 1 : 2; } } Index: tools/llvm-readobj/ARMWinEHPrinter.h =================================================================== --- tools/llvm-readobj/ARMWinEHPrinter.h +++ tools/llvm-readobj/ARMWinEHPrinter.h @@ -24,6 +24,7 @@ ScopedPrinter &SW; raw_ostream &OS; + bool isAArch64; struct RingEntry { uint8_t Mask; @@ -31,6 +32,7 @@ bool (Decoder::*Routine)(const uint8_t *, unsigned &, unsigned, bool); }; static const RingEntry Ring[]; + static const RingEntry Ring64[]; bool opcode_0xxxxxxx(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, bool Prologue); @@ -75,6 +77,50 @@ bool opcode_11111111(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, bool Prologue); + // ARM64 unwind codes start here. + bool opcode_alloc_s(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_save_r19r20_x(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_fplr(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_fplr_x(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_alloc_m(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_save_regp(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_regp_x(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_reg(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_reg_x(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_lrpair(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_fregp(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_fregp_x(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_freg(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_save_freg_x(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + bool opcode_alloc_l(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_setfp(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_addfp(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_nop(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_end(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_end_c(const uint8_t *Opcodes, unsigned &Offset, unsigned Length, + bool Prologue); + bool opcode_save_next(const uint8_t *Opcodes, unsigned &Offset, + unsigned Length, bool Prologue); + void decodeOpcodes(ArrayRef Opcodes, unsigned Offset, bool Prologue); @@ -107,7 +153,9 @@ const object::SectionRef Section); public: - Decoder(ScopedPrinter &SW) : SW(SW), OS(SW.getOStream()) {} + Decoder(ScopedPrinter &SW, bool isAArch64) : SW(SW), + OS(SW.getOStream()), + isAArch64(isAArch64) {} std::error_code dumpProcedureData(const object::COFFObjectFile &COFF); }; } Index: tools/llvm-readobj/ARMWinEHPrinter.cpp =================================================================== --- tools/llvm-readobj/ARMWinEHPrinter.cpp +++ tools/llvm-readobj/ARMWinEHPrinter.cpp @@ -145,6 +145,31 @@ { 0xff, 0xff, &Decoder::opcode_11111111 }, // UOP_END }; +// Unwind opcodes for ARM64. +// https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling +const Decoder::RingEntry Decoder::Ring64[] = { + { 0xe0, 0x00, &Decoder::opcode_alloc_s }, + { 0xe0, 0x20, &Decoder::opcode_save_r19r20_x }, + { 0xc0, 0x40, &Decoder::opcode_save_fplr }, + { 0xc0, 0x80, &Decoder::opcode_save_fplr_x }, + { 0xf8, 0xc0, &Decoder::opcode_alloc_m }, + { 0xfc, 0xc8, &Decoder::opcode_save_regp }, + { 0xfc, 0xcc, &Decoder::opcode_save_regp_x }, + { 0xfc, 0xd0, &Decoder::opcode_save_reg }, + { 0xfe, 0xd4, &Decoder::opcode_save_reg_x }, + { 0xfe, 0xd6, &Decoder::opcode_save_lrpair }, + { 0xfe, 0xd8, &Decoder::opcode_save_fregp, }, + { 0xfe, 0xda, &Decoder::opcode_save_fregp_x }, + { 0xfe, 0xdc, &Decoder::opcode_save_freg }, + { 0xff, 0xde, &Decoder::opcode_save_freg_x }, + { 0xff, 0xe0, &Decoder::opcode_alloc_l }, + { 0xff, 0xe1, &Decoder::opcode_setfp }, + { 0xff, 0xe2, &Decoder::opcode_addfp }, + { 0xff, 0xe3, &Decoder::opcode_nop }, + { 0xff, 0xe4, &Decoder::opcode_end }, + { 0xff, 0xe5, &Decoder::opcode_end_c }, +}; + void Decoder::printRegisters(const std::pair &RegisterMask) { static const char * const GPRRegisterNames[16] = { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", @@ -493,15 +518,271 @@ return true; } +// ARM64 unwind codes start here. +bool Decoder::opcode_alloc_s(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t NumBytes = (OC[Offset] & 0x1F) << 4; + SW.startLine() << format("0x%02x ; %s sp, #%u\n", OC[Offset], + static_cast(Prologue ? "sub" : "add"), + NumBytes); + ++Offset; + return false; +} + +bool Decoder::opcode_save_r19r20_x(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Off = (OC[Offset] & 0x1F) << 3; + if (Prologue) + SW.startLine() << format( + "0x%02x ; stp x19, x20, [sp, #-%u]!\n", OC[Offset], Off); + else + SW.startLine() << format( + "0x%02x ; ldp x19, x20, [sp], #%u\n", OC[Offset], Off); + ++Offset; + return false; +} + +bool Decoder::opcode_save_fplr(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Off = (OC[Offset] & 0x3F) << 3; + SW.startLine() << format( + "0x%02x ; %s x29, x30, [sp, #%u]\n", OC[Offset], + static_cast(Prologue ? "stp" : "ldp"), Off); + ++Offset; + return false; +} + +bool Decoder::opcode_save_fplr_x(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Off = ((OC[Offset] & 0x3F) + 1) << 3; + if (Prologue) + SW.startLine() << format( + "0x%02x ; stp x29, x30, [sp, #-%u]!\n", OC[Offset], Off); + else + SW.startLine() << format( + "0x%02x ; ldp x29, x30, [sp], #%u\n", OC[Offset], Off); + ++Offset; + return false; +} + +bool Decoder::opcode_alloc_m(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t NumBytes = (OC[Offset] & 0x07 << 8); + NumBytes |= (OC[Offset + 1] & 0xFF); + SW.startLine() << format("0x%02x ; %s sp, #%u\n", OC[Offset], + static_cast(Prologue ? "sub" : "add"), + NumBytes); + ++Offset; + return false; +} + +bool Decoder::opcode_save_regp(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x03 << 8); + Reg |= (OC[Offset + 1] & 0xC0); + Reg >>= 6; + Reg += 19; + uint32_t Off = (OC[Offset + 1] & 0x3F) << 3; + SW.startLine() << format( + "0x%02x ; %s x%u, x%u, [sp, #%u]\n", OC[Offset], + static_cast(Prologue ? "stp" : "ldp"), Reg, Reg + 1, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_regp_x(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x03 << 8); + Reg |= (OC[Offset + 1] & 0xC0); + Reg >>= 6; + Reg += 19; + uint32_t Off = ((OC[Offset + 1] & 0x3F) + 1) << 3; + if (Prologue) + SW.startLine() << format( + "0x%02x ; stp x%u, x%u, [sp, #-%u]!\n", OC[Offset], Reg, + Reg + 1, Off); + else + SW.startLine() << format( + "0x%02x ; ldp x%u, x%u, [sp], #%u\n", OC[Offset], Reg, + Reg + 1, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_reg(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x03) << 8; + Reg |= (OC[Offset + 1] & 0xC0); + Reg >>= 6; + Reg += 19; + uint32_t Off = (OC[Offset + 1] & 0x3F) << 3; + SW.startLine() << format("0x%02x%02x ; %s x%u, [sp, #%u]\n", + OC[Offset], OC[Offset + 1], + static_cast(Prologue ? "str" : "ldr"), + Reg, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_reg_x(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x01) << 8; + Reg |= (OC[Offset + 1] & 0xE0); + Reg >>= 5; + Reg += 19; + uint32_t Off = ((OC[Offset + 1] & 0x1F) + 1) << 3; + if (Prologue) + SW.startLine() << format("0x%02x%02x ; str x%u, [sp, #%u]!\n", + OC[Offset], OC[Offset + 1], Reg, Off); + else + SW.startLine() << format("0x%02x%02x ; ldr x%u, [sp], #%u\n", + OC[Offset], OC[Offset + 1], Reg, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_lrpair(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x01) << 8; + Reg |= (OC[Offset + 1] & 0xC0); + Reg >>= 6; + Reg *= 2; + Reg += 19; + uint32_t Off = (OC[Offset + 1] & 0x3F) << 3; + SW.startLine() << format("0x%02x%02x ; %s x%u, lr, [sp, #%u]\n", + OC[Offset], OC[Offset + 1], + static_cast(Prologue ? "stp" : "ldp"), + Reg, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_fregp(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x01) << 8; + Reg |= (OC[Offset + 1] & 0xC0); + Reg >>= 6; + Reg += 8; + uint32_t Off = (OC[Offset + 1] & 0x3F) << 3; + SW.startLine() << format("0x%02x%02x ; %s d%u, d%u, [sp, #%u]\n", + OC[Offset], OC[Offset + 1], + static_cast(Prologue ? "stp" : "ldp"), + Reg, Reg + 1, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_fregp_x(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x01) << 8; + Reg |= (OC[Offset + 1] & 0xC0); + Reg >>= 6; + Reg += 8; + uint32_t Off = ((OC[Offset + 1] & 0x3F) + 1) << 3; + if (Prologue) + SW.startLine() << format( + "0x%02x%02x ; stp d%u, d%u, [sp, #-%u]!\n", OC[Offset], + OC[Offset + 1], Reg, Reg + 1, Off); + else + SW.startLine() << format( + "0x%02x%02x ; ldp d%u, d%u, [sp], #%u\n", OC[Offset], + OC[Offset + 1], Reg, Reg + 1, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_freg(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = (OC[Offset] & 0x01) << 8; + Reg |= (OC[Offset + 1] & 0xC0); + Reg >>= 6; + Reg += 8; + uint32_t Off = (OC[Offset + 1] & 0x3F) << 3; + SW.startLine() << format("0x%02x%02x ; %s d%u, [sp, #%u]\n", + OC[Offset], OC[Offset + 1], + static_cast(Prologue ? "stp" : "ldp"), + Reg, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_save_freg_x(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + uint32_t Reg = ((OC[Offset + 1] & 0xE0) >> 5) + 8; + uint32_t Off = ((OC[Offset + 1] & 0x1F) + 1) << 3; + if (Prologue) + SW.startLine() << format( + "0x%02x%02x ; stp d%u, d%u, [sp, #-%u]!\n", OC[Offset], + OC[Offset + 1], Reg, Off); + else + SW.startLine() << format( + "0x%02x%02x ; ldp d%u, d%u, [sp], #%u\n", OC[Offset], + OC[Offset + 1], Reg, Off); + Offset += 2; + return false; +} + +bool Decoder::opcode_alloc_l(const uint8_t *OC, unsigned &Offset, + unsigned Length, bool Prologue) { + unsigned Off = + (OC[Offset + 1] << 16) | (OC[Offset + 2] << 8) | (OC[Offset + 3] << 0); + Off <<= 4; + SW.startLine() << format( + "0x%02x%02x%02x%02x ; %s sp, #%u\n", OC[Offset], OC[Offset + 1], + OC[Offset + 2], OC[Offset + 3], + static_cast(Prologue ? "sub" : "add"), Off); + Offset += 4; + return false; +} + +bool Decoder::opcode_setfp(const uint8_t *OC, unsigned &Offset, unsigned Length, + bool Prologue) { + assert(Prologue && "mov fp, sp only valid in a prologue"); + SW.startLine() << format("0x%02x ; mov fp, sp\n", OC[Offset]); + ++Offset; + return false; +} + +bool Decoder::opcode_addfp(const uint8_t *OC, unsigned &Offset, unsigned Length, + bool Prologue) { + unsigned NumBytes = OC[Offset + 1] << 3; + assert(Prologue && "add_fp only valid in prologue"); + SW.startLine() << format("0x%02x%02x ; add fp, sp, #%u\n", + OC[Offset], OC[Offset + 1], NumBytes); + Offset += 2; + return false; +} + +bool Decoder::opcode_nop(const uint8_t *OC, unsigned &Offset, unsigned Length, + bool Prologue) { + SW.startLine() << format("0x%02x ; nop\n", OC[Offset]); + ++Offset; + return false; +} + +bool Decoder::opcode_end(const uint8_t *OC, unsigned &Offset, unsigned Length, + bool Prologue) { + SW.startLine() << format("0x%02x ; end\n", OC[Offset]); + ++Offset; + return true; +} + +bool Decoder::opcode_end_c(const uint8_t *OC, unsigned &Offset, unsigned Length, + bool Prologue) { + SW.startLine() << format("0x%02x ; end_c\n", OC[Offset]); + ++Offset; + return true; +} + void Decoder::decodeOpcodes(ArrayRef Opcodes, unsigned Offset, bool Prologue) { assert((!Prologue || Offset == 0) && "prologue should always use offset 0"); - + const RingEntry* DecodeRing = isAArch64 ? Ring64 : Ring; bool Terminated = false; for (unsigned OI = Offset, OE = Opcodes.size(); !Terminated && OI < OE; ) { for (unsigned DI = 0;; ++DI) { - if ((Opcodes[OI] & Ring[DI].Mask) == Ring[DI].Value) { - Terminated = (this->*Ring[DI].Routine)(Opcodes.data(), OI, 0, Prologue); + if ((Opcodes[OI] & DecodeRing[DI].Mask) == DecodeRing[DI].Value) { + Terminated = (this->*DecodeRing[DI].Routine)(Opcodes.data(), OI, 0, Prologue); break; } assert(DI < array_lengthof(Ring) && "unhandled opcode"); @@ -520,14 +801,15 @@ uint64_t Offset = VA - SectionVA; const ulittle32_t *Data = reinterpret_cast(Contents.data() + Offset); - const ExceptionDataRecord XData(Data); - + const ExceptionDataRecord XData(Data, isAArch64); DictScope XRS(SW, "ExceptionData"); - SW.printNumber("FunctionLength", XData.FunctionLength() << 1); + SW.printNumber("FunctionLength", isAArch64 ? + XData.FunctionLength() << 2 : XData.FunctionLength() << 1); SW.printNumber("Version", XData.Vers()); SW.printBoolean("ExceptionData", XData.X()); SW.printBoolean("EpiloguePacked", XData.E()); - SW.printBoolean("Fragment", XData.F()); + if (!isAArch64) + SW.printBoolean("Fragment", XData.F()); SW.printNumber(XData.E() ? "EpilogueOffset" : "EpilogueScopes", XData.EpilogueCount()); SW.printNumber("ByteCodeLength", @@ -535,7 +817,7 @@ if (XData.E()) { ArrayRef UC = XData.UnwindByteCode(); - if (!XData.F()) { + if (isAArch64 || !XData.F()) { ListScope PS(SW, "Prologue"); decodeOpcodes(UC, 0, /*Prologue=*/true); } @@ -544,16 +826,25 @@ decodeOpcodes(UC, XData.EpilogueCount(), /*Prologue=*/false); } } else { + if (true) { + ListScope PS(SW, "Prologue"); + decodeOpcodes(XData.UnwindByteCode(), 0, /*Prologue=*/true); + } ArrayRef EpilogueScopes = XData.EpilogueScopes(); ListScope ESS(SW, "EpilogueScopes"); for (const EpilogueScope ES : EpilogueScopes) { DictScope ESES(SW, "EpilogueScope"); SW.printNumber("StartOffset", ES.EpilogueStartOffset()); - SW.printNumber("Condition", ES.Condition()); - SW.printNumber("EpilogueStartIndex", ES.EpilogueStartIndex()); + if (!isAArch64) + SW.printNumber("Condition", ES.Condition()); + SW.printNumber("EpilogueStartIndex", + isAArch64 ? ES.EpilogueStartIndex() + : ES.EpilogueStartIndex()); ListScope Opcodes(SW, "Opcodes"); - decodeOpcodes(XData.UnwindByteCode(), ES.EpilogueStartIndex(), + decodeOpcodes(XData.UnwindByteCode(), + isAArch64 ? ES.EpilogueStartIndex() + : ES.EpilogueStartIndex(), /*Prologue=*/false); } } @@ -725,8 +1016,9 @@ } SW.printString("Function", formatSymbol(FunctionName, FunctionAddress)); - SW.printBoolean("Fragment", - RF.Flag() == RuntimeFunctionFlag::RFF_PackedFragment); + if (!isAArch64) + SW.printBoolean("Fragment", + RF.Flag() == RuntimeFunctionFlag::RFF_PackedFragment); SW.printNumber("FunctionLength", RF.FunctionLength()); SW.startLine() << "ReturnType: " << RF.Ret() << '\n'; SW.printBoolean("HomedParameters", RF.H()); @@ -749,6 +1041,7 @@ DictScope RFS(SW, "RuntimeFunction"); if (Entry.Flag() == RuntimeFunctionFlag::RFF_Unpacked) return dumpUnpackedEntry(COFF, Section, Offset, Index, Entry); + assert(!isAArch64 && "Packed unwind data not yet supported for ARM64"); return dumpPackedEntry(COFF, Section, Offset, Index, Entry); } Index: tools/llvm-readobj/COFFDumper.cpp =================================================================== --- tools/llvm-readobj/COFFDumper.cpp +++ tools/llvm-readobj/COFFDumper.cpp @@ -1545,8 +1545,10 @@ Dumper.printData(Ctx); break; } + case COFF::IMAGE_FILE_MACHINE_ARM64: case COFF::IMAGE_FILE_MACHINE_ARMNT: { - ARM::WinEH::Decoder Decoder(W); + ARM::WinEH::Decoder Decoder(W, Obj->getMachine() == + COFF::IMAGE_FILE_MACHINE_ARM64); Decoder.dumpProcedureData(*Obj); break; }