Index: llvm/trunk/lib/Target/X86/X86.td =================================================================== --- llvm/trunk/lib/Target/X86/X86.td +++ llvm/trunk/lib/Target/X86/X86.td @@ -449,6 +449,7 @@ include "X86SchedBroadwell.td" include "X86ScheduleSLM.td" include "X86ScheduleZnver1.td" +include "X86ScheduleBdVer2.td" include "X86ScheduleBtVer2.td" include "X86SchedSkylakeClient.td" include "X86SchedSkylakeServer.td" @@ -1010,7 +1011,7 @@ ]>; // Bulldozer -def : Proc<"bdver1", [ +def : ProcessorModel<"bdver1", BdVer2Model, [ FeatureX87, FeatureCMOV, FeatureXOP, @@ -1035,7 +1036,7 @@ FeatureMacroFusion ]>; // Piledriver -def : Proc<"bdver2", [ +def : ProcessorModel<"bdver2", BdVer2Model, [ FeatureX87, FeatureCMOV, FeatureXOP, Index: llvm/trunk/lib/Target/X86/X86PfmCounters.td =================================================================== --- llvm/trunk/lib/Target/X86/X86PfmCounters.td +++ llvm/trunk/lib/Target/X86/X86PfmCounters.td @@ -91,6 +91,18 @@ } def : PfmCountersBinding<"skylake-avx512", SkylakeServerPfmCounters>; +def BdVer2PfmCounters : ProcPfmCounters { + let CycleCounter = PfmCounter<"cpu_clk_unhalted">; + let UopsCounter = PfmCounter<"retired_uops">; + let IssueCounters = [ + PfmIssueCounter<"PdFPU0", "dispatched_fpu_ops:ops_pipe0 + dispatched_fpu_ops:ops_dual_pipe0">, + PfmIssueCounter<"PdFPU1", "dispatched_fpu_ops:ops_pipe1 + dispatched_fpu_ops:ops_dual_pipe1">, + PfmIssueCounter<"PdFPU2", "dispatched_fpu_ops:ops_pipe2 + dispatched_fpu_ops:ops_dual_pipe2">, + PfmIssueCounter<"PdFPU3", "dispatched_fpu_ops:ops_pipe3 + dispatched_fpu_ops:ops_dual_pipe3"> + ]; +} +def : PfmCountersBinding<"bdver2", BdVer2PfmCounters>; + def BtVer2PfmCounters : ProcPfmCounters { let CycleCounter = PfmCounter<"cpu_clk_unhalted">; let UopsCounter = PfmCounter<"retired_uops">; Index: llvm/trunk/lib/Target/X86/X86ScheduleBdVer2.td =================================================================== --- llvm/trunk/lib/Target/X86/X86ScheduleBdVer2.td +++ llvm/trunk/lib/Target/X86/X86ScheduleBdVer2.td @@ -0,0 +1,1278 @@ +//=- X86ScheduleBdVer2.td - X86 BdVer2 (Piledriver) Scheduling * tablegen -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the machine model for AMD bdver2 (Piledriver) to support +// instruction scheduling and other instruction cost heuristics. +// Based on: +// * AMD Software Optimization Guide for AMD Family 15h Processors. +// https://support.amd.com/TechDocs/47414_15h_sw_opt_guide.pdf +// * The microarchitecture of Intel, AMD and VIA CPUs, By Agner Fog +// http://www.agner.org/optimize/microarchitecture.pdf +// * https://www.realworldtech.com/bulldozer/ +// Yes, that is for Bulldozer aka bdver1, not Piledriver aka bdver2. +// +//===----------------------------------------------------------------------===// + +def BdVer2Model : SchedMachineModel { + let IssueWidth = 4; // Up to 4 IPC can be decoded, issued, retired. + let MicroOpBufferSize = 128; // RCU reorder buffer size, which is unconfirmed. + let LoopMicroOpBufferSize = -1; // There does not seem to be a loop buffer. + let LoadLatency = 4; // L1 data cache has a 4-cycle load-to-use latency. + let HighLatency = 25; // FIXME: any better choice? + let MispredictPenalty = 20; // Minimum branch misdirection penalty. + + let PostRAScheduler = 1; // Enable Post RegAlloc Scheduler pass. + + // FIXME: Incomplete. This flag is set to allow the scheduler to assign + // a default model to unrecognized opcodes. + let CompleteModel = 0; +} // SchedMachineModel + +let SchedModel = BdVer2Model in { + + +//===----------------------------------------------------------------------===// +// Pipes +//===----------------------------------------------------------------------===// + +// There are total of eight pipes. + +//===----------------------------------------------------------------------===// +// Integer execution pipes +// + +// Two EX (ALU) pipes. +def PdEX0 : ProcResource<1>; // ALU, Integer Pipe0 +def PdEX1 : ProcResource<1>; // ALU, Integer Pipe1 +def PdEX01 : ProcResGroup<[PdEX0, PdEX1]>; + +// Two AGLU pipes, identical. +def PdAGLU01 : ProcResource<2>; // AGU, Integer Pipe[23] + +//===----------------------------------------------------------------------===// +// Floating point execution pipes +// + +// Four FPU pipes. + +def PdFPU0 : ProcResource<1>; // Vector/FPU Pipe0 +def PdFPU1 : ProcResource<1>; // Vector/FPU Pipe1 +def PdFPU2 : ProcResource<1>; // Vector/FPU Pipe2 +def PdFPU3 : ProcResource<1>; // Vector/FPU Pipe3 + +// FPU grouping +def PdFPU01 : ProcResGroup<[PdFPU0, PdFPU1]>; +def PdFPU23 : ProcResGroup<[PdFPU2, PdFPU3]>; + + +//===----------------------------------------------------------------------===// +// RCU +//===----------------------------------------------------------------------===// + +// The Retire Control Unit on Piledriver can retire up to 4 macro-ops per cycle. +// On the other hand, the RCU reorder buffer size for Piledriver does not +// seem be specified in any trustworthy source. +// But as per https://www.realworldtech.com/bulldozer/6/ the Bulldozer had +// RCU reorder buffer size of 128. So that is a good guess for now. +def PdRCU : RetireControlUnit<128, 4>; + + +//===----------------------------------------------------------------------===// +// Pipelines +//===----------------------------------------------------------------------===// + +// There are total of two pipelines, each one with it's own scheduler. + +//===----------------------------------------------------------------------===// +// Integer Pipeline Scheduling +// + +// There is one Integer Scheduler per core. + +// Integer physical register file has 96 registers of 64-bit. +def PdIntegerPRF : RegisterFile<96, [GR64, CCR]>; + +// Unified Integer, Memory Scheduler has 40 entries. +def PdEX : ProcResGroup<[PdEX0, PdEX1, PdAGLU01]> { + // Up to 4 IPC can be decoded, issued, retired. + let BufferSize = 40; +} + + +//===----------------------------------------------------------------------===// +// FPU Pipeline Scheduling +// + +// The FPU unit is shared between the two cores. + +// FP physical register file has 160 registers of 128-bit. +// Operations on 256-bit data types are cracked into two COPs. +def PdFpuPRF : RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>; + +// Unified FP Scheduler has 64 entries, +def PdFPU : ProcResGroup<[PdFPU0, PdFPU1, PdFPU2, PdFPU3]> { + // Up to 4 IPC can be decoded, issued, retired. + let BufferSize = 64; +} + + +//===----------------------------------------------------------------------===// +// Functional units +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Load-Store Units +// + +// FIXME: does this even make sense? + +def PdLoad : ProcResGroup<[PdAGLU01]> { + // For Piledriver, the load queue is 40 entries deep. + let BufferSize = 40; +} + +def PdStore : ProcResGroup<[PdAGLU01]> { + // For Piledriver, the store queue is 24 entries deep. + let BufferSize = 24; +} + +//===----------------------------------------------------------------------===// +// Integer Execution Units +// + +def PdDiv : ProcResource<1>; // PdEX0; unpipelined integer division +def PdCount : ProcResource<1>; // PdEX0; POPCNT, LZCOUNT + +def PdMul : ProcResource<1>; // PdEX1; integer multiplication +def PdBranch : ProcResource<1>; // PdEX1; JMP, fused branches + +//===----------------------------------------------------------------------===// +// Floating-Point Units +// + +// Two FMAC/FPFMA units. +def PdFPFMA : ProcResource<2>; // PdFPU0, PdFPU1 + +// One 128-bit integer multiply-accumulate unit. +def PdFPMMA : ProcResource<1>; // PdFPU0 + +// One fp conversion unit. +def PdFPCVT : ProcResource<1>; // PdFPU0 + +// One unit for shuffles, packs, permutes, shifts. +def PdFPXBR : ProcResource<1>; // PdFPU1 + +// Two 128-bit packed integer units. +def PdFPMAL : ProcResource<2>; // PdFPU2, PdFPU3 + +// One FP store unit. +def PdFPSTO : ProcResource<1>; // PdFPU3 + + +//===----------------------------------------------------------------------===// +// Basic helper classes. +//===----------------------------------------------------------------------===// + +// Many SchedWrites are defined in pairs with and without a folded load. +// Instructions with folded loads are usually micro-fused, so they only appear +// as two micro-ops when dispatched by the schedulers. +// This multiclass defines the resource usage for variants with and without +// folded loads. +multiclass PdWriteRes ExePorts, int Lat = 1, + list Res = [], int UOps = 1> { + def : WriteRes { + let Latency = Lat; + let ResourceCycles = Res; + let NumMicroOps = UOps; + } +} + +multiclass __pdWriteResPair ExePorts, int Lat, + list Res, int UOps, + int LoadLat, int LoadRes, int LoadUOps> { + defm : PdWriteRes; + + defm : PdWriteRes; +} + +multiclass PdWriteResExPair ExePorts, int Lat = 1, + list Res = [], int UOps = 1, + int LoadUOps = 0> { + defm : __pdWriteResPair; +} + +multiclass PdWriteResXMMPair ExePorts, int Lat = 1, + list Res = [], int UOps = 1, + int LoadUOps = 0> { + defm : __pdWriteResPair; +} + +multiclass PdWriteResYMMPair ExePorts, int Lat, + list Res, int UOps = 2, + int LoadUOps = 0> { + defm : __pdWriteResPair; +} + +//===----------------------------------------------------------------------===// +// Here be dragons. +//===----------------------------------------------------------------------===// + +// L1 data cache has a 4-cycle load-to-use latency, so ReadAfterLd registers +// needn't be available until 4 cycles after the memory operand. +def : ReadAdvance; + +// Vector loads are 5 cycles, so ReadAfterVec*Ld registers needn't be available +// until 5 cycles after the memory operand. +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; + +// A folded store needs a cycle on the PdStore for the store data. +def : WriteRes; + +//////////////////////////////////////////////////////////////////////////////// +// Loads, stores, and moves, not folded with other operations. +//////////////////////////////////////////////////////////////////////////////// + +def : WriteRes { let Latency = 5; } +def : WriteRes; +def : WriteRes; +def : WriteRes; + +// Load/store MXCSR. +// FIXME: These are copy and pasted from WriteLoad/Store. +def : WriteRes { let Latency = 5; } +def : WriteRes { let NumMicroOps = 2; } + +// Treat misc copies as a move. +def : InstRW<[WriteMove], (instrs COPY)>; + +//////////////////////////////////////////////////////////////////////////////// +// Idioms that clear a register, like xorps %xmm0, %xmm0. +// These can often bypass execution ports completely. +//////////////////////////////////////////////////////////////////////////////// + +def : WriteRes; + +//////////////////////////////////////////////////////////////////////////////// +// Branches don't produce values, so they have no latency, but they still +// consume resources. Indirect branches can fold loads. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResExPair; + +//////////////////////////////////////////////////////////////////////////////// +// Special case scheduling classes. +//////////////////////////////////////////////////////////////////////////////// + +def : WriteRes { let Latency = 100; } +def : WriteRes { let Latency = 100; } +def : WriteRes; + +def PdWriteXLAT : SchedWriteRes<[PdEX01]> { + let Latency = 6; +} +def : InstRW<[PdWriteXLAT], (instrs XLAT)>; + +def PdWriteLARrr : SchedWriteRes<[PdEX01]> { + let Latency = 184; + let NumMicroOps = 45; +} +def : InstRW<[PdWriteLARrr], (instregex "LAR(16|32|64)rr", + "LSL(16|32|64)rr")>; + +// Nops don't have dependencies, so there's no actual latency, but we set this +// to '1' to tell the scheduler that the nop uses an ALU slot for a cycle. +def : WriteRes; + +//////////////////////////////////////////////////////////////////////////////// +// Arithmetic. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResExPair; + +def PdWriteLXADD : SchedWriteRes<[PdEX01]> { + let Latency = 6; + let NumMicroOps = 4; +} +def : InstRW<[PdWriteLXADD], (instrs LXADD8, LXADD16, LXADD32, LXADD64)>; + +def PdWriteBMI1 : SchedWriteRes<[PdEX01]> { + let Latency = 2; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteBMI1], + (instrs BLCFILL32rr, BLCFILL64rr, BLCI32rr, BLCI64rr, + BLCIC32rr, BLCIC64rr, BLCMSK32rr, BLCMSK64rr, + BLCS32rr, BLCS64rr, BLSFILL32rr, BLSFILL64rr, + BLSIC32rr, BLSIC64rr, T1MSKC32rr, T1MSKC64rr, + TZMSK32rr, TZMSK64rr)>; + +def PdWriteBMI1m : SchedWriteRes<[PdEX01]> { + let Latency = 6; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteBMI1m], + (instrs BLCFILL32rm, BLCFILL64rm, BLCI32rm, BLCI64rm, + BLCIC32rm, BLCIC64rm, BLCMSK32rm, BLCMSK64rm, + BLCS32rm, BLCS64rm, BLSFILL32rm, BLSFILL64rm, + BLSIC32rm, BLSIC64rm, T1MSKC32rm, T1MSKC64rm, + TZMSK32rm, TZMSK64rm)>; + +defm : PdWriteResExPair; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +def PdWriteCMPXCHG8rr : SchedWriteRes<[PdEX1]> { + let Latency = 3; + let NumMicroOps = 3; +} +def : InstRW<[PdWriteCMPXCHG8rr], (instrs CMPXCHG8rr)>; + +def PdWriteCMPXCHG8rm : SchedWriteRes<[PdEX1]> { + let Latency = 3; + let NumMicroOps = 5; +} +def : InstRW<[PdWriteCMPXCHG8rm], (instrs CMPXCHG8rm)>; + +def PdWriteCMPXCHG16rm_CMPXCHG32rm_CMPXCHG64rm : SchedWriteRes<[PdEX1]> { + let Latency = 3; + let NumMicroOps = 6; +} +def : InstRW<[PdWriteCMPXCHG16rm_CMPXCHG32rm_CMPXCHG64rm], + (instrs CMPXCHG16rm, CMPXCHG32rm, CMPXCHG64rm)>; + +def PdWriteCMPXCHG8B : SchedWriteRes<[PdEX1]> { + let Latency = 3; + let NumMicroOps = 18; +} +def : InstRW<[PdWriteCMPXCHG8B], (instrs CMPXCHG8B)>; + +def PdWriteCMPXCHG16B : SchedWriteRes<[PdEX1]> { + let Latency = 3; + let NumMicroOps = 22; +} +def : InstRW<[PdWriteCMPXCHG16B], (instrs CMPXCHG16B)>; + +def PdWriteXCHG16rr : SchedWriteRes<[PdEX1]> { + let Latency = 2; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteXCHG16rr], (instrs XCHG16rr)>; + +def PdWriteXADD : SchedWriteRes<[PdEX1]> { + let Latency = 2; + let NumMicroOps = 4; +} +def : InstRW<[PdWriteXADD], (instrs XADD8rr, XADD16rr, XADD32rr, XADD64rr)>; + +def PdWriteXADDm : SchedWriteRes<[PdEX1]> { +let Latency = 6; +let NumMicroOps = 4; +} +def : InstRW<[PdWriteXADDm], (instrs XADD8rm, XADD16rm, XADD32rm, XADD64rm)>; + +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : X86WriteResUnsupported; // BMI2 MULX + +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; + +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; + +defm : PdWriteResExPair; + +def PdWriteCRC32r32r16 : SchedWriteRes<[PdEX01]> { + let Latency = 5; + let ResourceCycles = [4]; + let NumMicroOps = 5; +} +def : InstRW<[PdWriteCRC32r32r16], (instrs CRC32r32r16)>; + +def PdWriteCRC32r32r32 : SchedWriteRes<[PdEX01]> { + let Latency = 6; + let ResourceCycles = [4]; + let NumMicroOps = 7; +} +def : InstRW<[PdWriteCRC32r32r32], (instrs CRC32r32r32)>; + +def PdWriteCRC32r64r64 : SchedWriteRes<[PdEX01]> { + let Latency = 10; + let ResourceCycles = [4]; + let NumMicroOps = 11; +} +def : InstRW<[PdWriteCRC32r64r64], (instrs CRC32r64r64)>; + +defm : PdWriteResExPair; // Conditional move. +defm : PdWriteResExPair; // Conditional (CF + ZF flag) move. + +def : InstRW<[WriteCMOV2.Folded], (instrs CMOVG16rm, CMOVG32rm, CMOVG64rm, + CMOVGE16rm, CMOVGE32rm, CMOVGE64rm, + CMOVL16rm, CMOVL32rm, CMOVL64rm, + CMOVLE16rm, CMOVLE32rm, CMOVLE64rm)>; + +defm : PdWriteRes; // x87 conditional move. + +def : WriteRes; // Setcc. +def : WriteRes; + +def PdWriteSETGEmSETGmSETLEmSETLm : SchedWriteRes<[PdEX01]> { + let ResourceCycles = [2]; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteSETGEmSETGmSETLEmSETLm], (instrs SETGEm, SETGm, + SETLEm, SETLm)>; + +defm : PdWriteRes; + +def WriteLAHF : SchedWriteRes<[PdEX01]> { + let Latency = 2; + let NumMicroOps = 4; +} +def : InstRW<[WriteLAHF], (instrs LAHF)>; + +def WriteSAHF : SchedWriteRes<[PdEX01]> { + let Latency = 2; + let NumMicroOps = 2; +} +def : InstRW<[WriteSAHF], (instrs SAHF)>; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +// This is for simple LEAs with one or two input operands. +// FIXME: SAGU 3-operand LEA +def : WriteRes { let NumMicroOps = 2; } + +// Bit counts. +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; + +// BMI1 BEXTR, BMI2 BZHI +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; + +//////////////////////////////////////////////////////////////////////////////// +// Integer shifts and rotates. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; +defm : PdWriteResExPair; + +def PdWriteRCL8rCL : SchedWriteRes<[PdEX01]> { + let Latency = 12; + let NumMicroOps = 26; +} +def : InstRW<[PdWriteRCL8rCL], (instrs RCL8rCL)>; + +def PdWriteRCR8ri : SchedWriteRes<[PdEX01]> { + let Latency = 12; + let NumMicroOps = 23; +} +def : InstRW<[PdWriteRCR8ri], (instrs RCR8ri)>; + +def PdWriteRCR8rCL : SchedWriteRes<[PdEX01]> { + let Latency = 11; + let NumMicroOps = 24; +} +def : InstRW<[PdWriteRCR8rCL], (instrs RCR8rCL)>; + +def PdWriteRCL16rCL : SchedWriteRes<[PdEX01]> { + let Latency = 10; + let NumMicroOps = 22; +} +def : InstRW<[PdWriteRCL16rCL], (instrs RCL16rCL)>; + +def PdWriteRCR16ri : SchedWriteRes<[PdEX01]> { + let Latency = 10; + let NumMicroOps = 19; +} +def : InstRW<[PdWriteRCR16ri], (instrs RCR16ri)>; + +def PdWriteRCL32rCLRCL64rCL : SchedWriteRes<[PdEX01]> { + let Latency = 7; + let NumMicroOps = 17; +} +def : InstRW<[PdWriteRCL32rCLRCL64rCL], (instrs RCL32rCL, RCL64rCL)>; + +def PdWriteRCR64rCL : SchedWriteRes<[PdEX01]> { + let Latency = 7; + let NumMicroOps = 16; +} +def : InstRW<[PdWriteRCR64rCL], (instrs RCR64rCL)>; + +def PdWriteRCR32rCL : SchedWriteRes<[PdEX01]> { + let Latency = 7; + let NumMicroOps = 16; +} +def : InstRW<[PdWriteRCR32rCL ], (instrs RCR32rCL)>; + +def PdWriteRCR32riRCR64ri : SchedWriteRes<[PdEX01]> { + let Latency = 7; + let NumMicroOps = 15; +} +def : InstRW<[PdWriteRCR32riRCR64ri], (instrs RCR32ri, RCR64ri)>; + + +def PdWriteRCR16rCL : SchedWriteRes<[PdEX01]> { + let Latency = 9; + let NumMicroOps = 20; +} +def : InstRW<[PdWriteRCR16rCL], (instrs RCR16rCL)>; + +def PdWriteRCL16ri : SchedWriteRes<[PdEX01]> { + let Latency = 11; + let NumMicroOps = 21; +} +def : InstRW<[PdWriteRCL16ri], (instrs RCL16ri)>; + +def PdWriteRCL3264ri : SchedWriteRes<[PdEX01]> { + let Latency = 8; + let NumMicroOps = 16; +} +def : InstRW<[PdWriteRCL3264ri], (instrs RCL32ri, RCL64ri)>; + +def PdWriteRCL8ri : SchedWriteRes<[PdEX01]> { + let Latency = 13; + let NumMicroOps = 25; +} +def : InstRW<[PdWriteRCL8ri], (instrs RCL8ri)>; + +// SHLD/SHRD. +defm : PdWriteRes; +defm : PdWriteRes; + +def PdWriteSHLD32rri8SHRD16rri8 : SchedWriteRes<[PdEX01]> { + let Latency = 3; + let ResourceCycles = [6]; + let NumMicroOps = 6; +} +def : InstRW<[PdWriteSHLD32rri8SHRD16rri8 ], (instrs SHLD32rri8, SHRD16rri8)>; + +def PdWriteSHLD16rrCLSHLD32rrCLSHRD32rrCL : SchedWriteRes<[PdEX01]> { + let Latency = 4; + let ResourceCycles = [8]; + let NumMicroOps = 7; +} +def : InstRW<[PdWriteSHLD16rrCLSHLD32rrCLSHRD32rrCL], (instrs SHLD16rrCL, + SHLD32rrCL, + SHRD32rrCL)>; + +defm : PdWriteRes; +defm : PdWriteRes; + +//////////////////////////////////////////////////////////////////////////////// +// Floating point. This covers both scalar and vector operations. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +def PdWriteMOVHPm : SchedWriteRes<[PdStore, PdFPU1, PdFPSTO]> { + let Latency = 2; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteMOVHPm], (instrs MOVHPDmr, MOVHPSmr, VMOVHPDmr, VMOVHPSmr)>; + +def PdWriteVMOVUPDYmrVMOVUPSYmr : SchedWriteRes<[PdStore, PdFPU1, PdFPSTO]> { + let NumMicroOps = 8; +} +def : InstRW<[PdWriteVMOVUPDYmrVMOVUPSYmr], (instrs VMOVUPDYmr, VMOVUPSYmr)>; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; + +def PdWriteFCOMPm : SchedWriteRes<[PdFPU1, PdFPFMA]> { + let Latency = 6; +} +def : InstRW<[PdWriteFCOMPm], (instrs FCOM32m, FCOM64m, FCOMP32m, FCOMP64m)>; + +def PdWriteTST_F_UCOM_FPPr : SchedWriteRes<[PdFPU1, PdFPFMA]>; +def : InstRW<[PdWriteTST_F_UCOM_FPPr], (instrs TST_F, UCOM_FPPr)>; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + + +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +def PdWriteVDPPSrri : SchedWriteRes<[PdFPU1, PdFPFMA]> { + let Latency = 25; + let ResourceCycles = [1, 3]; + let NumMicroOps = 17; +} +def : InstRW<[PdWriteVDPPSrri], (instrs VDPPSrri)>; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +def PdWriteVFRCZ : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 10; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteVFRCZ], (instrs VFRCZPDrr, VFRCZPSrr, + VFRCZSDrr, VFRCZSSrr)>; + +def PdWriteVFRCZm : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 15; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteVFRCZm], (instrs VFRCZPDrm, VFRCZPSrm, + VFRCZSDrm, VFRCZSSrm)>; + +def PdWriteVFRCZY : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 10; + let ResourceCycles = [2, 1]; + let NumMicroOps = 4; +} +def : InstRW<[PdWriteVFRCZY], (instrs VFRCZPSYrr, VFRCZPDYrr)>; + +def PdWriteVFRCZYm : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 15; + let ResourceCycles = [2, 1]; + let NumMicroOps = 8; +} +def : InstRW<[PdWriteVFRCZYm], (instrs VFRCZPSYrm, VFRCZPDYrm)>; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +def PdWriteVBROADCASTF128 : SchedWriteRes<[PdFPU01, PdFPFMA]> { + let Latency = 7; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteVBROADCASTF128], (instrs VBROADCASTF128)>; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; + +def PdWriteVEXTRACTF128rr : SchedWriteRes<[PdFPU01, PdFPFMA]> { + let Latency = 2; +} +def : InstRW<[PdWriteVEXTRACTF128rr], (instrs VEXTRACTF128rr)>; + +def PdWriteVEXTRACTF128mr : SchedWriteRes<[PdFPU01, PdFPFMA]> { + let Latency = 7; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteVEXTRACTF128mr], (instrs VEXTRACTF128mr)>; + +def PdWriteVPERM2F128rr : SchedWriteRes<[PdFPU01, PdFPFMA]> { + let Latency = 4; + let NumMicroOps = 8; +} +def : InstRW<[PdWriteVPERM2F128rr], (instrs VPERM2F128rr)>; + +def PdWriteVPERM2F128rm : SchedWriteRes<[PdFPU01, PdFPFMA]> { + let Latency = 8; // 4 + 4 + let NumMicroOps = 10; +} +def : InstRW<[PdWriteVPERM2F128rm], (instrs VPERM2F128rm)>; + +//////////////////////////////////////////////////////////////////////////////// +// Conversions. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +def PdWriteMMX_CVTTPD2PIirr : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 6; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteMMX_CVTTPD2PIirr], (instrs MMX_CVTTPD2PIirr)>; + +// FIXME: f+3 ST, LD+STC latency +defm : PdWriteResXMMPair; +// FIXME: .Folded version is one NumMicroOp *less*.. + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +// FIXME: .Folded version is one NumMicroOp *less*.. + +def WriteCVTSI642SDrr : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 13; + let NumMicroOps = 2; +} +def : InstRW<[WriteCVTSI642SDrr], (instrs CVTSI642SDrr, CVTSI642SSrr)>; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +def WriteMMX_CVTPD2PIirrMMX_CVTPI2PDirr : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 6; + let NumMicroOps = 2; +} +def : InstRW<[WriteMMX_CVTPD2PIirrMMX_CVTPI2PDirr], (instrs MMX_CVTPD2PIirr, + MMX_CVTPI2PDirr)>; + +def WriteMMX_CVTPI2PSirr : SchedWriteRes<[PdFPU1, PdFPSTO]> { + let Latency = 4; + let NumMicroOps = 2; +} +def : InstRW<[WriteMMX_CVTPI2PSirr], (instrs MMX_CVTPI2PSirr)>; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : X86WriteResUnsupported; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : X86WriteResUnsupported; + +//////////////////////////////////////////////////////////////////////////////// +// Vector integer operations. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +def PdWriteVMOVDQUYmr : SchedWriteRes<[PdStore, PdFPU1, PdFPSTO]> { + let NumMicroOps = 8; +} +def : InstRW<[PdWriteVMOVDQUYmr], (instrs VMOVDQUYmr)>; + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +def JWriteVPMACS : SchedWriteRes<[PdFPU0, PdFPU01, PdFPMMA, PdFPMAL]> { + let Latency = 4; + let ResourceCycles = [2, 1, 2, 1]; +} +def : InstRW<[JWriteVPMACS], (instrs VPMACSDQHrr, VPMACSDQLrr, VPMACSSDQHrr, + VPMACSSDQLrr)>; + +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +//////////////////////////////////////////////////////////////////////////////// +// Vector insert/extract operations. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteRes; +defm : PdWriteRes; + +defm : PdWriteRes; +defm : PdWriteRes; + +def PdWriteEXTRQ : SchedWriteRes<[PdFPU01, PdFPMAL]> { + let Latency = 3; +} +def : InstRW<[PdWriteEXTRQ], (instrs EXTRQ, EXTRQI)>; + +//////////////////////////////////////////////////////////////////////////////// +// SSE42 String instructions. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; + +//////////////////////////////////////////////////////////////////////////////// +// MOVMSK Instructions. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteRes; + +defm : PdWriteRes; +defm : X86WriteResUnsupported; +// defm : X86WriteResUnsupported; + +defm : PdWriteRes; + +//////////////////////////////////////////////////////////////////////////////// +// AES Instructions. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; + +//////////////////////////////////////////////////////////////////////////////// +// Horizontal add/sub instructions. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResXMMPair; +defm : PdWriteResYMMPair; +defm : X86WriteResPairUnsupported; + +defm : PdWriteResXMMPair; +defm : PdWriteResXMMPair; +defm : X86WriteResPairUnsupported; +defm : X86WriteResPairUnsupported; + +def : InstRW<[WritePHAdd], (instrs PHADDDrr, PHSUBDrr, + PHADDWrr, PHSUBWrr, + PHADDSWrr, PHSUBSWrr, + VPHADDDrr, VPHSUBDrr, + VPHADDWrr, VPHSUBWrr, + VPHADDSWrr, VPHSUBSWrr)>; + +def : InstRW<[WritePHAdd.Folded], (instrs PHADDDrm, PHSUBDrm, + PHADDWrm, PHSUBWrm, + PHADDSWrm, PHSUBSWrm, + VPHADDDrm, VPHSUBDrm, + VPHADDWrm, VPHSUBWrm, + VPHADDSWrm, VPHSUBSWrm)>; + +//////////////////////////////////////////////////////////////////////////////// +// Carry-less multiplication instructions. +//////////////////////////////////////////////////////////////////////////////// + +defm : PdWriteResXMMPair; + +def PdWriteVPCLMULQDQrr : SchedWriteRes<[PdFPU0, PdFPMMA]> { + let Latency = 13; + let NumMicroOps = 6; +} +def : InstRW<[PdWriteVPCLMULQDQrr], (instrs VPCLMULQDQrr)>; + +//////////////////////////////////////////////////////////////////////////////// +// SSE4A instructions. +//////////////////////////////////////////////////////////////////////////////// + +def PdWriteINSERTQ : SchedWriteRes<[PdFPU01, PdFPMAL]> { + let Latency = 3; + let ResourceCycles = [1, 4]; +} +def : InstRW<[PdWriteINSERTQ], (instrs INSERTQ, INSERTQI)>; + +//////////////////////////////////////////////////////////////////////////////// +// AVX instructions. +//////////////////////////////////////////////////////////////////////////////// + +def PdWriteVBROADCASTYLd : SchedWriteRes<[PdLoad, PdFPU01, PdFPFMA]> { + let Latency = 6; + let ResourceCycles = [1, 2, 4]; + let NumMicroOps = 2; +} +def : InstRW<[PdWriteVBROADCASTYLd, ReadAfterLd], (instrs VBROADCASTSDYrm, + VBROADCASTSSYrm)>; + +def PdWriteVZEROALL : SchedWriteRes<[]> { + let Latency = 90; + let NumMicroOps = 32; +} +def : InstRW<[PdWriteVZEROALL], (instrs VZEROALL)>; + +def PdWriteVZEROUPPER : SchedWriteRes<[]> { + let Latency = 46; + let NumMicroOps = 16; +} +def : InstRW<[PdWriteVZEROUPPER], (instrs VZEROUPPER)>; + +/////////////////////////////////////////////////////////////////////////////// +// SchedWriteVariant definitions. +/////////////////////////////////////////////////////////////////////////////// + +def PdWriteZeroLatency : SchedWriteRes<[]> { + let Latency = 0; +} + +def PdWriteZeroIdiom : SchedWriteVariant<[ + SchedVar, [PdWriteZeroLatency]>, + SchedVar, [WriteALU]> +]>; +def : InstRW<[PdWriteZeroIdiom], (instrs SUB32rr, SUB64rr, + XOR32rr, XOR64rr)>; + +def PdWriteFZeroIdiom : SchedWriteVariant<[ + SchedVar, [PdWriteZeroLatency]>, + SchedVar, [WriteFLogic]> +]>; +def : InstRW<[PdWriteFZeroIdiom], (instrs XORPSrr, VXORPSrr, + XORPDrr, VXORPDrr, + ANDNPSrr, VANDNPSrr, + ANDNPDrr, VANDNPDrr)>; + +// VXORPSYrr, VXORPDYrr, VANDNPSYrr, VANDNPDYrr "zero-idioms" have latency of 1. + +def PdWriteVZeroIdiomLogic : SchedWriteVariant<[ + SchedVar, [PdWriteZeroLatency]>, + SchedVar, [WriteVecLogic]> +]>; +def : InstRW<[PdWriteVZeroIdiomLogic], (instrs MMX_PXORirr, MMX_PANDNirr)>; + +def PdWriteVZeroIdiomLogicX : SchedWriteVariant<[ + SchedVar, [PdWriteZeroLatency]>, + SchedVar, [WriteVecLogicX]> +]>; +def : InstRW<[PdWriteVZeroIdiomLogicX], (instrs PXORrr, VPXORrr, + PANDNrr, VPANDNrr)>; + +def PdWriteVZeroIdiomALU : SchedWriteVariant<[ + SchedVar, [PdWriteZeroLatency]>, + SchedVar, [WriteVecALU]> +]>; +def : InstRW<[PdWriteVZeroIdiomALU], (instrs MMX_PSUBBirr, MMX_PSUBDirr, + MMX_PSUBQirr, MMX_PSUBWirr, + MMX_PCMPGTBirr, + MMX_PCMPGTDirr, + MMX_PCMPGTWirr)>; + +def PdWriteVZeroIdiomALUX : SchedWriteVariant<[ + SchedVar, [PdWriteZeroLatency]>, + SchedVar, [WriteVecALUX]> +]>; +def : InstRW<[PdWriteVZeroIdiomALUX], (instrs PSUBBrr, VPSUBBrr, + PSUBDrr, VPSUBDrr, + PSUBQrr, VPSUBQrr, + PSUBWrr, VPSUBWrr, + PCMPGTBrr, VPCMPGTBrr, + PCMPGTDrr, VPCMPGTDrr, + PCMPGTWrr, VPCMPGTWrr)>; + +/////////////////////////////////////////////////////////////////////////////// +// Dependency breaking instructions. +/////////////////////////////////////////////////////////////////////////////// + +// VPCMPGTQ, but not PCMPGTQ! + +def : IsZeroIdiomFunction<[ + // GPR Zero-idioms. + DepBreakingClass<[ SUB32rr, SUB64rr, XOR32rr, XOR64rr ], ZeroIdiomPredicate>, + + // MMX Zero-idioms. + DepBreakingClass<[ + MMX_PXORirr, MMX_PANDNirr, MMX_PSUBBirr, + MMX_PSUBDirr, MMX_PSUBQirr, MMX_PSUBWirr, + MMX_PSUBSBirr, MMX_PSUBSWirr, MMX_PSUBUSBirr, MMX_PSUBUSWirr, + MMX_PCMPGTBirr, MMX_PCMPGTDirr, MMX_PCMPGTWirr + ], ZeroIdiomPredicate>, + + // SSE Zero-idioms. + DepBreakingClass<[ + // fp variants. + XORPSrr, XORPDrr, ANDNPSrr, ANDNPDrr, + + // int variants. + PXORrr, PANDNrr, + PSUBBrr, PSUBWrr, PSUBDrr, PSUBQrr, + PSUBSBrr, PSUBSWrr, PSUBUSBrr, PSUBUSWrr, + PCMPGTBrr, PCMPGTDrr, PCMPGTWrr + ], ZeroIdiomPredicate>, + + // AVX Zero-idioms. + DepBreakingClass<[ + // xmm fp variants. + VXORPSrr, VXORPDrr, VANDNPSrr, VANDNPDrr, + + // xmm int variants. + VPXORrr, VPANDNrr, + VPSUBBrr, VPSUBWrr, VPSUBDrr, VPSUBQrr, + VPSUBSBrr, VPSUBSWrr, VPSUBUSBrr, VPSUBUSWrr, + VPCMPGTBrr, VPCMPGTWrr, VPCMPGTDrr, VPCMPGTQrr, + + // ymm variants. + VXORPSYrr, VXORPDYrr, VANDNPSYrr, VANDNPDYrr + ], ZeroIdiomPredicate> +]>; + +def : IsDepBreakingFunction<[ + // GPR + DepBreakingClass<[ SBB32rr, SBB64rr ], ZeroIdiomPredicate>, + DepBreakingClass<[ CMP32rr, CMP64rr ], CheckSameRegOperand<0, 1> >, + + // MMX + DepBreakingClass<[ + MMX_PCMPEQBirr, MMX_PCMPEQDirr, MMX_PCMPEQWirr + ], ZeroIdiomPredicate>, + + // SSE + DepBreakingClass<[ + PCMPEQBrr, PCMPEQWrr, PCMPEQDrr + // But not PCMPEQQrr. + ], ZeroIdiomPredicate>, + + // AVX + DepBreakingClass<[ + VPCMPEQBrr, VPCMPEQWrr, VPCMPEQDrr + // But not VPCMPEQQrr. + ], ZeroIdiomPredicate> +]>; + + +} // SchedModel Index: llvm/trunk/test/CodeGen/X86/aes-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/aes-schedule.ll +++ llvm/trunk/test/CodeGen/X86/aes-schedule.ll @@ -14,8 +14,8 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=+aes,-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=+aes,-avx | FileCheck %s --check-prefixes=CHECK,SKX-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=+aes,-avx2 | FileCheck %s --check-prefixes=CHECK,SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+aes,-avx | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+aes,-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=+aes,-avx | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=+aes,-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=+aes,-avx | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=+aes,-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=+aes,-avx | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE @@ -96,15 +96,15 @@ ; ; BDVER2-SSE-LABEL: test_aesdec: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: aesdec %xmm1, %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: aesdec (%rdi), %xmm0 # sched: [13:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: aesdec %xmm1, %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: aesdec (%rdi), %xmm0 # sched: [14:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_aesdec: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaesdec (%rdi), %xmm0, %xmm0 # sched: [13:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaesdec %xmm1, %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: vaesdec (%rdi), %xmm0, %xmm0 # sched: [14:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_aesdec: ; BTVER2-SSE: # %bb.0: @@ -211,15 +211,15 @@ ; ; BDVER2-SSE-LABEL: test_aesdeclast: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: aesdeclast %xmm1, %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: aesdeclast (%rdi), %xmm0 # sched: [13:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: aesdeclast %xmm1, %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: aesdeclast (%rdi), %xmm0 # sched: [14:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_aesdeclast: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaesdeclast (%rdi), %xmm0, %xmm0 # sched: [13:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: vaesdeclast (%rdi), %xmm0, %xmm0 # sched: [14:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_aesdeclast: ; BTVER2-SSE: # %bb.0: @@ -326,15 +326,15 @@ ; ; BDVER2-SSE-LABEL: test_aesenc: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: aesenc %xmm1, %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: aesenc (%rdi), %xmm0 # sched: [13:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: aesenc %xmm1, %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: aesenc (%rdi), %xmm0 # sched: [14:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_aesenc: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaesenc (%rdi), %xmm0, %xmm0 # sched: [13:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaesenc %xmm1, %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: vaesenc (%rdi), %xmm0, %xmm0 # sched: [14:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_aesenc: ; BTVER2-SSE: # %bb.0: @@ -441,15 +441,15 @@ ; ; BDVER2-SSE-LABEL: test_aesenclast: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: aesenclast %xmm1, %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: aesenclast (%rdi), %xmm0 # sched: [13:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: aesenclast %xmm1, %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: aesenclast (%rdi), %xmm0 # sched: [14:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_aesenclast: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaesenclast (%rdi), %xmm0, %xmm0 # sched: [13:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: vaesenclast (%rdi), %xmm0, %xmm0 # sched: [14:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_aesenclast: ; BTVER2-SSE: # %bb.0: @@ -569,17 +569,17 @@ ; ; BDVER2-SSE-LABEL: test_aesimc: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: aesimc %xmm0, %xmm1 # sched: [12:2.00] -; BDVER2-SSE-NEXT: aesimc (%rdi), %xmm0 # sched: [18:2.00] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: aesimc %xmm0, %xmm1 # sched: [5:1.00] +; BDVER2-SSE-NEXT: aesimc (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_aesimc: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaesimc %xmm0, %xmm0 # sched: [12:2.00] -; BDVER2-NEXT: vaesimc (%rdi), %xmm1 # sched: [18:2.00] -; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaesimc (%rdi), %xmm1 # sched: [10:1.00] +; BDVER2-NEXT: vaesimc %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_aesimc: ; BTVER2-SSE: # %bb.0: @@ -703,17 +703,17 @@ ; ; BDVER2-SSE-LABEL: test_aeskeygenassist: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: aeskeygenassist $7, %xmm0, %xmm1 # sched: [8:3.67] -; BDVER2-SSE-NEXT: aeskeygenassist $7, (%rdi), %xmm0 # sched: [8:3.33] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: aeskeygenassist $7, %xmm0, %xmm1 # sched: [5:1.00] +; BDVER2-SSE-NEXT: aeskeygenassist $7, (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_aeskeygenassist: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # sched: [8:3.67] -; BDVER2-NEXT: vaeskeygenassist $7, (%rdi), %xmm1 # sched: [8:3.33] -; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaeskeygenassist $7, (%rdi), %xmm1 # sched: [10:1.00] +; BDVER2-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_aeskeygenassist: ; BTVER2-SSE: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/avx-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/avx-schedule.ll +++ llvm/trunk/test/CodeGen/X86/avx-schedule.ll @@ -6,7 +6,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell -mattr=-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -49,9 +49,9 @@ ; ; BDVER2-LABEL: test_addpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vaddpd (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_addpd: ; BTVER2: # %bb.0: @@ -109,9 +109,9 @@ ; ; BDVER2-LABEL: test_addps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddps (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vaddps (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_addps: ; BTVER2: # %bb.0: @@ -169,9 +169,9 @@ ; ; BDVER2-LABEL: test_addsubpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddsubpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vaddsubpd (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_addsubpd: ; BTVER2: # %bb.0: @@ -230,9 +230,9 @@ ; ; BDVER2-LABEL: test_addsubps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddsubps (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vaddsubps (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_addsubps: ; BTVER2: # %bb.0: @@ -297,10 +297,10 @@ ; ; BDVER2-LABEL: test_andnotpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandnpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vandnpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandnpd %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vandnpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_andnotpd: ; BTVER2: # %bb.0: @@ -373,10 +373,10 @@ ; ; BDVER2-LABEL: test_andnotps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandnps %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vandnps (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandnps %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vandnps (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_andnotps: ; BTVER2: # %bb.0: @@ -449,10 +449,10 @@ ; ; BDVER2-LABEL: test_andpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vandpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandpd %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vandpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_andpd: ; BTVER2: # %bb.0: @@ -523,10 +523,10 @@ ; ; BDVER2-LABEL: test_andps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandps %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vandps (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandps %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vandps (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_andps: ; BTVER2: # %bb.0: @@ -597,10 +597,10 @@ ; ; BDVER2-LABEL: test_blendpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3] sched: [1:0.50] -; BDVER2-NEXT: vblendpd {{.*#+}} ymm1 = ymm0[0,1],mem[2,3] sched: [8:0.50] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3] sched: [2:1.00] +; BDVER2-NEXT: vblendpd {{.*#+}} ymm1 = ymm0[0,1],mem[2,3] sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blendpd: ; BTVER2: # %bb.0: @@ -667,10 +667,10 @@ ; ; BDVER2-LABEL: test_blendps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3,4,5,6,7] sched: [1:0.50] -; BDVER2-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1],mem[2],ymm1[3],mem[4,5,6],ymm1[7] sched: [8:0.50] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3,4,5,6,7] sched: [2:1.00] +; BDVER2-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1],mem[2],ymm1[3],mem[4,5,6],ymm1[7] sched: [7:1.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blendps: ; BTVER2: # %bb.0: @@ -731,9 +731,9 @@ ; ; BDVER2-LABEL: test_blendvpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:1.00] -; BDVER2-NEXT: vblendvpd %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:3.00] +; BDVER2-NEXT: vblendvpd %ymm2, (%rdi), %ymm0, %ymm0 # sched: [7:3.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blendvpd: ; BTVER2: # %bb.0: @@ -792,9 +792,9 @@ ; ; BDVER2-LABEL: test_blendvps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:1.00] -; BDVER2-NEXT: vblendvps %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:3.00] +; BDVER2-NEXT: vblendvps %ymm2, (%rdi), %ymm0, %ymm0 # sched: [7:3.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blendvps: ; BTVER2: # %bb.0: @@ -847,8 +847,8 @@ ; ; BDVER2-LABEL: test_broadcastf128: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] sched: [7:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_broadcastf128: ; BTVER2: # %bb.0: @@ -897,8 +897,8 @@ ; ; BDVER2-LABEL: test_broadcastsd_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vbroadcastsd (%rdi), %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vbroadcastsd (%rdi), %ymm0 # sched: [6:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_broadcastsd_ymm: ; BTVER2: # %bb.0: @@ -948,8 +948,8 @@ ; ; BDVER2-LABEL: test_broadcastss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vbroadcastss (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vbroadcastss (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_broadcastss: ; BTVER2: # %bb.0: @@ -999,8 +999,8 @@ ; ; BDVER2-LABEL: test_broadcastss_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vbroadcastss (%rdi), %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vbroadcastss (%rdi), %ymm0 # sched: [6:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_broadcastss_ymm: ; BTVER2: # %bb.0: @@ -1062,10 +1062,10 @@ ; ; BDVER2-LABEL: test_cmppd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm1 # sched: [3:1.00] -; BDVER2-NEXT: vcmpeqpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: vorpd %ymm0, %ymm1, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm1 # sched: [2:2.00] +; BDVER2-NEXT: vcmpeqpd (%rdi), %ymm0, %ymm0 # sched: [7:2.00] +; BDVER2-NEXT: vorpd %ymm0, %ymm1, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmppd: ; BTVER2: # %bb.0: @@ -1135,10 +1135,10 @@ ; ; BDVER2-LABEL: test_cmpps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 # sched: [3:1.00] -; BDVER2-NEXT: vcmpeqps (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: vorps %ymm0, %ymm1, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 # sched: [2:2.00] +; BDVER2-NEXT: vcmpeqps (%rdi), %ymm0, %ymm0 # sched: [7:2.00] +; BDVER2-NEXT: vorps %ymm0, %ymm1, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmpps: ; BTVER2: # %bb.0: @@ -1208,10 +1208,10 @@ ; ; BDVER2-LABEL: test_cvtdq2pd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtdq2pd %xmm0, %ymm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvtdq2pd (%rdi), %ymm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtdq2pd (%rdi), %ymm1 # sched: [13:2.00] +; BDVER2-NEXT: vcvtdq2pd %xmm0, %ymm0 # sched: [8:2.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtdq2pd: ; BTVER2: # %bb.0: @@ -1280,10 +1280,10 @@ ; ; BDVER2-LABEL: test_cvtdq2ps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtdq2ps %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vcvtdq2ps (%rdi), %ymm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtdq2ps (%rdi), %ymm1 # sched: [9:2.00] +; BDVER2-NEXT: vcvtdq2ps %ymm0, %ymm0 # sched: [4:2.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtdq2ps: ; BTVER2: # %bb.0: @@ -1350,10 +1350,10 @@ ; ; BDVER2-LABEL: test_cvtpd2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtpd2dq %ymm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvtpd2dqy (%rdi), %xmm1 # sched: [11:1.00] -; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtpd2dqy (%rdi), %xmm1 # sched: [13:2.00] +; BDVER2-NEXT: vcvtpd2dq %ymm0, %xmm0 # sched: [8:2.00] +; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtpd2dq: ; BTVER2: # %bb.0: @@ -1421,10 +1421,10 @@ ; ; BDVER2-LABEL: test_cvttpd2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttpd2dq %ymm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvttpd2dqy (%rdi), %xmm1 # sched: [11:1.00] -; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttpd2dqy (%rdi), %xmm1 # sched: [13:2.00] +; BDVER2-NEXT: vcvttpd2dq %ymm0, %xmm0 # sched: [8:2.00] +; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvttpd2dq: ; BTVER2: # %bb.0: @@ -1491,10 +1491,10 @@ ; ; BDVER2-LABEL: test_cvtpd2ps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtpd2ps %ymm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvtpd2psy (%rdi), %xmm1 # sched: [11:1.00] -; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtpd2psy (%rdi), %xmm1 # sched: [13:2.00] +; BDVER2-NEXT: vcvtpd2ps %ymm0, %xmm0 # sched: [8:2.00] +; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtpd2ps: ; BTVER2: # %bb.0: @@ -1561,10 +1561,10 @@ ; ; BDVER2-LABEL: test_cvtps2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtps2dq %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vcvtps2dq (%rdi), %ymm1 # sched: [10:1.00] -; BDVER2-NEXT: vorpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtps2dq (%rdi), %ymm1 # sched: [9:2.00] +; BDVER2-NEXT: vcvtps2dq %ymm0, %ymm0 # sched: [4:2.00] +; BDVER2-NEXT: vorpd %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtps2dq: ; BTVER2: # %bb.0: @@ -1632,10 +1632,10 @@ ; ; BDVER2-LABEL: test_cvttps2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttps2dq %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vcvttps2dq (%rdi), %ymm1 # sched: [10:1.00] -; BDVER2-NEXT: vorps %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttps2dq (%rdi), %ymm1 # sched: [9:2.00] +; BDVER2-NEXT: vcvttps2dq %ymm0, %ymm0 # sched: [4:2.00] +; BDVER2-NEXT: vorps %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvttps2dq: ; BTVER2: # %bb.0: @@ -1696,9 +1696,9 @@ ; ; BDVER2-LABEL: test_divpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdivpd %ymm1, %ymm0, %ymm0 # sched: [45:44.00] -; BDVER2-NEXT: vdivpd (%rdi), %ymm0, %ymm0 # sched: [52:44.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdivpd %ymm1, %ymm0, %ymm0 # sched: [9:19.00] +; BDVER2-NEXT: vdivpd (%rdi), %ymm0, %ymm0 # sched: [14:19.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_divpd: ; BTVER2: # %bb.0: @@ -1756,9 +1756,9 @@ ; ; BDVER2-LABEL: test_divps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdivps %ymm1, %ymm0, %ymm0 # sched: [29:28.00] -; BDVER2-NEXT: vdivps (%rdi), %ymm0, %ymm0 # sched: [36:28.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdivps %ymm1, %ymm0, %ymm0 # sched: [9:19.00] +; BDVER2-NEXT: vdivps (%rdi), %ymm0, %ymm0 # sched: [14:19.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_divps: ; BTVER2: # %bb.0: @@ -1816,9 +1816,9 @@ ; ; BDVER2-LABEL: test_dpps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 # sched: [12:2.00] -; BDVER2-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [19:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 # sched: [27:3.00] +; BDVER2-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [32:3.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_dpps: ; BTVER2: # %bb.0: @@ -1883,10 +1883,10 @@ ; ; BDVER2-LABEL: test_extractf128: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vextractf128 $1, %ymm1, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vextractf128 $1, %ymm1, (%rdi) # sched: [7:0.50] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_extractf128: ; BTVER2: # %bb.0: @@ -1945,9 +1945,9 @@ ; ; BDVER2-LABEL: test_haddpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] -; BDVER2-NEXT: vhaddpd (%rdi), %ymm0, %ymm0 # sched: [12:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 # sched: [11:2.00] +; BDVER2-NEXT: vhaddpd (%rdi), %ymm0, %ymm0 # sched: [16:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_haddpd: ; BTVER2: # %bb.0: @@ -2006,9 +2006,9 @@ ; ; BDVER2-LABEL: test_haddps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] -; BDVER2-NEXT: vhaddps (%rdi), %ymm0, %ymm0 # sched: [12:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhaddps %ymm1, %ymm0, %ymm0 # sched: [11:2.00] +; BDVER2-NEXT: vhaddps (%rdi), %ymm0, %ymm0 # sched: [16:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_haddps: ; BTVER2: # %bb.0: @@ -2067,9 +2067,9 @@ ; ; BDVER2-LABEL: test_hsubpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] -; BDVER2-NEXT: vhsubpd (%rdi), %ymm0, %ymm0 # sched: [12:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 # sched: [11:2.00] +; BDVER2-NEXT: vhsubpd (%rdi), %ymm0, %ymm0 # sched: [16:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_hsubpd: ; BTVER2: # %bb.0: @@ -2128,9 +2128,9 @@ ; ; BDVER2-LABEL: test_hsubps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhsubps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] -; BDVER2-NEXT: vhsubps (%rdi), %ymm0, %ymm0 # sched: [12:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhsubps %ymm1, %ymm0, %ymm0 # sched: [11:2.00] +; BDVER2-NEXT: vhsubps (%rdi), %ymm0, %ymm0 # sched: [16:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_hsubps: ; BTVER2: # %bb.0: @@ -2195,10 +2195,10 @@ ; ; BDVER2-LABEL: test_insertf128: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 # sched: [1:1.00] +; BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 # sched: [2:0.50] ; BDVER2-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_insertf128: ; BTVER2: # %bb.0: @@ -2255,8 +2255,8 @@ ; ; BDVER2-LABEL: test_lddqu: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vlddqu (%rdi), %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vlddqu (%rdi), %ymm0 # sched: [5:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lddqu: ; BTVER2: # %bb.0: @@ -2317,10 +2317,10 @@ ; ; BDVER2-LABEL: test_maskmovpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaskmovpd (%rdi), %xmm0, %xmm2 # sched: [8:1.00] -; BDVER2-NEXT: vmaskmovpd %xmm1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: vmovapd %xmm2, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaskmovpd (%rdi), %xmm0, %xmm2 # sched: [6:1.00] +; BDVER2-NEXT: vmaskmovpd %xmm1, %xmm0, (%rdi) # sched: [6:2.00] +; BDVER2-NEXT: vmovapd %xmm2, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_maskmovpd: ; BTVER2: # %bb.0: @@ -2387,10 +2387,10 @@ ; ; BDVER2-LABEL: test_maskmovpd_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaskmovpd (%rdi), %ymm0, %ymm2 # sched: [9:1.00] -; BDVER2-NEXT: vmaskmovpd %ymm1, %ymm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: vmovapd %ymm2, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaskmovpd (%rdi), %ymm0, %ymm2 # sched: [6:2.00] +; BDVER2-NEXT: vmaskmovpd %ymm1, %ymm0, (%rdi) # sched: [6:2.00] +; BDVER2-NEXT: vmovapd %ymm2, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_maskmovpd_ymm: ; BTVER2: # %bb.0: @@ -2457,10 +2457,10 @@ ; ; BDVER2-LABEL: test_maskmovps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaskmovps (%rdi), %xmm0, %xmm2 # sched: [8:1.00] -; BDVER2-NEXT: vmaskmovps %xmm1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: vmovaps %xmm2, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaskmovps (%rdi), %xmm0, %xmm2 # sched: [6:1.00] +; BDVER2-NEXT: vmaskmovps %xmm1, %xmm0, (%rdi) # sched: [6:2.00] +; BDVER2-NEXT: vmovaps %xmm2, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_maskmovps: ; BTVER2: # %bb.0: @@ -2527,10 +2527,10 @@ ; ; BDVER2-LABEL: test_maskmovps_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaskmovps (%rdi), %ymm0, %ymm2 # sched: [9:1.00] -; BDVER2-NEXT: vmaskmovps %ymm1, %ymm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: vmovaps %ymm2, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaskmovps (%rdi), %ymm0, %ymm2 # sched: [6:2.00] +; BDVER2-NEXT: vmaskmovps %ymm1, %ymm0, (%rdi) # sched: [6:2.00] +; BDVER2-NEXT: vmovaps %ymm2, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_maskmovps_ymm: ; BTVER2: # %bb.0: @@ -2591,9 +2591,9 @@ ; ; BDVER2-LABEL: test_maxpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vmaxpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 # sched: [2:2.00] +; BDVER2-NEXT: vmaxpd (%rdi), %ymm0, %ymm0 # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_maxpd: ; BTVER2: # %bb.0: @@ -2652,9 +2652,9 @@ ; ; BDVER2-LABEL: test_maxps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaxps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vmaxps (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaxps %ymm1, %ymm0, %ymm0 # sched: [2:2.00] +; BDVER2-NEXT: vmaxps (%rdi), %ymm0, %ymm0 # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_maxps: ; BTVER2: # %bb.0: @@ -2713,9 +2713,9 @@ ; ; BDVER2-LABEL: test_minpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vminpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vminpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vminpd %ymm1, %ymm0, %ymm0 # sched: [2:2.00] +; BDVER2-NEXT: vminpd (%rdi), %ymm0, %ymm0 # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_minpd: ; BTVER2: # %bb.0: @@ -2774,9 +2774,9 @@ ; ; BDVER2-LABEL: test_minps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vminps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vminps (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vminps %ymm1, %ymm0, %ymm0 # sched: [2:2.00] +; BDVER2-NEXT: vminps (%rdi), %ymm0, %ymm0 # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_minps: ; BTVER2: # %bb.0: @@ -2841,10 +2841,10 @@ ; ; BDVER2-LABEL: test_movapd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovapd (%rdi), %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovapd (%rdi), %ymm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [5:2.00] ; BDVER2-NEXT: vmovapd %ymm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movapd: ; BTVER2: # %bb.0: @@ -2910,10 +2910,10 @@ ; ; BDVER2-LABEL: test_movaps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps (%rdi), %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovaps (%rdi), %ymm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [5:2.00] ; BDVER2-NEXT: vmovaps %ymm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movaps: ; BTVER2: # %bb.0: @@ -2979,10 +2979,10 @@ ; ; BDVER2-LABEL: test_movddup: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] sched: [1:1.00] -; BDVER2-NEXT: vmovddup {{.*#+}} ymm1 = mem[0,0,2,2] sched: [7:0.50] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovddup {{.*#+}} ymm1 = mem[0,0,2,2] sched: [7:1.00] +; BDVER2-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] sched: [2:1.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movddup: ; BTVER2: # %bb.0: @@ -3043,9 +3043,9 @@ ; ; BDVER2-LABEL: test_movmskpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovmskpd %ymm0, %eax # sched: [2:1.00] -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovmskpd %ymm0, %eax # sched: [10:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movmskpd: ; BTVER2: # %bb.0: @@ -3101,9 +3101,9 @@ ; ; BDVER2-LABEL: test_movmskps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovmskps %ymm0, %eax # sched: [2:1.00] -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovmskps %ymm0, %eax # sched: [10:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movmskps: ; BTVER2: # %bb.0: @@ -3172,10 +3172,10 @@ ; BDVER2-LABEL: test_movntdq: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: vmovntdq %ymm0, (%rdi) # sched: [1:1.00] +; BDVER2-NEXT: vmovntdq %ymm0, (%rdi) # sched: [2:2.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movntdq: ; BTVER2: # %bb.0: @@ -3234,9 +3234,9 @@ ; ; BDVER2-LABEL: test_movntpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovntpd %ymm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vmovntpd %ymm0, (%rdi) # sched: [3:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movntpd: ; BTVER2: # %bb.0: @@ -3293,9 +3293,9 @@ ; ; BDVER2-LABEL: test_movntps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovntps %ymm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vmovntps %ymm0, (%rdi) # sched: [3:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movntps: ; BTVER2: # %bb.0: @@ -3358,10 +3358,10 @@ ; ; BDVER2-LABEL: test_movshdup: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] sched: [1:1.00] -; BDVER2-NEXT: vmovshdup {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] sched: [7:0.50] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovshdup {{.*#+}} ymm1 = mem[1,1,3,3,5,5,7,7] sched: [7:1.00] +; BDVER2-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] sched: [2:1.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movshdup: ; BTVER2: # %bb.0: @@ -3428,10 +3428,10 @@ ; ; BDVER2-LABEL: test_movsldup: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] sched: [1:1.00] -; BDVER2-NEXT: vmovsldup {{.*#+}} ymm1 = mem[0,0,2,2,4,4,6,6] sched: [7:0.50] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovsldup {{.*#+}} ymm1 = mem[0,0,2,2,4,4,6,6] sched: [7:1.00] +; BDVER2-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] sched: [2:1.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movsldup: ; BTVER2: # %bb.0: @@ -3500,10 +3500,10 @@ ; ; BDVER2-LABEL: test_movupd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovupd (%rdi), %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovupd (%rdi), %ymm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [5:2.00] ; BDVER2-NEXT: vmovupd %ymm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movupd: ; BTVER2: # %bb.0: @@ -3571,10 +3571,10 @@ ; ; BDVER2-LABEL: test_movups: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovups (%rdi), %ymm0 # sched: [7:0.50] -; BDVER2-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovups (%rdi), %ymm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [5:2.00] ; BDVER2-NEXT: vmovups %ymm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movups: ; BTVER2: # %bb.0: @@ -3634,9 +3634,9 @@ ; ; BDVER2-LABEL: test_mulpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmulpd %ymm1, %ymm0, %ymm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulpd (%rdi), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vmulpd (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_mulpd: ; BTVER2: # %bb.0: @@ -3694,9 +3694,9 @@ ; ; BDVER2-LABEL: test_mulps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulps (%rdi), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vmulps (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_mulps: ; BTVER2: # %bb.0: @@ -3760,10 +3760,10 @@ ; ; BDVER2-LABEL: orpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vorpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vorpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vorpd %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vorpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: orpd: ; BTVER2: # %bb.0: @@ -3834,10 +3834,10 @@ ; ; BDVER2-LABEL: test_orps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vorps %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vorps (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vorps %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vorps (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_orps: ; BTVER2: # %bb.0: @@ -3908,10 +3908,10 @@ ; ; BDVER2-LABEL: test_perm2f128: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3],ymm1[0,1] sched: [1:1.00] -; BDVER2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],mem[0,1] sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3],ymm1[0,1] sched: [4:0.50] +; BDVER2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],mem[0,1] sched: [8:0.50] +; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_perm2f128: ; BTVER2: # %bb.0: @@ -3978,10 +3978,10 @@ ; ; BDVER2-LABEL: test_permilpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] sched: [1:1.00] -; BDVER2-NEXT: vpermilpd {{.*#+}} xmm1 = mem[1,0] sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilpd {{.*#+}} xmm1 = mem[1,0] sched: [7:0.50] +; BDVER2-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] sched: [2:0.50] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilpd: ; BTVER2: # %bb.0: @@ -4048,10 +4048,10 @@ ; ; BDVER2-LABEL: test_permilpd_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] sched: [1:1.00] -; BDVER2-NEXT: vpermilpd {{.*#+}} ymm1 = mem[1,0,2,3] sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilpd {{.*#+}} ymm1 = mem[1,0,2,3] sched: [7:1.00] +; BDVER2-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] sched: [2:1.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilpd_ymm: ; BTVER2: # %bb.0: @@ -4118,10 +4118,10 @@ ; ; BDVER2-LABEL: test_permilps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] sched: [1:1.00] -; BDVER2-NEXT: vpermilps {{.*#+}} xmm1 = mem[3,2,1,0] sched: [7:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilps {{.*#+}} xmm1 = mem[3,2,1,0] sched: [7:0.50] +; BDVER2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] sched: [2:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilps: ; BTVER2: # %bb.0: @@ -4188,10 +4188,10 @@ ; ; BDVER2-LABEL: test_permilps_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] sched: [1:1.00] -; BDVER2-NEXT: vpermilps {{.*#+}} ymm1 = mem[3,2,1,0,7,6,5,4] sched: [8:1.00] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilps {{.*#+}} ymm1 = mem[3,2,1,0,7,6,5,4] sched: [7:1.00] +; BDVER2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] sched: [2:1.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilps_ymm: ; BTVER2: # %bb.0: @@ -4252,9 +4252,9 @@ ; ; BDVER2-LABEL: test_permilvarpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vpermilpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 # sched: [3:2.00] +; BDVER2-NEXT: vpermilpd (%rdi), %xmm0, %xmm0 # sched: [8:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilvarpd: ; BTVER2: # %bb.0: @@ -4313,9 +4313,9 @@ ; ; BDVER2-LABEL: test_permilvarpd_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vpermilpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 # sched: [3:3.00] +; BDVER2-NEXT: vpermilpd (%rdi), %ymm0, %ymm0 # sched: [8:3.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilvarpd_ymm: ; BTVER2: # %bb.0: @@ -4374,9 +4374,9 @@ ; ; BDVER2-LABEL: test_permilvarps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilps %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vpermilps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilps %xmm1, %xmm0, %xmm0 # sched: [3:2.00] +; BDVER2-NEXT: vpermilps (%rdi), %xmm0, %xmm0 # sched: [8:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilvarps: ; BTVER2: # %bb.0: @@ -4435,9 +4435,9 @@ ; ; BDVER2-LABEL: test_permilvarps_ymm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpermilps %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vpermilps (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpermilps %ymm1, %ymm0, %ymm0 # sched: [3:3.00] +; BDVER2-NEXT: vpermilps (%rdi), %ymm0, %ymm0 # sched: [8:3.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_permilvarps_ymm: ; BTVER2: # %bb.0: @@ -4502,10 +4502,10 @@ ; ; BDVER2-LABEL: test_rcpps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps (%rdi), %ymm1 # sched: [14:2.00] -; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vrcpps (%rdi), %ymm1 # sched: [10:2.00] +; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rcpps: ; BTVER2: # %bb.0: @@ -4573,10 +4573,10 @@ ; ; BDVER2-LABEL: test_roundpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [9:2.00] +; BDVER2-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [4:2.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_roundpd: ; BTVER2: # %bb.0: @@ -4644,10 +4644,10 @@ ; ; BDVER2-LABEL: test_roundps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [9:2.00] +; BDVER2-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [4:2.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_roundps: ; BTVER2: # %bb.0: @@ -4715,10 +4715,10 @@ ; ; BDVER2-LABEL: test_rsqrtps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [14:2.00] -; BDVER2-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [7:2.00] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [10:2.00] +; BDVER2-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rsqrtps: ; BTVER2: # %bb.0: @@ -4786,10 +4786,10 @@ ; ; BDVER2-LABEL: test_shufpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[1],ymm1[0],ymm0[2],ymm1[3] sched: [1:1.00] -; BDVER2-NEXT: vshufpd {{.*#+}} ymm1 = ymm1[1],mem[0],ymm1[2],mem[3] sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[1],ymm1[0],ymm0[2],ymm1[3] sched: [2:1.00] +; BDVER2-NEXT: vshufpd {{.*#+}} ymm1 = ymm1[1],mem[0],ymm1[2],mem[3] sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_shufpd: ; BTVER2: # %bb.0: @@ -4856,10 +4856,10 @@ ; ; BDVER2-LABEL: test_shufps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[0,0],ymm0[4,4],ymm1[4,4] sched: [1:1.00] -; BDVER2-NEXT: vshufps {{.*#+}} ymm1 = ymm1[0,3],mem[0,0],ymm1[4,7],mem[4,4] sched: [8:1.00] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[0,0],ymm0[4,4],ymm1[4,4] sched: [2:1.00] +; BDVER2-NEXT: vshufps {{.*#+}} ymm1 = ymm1[0,3],mem[0,0],ymm1[4,7],mem[4,4] sched: [7:1.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_shufps: ; BTVER2: # %bb.0: @@ -4926,10 +4926,10 @@ ; ; BDVER2-LABEL: test_sqrtpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [52:44.00] -; BDVER2-NEXT: vsqrtpd %ymm0, %ymm0 # sched: [45:44.00] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [14:27.00] +; BDVER2-NEXT: vsqrtpd %ymm0, %ymm0 # sched: [9:27.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sqrtpd: ; BTVER2: # %bb.0: @@ -4997,10 +4997,10 @@ ; ; BDVER2-LABEL: test_sqrtps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsqrtps (%rdi), %ymm1 # sched: [36:28.00] -; BDVER2-NEXT: vsqrtps %ymm0, %ymm0 # sched: [29:28.00] -; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsqrtps (%rdi), %ymm1 # sched: [14:21.00] +; BDVER2-NEXT: vsqrtps %ymm0, %ymm0 # sched: [9:21.00] +; BDVER2-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sqrtps: ; BTVER2: # %bb.0: @@ -5062,9 +5062,9 @@ ; ; BDVER2-LABEL: test_subpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsubpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vsubpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsubpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vsubpd (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_subpd: ; BTVER2: # %bb.0: @@ -5122,9 +5122,9 @@ ; ; BDVER2-LABEL: test_subps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsubps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vsubps (%rdi), %ymm0, %ymm0 # sched: [10:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsubps %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vsubps (%rdi), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_subps: ; BTVER2: # %bb.0: @@ -5203,9 +5203,9 @@ ; BDVER2-NEXT: xorl %eax, %eax # sched: [0:0.25] ; BDVER2-NEXT: vtestpd %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-NEXT: setb %al # sched: [1:0.50] -; BDVER2-NEXT: vtestpd (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: adcl $0, %eax # sched: [2:0.67] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vtestpd (%rdi), %xmm0 # sched: [6:1.00] +; BDVER2-NEXT: adcl $0, %eax # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_testpd: ; BTVER2: # %bb.0: @@ -5298,10 +5298,10 @@ ; BDVER2-NEXT: xorl %eax, %eax # sched: [0:0.25] ; BDVER2-NEXT: vtestpd %ymm1, %ymm0 # sched: [1:1.00] ; BDVER2-NEXT: setb %al # sched: [1:0.50] -; BDVER2-NEXT: vtestpd (%rdi), %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: adcl $0, %eax # sched: [2:0.67] -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vtestpd (%rdi), %ymm0 # sched: [6:1.00] +; BDVER2-NEXT: adcl $0, %eax # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_testpd_ymm: ; BTVER2: # %bb.0: @@ -5389,9 +5389,9 @@ ; BDVER2-NEXT: xorl %eax, %eax # sched: [0:0.25] ; BDVER2-NEXT: vtestps %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-NEXT: setb %al # sched: [1:0.50] -; BDVER2-NEXT: vtestps (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: adcl $0, %eax # sched: [2:0.67] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vtestps (%rdi), %xmm0 # sched: [6:1.00] +; BDVER2-NEXT: adcl $0, %eax # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_testps: ; BTVER2: # %bb.0: @@ -5484,10 +5484,10 @@ ; BDVER2-NEXT: xorl %eax, %eax # sched: [0:0.25] ; BDVER2-NEXT: vtestps %ymm1, %ymm0 # sched: [1:1.00] ; BDVER2-NEXT: setb %al # sched: [1:0.50] -; BDVER2-NEXT: vtestps (%rdi), %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: adcl $0, %eax # sched: [2:0.67] -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vtestps (%rdi), %ymm0 # sched: [6:1.00] +; BDVER2-NEXT: adcl $0, %eax # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_testps_ymm: ; BTVER2: # %bb.0: @@ -5560,10 +5560,10 @@ ; ; BDVER2-LABEL: test_unpckhpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3] sched: [1:1.00] -; BDVER2-NEXT: vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3] sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3] sched: [2:1.00] +; BDVER2-NEXT: vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3] sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_unpckhpd: ; BTVER2: # %bb.0: @@ -5624,9 +5624,9 @@ ; ; BDVER2-LABEL: test_unpckhps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] sched: [1:1.00] -; BDVER2-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],mem[2],ymm0[3],mem[3],ymm0[6],mem[6],ymm0[7],mem[7] sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] sched: [2:1.00] +; BDVER2-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],mem[2],ymm0[3],mem[3],ymm0[6],mem[6],ymm0[7],mem[7] sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_unpckhps: ; BTVER2: # %bb.0: @@ -5690,10 +5690,10 @@ ; ; BDVER2-LABEL: test_unpcklpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] sched: [1:1.00] -; BDVER2-NEXT: vunpcklpd {{.*#+}} ymm1 = ymm1[0],mem[0],ymm1[2],mem[2] sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] sched: [2:1.00] +; BDVER2-NEXT: vunpcklpd {{.*#+}} ymm1 = ymm1[0],mem[0],ymm1[2],mem[2] sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_unpcklpd: ; BTVER2: # %bb.0: @@ -5754,9 +5754,9 @@ ; ; BDVER2-LABEL: test_unpcklps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] sched: [1:1.00] -; BDVER2-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[1],mem[1],ymm0[4],mem[4],ymm0[5],mem[5] sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] sched: [2:1.00] +; BDVER2-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[1],mem[1],ymm0[4],mem[4],ymm0[5],mem[5] sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_unpcklps: ; BTVER2: # %bb.0: @@ -5820,10 +5820,10 @@ ; ; BDVER2-LABEL: test_xorpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vxorpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vxorpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vxorpd %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vxorpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xorpd: ; BTVER2: # %bb.0: @@ -5894,10 +5894,10 @@ ; ; BDVER2-LABEL: test_xorps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vxorps %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vxorps (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vxorps %ymm1, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vxorps (%rdi), %ymm0, %ymm0 # sched: [7:1.00] +; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xorps: ; BTVER2: # %bb.0: @@ -5956,8 +5956,8 @@ ; ; BDVER2-LABEL: test_zeroall: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vzeroall # sched: [9:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroall # sched: [90:8.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_zeroall: ; BTVER2: # %bb.0: @@ -6006,8 +6006,8 @@ ; ; BDVER2-LABEL: test_zeroupper: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_zeroupper: ; BTVER2: # %bb.0: @@ -6086,12 +6086,12 @@ ; BDVER2-LABEL: test_avx256_zero_idioms: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: vxorps %ymm0, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER2-NEXT: vxorpd %ymm1, %ymm1, %ymm1 # sched: [1:1.00] -; BDVER2-NEXT: vandnps %ymm2, %ymm2, %ymm2 # sched: [1:1.00] -; BDVER2-NEXT: vandnpd %ymm3, %ymm3, %ymm3 # sched: [1:1.00] +; BDVER2-NEXT: vxorps %ymm0, %ymm0, %ymm0 # sched: [2:1.00] +; BDVER2-NEXT: vxorpd %ymm1, %ymm1, %ymm1 # sched: [2:1.00] +; BDVER2-NEXT: vandnps %ymm2, %ymm2, %ymm2 # sched: [2:1.00] +; BDVER2-NEXT: vandnpd %ymm3, %ymm3, %ymm3 # sched: [2:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_avx256_zero_idioms: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/avx-vzeroupper.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/avx-vzeroupper.ll +++ llvm/trunk/test/CodeGen/X86/avx-vzeroupper.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=VZ --check-prefix=AVX ; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=VZ --check-prefix=AVX512 ; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx,+fast-partial-ymm-or-zmm-write | FileCheck %s --check-prefix=ALL --check-prefix=NO-VZ --check-prefix=FAST-ymm-zmm -; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=NO-VZ --check-prefix=BDVER2 +; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=ALL --check-prefix=NO-VZ --check-prefix=BDVER2 ; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefix=ALL --check-prefix=NO-VZ --check-prefix=BTVER2 declare i32 @foo() @@ -60,8 +60,8 @@ ; BDVER2-LABEL: test01: ; BDVER2: # %bb.0: ; BDVER2-NEXT: subq $56, %rsp -; BDVER2-NEXT: vmovups %ymm2, (%rsp) # 32-byte Spill ; BDVER2-NEXT: vmovaps {{.*}}(%rip), %xmm0 +; BDVER2-NEXT: vmovups %ymm2, (%rsp) # 32-byte Spill ; BDVER2-NEXT: vzeroupper ; BDVER2-NEXT: callq do_sse ; BDVER2-NEXT: vmovaps %xmm0, {{.*}}(%rip) @@ -203,8 +203,8 @@ ; BDVER2-NEXT: testl %eax, %eax ; BDVER2-NEXT: jne .LBB3_1 ; BDVER2-NEXT: # %bb.2: # %for.body.preheader -; BDVER2-NEXT: movl $4, %ebx ; BDVER2-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload +; BDVER2-NEXT: movl $4, %ebx ; BDVER2-NEXT: .p2align 4, 0x90 ; BDVER2-NEXT: .LBB3_3: # %for.body ; BDVER2-NEXT: # =>This Inner Loop Header: Depth=1 @@ -214,7 +214,7 @@ ; BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ; BDVER2-NEXT: vzeroupper ; BDVER2-NEXT: callq do_sse -; BDVER2-NEXT: addl $-1, %ebx +; BDVER2-NEXT: decl %ebx ; BDVER2-NEXT: jne .LBB3_3 ; BDVER2-NEXT: # %bb.4: # %for.end ; BDVER2-NEXT: addq $16, %rsp Index: llvm/trunk/test/CodeGen/X86/bmi-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/bmi-schedule.ll +++ llvm/trunk/test/CodeGen/X86/bmi-schedule.ll @@ -4,7 +4,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+bmi | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -39,10 +39,10 @@ ; ; BDVER2-LABEL: test_andn_i32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.33] -; BDVER2-NEXT: andnl (%rdx), %edi, %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: andnl (%rdx), %edi, %eax # sched: [5:0.50] +; BDVER2-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_andn_i32: ; BTVER2: # %bb.0: @@ -96,10 +96,10 @@ ; ; BDVER2-LABEL: test_andn_i64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.33] -; BDVER2-NEXT: andnq (%rdx), %rdi, %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: andnq (%rdx), %rdi, %rax # sched: [5:0.50] +; BDVER2-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_andn_i64: ; BTVER2: # %bb.0: @@ -153,10 +153,10 @@ ; ; BDVER2-LABEL: test_bextr_i32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: bextrl %edi, (%rdx), %ecx # sched: [7:1.00] -; BDVER2-NEXT: bextrl %edi, %esi, %eax # sched: [2:1.00] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: bextrl %edi, (%rdx), %ecx # sched: [6:0.50] +; BDVER2-NEXT: bextrl %edi, %esi, %eax # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bextr_i32: ; BTVER2: # %bb.0: @@ -210,10 +210,10 @@ ; ; BDVER2-LABEL: test_bextr_i64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [7:1.00] -; BDVER2-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:1.00] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [6:0.50] +; BDVER2-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bextr_i64: ; BTVER2: # %bb.0: @@ -268,9 +268,9 @@ ; BDVER2-LABEL: test_blsi_i32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: blsil (%rsi), %ecx # sched: [6:0.50] -; BDVER2-NEXT: blsil %edi, %eax # sched: [1:0.33] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsil %edi, %eax # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blsi_i32: ; BTVER2: # %bb.0: @@ -326,9 +326,9 @@ ; BDVER2-LABEL: test_blsi_i64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: blsiq (%rsi), %rcx # sched: [6:0.50] -; BDVER2-NEXT: blsiq %rdi, %rax # sched: [1:0.33] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsiq %rdi, %rax # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blsi_i64: ; BTVER2: # %bb.0: @@ -384,9 +384,9 @@ ; BDVER2-LABEL: test_blsmsk_i32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: blsmskl (%rsi), %ecx # sched: [6:0.50] -; BDVER2-NEXT: blsmskl %edi, %eax # sched: [1:0.33] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsmskl %edi, %eax # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blsmsk_i32: ; BTVER2: # %bb.0: @@ -442,9 +442,9 @@ ; BDVER2-LABEL: test_blsmsk_i64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: blsmskq (%rsi), %rcx # sched: [6:0.50] -; BDVER2-NEXT: blsmskq %rdi, %rax # sched: [1:0.33] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsmskq %rdi, %rax # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blsmsk_i64: ; BTVER2: # %bb.0: @@ -500,9 +500,9 @@ ; BDVER2-LABEL: test_blsr_i32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: blsrl (%rsi), %ecx # sched: [6:0.50] -; BDVER2-NEXT: blsrl %edi, %eax # sched: [1:0.33] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsrl %edi, %eax # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blsr_i32: ; BTVER2: # %bb.0: @@ -558,9 +558,9 @@ ; BDVER2-LABEL: test_blsr_i64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: blsrq (%rsi), %rcx # sched: [6:0.50] -; BDVER2-NEXT: blsrq %rdi, %rax # sched: [1:0.33] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsrq %rdi, %rax # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_blsr_i64: ; BTVER2: # %bb.0: @@ -619,11 +619,11 @@ ; ; BDVER2-LABEL: test_cttz_i16: ; BDVER2: # %bb.0: -; BDVER2-NEXT: tzcntw (%rsi), %cx # sched: [8:1.00] -; BDVER2-NEXT: tzcntw %di, %ax # sched: [3:1.00] -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] +; BDVER2-NEXT: tzcntw (%rsi), %cx # sched: [6:1.00] +; BDVER2-NEXT: tzcntw %di, %ax # sched: [2:1.00] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] ; BDVER2-NEXT: # kill: def $ax killed $ax killed $eax -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cttz_i16: ; BTVER2: # %bb.0: @@ -679,10 +679,10 @@ ; ; BDVER2-LABEL: test_cttz_i32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: tzcntl (%rsi), %ecx # sched: [8:1.00] -; BDVER2-NEXT: tzcntl %edi, %eax # sched: [3:1.00] -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: tzcntl (%rsi), %ecx # sched: [6:1.00] +; BDVER2-NEXT: tzcntl %edi, %eax # sched: [2:1.00] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cttz_i32: ; BTVER2: # %bb.0: @@ -736,10 +736,10 @@ ; ; BDVER2-LABEL: test_cttz_i64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: tzcntq (%rsi), %rcx # sched: [8:1.00] -; BDVER2-NEXT: tzcntq %rdi, %rax # sched: [3:1.00] -; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: tzcntq (%rsi), %rcx # sched: [6:1.00] +; BDVER2-NEXT: tzcntq %rdi, %rax # sched: [2:1.00] +; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cttz_i64: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/cmov-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/cmov-schedule.ll +++ llvm/trunk/test/CodeGen/X86/cmov-schedule.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -544,68 +544,68 @@ ; BDVER2-LABEL: test_cmov_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmovow %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovnow %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovbw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovbw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovbw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovaew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovaew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovaew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovnew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovnew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovbew %si, %di # sched: [3:1.00] -; BDVER2-NEXT: cmovbew %si, %di # sched: [3:1.00] -; BDVER2-NEXT: cmovaw %si, %di # sched: [3:1.00] -; BDVER2-NEXT: cmovaw %si, %di # sched: [3:1.00] -; BDVER2-NEXT: cmovsw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovnsw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovpw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovpw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovnpw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovnpw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovlw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovlw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovgew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovgew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovlew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovlew %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovgw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovgw %si, %di # sched: [2:0.67] -; BDVER2-NEXT: cmovow (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovnow (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovbw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovbw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovbw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovaew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovaew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovaew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovnew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovnew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovbew (%rdx), %di # sched: [8:1.00] -; BDVER2-NEXT: cmovbew (%rdx), %di # sched: [8:1.00] -; BDVER2-NEXT: cmovaw (%rdx), %di # sched: [8:1.00] -; BDVER2-NEXT: cmovaw (%rdx), %di # sched: [8:1.00] -; BDVER2-NEXT: cmovsw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovnsw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovpw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovpw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovnpw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovnpw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovlw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovlw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovgew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovgew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovlew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovlew (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovgw (%rdx), %di # sched: [7:0.67] -; BDVER2-NEXT: cmovgw (%rdx), %di # sched: [7:0.67] +; BDVER2-NEXT: cmovow %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovnow %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovbw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovbw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovbw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovaew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovaew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovaew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovnew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovnew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovbew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovbew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovaw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovaw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovsw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovnsw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovpw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovpw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovnpw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovnpw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovlw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovlw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovgew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovgew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovlew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovlew %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovgw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovgw %si, %di # sched: [1:0.50] +; BDVER2-NEXT: cmovow (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovnow (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovbw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovbw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovbw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovaew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovaew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovaew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovnew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovnew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovbew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovbew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovaw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovaw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovsw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovnsw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovpw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovpw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovnpw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovnpw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovlw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovlw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovgew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovgew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovlew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovlew (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovgw (%rdx), %di # sched: [5:0.50] +; BDVER2-NEXT: cmovgw (%rdx), %di # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmov_16: ; BTVER2: # %bb.0: @@ -1274,68 +1274,68 @@ ; BDVER2-LABEL: test_cmov_32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmovol %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovnol %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovbl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovbl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovbl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovael %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovael %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovael %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovnel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovnel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovbel %esi, %edi # sched: [3:1.00] -; BDVER2-NEXT: cmovbel %esi, %edi # sched: [3:1.00] -; BDVER2-NEXT: cmoval %esi, %edi # sched: [3:1.00] -; BDVER2-NEXT: cmoval %esi, %edi # sched: [3:1.00] -; BDVER2-NEXT: cmovsl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovnsl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovpl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovpl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovnpl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovnpl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovll %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovll %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovgel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovgel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovlel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovlel %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovgl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovgl %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: cmovol (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovnol (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovbl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovbl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovbl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovael (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovael (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovael (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovnel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovnel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovbel (%rdx), %edi # sched: [8:1.00] -; BDVER2-NEXT: cmovbel (%rdx), %edi # sched: [8:1.00] -; BDVER2-NEXT: cmoval (%rdx), %edi # sched: [8:1.00] -; BDVER2-NEXT: cmoval (%rdx), %edi # sched: [8:1.00] -; BDVER2-NEXT: cmovsl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovnsl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovpl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovpl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovnpl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovnpl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovll (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovll (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovgel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovgel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovlel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovlel (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovgl (%rdx), %edi # sched: [7:0.67] -; BDVER2-NEXT: cmovgl (%rdx), %edi # sched: [7:0.67] +; BDVER2-NEXT: cmovol %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovnol %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovbl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovbl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovbl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovael %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovael %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovael %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovnel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovnel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovbel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovbel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmoval %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmoval %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovsl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovnsl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovpl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovpl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovnpl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovnpl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovll %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovll %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovgel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovgel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovlel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovlel %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovgl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovgl %esi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmovol (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovnol (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovbl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovbl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovbl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovael (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovael (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovael (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovnel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovnel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovbel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovbel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmoval (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmoval (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovsl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovnsl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovpl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovpl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovnpl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovnpl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovll (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovll (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovgel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovgel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovlel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovlel (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovgl (%rdx), %edi # sched: [5:0.50] +; BDVER2-NEXT: cmovgl (%rdx), %edi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmov_32: ; BTVER2: # %bb.0: @@ -2004,68 +2004,68 @@ ; BDVER2-LABEL: test_cmov_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmovoq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovnoq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovbq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovbq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovbq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovaeq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovaeq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovaeq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmoveq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmoveq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovneq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovneq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovbeq %rsi, %rdi # sched: [3:1.00] -; BDVER2-NEXT: cmovbeq %rsi, %rdi # sched: [3:1.00] -; BDVER2-NEXT: cmovaq %rsi, %rdi # sched: [3:1.00] -; BDVER2-NEXT: cmovaq %rsi, %rdi # sched: [3:1.00] -; BDVER2-NEXT: cmovsq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovnsq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovpq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovpq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovnpq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovnpq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovlq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovlq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovgeq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovgeq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovleq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovleq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovgq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovgq %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: cmovoq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovnoq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovbq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovbq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovbq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovaeq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovaeq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovaeq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmoveq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmoveq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovneq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovneq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovbeq (%rdx), %rdi # sched: [8:1.00] -; BDVER2-NEXT: cmovbeq (%rdx), %rdi # sched: [8:1.00] -; BDVER2-NEXT: cmovaq (%rdx), %rdi # sched: [8:1.00] -; BDVER2-NEXT: cmovaq (%rdx), %rdi # sched: [8:1.00] -; BDVER2-NEXT: cmovsq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovnsq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovpq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovpq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovnpq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovnpq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovlq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovlq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovgeq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovgeq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovleq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovleq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovgq (%rdx), %rdi # sched: [7:0.67] -; BDVER2-NEXT: cmovgq (%rdx), %rdi # sched: [7:0.67] +; BDVER2-NEXT: cmovoq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovnoq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovbq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovbq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovbq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovaeq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovaeq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovaeq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmoveq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmoveq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovneq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovneq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovbeq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovbeq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovaq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovaq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovsq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovnsq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovpq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovpq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovnpq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovnpq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovlq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovlq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovgeq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovgeq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovleq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovleq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovgq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovgq %rsi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmovoq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovnoq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovbq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovbq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovbq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovaeq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovaeq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovaeq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmoveq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmoveq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovneq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovneq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovbeq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovbeq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovaq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovaq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovsq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovnsq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovpq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovpq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovnpq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovnpq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovlq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovlq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovgeq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovgeq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovleq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovleq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovgq (%rdx), %rdi # sched: [5:0.50] +; BDVER2-NEXT: cmovgq (%rdx), %rdi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmov_64: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/f16c-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/f16c-schedule.ll +++ llvm/trunk/test/CodeGen/X86/f16c-schedule.ll @@ -4,7 +4,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+f16c | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -46,10 +46,10 @@ ; ; BDVER2-LABEL: test_vcvtph2ps_128: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [8:1.00] -; BDVER2-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [13:1.00] +; BDVER2-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_vcvtph2ps_128: ; BTVER2: # %bb.0: @@ -110,10 +110,10 @@ ; ; BDVER2-LABEL: test_vcvtph2ps_256: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [8:1.00] -; BDVER2-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [13:2.00] +; BDVER2-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [8:2.00] +; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_vcvtph2ps_256: ; BTVER2: # %bb.0: @@ -169,9 +169,9 @@ ; ; BDVER2-LABEL: test_vcvtps2ph_128: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [8:1.00] ; BDVER2-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [4:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_vcvtps2ph_128: ; BTVER2: # %bb.0: @@ -230,10 +230,10 @@ ; ; BDVER2-LABEL: test_vcvtps2ph_256: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [4:1.00] -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [8:2.00] +; BDVER2-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [4:2.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_vcvtps2ph_256: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/fma-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/fma-schedule.ll +++ llvm/trunk/test/CodeGen/X86/fma-schedule.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE @@ -35,7 +35,7 @@ ; BDVER2-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfmadd231pd {{.*#+}} xmm0 = (xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddpd_128: ; HASWELL: # %bb.0: @@ -132,12 +132,12 @@ ; BDVER2-NEXT: vfmadd132pd {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmadd231pd {{.*#+}} ymm0 = (ymm1 * ymm2) + ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmadd132pd {{.*#+}} ymm0 = (ymm0 * mem) + ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + mem sched: [10:0.50] -; BDVER2-NEXT: vfmadd231pd {{.*#+}} ymm0 = (ymm1 * mem) + ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmadd132pd {{.*#+}} ymm0 = (ymm0 * mem) + ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + mem sched: [10:1.00] +; BDVER2-NEXT: vfmadd231pd {{.*#+}} ymm0 = (ymm1 * mem) + ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddpd_256: ; HASWELL: # %bb.0: @@ -242,7 +242,7 @@ ; BDVER2-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfmadd231ps {{.*#+}} xmm0 = (xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddps_128: ; HASWELL: # %bb.0: @@ -339,12 +339,12 @@ ; BDVER2-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmadd231ps {{.*#+}} ymm0 = (ymm1 * ymm2) + ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * mem) + ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + mem sched: [10:0.50] -; BDVER2-NEXT: vfmadd231ps {{.*#+}} ymm0 = (ymm1 * mem) + ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * mem) + ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + mem sched: [10:1.00] +; BDVER2-NEXT: vfmadd231ps {{.*#+}} ymm0 = (ymm1 * mem) + ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddps_256: ; HASWELL: # %bb.0: @@ -449,7 +449,7 @@ ; BDVER2-NEXT: vfmadd213sd {{.*#+}} xmm0 = (xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfmadd231sd {{.*#+}} xmm0 = (xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddsd_128: ; HASWELL: # %bb.0: @@ -549,7 +549,7 @@ ; BDVER2-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfmadd231ss {{.*#+}} xmm0 = (xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddss_128: ; HASWELL: # %bb.0: @@ -653,7 +653,7 @@ ; BDVER2-NEXT: vfmaddsub213pd {{.*#+}} xmm0 = (xmm1 * xmm0) +/- mem sched: [10:0.50] ; BDVER2-NEXT: vfmaddsub231pd {{.*#+}} xmm0 = (xmm1 * mem) +/- xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddsubpd_128: ; HASWELL: # %bb.0: @@ -750,12 +750,12 @@ ; BDVER2-NEXT: vfmaddsub132pd {{.*#+}} ymm0 = (ymm0 * ymm2) +/- ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmaddsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) +/- ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmaddsub231pd {{.*#+}} ymm0 = (ymm1 * ymm2) +/- ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmaddsub132pd {{.*#+}} ymm0 = (ymm0 * mem) +/- ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmaddsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) +/- mem sched: [10:0.50] -; BDVER2-NEXT: vfmaddsub231pd {{.*#+}} ymm0 = (ymm1 * mem) +/- ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmaddsub132pd {{.*#+}} ymm0 = (ymm0 * mem) +/- ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmaddsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) +/- mem sched: [10:1.00] +; BDVER2-NEXT: vfmaddsub231pd {{.*#+}} ymm0 = (ymm1 * mem) +/- ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddsubpd_256: ; HASWELL: # %bb.0: @@ -860,7 +860,7 @@ ; BDVER2-NEXT: vfmaddsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) +/- mem sched: [10:0.50] ; BDVER2-NEXT: vfmaddsub231ps {{.*#+}} xmm0 = (xmm1 * mem) +/- xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddsubps_128: ; HASWELL: # %bb.0: @@ -957,12 +957,12 @@ ; BDVER2-NEXT: vfmaddsub132ps {{.*#+}} ymm0 = (ymm0 * ymm2) +/- ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmaddsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) +/- ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmaddsub231ps {{.*#+}} ymm0 = (ymm1 * ymm2) +/- ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmaddsub132ps {{.*#+}} ymm0 = (ymm0 * mem) +/- ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmaddsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) +/- mem sched: [10:0.50] -; BDVER2-NEXT: vfmaddsub231ps {{.*#+}} ymm0 = (ymm1 * mem) +/- ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmaddsub132ps {{.*#+}} ymm0 = (ymm0 * mem) +/- ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmaddsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) +/- mem sched: [10:1.00] +; BDVER2-NEXT: vfmaddsub231ps {{.*#+}} ymm0 = (ymm1 * mem) +/- ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmaddsubps_256: ; HASWELL: # %bb.0: @@ -1071,7 +1071,7 @@ ; BDVER2-NEXT: vfmsubadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) -/+ mem sched: [10:0.50] ; BDVER2-NEXT: vfmsubadd231pd {{.*#+}} xmm0 = (xmm1 * mem) -/+ xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubaddpd_128: ; HASWELL: # %bb.0: @@ -1168,12 +1168,12 @@ ; BDVER2-NEXT: vfmsubadd132pd {{.*#+}} ymm0 = (ymm0 * ymm2) -/+ ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmsubadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmsubadd231pd {{.*#+}} ymm0 = (ymm1 * ymm2) -/+ ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmsubadd132pd {{.*#+}} ymm0 = (ymm0 * mem) -/+ ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmsubadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ mem sched: [10:0.50] -; BDVER2-NEXT: vfmsubadd231pd {{.*#+}} ymm0 = (ymm1 * mem) -/+ ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmsubadd132pd {{.*#+}} ymm0 = (ymm0 * mem) -/+ ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmsubadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ mem sched: [10:1.00] +; BDVER2-NEXT: vfmsubadd231pd {{.*#+}} ymm0 = (ymm1 * mem) -/+ ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubaddpd_256: ; HASWELL: # %bb.0: @@ -1278,7 +1278,7 @@ ; BDVER2-NEXT: vfmsubadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) -/+ mem sched: [10:0.50] ; BDVER2-NEXT: vfmsubadd231ps {{.*#+}} xmm0 = (xmm1 * mem) -/+ xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubaddps_128: ; HASWELL: # %bb.0: @@ -1375,12 +1375,12 @@ ; BDVER2-NEXT: vfmsubadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) -/+ ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmsubadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmsubadd231ps {{.*#+}} ymm0 = (ymm1 * ymm2) -/+ ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmsubadd132ps {{.*#+}} ymm0 = (ymm0 * mem) -/+ ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmsubadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ mem sched: [10:0.50] -; BDVER2-NEXT: vfmsubadd231ps {{.*#+}} ymm0 = (ymm1 * mem) -/+ ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmsubadd132ps {{.*#+}} ymm0 = (ymm0 * mem) -/+ ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmsubadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) -/+ mem sched: [10:1.00] +; BDVER2-NEXT: vfmsubadd231ps {{.*#+}} ymm0 = (ymm1 * mem) -/+ ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubaddps_256: ; HASWELL: # %bb.0: @@ -1489,7 +1489,7 @@ ; BDVER2-NEXT: vfmsub213pd {{.*#+}} xmm0 = (xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfmsub231pd {{.*#+}} xmm0 = (xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubpd_128: ; HASWELL: # %bb.0: @@ -1586,12 +1586,12 @@ ; BDVER2-NEXT: vfmsub132pd {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmsub231pd {{.*#+}} ymm0 = (ymm1 * ymm2) - ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmsub132pd {{.*#+}} ymm0 = (ymm0 * mem) - ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) - mem sched: [10:0.50] -; BDVER2-NEXT: vfmsub231pd {{.*#+}} ymm0 = (ymm1 * mem) - ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmsub132pd {{.*#+}} ymm0 = (ymm0 * mem) - ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmsub213pd {{.*#+}} ymm0 = (ymm1 * ymm0) - mem sched: [10:1.00] +; BDVER2-NEXT: vfmsub231pd {{.*#+}} ymm0 = (ymm1 * mem) - ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubpd_256: ; HASWELL: # %bb.0: @@ -1696,7 +1696,7 @@ ; BDVER2-NEXT: vfmsub213ps {{.*#+}} xmm0 = (xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfmsub231ps {{.*#+}} xmm0 = (xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubps_128: ; HASWELL: # %bb.0: @@ -1793,12 +1793,12 @@ ; BDVER2-NEXT: vfmsub132ps {{.*#+}} ymm0 = (ymm0 * ymm2) - ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) - ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfmsub231ps {{.*#+}} ymm0 = (ymm1 * ymm2) - ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfmsub132ps {{.*#+}} ymm0 = (ymm0 * mem) - ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) - mem sched: [10:0.50] -; BDVER2-NEXT: vfmsub231ps {{.*#+}} ymm0 = (ymm1 * mem) - ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfmsub132ps {{.*#+}} ymm0 = (ymm0 * mem) - ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfmsub213ps {{.*#+}} ymm0 = (ymm1 * ymm0) - mem sched: [10:1.00] +; BDVER2-NEXT: vfmsub231ps {{.*#+}} ymm0 = (ymm1 * mem) - ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubps_256: ; HASWELL: # %bb.0: @@ -1903,7 +1903,7 @@ ; BDVER2-NEXT: vfmsub213sd {{.*#+}} xmm0 = (xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfmsub231sd {{.*#+}} xmm0 = (xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubsd_128: ; HASWELL: # %bb.0: @@ -2003,7 +2003,7 @@ ; BDVER2-NEXT: vfmsub213ss {{.*#+}} xmm0 = (xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfmsub231ss {{.*#+}} xmm0 = (xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfmsubss_128: ; HASWELL: # %bb.0: @@ -2107,7 +2107,7 @@ ; BDVER2-NEXT: vfnmadd213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfnmadd231pd {{.*#+}} xmm0 = -(xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmaddpd_128: ; HASWELL: # %bb.0: @@ -2204,12 +2204,12 @@ ; BDVER2-NEXT: vfnmadd132pd {{.*#+}} ymm0 = -(ymm0 * ymm2) + ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfnmadd231pd {{.*#+}} ymm0 = -(ymm1 * ymm2) + ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfnmadd132pd {{.*#+}} ymm0 = -(ymm0 * mem) + ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) + mem sched: [10:0.50] -; BDVER2-NEXT: vfnmadd231pd {{.*#+}} ymm0 = -(ymm1 * mem) + ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfnmadd132pd {{.*#+}} ymm0 = -(ymm0 * mem) + ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfnmadd213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) + mem sched: [10:1.00] +; BDVER2-NEXT: vfnmadd231pd {{.*#+}} ymm0 = -(ymm1 * mem) + ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmaddpd_256: ; HASWELL: # %bb.0: @@ -2314,7 +2314,7 @@ ; BDVER2-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfnmadd231ps {{.*#+}} xmm0 = -(xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmaddps_128: ; HASWELL: # %bb.0: @@ -2411,12 +2411,12 @@ ; BDVER2-NEXT: vfnmadd132ps {{.*#+}} ymm0 = -(ymm0 * ymm2) + ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfnmadd231ps {{.*#+}} ymm0 = -(ymm1 * ymm2) + ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfnmadd132ps {{.*#+}} ymm0 = -(ymm0 * mem) + ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + mem sched: [10:0.50] -; BDVER2-NEXT: vfnmadd231ps {{.*#+}} ymm0 = -(ymm1 * mem) + ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfnmadd132ps {{.*#+}} ymm0 = -(ymm0 * mem) + ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + mem sched: [10:1.00] +; BDVER2-NEXT: vfnmadd231ps {{.*#+}} ymm0 = -(ymm1 * mem) + ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmaddps_256: ; HASWELL: # %bb.0: @@ -2521,7 +2521,7 @@ ; BDVER2-NEXT: vfnmadd213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfnmadd231sd {{.*#+}} xmm0 = -(xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmaddsd_128: ; HASWELL: # %bb.0: @@ -2621,7 +2621,7 @@ ; BDVER2-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem sched: [10:0.50] ; BDVER2-NEXT: vfnmadd231ss {{.*#+}} xmm0 = -(xmm1 * mem) + xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmaddss_128: ; HASWELL: # %bb.0: @@ -2725,7 +2725,7 @@ ; BDVER2-NEXT: vfnmsub213pd {{.*#+}} xmm0 = -(xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfnmsub231pd {{.*#+}} xmm0 = -(xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmsubpd_128: ; HASWELL: # %bb.0: @@ -2822,12 +2822,12 @@ ; BDVER2-NEXT: vfnmsub132pd {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfnmsub231pd {{.*#+}} ymm0 = -(ymm1 * ymm2) - ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfnmsub132pd {{.*#+}} ymm0 = -(ymm0 * mem) - ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) - mem sched: [10:0.50] -; BDVER2-NEXT: vfnmsub231pd {{.*#+}} ymm0 = -(ymm1 * mem) - ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfnmsub132pd {{.*#+}} ymm0 = -(ymm0 * mem) - ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfnmsub213pd {{.*#+}} ymm0 = -(ymm1 * ymm0) - mem sched: [10:1.00] +; BDVER2-NEXT: vfnmsub231pd {{.*#+}} ymm0 = -(ymm1 * mem) - ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmsubpd_256: ; HASWELL: # %bb.0: @@ -2932,7 +2932,7 @@ ; BDVER2-NEXT: vfnmsub213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfnmsub231ps {{.*#+}} xmm0 = -(xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmsubps_128: ; HASWELL: # %bb.0: @@ -3029,12 +3029,12 @@ ; BDVER2-NEXT: vfnmsub132ps {{.*#+}} ymm0 = -(ymm0 * ymm2) - ymm1 sched: [5:0.50] ; BDVER2-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2 sched: [5:0.50] ; BDVER2-NEXT: vfnmsub231ps {{.*#+}} ymm0 = -(ymm1 * ymm2) - ymm0 sched: [5:0.50] -; BDVER2-NEXT: vfnmsub132ps {{.*#+}} ymm0 = -(ymm0 * mem) - ymm1 sched: [10:0.50] -; BDVER2-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - mem sched: [10:0.50] -; BDVER2-NEXT: vfnmsub231ps {{.*#+}} ymm0 = -(ymm1 * mem) - ymm0 sched: [10:0.50] +; BDVER2-NEXT: vfnmsub132ps {{.*#+}} ymm0 = -(ymm0 * mem) - ymm1 sched: [10:1.00] +; BDVER2-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - mem sched: [10:1.00] +; BDVER2-NEXT: vfnmsub231ps {{.*#+}} ymm0 = -(ymm1 * mem) - ymm0 sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vzeroupper # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vzeroupper # sched: [46:4.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmsubps_256: ; HASWELL: # %bb.0: @@ -3139,7 +3139,7 @@ ; BDVER2-NEXT: vfnmsub213sd {{.*#+}} xmm0 = -(xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfnmsub231sd {{.*#+}} xmm0 = -(xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmsubsd_128: ; HASWELL: # %bb.0: @@ -3239,7 +3239,7 @@ ; BDVER2-NEXT: vfnmsub213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) - mem sched: [10:0.50] ; BDVER2-NEXT: vfnmsub231ss {{.*#+}} xmm0 = -(xmm1 * mem) - xmm0 sched: [10:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; HASWELL-LABEL: test_vfnmsubss_128: ; HASWELL: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/fma.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/fma.ll +++ llvm/trunk/test/CodeGen/X86/fma.ll @@ -247,76 +247,6 @@ ; FMA32-NEXT: ## xmm0 = (xmm1 * xmm0) + xmm2 ; FMA32-NEXT: retl ## encoding: [0xc3] ; -; FMACALL32-LABEL: test_v4f32: -; FMACALL32: ## %bb.0: ## %entry -; FMACALL32-NEXT: subl $108, %esp ## encoding: [0x83,0xec,0x6c] -; FMACALL32-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x40] -; FMACALL32-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x4c,0x24,0x30] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x20] -; FMACALL32-NEXT: vextractps $2, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x08,0x02] -; FMACALL32-NEXT: vextractps $2, %xmm1, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x4c,0x24,0x04,0x02] -; FMACALL32-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x60] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x30] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x20] -; FMACALL32-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x54] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x30] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x20] -; FMACALL32-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x30] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x20] -; FMACALL32-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x1c] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x54] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x18] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x60] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x14] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x10] -; FMACALL32-NEXT: vmovss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfa,0x10,0x44,0x24,0x1c] -; FMACALL32-NEXT: ## xmm0 = mem[0],zero,zero,zero -; FMACALL32-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x18,0x10] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0],xmm0[2,3] -; FMACALL32-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x14,0x20] -; FMACALL32-NEXT: ## xmm0 = xmm0[0,1],mem[0],xmm0[3] -; FMACALL32-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x10,0x30] -; FMACALL32-NEXT: ## xmm0 = xmm0[0,1,2],mem[0] -; FMACALL32-NEXT: addl $108, %esp ## encoding: [0x83,0xc4,0x6c] -; FMACALL32-NEXT: retl ## encoding: [0xc3] -; ; FMA64-LABEL: test_v4f32: ; FMA64: ## %bb.0: ## %entry ; FMA64-NEXT: vfmadd213ps %xmm2, %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x71,0xa8,0xc2] @@ -407,6 +337,76 @@ ; AVX512VL-NEXT: vfmadd213ps %xmm2, %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x71,0xa8,0xc2] ; AVX512VL-NEXT: ## xmm0 = (xmm1 * xmm0) + xmm2 ; AVX512VL-NEXT: retq ## encoding: [0xc3] +; +; FMACALL32_BDVER2-LABEL: test_v4f32: +; FMACALL32_BDVER2: ## %bb.0: ## %entry +; FMACALL32_BDVER2-NEXT: subl $108, %esp ## encoding: [0x83,0xec,0x6c] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x4c,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x08,0x02] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm1, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x4c,0x24,0x04,0x02] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x54,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x4c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x01] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x54] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x54,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x4c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x03] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x03] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x1c] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x54] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x18] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x60] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x14] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfa,0x10,0x44,0x24,0x1c] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0],zero,zero,zero +; FMACALL32_BDVER2-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x18,0x10] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0],xmm0[2,3] +; FMACALL32_BDVER2-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x14,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0,1],mem[0],xmm0[3] +; FMACALL32_BDVER2-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x10,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0,1,2],mem[0] +; FMACALL32_BDVER2-NEXT: addl $108, %esp ## encoding: [0x83,0xc4,0x6c] +; FMACALL32_BDVER2-NEXT: retl ## encoding: [0xc3] entry: %call = call <4 x float> @llvm.fma.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c) ret <4 x float> %call @@ -419,165 +419,6 @@ ; FMA32-NEXT: ## ymm0 = (ymm1 * ymm0) + ymm2 ; FMA32-NEXT: retl ## encoding: [0xc3] ; -; FMACALL32-LABEL: test_v8f32: -; FMACALL32: ## %bb.0: ## %entry -; FMACALL32-NEXT: subl $316, %esp ## encoding: [0x81,0xec,0x3c,0x01,0x00,0x00] -; FMACALL32-NEXT: ## imm = 0x13C -; FMACALL32-NEXT: vmovups %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x11,0x94,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovups %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x11,0x8c,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovups %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x11,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractf128 $1, %ymm2, %xmm3 ## encoding: [0xc4,0xe3,0x7d,0x19,0xd3,0x01] -; FMACALL32-NEXT: vmovaps %xmm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x5c,0x24,0x60] -; FMACALL32-NEXT: vextractps $2, %xmm3, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x5c,0x24,0x08,0x02] -; FMACALL32-NEXT: vextractf128 $1, %ymm1, %xmm2 ## encoding: [0xc4,0xe3,0x7d,0x19,0xca,0x01] -; FMACALL32-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x50] -; FMACALL32-NEXT: vextractps $2, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x02] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm1 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc1,0x01] -; FMACALL32-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x4c,0x24,0x40] -; FMACALL32-NEXT: vextractps $2, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x02] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0xb4,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] -; FMACALL32-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0xa8,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] -; FMACALL32-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x9c,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x90,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x84,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x78] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] -; FMACALL32-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x3c] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x78] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x38] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x84,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x34] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x90,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x30] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x9c,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x2c] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0xa8,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x28] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0xb4,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x24] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x20] -; FMACALL32-NEXT: vmovss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfa,0x10,0x44,0x24,0x3c] -; FMACALL32-NEXT: ## xmm0 = mem[0],zero,zero,zero -; FMACALL32-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x38,0x10] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0],xmm0[2,3] -; FMACALL32-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x34,0x20] -; FMACALL32-NEXT: ## xmm0 = xmm0[0,1],mem[0],xmm0[3] -; FMACALL32-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x30,0x30] -; FMACALL32-NEXT: ## xmm0 = xmm0[0,1,2],mem[0] -; FMACALL32-NEXT: vmovss {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfa,0x10,0x4c,0x24,0x2c] -; FMACALL32-NEXT: ## xmm1 = mem[0],zero,zero,zero -; FMACALL32-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x28,0x10] -; FMACALL32-NEXT: ## xmm1 = xmm1[0],mem[0],xmm1[2,3] -; FMACALL32-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x24,0x20] -; FMACALL32-NEXT: ## xmm1 = xmm1[0,1],mem[0],xmm1[3] -; FMACALL32-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x20,0x30] -; FMACALL32-NEXT: ## xmm1 = xmm1[0,1,2],mem[0] -; FMACALL32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] -; FMACALL32-NEXT: addl $316, %esp ## encoding: [0x81,0xc4,0x3c,0x01,0x00,0x00] -; FMACALL32-NEXT: ## imm = 0x13C -; FMACALL32-NEXT: retl ## encoding: [0xc3] -; ; FMA64-LABEL: test_v8f32: ; FMA64: ## %bb.0: ## %entry ; FMA64-NEXT: vfmadd213ps %ymm2, %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x75,0xa8,0xc2] @@ -745,6 +586,165 @@ ; AVX512VL-NEXT: vfmadd213ps %ymm2, %ymm1, %ymm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x75,0xa8,0xc2] ; AVX512VL-NEXT: ## ymm0 = (ymm1 * ymm0) + ymm2 ; AVX512VL-NEXT: retq ## encoding: [0xc3] +; +; FMACALL32_BDVER2-LABEL: test_v8f32: +; FMACALL32_BDVER2: ## %bb.0: ## %entry +; FMACALL32_BDVER2-NEXT: subl $316, %esp ## encoding: [0x81,0xec,0x3c,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## imm = 0x13C +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm2, %xmm3 ## encoding: [0xc4,0xe3,0x7d,0x19,0xd3,0x01] +; FMACALL32_BDVER2-NEXT: vmovups %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x11,0x94,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm1, %xmm2 ## encoding: [0xc4,0xe3,0x7d,0x19,0xca,0x01] +; FMACALL32_BDVER2-NEXT: vmovups %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x11,0x8c,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm1 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc1,0x01] +; FMACALL32_BDVER2-NEXT: vmovups %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x11,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x5c,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm3, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x5c,0x24,0x08,0x02] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x02] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x4c,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x02] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0xb4,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x54,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x4c,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x01] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0xa8,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x9c,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x90,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x84,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x78] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x54,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x4c,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x03] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x03] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x3c] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x78] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x38] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x84,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x34] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x90,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x30] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x9c,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x2c] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0xa8,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x28] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0xb4,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x24] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vmovss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfa,0x10,0x44,0x24,0x3c] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0],zero,zero,zero +; FMACALL32_BDVER2-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x38,0x10] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0],xmm0[2,3] +; FMACALL32_BDVER2-NEXT: vmovss {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfa,0x10,0x4c,0x24,0x2c] +; FMACALL32_BDVER2-NEXT: ## xmm1 = mem[0],zero,zero,zero +; FMACALL32_BDVER2-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x28,0x10] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0],mem[0],xmm1[2,3] +; FMACALL32_BDVER2-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x34,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0,1],mem[0],xmm0[3] +; FMACALL32_BDVER2-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x24,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0,1],mem[0],xmm1[3] +; FMACALL32_BDVER2-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x30,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0,1,2],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x20,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0,1,2],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] +; FMACALL32_BDVER2-NEXT: addl $316, %esp ## encoding: [0x81,0xc4,0x3c,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## imm = 0x13C +; FMACALL32_BDVER2-NEXT: retl ## encoding: [0xc3] entry: %call = call <8 x float> @llvm.fma.v8f32(<8 x float> %a, <8 x float> %b, <8 x float> %c) ret <8 x float> %call @@ -765,321 +765,6 @@ ; FMA32-NEXT: popl %ebp ## encoding: [0x5d] ; FMA32-NEXT: retl ## encoding: [0xc3] ; -; FMACALL32-LABEL: test_v16f32: -; FMACALL32: ## %bb.0: ## %entry -; FMACALL32-NEXT: pushl %ebp ## encoding: [0x55] -; FMACALL32-NEXT: movl %esp, %ebp ## encoding: [0x89,0xe5] -; FMACALL32-NEXT: andl $-32, %esp ## encoding: [0x83,0xe4,0xe0] -; FMACALL32-NEXT: subl $448, %esp ## encoding: [0x81,0xec,0xc0,0x01,0x00,0x00] -; FMACALL32-NEXT: ## imm = 0x1C0 -; FMACALL32-NEXT: vmovaps %ymm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x5c,0x24,0x60] -; FMACALL32-NEXT: vmovaps %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x94,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x8c,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x84,0x24,0x80,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] -; FMACALL32-NEXT: vextractf128 $1, %ymm3, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xd8,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0xb0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] -; FMACALL32-NEXT: vextractf128 $1, %ymm1, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc8,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x54,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xb0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x48,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xb0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x3c,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x30,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x24,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x18,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x0c,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x50] -; FMACALL32-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] -; FMACALL32-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0xf4,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] -; FMACALL32-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0xe8,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] -; FMACALL32-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x60] -; FMACALL32-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x50] -; FMACALL32-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0xdc,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xb0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x2c] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0xdc,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x28] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x50] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x24] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x60] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x20] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x1c] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0xe8,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x18] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0xf4,0x00,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x14] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x10] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x0c,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x4c] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x18,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x48] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x24,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x44] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x30,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x40] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x3c,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x3c] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x48,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x38] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x54,0x01,0x00,0x00] -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x34] -; FMACALL32-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x30] -; FMACALL32-NEXT: vmovss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfa,0x10,0x44,0x24,0x2c] -; FMACALL32-NEXT: ## xmm0 = mem[0],zero,zero,zero -; FMACALL32-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x28,0x10] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0],xmm0[2,3] -; FMACALL32-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x24,0x20] -; FMACALL32-NEXT: ## xmm0 = xmm0[0,1],mem[0],xmm0[3] -; FMACALL32-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x20,0x30] -; FMACALL32-NEXT: ## xmm0 = xmm0[0,1,2],mem[0] -; FMACALL32-NEXT: vmovss {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfa,0x10,0x4c,0x24,0x1c] -; FMACALL32-NEXT: ## xmm1 = mem[0],zero,zero,zero -; FMACALL32-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x18,0x10] -; FMACALL32-NEXT: ## xmm1 = xmm1[0],mem[0],xmm1[2,3] -; FMACALL32-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x14,0x20] -; FMACALL32-NEXT: ## xmm1 = xmm1[0,1],mem[0],xmm1[3] -; FMACALL32-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x10,0x30] -; FMACALL32-NEXT: ## xmm1 = xmm1[0,1,2],mem[0] -; FMACALL32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] -; FMACALL32-NEXT: vmovss {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfa,0x10,0x4c,0x24,0x4c] -; FMACALL32-NEXT: ## xmm1 = mem[0],zero,zero,zero -; FMACALL32-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x48,0x10] -; FMACALL32-NEXT: ## xmm1 = xmm1[0],mem[0],xmm1[2,3] -; FMACALL32-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x44,0x20] -; FMACALL32-NEXT: ## xmm1 = xmm1[0,1],mem[0],xmm1[3] -; FMACALL32-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x40,0x30] -; FMACALL32-NEXT: ## xmm1 = xmm1[0,1,2],mem[0] -; FMACALL32-NEXT: vmovss {{[0-9]+}}(%esp), %xmm2 ## encoding: [0xc5,0xfa,0x10,0x54,0x24,0x3c] -; FMACALL32-NEXT: ## xmm2 = mem[0],zero,zero,zero -; FMACALL32-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc4,0xe3,0x69,0x21,0x54,0x24,0x38,0x10] -; FMACALL32-NEXT: ## xmm2 = xmm2[0],mem[0],xmm2[2,3] -; FMACALL32-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc4,0xe3,0x69,0x21,0x54,0x24,0x34,0x20] -; FMACALL32-NEXT: ## xmm2 = xmm2[0,1],mem[0],xmm2[3] -; FMACALL32-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc4,0xe3,0x69,0x21,0x54,0x24,0x30,0x30] -; FMACALL32-NEXT: ## xmm2 = xmm2[0,1,2],mem[0] -; FMACALL32-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 ## encoding: [0xc4,0xe3,0x75,0x18,0xca,0x01] -; FMACALL32-NEXT: movl %ebp, %esp ## encoding: [0x89,0xec] -; FMACALL32-NEXT: popl %ebp ## encoding: [0x5d] -; FMACALL32-NEXT: retl ## encoding: [0xc3] -; ; FMA64-LABEL: test_v16f32: ; FMA64: ## %bb.0: ## %entry ; FMA64-NEXT: vfmadd213ps %ymm4, %ymm2, %ymm0 ## encoding: [0xc4,0xe2,0x6d,0xa8,0xc4] @@ -1378,6 +1063,321 @@ ; AVX512VL-NEXT: vfmadd213ps %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0x75,0x48,0xa8,0xc2] ; AVX512VL-NEXT: ## zmm0 = (zmm1 * zmm0) + zmm2 ; AVX512VL-NEXT: retq ## encoding: [0xc3] +; +; FMACALL32_BDVER2-LABEL: test_v16f32: +; FMACALL32_BDVER2: ## %bb.0: ## %entry +; FMACALL32_BDVER2-NEXT: pushl %ebp ## encoding: [0x55] +; FMACALL32_BDVER2-NEXT: movl %esp, %ebp ## encoding: [0x89,0xe5] +; FMACALL32_BDVER2-NEXT: andl $-32, %esp ## encoding: [0x83,0xe4,0xe0] +; FMACALL32_BDVER2-NEXT: subl $448, %esp ## encoding: [0x81,0xec,0xc0,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## imm = 0x1C0 +; FMACALL32_BDVER2-NEXT: vmovaps %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x84,0x24,0x80,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: vmovaps %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x94,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm3, %xmm2 ## encoding: [0xc4,0xe3,0x7d,0x19,0xda,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x8c,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm1, %xmm1 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc9,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %ymm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x5c,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x94,0x24,0xb0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x02] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x8c,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x02] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x54,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x94,0x24,0xb0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x8c,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x01] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x48,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xb0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x3c,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x30,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x24,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x18,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x0c,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x54,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x4c,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x02] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x02] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0xf4,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x54,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x4c,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x01] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x01] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0xe8,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x03] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x03] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x02] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x02] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $2, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x02] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x04,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $1, %xmm0, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x04,0x24,0x01] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0xdc,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x08] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xfa,0x11,0x44,0x24,0x04] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x80,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovss %xmm0, (%esp) ## encoding: [0xc5,0xfa,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x94,0x24,0xb0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x8c,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x44,0x24,0x08,0x03] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x54,0x24,0x04,0x03] +; FMACALL32_BDVER2-NEXT: vextractps $3, %xmm1, (%esp) ## encoding: [0xc4,0xe3,0x79,0x17,0x0c,0x24,0x03] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x2c] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0xdc,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x28] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x50] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x24] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x60] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x1c] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0xe8,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x18] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0xf4,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x14] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x10] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x0c,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x4c] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x18,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x48] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x24,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x44] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x30,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x40] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x3c,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x3c] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x48,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x38] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x54,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x34] +; FMACALL32_BDVER2-NEXT: calll _fmaf ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fmaf-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstps {{[0-9]+}}(%esp) ## encoding: [0xd9,0x5c,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfa,0x10,0x44,0x24,0x2c] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0],zero,zero,zero +; FMACALL32_BDVER2-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x28,0x10] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0],xmm0[2,3] +; FMACALL32_BDVER2-NEXT: vmovss {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfa,0x10,0x4c,0x24,0x1c] +; FMACALL32_BDVER2-NEXT: ## xmm1 = mem[0],zero,zero,zero +; FMACALL32_BDVER2-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x18,0x10] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0],mem[0],xmm1[2,3] +; FMACALL32_BDVER2-NEXT: vmovss {{[0-9]+}}(%esp), %xmm2 ## encoding: [0xc5,0xfa,0x10,0x54,0x24,0x3c] +; FMACALL32_BDVER2-NEXT: ## xmm2 = mem[0],zero,zero,zero +; FMACALL32_BDVER2-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc4,0xe3,0x69,0x21,0x54,0x24,0x38,0x10] +; FMACALL32_BDVER2-NEXT: ## xmm2 = xmm2[0],mem[0],xmm2[2,3] +; FMACALL32_BDVER2-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x24,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0,1],mem[0],xmm0[3] +; FMACALL32_BDVER2-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x14,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0,1],mem[0],xmm1[3] +; FMACALL32_BDVER2-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc4,0xe3,0x69,0x21,0x54,0x24,0x34,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm2 = xmm2[0,1],mem[0],xmm2[3] +; FMACALL32_BDVER2-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0x44,0x24,0x20,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0,1,2],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x10,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0,1,2],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc4,0xe3,0x69,0x21,0x54,0x24,0x30,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm2 = xmm2[0,1,2],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] +; FMACALL32_BDVER2-NEXT: vmovss {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfa,0x10,0x4c,0x24,0x4c] +; FMACALL32_BDVER2-NEXT: ## xmm1 = mem[0],zero,zero,zero +; FMACALL32_BDVER2-NEXT: vinsertps $16, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x48,0x10] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0],mem[0],xmm1[2,3] +; FMACALL32_BDVER2-NEXT: vinsertps $32, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x44,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0,1],mem[0],xmm1[3] +; FMACALL32_BDVER2-NEXT: vinsertps $48, {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc4,0xe3,0x71,0x21,0x4c,0x24,0x40,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0,1,2],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 ## encoding: [0xc4,0xe3,0x75,0x18,0xca,0x01] +; FMACALL32_BDVER2-NEXT: movl %ebp, %esp ## encoding: [0x89,0xec] +; FMACALL32_BDVER2-NEXT: popl %ebp ## encoding: [0x5d] +; FMACALL32_BDVER2-NEXT: retl ## encoding: [0xc3] entry: %call = call <16 x float> @llvm.fma.v16f32(<16 x float> %a, <16 x float> %b, <16 x float> %c) ret <16 x float> %call @@ -1390,41 +1390,6 @@ ; FMA32-NEXT: ## xmm0 = (xmm1 * xmm0) + xmm2 ; FMA32-NEXT: retl ## encoding: [0xc3] ; -; FMACALL32-LABEL: test_v2f64: -; FMACALL32: ## %bb.0: ## %entry -; FMACALL32-NEXT: subl $108, %esp ## encoding: [0x83,0xec,0x6c] -; FMACALL32-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x30] -; FMACALL32-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x4c,0x24,0x40] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x50] -; FMACALL32-NEXT: vmovlps %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x54,0x24,0x10] -; FMACALL32-NEXT: vmovlhps %xmm1, %xmm0, %xmm2 ## encoding: [0xc5,0xf8,0x16,0xd1] -; FMACALL32-NEXT: ## xmm2 = xmm0[0],xmm1[0] -; FMACALL32-NEXT: vmovups %xmm2, (%esp) ## encoding: [0xc5,0xf8,0x11,0x14,0x24] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: vmovapd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x28,0x44,0x24,0x30] -; FMACALL32-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] -; FMACALL32-NEXT: vmovlps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x12,0x44,0x24,0x58] -; FMACALL32-NEXT: ## xmm0 = mem[0,1],xmm0[2,3] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x28] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x20] -; FMACALL32-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfb,0x10,0x44,0x24,0x28] -; FMACALL32-NEXT: ## xmm0 = mem[0],zero -; FMACALL32-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x16,0x44,0x24,0x20] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0] -; FMACALL32-NEXT: addl $108, %esp ## encoding: [0x83,0xc4,0x6c] -; FMACALL32-NEXT: retl ## encoding: [0xc3] -; ; FMA64-LABEL: test_v2f64: ; FMA64: ## %bb.0: ## %entry ; FMA64-NEXT: vfmadd213pd %xmm2, %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0xf1,0xa8,0xc2] @@ -1477,6 +1442,41 @@ ; AVX512VL-NEXT: vfmadd213pd %xmm2, %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf1,0xa8,0xc2] ; AVX512VL-NEXT: ## xmm0 = (xmm1 * xmm0) + xmm2 ; AVX512VL-NEXT: retq ## encoding: [0xc3] +; +; FMACALL32_BDVER2-LABEL: test_v2f64: +; FMACALL32_BDVER2: ## %bb.0: ## %entry +; FMACALL32_BDVER2-NEXT: subl $108, %esp ## encoding: [0x83,0xec,0x6c] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vmovlhps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x16,0xc1] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],xmm1[0] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x4c,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vmovlps %xmm2, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x54,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovapd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x28,0x44,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x40] +; FMACALL32_BDVER2-NEXT: vmovlps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x12,0x44,0x24,0x58] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0,1],xmm0[2,3] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x28] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfb,0x10,0x44,0x24,0x28] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0],zero +; FMACALL32_BDVER2-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x16,0x44,0x24,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0] +; FMACALL32_BDVER2-NEXT: addl $108, %esp ## encoding: [0x83,0xc4,0x6c] +; FMACALL32_BDVER2-NEXT: retl ## encoding: [0xc3] entry: %call = call <2 x double> @llvm.fma.v2f64(<2 x double> %a, <2 x double> %b, <2 x double> %c) ret <2 x double> %call @@ -1489,90 +1489,6 @@ ; FMA32-NEXT: ## ymm0 = (ymm1 * ymm0) + ymm2 ; FMA32-NEXT: retl ## encoding: [0xc3] ; -; FMACALL32-LABEL: test_v4f64: -; FMACALL32: ## %bb.0: ## %entry -; FMACALL32-NEXT: subl $252, %esp ## encoding: [0x81,0xec,0xfc,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovups %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x11,0x94,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovups %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x11,0x8c,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovups %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x11,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractf128 $1, %ymm2, %xmm3 ## encoding: [0xc4,0xe3,0x7d,0x19,0xd3,0x01] -; FMACALL32-NEXT: vmovaps %xmm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x5c,0x24,0x70] -; FMACALL32-NEXT: vmovlps %xmm3, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x5c,0x24,0x10] -; FMACALL32-NEXT: vextractf128 $1, %ymm1, %xmm2 ## encoding: [0xc4,0xe3,0x7d,0x19,0xca,0x01] -; FMACALL32-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x50] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm1 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc1,0x01] -; FMACALL32-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x4c,0x24,0x60] -; FMACALL32-NEXT: vmovlhps %xmm2, %xmm1, %xmm0 ## encoding: [0xc5,0xf0,0x16,0xc2] -; FMACALL32-NEXT: ## xmm0 = xmm1[0],xmm2[0] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x44] -; FMACALL32-NEXT: vmovupd {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfd,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vunpckhpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x15,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = xmm0[1],mem[1] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x38] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: vmovapd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x28,0x44,0x24,0x70] -; FMACALL32-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] -; FMACALL32-NEXT: vmovlps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x12,0x44,0x24,0x68] -; FMACALL32-NEXT: ## xmm0 = mem[0,1],xmm0[2,3] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x30] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x38] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x28] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x44] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x20] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x18] -; FMACALL32-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfb,0x10,0x44,0x24,0x30] -; FMACALL32-NEXT: ## xmm0 = mem[0],zero -; FMACALL32-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x16,0x44,0x24,0x28] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0] -; FMACALL32-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfb,0x10,0x4c,0x24,0x20] -; FMACALL32-NEXT: ## xmm1 = mem[0],zero -; FMACALL32-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x16,0x4c,0x24,0x18] -; FMACALL32-NEXT: ## xmm1 = xmm1[0],mem[0] -; FMACALL32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] -; FMACALL32-NEXT: addl $252, %esp ## encoding: [0x81,0xc4,0xfc,0x00,0x00,0x00] -; FMACALL32-NEXT: retl ## encoding: [0xc3] -; ; FMA64-LABEL: test_v4f64: ; FMA64: ## %bb.0: ## %entry ; FMA64-NEXT: vfmadd213pd %ymm2, %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0xf5,0xa8,0xc2] @@ -1664,6 +1580,90 @@ ; AVX512VL-NEXT: vfmadd213pd %ymm2, %ymm1, %ymm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf5,0xa8,0xc2] ; AVX512VL-NEXT: ## ymm0 = (ymm1 * ymm0) + ymm2 ; AVX512VL-NEXT: retq ## encoding: [0xc3] +; +; FMACALL32_BDVER2-LABEL: test_v4f64: +; FMACALL32_BDVER2: ## %bb.0: ## %entry +; FMACALL32_BDVER2-NEXT: subl $252, %esp ## encoding: [0x81,0xec,0xfc,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm2, %xmm3 ## encoding: [0xc4,0xe3,0x7d,0x19,0xd3,0x01] +; FMACALL32_BDVER2-NEXT: vmovups %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x11,0x94,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovups %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x11,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm1, %xmm2 ## encoding: [0xc4,0xe3,0x7d,0x19,0xca,0x01] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovups %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x11,0x8c,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: vmovlhps %xmm2, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x16,0xc2] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],xmm2[0] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x5c,0x24,0x70] +; FMACALL32_BDVER2-NEXT: vmovlps %xmm3, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x5c,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x54,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x44] +; FMACALL32_BDVER2-NEXT: vmovupd {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfd,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vunpckhpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x15,0x84,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[1],mem[1] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x38] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x10,0x84,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovapd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x28,0x44,0x24,0x70] +; FMACALL32_BDVER2-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x50] +; FMACALL32_BDVER2-NEXT: vmovlps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x12,0x44,0x24,0x68] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0,1],xmm0[2,3] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x30] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x38] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x28] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x44] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x18] +; FMACALL32_BDVER2-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfb,0x10,0x44,0x24,0x30] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0],zero +; FMACALL32_BDVER2-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfb,0x10,0x4c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: ## xmm1 = mem[0],zero +; FMACALL32_BDVER2-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x16,0x44,0x24,0x28] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0] +; FMACALL32_BDVER2-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x16,0x4c,0x24,0x18] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] +; FMACALL32_BDVER2-NEXT: addl $252, %esp ## encoding: [0x81,0xc4,0xfc,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: retl ## encoding: [0xc3] entry: %call = call <4 x double> @llvm.fma.v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %c) ret <4 x double> %call @@ -1684,179 +1684,6 @@ ; FMA32-NEXT: popl %ebp ## encoding: [0x5d] ; FMA32-NEXT: retl ## encoding: [0xc3] ; -; FMACALL32-LABEL: test_v8f64: -; FMACALL32: ## %bb.0: ## %entry -; FMACALL32-NEXT: pushl %ebp ## encoding: [0x55] -; FMACALL32-NEXT: movl %esp, %ebp ## encoding: [0x89,0xe5] -; FMACALL32-NEXT: andl $-32, %esp ## encoding: [0x83,0xe4,0xe0] -; FMACALL32-NEXT: subl $384, %esp ## encoding: [0x81,0xec,0x80,0x01,0x00,0x00] -; FMACALL32-NEXT: ## imm = 0x180 -; FMACALL32-NEXT: vmovaps %ymm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x9c,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x94,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x8c,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x29,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] -; FMACALL32-NEXT: vextractf128 $1, %ymm3, %xmm2 ## encoding: [0xc4,0xe3,0x7d,0x19,0xda,0x01] -; FMACALL32-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x94,0x24,0x40,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractf128 $1, %ymm1, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc8,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0x50,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovlhps %xmm2, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x16,0xc2] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],xmm2[0] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x94,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovapd 40(%ebp), %ymm0 ## encoding: [0xc5,0xfd,0x28,0x45,0x28] -; FMACALL32-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vunpckhpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x15,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = xmm0[1],mem[1] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0x88,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] -; FMACALL32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] -; FMACALL32-NEXT: vmovapd %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x29,0x44,0x24,0x30] -; FMACALL32-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm1 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc1,0x01] -; FMACALL32-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x8c,0x24,0x30,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] -; FMACALL32-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x20] -; FMACALL32-NEXT: vunpckhpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x15,0xc1] -; FMACALL32-NEXT: ## xmm0 = xmm0[1],xmm1[1] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0xbc,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x30] -; FMACALL32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x20] -; FMACALL32-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0x30,0x01,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x30] -; FMACALL32-NEXT: vmovapd 8(%ebp), %ymm0 ## encoding: [0xc5,0xfd,0x28,0x45,0x08] -; FMACALL32-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vunpckhpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x15,0x84,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = xmm0[1],mem[1] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill -; FMACALL32-NEXT: ## encoding: [0xdb,0x7c,0x24,0x20] -; FMACALL32-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] -; FMACALL32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xe0,0x00,0x00,0x00] -; FMACALL32-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0x00,0x01,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: vmovapd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf9,0x28,0x84,0x24,0x60,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] -; FMACALL32-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x40,0x01,0x00,0x00] -; FMACALL32-NEXT: vmovlps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xc5,0xf8,0x12,0x84,0x24,0x58,0x01,0x00,0x00] -; FMACALL32-NEXT: ## xmm0 = mem[0,1],xmm0[2,3] -; FMACALL32-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x60] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x20] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x58] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0x6c,0x24,0x30] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x50] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0xa0,0x00,0x00,0x00] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x48] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0xc0,0x00,0x00,0x00] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x9c,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x88,0x00,0x00,0x00] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x78] -; FMACALL32-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload -; FMACALL32-NEXT: ## encoding: [0xdb,0xac,0x24,0x94,0x00,0x00,0x00] -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x70] -; FMACALL32-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] -; FMACALL32-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 -; FMACALL32-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x68] -; FMACALL32-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfb,0x10,0x44,0x24,0x60] -; FMACALL32-NEXT: ## xmm0 = mem[0],zero -; FMACALL32-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x16,0x44,0x24,0x58] -; FMACALL32-NEXT: ## xmm0 = xmm0[0],mem[0] -; FMACALL32-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfb,0x10,0x4c,0x24,0x50] -; FMACALL32-NEXT: ## xmm1 = mem[0],zero -; FMACALL32-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x16,0x4c,0x24,0x48] -; FMACALL32-NEXT: ## xmm1 = xmm1[0],mem[0] -; FMACALL32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] -; FMACALL32-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfb,0x10,0x8c,0x24,0x80,0x00,0x00,0x00] -; FMACALL32-NEXT: ## xmm1 = mem[0],zero -; FMACALL32-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x16,0x4c,0x24,0x78] -; FMACALL32-NEXT: ## xmm1 = xmm1[0],mem[0] -; FMACALL32-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm2 ## encoding: [0xc5,0xfb,0x10,0x54,0x24,0x70] -; FMACALL32-NEXT: ## xmm2 = mem[0],zero -; FMACALL32-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc5,0xe9,0x16,0x54,0x24,0x68] -; FMACALL32-NEXT: ## xmm2 = xmm2[0],mem[0] -; FMACALL32-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 ## encoding: [0xc4,0xe3,0x75,0x18,0xca,0x01] -; FMACALL32-NEXT: movl %ebp, %esp ## encoding: [0x89,0xec] -; FMACALL32-NEXT: popl %ebp ## encoding: [0x5d] -; FMACALL32-NEXT: retl ## encoding: [0xc3] -; ; FMA64-LABEL: test_v8f64: ; FMA64: ## %bb.0: ## %entry ; FMA64-NEXT: vfmadd213pd %ymm4, %ymm2, %ymm0 ## encoding: [0xc4,0xe2,0xed,0xa8,0xc4] @@ -2011,6 +1838,179 @@ ; AVX512VL-NEXT: vfmadd213pd %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0xf5,0x48,0xa8,0xc2] ; AVX512VL-NEXT: ## zmm0 = (zmm1 * zmm0) + zmm2 ; AVX512VL-NEXT: retq ## encoding: [0xc3] +; +; FMACALL32_BDVER2-LABEL: test_v8f64: +; FMACALL32_BDVER2: ## %bb.0: ## %entry +; FMACALL32_BDVER2-NEXT: pushl %ebp ## encoding: [0x55] +; FMACALL32_BDVER2-NEXT: movl %esp, %ebp ## encoding: [0x89,0xe5] +; FMACALL32_BDVER2-NEXT: andl $-32, %esp ## encoding: [0x83,0xe4,0xe0] +; FMACALL32_BDVER2-NEXT: subl $384, %esp ## encoding: [0x81,0xec,0x80,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## imm = 0x180 +; FMACALL32_BDVER2-NEXT: vmovaps %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: vmovaps %ymm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x94,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm3, %xmm2 ## encoding: [0xc4,0xe3,0x7d,0x19,0xda,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %ymm3, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x9c,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps %ymm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 32-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x29,0x8c,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x94,0x24,0x40,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm1, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc8,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x84,0x24,0x50,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovlhps %xmm2, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x16,0xc2] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],xmm2[0] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovapd 40(%ebp), %ymm0 ## encoding: [0xc5,0xfd,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x94,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vunpckhpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x15,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[1],mem[1] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 40(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x28] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0x88,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovapd %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x29,0x44,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm1 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc1,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x8c,0x24,0x30,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vextractf128 $1, %ymm0, %xmm0 ## encoding: [0xc4,0xe3,0x7d,0x19,0xc0,0x01] +; FMACALL32_BDVER2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x29,0x44,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vunpckhpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x15,0xc1] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[1],xmm1[1] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xbc,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x44,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0x30,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovapd 8(%ebp), %ymm0 ## encoding: [0xc5,0xfd,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x30] +; FMACALL32_BDVER2-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vunpckhpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x15,0x84,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[1],mem[1] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovaps 8(%ebp), %ymm0 ## encoding: [0xc5,0xfc,0x28,0x45,0x08] +; FMACALL32_BDVER2-NEXT: fstpt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Spill +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x7c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf8,0x13,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 ## 32-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xfc,0x28,0x84,0x24,0xe0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vunpcklpd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x14,0x84,0x24,0x00,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: vmovapd {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf9,0x28,0x84,0x24,0x60,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovhpd %xmm0, {{[0-9]+}}(%esp) ## encoding: [0xc5,0xf9,0x17,0x44,0x24,0x10] +; FMACALL32_BDVER2-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x28,0x84,0x24,0x40,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: vmovlps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xc5,0xf8,0x12,0x84,0x24,0x58,0x01,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0,1],xmm0[2,3] +; FMACALL32_BDVER2-NEXT: vmovups %xmm0, (%esp) ## encoding: [0xc5,0xf8,0x11,0x04,0x24] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x60] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x20] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x58] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0x6c,0x24,0x30] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x50] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0xa0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x48] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0xc0,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x9c,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x88,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x78] +; FMACALL32_BDVER2-NEXT: fldt {{[-0-9]+}}(%e{{[sb]}}p) ## 10-byte Folded Reload +; FMACALL32_BDVER2-NEXT: ## encoding: [0xdb,0xac,0x24,0x94,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x70] +; FMACALL32_BDVER2-NEXT: calll _fma ## encoding: [0xe8,A,A,A,A] +; FMACALL32_BDVER2-NEXT: ## fixup A - offset: 1, value: _fma-4, kind: FK_PCRel_4 +; FMACALL32_BDVER2-NEXT: fstpl {{[0-9]+}}(%esp) ## encoding: [0xdd,0x5c,0x24,0x68] +; FMACALL32_BDVER2-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xc5,0xfb,0x10,0x44,0x24,0x60] +; FMACALL32_BDVER2-NEXT: ## xmm0 = mem[0],zero +; FMACALL32_BDVER2-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfb,0x10,0x4c,0x24,0x50] +; FMACALL32_BDVER2-NEXT: ## xmm1 = mem[0],zero +; FMACALL32_BDVER2-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x16,0x44,0x24,0x58] +; FMACALL32_BDVER2-NEXT: ## xmm0 = xmm0[0],mem[0] +; FMACALL32_BDVER2-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x16,0x4c,0x24,0x48] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0],mem[0] +; FMACALL32_BDVER2-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm2 ## encoding: [0xc5,0xfb,0x10,0x54,0x24,0x70] +; FMACALL32_BDVER2-NEXT: ## xmm2 = mem[0],zero +; FMACALL32_BDVER2-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm2, %xmm2 ## encoding: [0xc5,0xe9,0x16,0x54,0x24,0x68] +; FMACALL32_BDVER2-NEXT: ## xmm2 = xmm2[0],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x18,0xc1,0x01] +; FMACALL32_BDVER2-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm1 ## encoding: [0xc5,0xfb,0x10,0x8c,0x24,0x80,0x00,0x00,0x00] +; FMACALL32_BDVER2-NEXT: ## xmm1 = mem[0],zero +; FMACALL32_BDVER2-NEXT: vmovhpd {{[0-9]+}}(%esp), %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x16,0x4c,0x24,0x78] +; FMACALL32_BDVER2-NEXT: ## xmm1 = xmm1[0],mem[0] +; FMACALL32_BDVER2-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 ## encoding: [0xc4,0xe3,0x75,0x18,0xca,0x01] +; FMACALL32_BDVER2-NEXT: movl %ebp, %esp ## encoding: [0x89,0xec] +; FMACALL32_BDVER2-NEXT: popl %ebp ## encoding: [0x5d] +; FMACALL32_BDVER2-NEXT: retl ## encoding: [0xc3] entry: %call = call <8 x double> @llvm.fma.v8f64(<8 x double> %a, <8 x double> %b, <8 x double> %c) ret <8 x double> %call Index: llvm/trunk/test/CodeGen/X86/fma4-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/fma4-schedule.ll +++ llvm/trunk/test/CodeGen/X86/fma4-schedule.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+fma4 | FileCheck %s --check-prefixes=CHECK,GENERIC -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+fma4 | FileCheck %s --check-prefixes=CHECK,BDVER,BDVER12,BDVER1 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+fma4 -mattr=-fma | FileCheck %s --check-prefixes=CHECK,BDVER,BDVER12,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefixes=CHECK,BDVER,BDVER12,BDVER1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-fma | FileCheck %s --check-prefixes=CHECK,BDVER,BDVER12,BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver3 -mattr=-fma | FileCheck %s --check-prefixes=CHECK,BDVER,BDVER34,BDVER3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver4 -mattr=-fma | FileCheck %s --check-prefixes=CHECK,BDVER,BDVER34,BDVER4 @@ -26,7 +26,7 @@ ; BDVER12-NEXT: vfmaddpd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmaddpd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddpd_128: ; BDVER34: # %bb.0: @@ -55,11 +55,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmaddpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmaddpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmaddpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmaddpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmaddpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddpd_256: ; BDVER34: # %bb.0: @@ -91,7 +91,7 @@ ; BDVER12-NEXT: vfmaddps (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmaddps %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddps_128: ; BDVER34: # %bb.0: @@ -120,11 +120,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmaddps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmaddps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmaddps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmaddps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmaddps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddps_256: ; BDVER34: # %bb.0: @@ -156,7 +156,7 @@ ; BDVER12-NEXT: vfmaddsd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmaddsd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddsd_128: ; BDVER34: # %bb.0: @@ -187,7 +187,7 @@ ; BDVER12-NEXT: vfmaddss (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmaddss %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddss_128: ; BDVER34: # %bb.0: @@ -222,7 +222,7 @@ ; BDVER12-NEXT: vfmaddsubpd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmaddsubpd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddsubpd_128: ; BDVER34: # %bb.0: @@ -251,11 +251,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmaddsubpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmaddsubpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmaddsubpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmaddsubpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmaddsubpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddsubpd_256: ; BDVER34: # %bb.0: @@ -287,7 +287,7 @@ ; BDVER12-NEXT: vfmaddsubps (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmaddsubps %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddsubps_128: ; BDVER34: # %bb.0: @@ -316,11 +316,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmaddsubps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmaddsubps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmaddsubps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmaddsubps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmaddsubps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmaddsubps_256: ; BDVER34: # %bb.0: @@ -356,7 +356,7 @@ ; BDVER12-NEXT: vfmsubaddpd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmsubaddpd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubaddpd_128: ; BDVER34: # %bb.0: @@ -385,11 +385,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmsubaddpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmsubaddpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmsubaddpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmsubaddpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmsubaddpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubaddpd_256: ; BDVER34: # %bb.0: @@ -421,7 +421,7 @@ ; BDVER12-NEXT: vfmsubaddps (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmsubaddps %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubaddps_128: ; BDVER34: # %bb.0: @@ -450,11 +450,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmsubaddps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmsubaddps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmsubaddps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmsubaddps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmsubaddps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubaddps_256: ; BDVER34: # %bb.0: @@ -490,7 +490,7 @@ ; BDVER12-NEXT: vfmsubpd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmsubpd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubpd_128: ; BDVER34: # %bb.0: @@ -519,11 +519,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmsubpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmsubpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmsubpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmsubpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmsubpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubpd_256: ; BDVER34: # %bb.0: @@ -555,7 +555,7 @@ ; BDVER12-NEXT: vfmsubps (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmsubps %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubps_128: ; BDVER34: # %bb.0: @@ -584,11 +584,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfmsubps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfmsubps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfmsubps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfmsubps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfmsubps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubps_256: ; BDVER34: # %bb.0: @@ -620,7 +620,7 @@ ; BDVER12-NEXT: vfmsubsd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmsubsd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubsd_128: ; BDVER34: # %bb.0: @@ -651,7 +651,7 @@ ; BDVER12-NEXT: vfmsubss (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfmsubss %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfmsubss_128: ; BDVER34: # %bb.0: @@ -686,7 +686,7 @@ ; BDVER12-NEXT: vfnmaddpd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmaddpd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmaddpd_128: ; BDVER34: # %bb.0: @@ -715,11 +715,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfnmaddpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfnmaddpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfnmaddpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfnmaddpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfnmaddpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmaddpd_256: ; BDVER34: # %bb.0: @@ -751,7 +751,7 @@ ; BDVER12-NEXT: vfnmaddps (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmaddps %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmaddps_128: ; BDVER34: # %bb.0: @@ -780,11 +780,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfnmaddps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfnmaddps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfnmaddps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfnmaddps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmaddps_256: ; BDVER34: # %bb.0: @@ -816,7 +816,7 @@ ; BDVER12-NEXT: vfnmaddsd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmaddsd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmaddsd_128: ; BDVER34: # %bb.0: @@ -847,7 +847,7 @@ ; BDVER12-NEXT: vfnmaddss (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmaddss %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmaddss_128: ; BDVER34: # %bb.0: @@ -882,7 +882,7 @@ ; BDVER12-NEXT: vfnmsubpd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmsubpd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmsubpd_128: ; BDVER34: # %bb.0: @@ -911,11 +911,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfnmsubpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfnmsubpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfnmsubpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfnmsubpd (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfnmsubpd %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmsubpd_256: ; BDVER34: # %bb.0: @@ -947,7 +947,7 @@ ; BDVER12-NEXT: vfnmsubps (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmsubps %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmsubps_128: ; BDVER34: # %bb.0: @@ -976,11 +976,11 @@ ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP ; BDVER12-NEXT: vfnmsubps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER12-NEXT: vfnmsubps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] -; BDVER12-NEXT: vfnmsubps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:0.50] +; BDVER12-NEXT: vfnmsubps (%rdi), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] +; BDVER12-NEXT: vfnmsubps %ymm1, (%rdi), %ymm0, %ymm0 # sched: [10:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmsubps_256: ; BDVER34: # %bb.0: @@ -1012,7 +1012,7 @@ ; BDVER12-NEXT: vfnmsubsd (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmsubsd %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmsubsd_128: ; BDVER34: # %bb.0: @@ -1043,7 +1043,7 @@ ; BDVER12-NEXT: vfnmsubss (%rdi), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: vfnmsubss %xmm1, (%rdi), %xmm0, %xmm0 # sched: [10:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER34-LABEL: test_vfnmsubss_128: ; BDVER34: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/lea32-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/lea32-schedule.ll +++ llvm/trunk/test/CodeGen/X86/lea32-schedule.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=-slow-3ops-lea | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -65,7 +65,7 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal -24(%rdi), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_offset: ; BTVER2: # %bb.0: @@ -135,7 +135,7 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal 1024(%rdi), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_offset_big: ; BTVER2: # %bb.0: @@ -214,7 +214,7 @@ ; BDVER2-NEXT: # kill: def $esi killed $esi def $rsi ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal (%rdi,%rsi), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add: ; BTVER2: # %bb.0: @@ -299,7 +299,7 @@ ; BDVER2-NEXT: # kill: def $esi killed $esi def $rsi ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal 16(%rdi,%rsi), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_offset: ; BTVER2: # %bb.0: @@ -390,7 +390,7 @@ ; BDVER2-NEXT: # kill: def $esi killed $esi def $rsi ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal -4096(%rdi,%rsi), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_offset_big: ; BTVER2: # %bb.0: @@ -463,7 +463,7 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_mul: ; BTVER2: # %bb.0: @@ -538,7 +538,7 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal -32(%rdi,%rdi,2), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_mul_offset: ; BTVER2: # %bb.0: @@ -619,7 +619,7 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal 10000(%rdi,%rdi,8), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_mul_offset_big: ; BTVER2: # %bb.0: @@ -698,7 +698,7 @@ ; BDVER2-NEXT: # kill: def $esi killed $esi def $rsi ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal (%rdi,%rsi,2), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_scale: ; BTVER2: # %bb.0: @@ -784,7 +784,7 @@ ; BDVER2-NEXT: # kill: def $esi killed $esi def $rsi ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal 96(%rdi,%rsi,4), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_scale_offset: ; BTVER2: # %bb.0: @@ -876,7 +876,7 @@ ; BDVER2-NEXT: # kill: def $esi killed $esi def $rsi ; BDVER2-NEXT: # kill: def $edi killed $edi def $rdi ; BDVER2-NEXT: leal -1200(%rdi,%rsi,8), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_scale_offset_big: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/lea64-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/lea64-schedule.ll +++ llvm/trunk/test/CodeGen/X86/lea64-schedule.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=-slow-3ops-lea | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -57,7 +57,7 @@ ; BDVER2-LABEL: test_lea_offset: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq -24(%rdi), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_offset: ; BTVER2: # %bb.0: @@ -117,7 +117,7 @@ ; BDVER2-LABEL: test_lea_offset_big: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq 1024(%rdi), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_offset_big: ; BTVER2: # %bb.0: @@ -178,7 +178,7 @@ ; BDVER2-LABEL: test_lea_add: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq (%rdi,%rsi), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add: ; BTVER2: # %bb.0: @@ -243,7 +243,7 @@ ; BDVER2-LABEL: test_lea_add_offset: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq 16(%rdi,%rsi), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_offset: ; BTVER2: # %bb.0: @@ -314,7 +314,7 @@ ; BDVER2-LABEL: test_lea_add_offset_big: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq -4096(%rdi,%rsi), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_offset_big: ; BTVER2: # %bb.0: @@ -375,7 +375,7 @@ ; BDVER2-LABEL: test_lea_mul: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_mul: ; BTVER2: # %bb.0: @@ -440,7 +440,7 @@ ; BDVER2-LABEL: test_lea_mul_offset: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq -32(%rdi,%rdi,2), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_mul_offset: ; BTVER2: # %bb.0: @@ -511,7 +511,7 @@ ; BDVER2-LABEL: test_lea_mul_offset_big: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq 10000(%rdi,%rdi,8), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_mul_offset_big: ; BTVER2: # %bb.0: @@ -572,7 +572,7 @@ ; BDVER2-LABEL: test_lea_add_scale: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq (%rdi,%rsi,2), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_scale: ; BTVER2: # %bb.0: @@ -638,7 +638,7 @@ ; BDVER2-LABEL: test_lea_add_scale_offset: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq 96(%rdi,%rsi,4), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_scale_offset: ; BTVER2: # %bb.0: @@ -710,7 +710,7 @@ ; BDVER2-LABEL: test_lea_add_scale_offset_big: ; BDVER2: # %bb.0: ; BDVER2-NEXT: leaq -1200(%rdi,%rsi,8), %rax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lea_add_scale_offset_big: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/lwp-intrinsics.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/lwp-intrinsics.ll +++ llvm/trunk/test/CodeGen/X86/lwp-intrinsics.ll @@ -40,14 +40,41 @@ } define i8 @test_lwpins32_rri(i32 %a0, i32 %a1) nounwind { -; X86-LABEL: test_lwpins32_rri: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: addl %ecx, %ecx -; X86-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF -; X86-NEXT: setb %al -; X86-NEXT: retl +; X86_BDVER1-LABEL: test_lwpins32_rri: +; X86_BDVER1: # %bb.0: +; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER1-NEXT: addl %ecx, %ecx +; X86_BDVER1-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF +; X86_BDVER1-NEXT: setb %al +; X86_BDVER1-NEXT: retl +; +; X86_BDVER2-LABEL: test_lwpins32_rri: +; X86_BDVER2: # %bb.0: +; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER2-NEXT: addl %ecx, %ecx +; X86_BDVER2-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF +; X86_BDVER2-NEXT: setb %al +; X86_BDVER2-NEXT: retl +; +; X86_BDVER3-LABEL: test_lwpins32_rri: +; X86_BDVER3: # %bb.0: +; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER3-NEXT: addl %ecx, %ecx +; X86_BDVER3-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF +; X86_BDVER3-NEXT: setb %al +; X86_BDVER3-NEXT: retl +; +; X86_BDVER4-LABEL: test_lwpins32_rri: +; X86_BDVER4: # %bb.0: +; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER4-NEXT: addl %ecx, %ecx +; X86_BDVER4-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF +; X86_BDVER4-NEXT: setb %al +; X86_BDVER4-NEXT: retl ; ; X64-LABEL: test_lwpins32_rri: ; X64: # %bb.0: @@ -80,13 +107,37 @@ } define void @test_lwpval32_rri(i32 %a0, i32 %a1) nounwind { -; X86-LABEL: test_lwpval32_rri: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: addl %ecx, %ecx -; X86-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98 -; X86-NEXT: retl +; X86_BDVER1-LABEL: test_lwpval32_rri: +; X86_BDVER1: # %bb.0: +; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER1-NEXT: addl %ecx, %ecx +; X86_BDVER1-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98 +; X86_BDVER1-NEXT: retl +; +; X86_BDVER2-LABEL: test_lwpval32_rri: +; X86_BDVER2: # %bb.0: +; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER2-NEXT: addl %ecx, %ecx +; X86_BDVER2-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98 +; X86_BDVER2-NEXT: retl +; +; X86_BDVER3-LABEL: test_lwpval32_rri: +; X86_BDVER3: # %bb.0: +; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER3-NEXT: addl %ecx, %ecx +; X86_BDVER3-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98 +; X86_BDVER3-NEXT: retl +; +; X86_BDVER4-LABEL: test_lwpval32_rri: +; X86_BDVER4: # %bb.0: +; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86_BDVER4-NEXT: addl %ecx, %ecx +; X86_BDVER4-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98 +; X86_BDVER4-NEXT: retl ; ; X64-LABEL: test_lwpval32_rri: ; X64: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/lwp-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/lwp-schedule.ll +++ llvm/trunk/test/CodeGen/X86/lwp-schedule.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=x86-64 -mattr=+lwp | FileCheck %s --check-prefix=GENERIC -; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=x86-64 -mattr=+lwp | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER1 -; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=x86-64 -mattr=+lwp | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER1 +; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver3 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER3 ; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER4 @@ -13,8 +13,8 @@ ; ; BDVER12-LABEL: test_llwpcb: ; BDVER12: # %bb.0: -; BDVER12-NEXT: llwpcb %rdi # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: llwpcb %rdi # sched: [100:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_llwpcb: ; BDVER3: # %bb.0: @@ -37,8 +37,8 @@ ; ; BDVER12-LABEL: test_slwpcb: ; BDVER12: # %bb.0: -; BDVER12-NEXT: slwpcb %rax # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: slwpcb %rax # sched: [100:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_slwpcb: ; BDVER3: # %bb.0: @@ -64,11 +64,11 @@ ; ; BDVER12-LABEL: test_lwpins32_rri: ; BDVER12: # %bb.0: -; BDVER12-NEXT: addl %esi, %esi # sched: [1:0.33] +; BDVER12-NEXT: addl %esi, %esi # sched: [1:0.50] ; BDVER12-NEXT: lwpins $-1985229329, %esi, %edi # imm = 0x89ABCDEF -; BDVER12-NEXT: # sched: [100:0.33] +; BDVER12-NEXT: # sched: [100:0.50] ; BDVER12-NEXT: setb %al # sched: [1:0.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpins32_rri: ; BDVER3: # %bb.0: @@ -99,9 +99,9 @@ ; BDVER12-LABEL: test_lwpins32_rmi: ; BDVER12: # %bb.0: ; BDVER12-NEXT: lwpins $1985229328, (%rsi), %edi # imm = 0x76543210 -; BDVER12-NEXT: # sched: [100:0.33] +; BDVER12-NEXT: # sched: [100:0.50] ; BDVER12-NEXT: setb %al # sched: [1:0.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpins32_rmi: ; BDVER3: # %bb.0: @@ -130,9 +130,9 @@ ; BDVER12-LABEL: test_lwpins64_rri: ; BDVER12: # %bb.0: ; BDVER12-NEXT: lwpins $-1985229329, %esi, %rdi # imm = 0x89ABCDEF -; BDVER12-NEXT: # sched: [100:0.33] +; BDVER12-NEXT: # sched: [100:0.50] ; BDVER12-NEXT: setb %al # sched: [1:0.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpins64_rri: ; BDVER3: # %bb.0: @@ -160,9 +160,9 @@ ; BDVER12-LABEL: test_lwpins64_rmi: ; BDVER12: # %bb.0: ; BDVER12-NEXT: lwpins $1985229328, (%rsi), %rdi # imm = 0x76543210 -; BDVER12-NEXT: # sched: [100:0.33] +; BDVER12-NEXT: # sched: [100:0.50] ; BDVER12-NEXT: setb %al # sched: [1:0.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpins64_rmi: ; BDVER3: # %bb.0: @@ -190,10 +190,10 @@ ; ; BDVER12-LABEL: test_lwpval32_rri: ; BDVER12: # %bb.0: -; BDVER12-NEXT: addl %esi, %esi # sched: [1:0.33] +; BDVER12-NEXT: addl %esi, %esi # sched: [1:0.50] ; BDVER12-NEXT: lwpval $-19088744, %esi, %edi # imm = 0xFEDCBA98 -; BDVER12-NEXT: # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: # sched: [100:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpval32_rri: ; BDVER3: # %bb.0: @@ -221,8 +221,8 @@ ; BDVER12-LABEL: test_lwpval32_rmi: ; BDVER12: # %bb.0: ; BDVER12-NEXT: lwpval $305419896, (%rsi), %edi # imm = 0x12345678 -; BDVER12-NEXT: # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: # sched: [100:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpval32_rmi: ; BDVER3: # %bb.0: @@ -248,8 +248,8 @@ ; BDVER12-LABEL: test_lwpval64_rri: ; BDVER12: # %bb.0: ; BDVER12-NEXT: lwpval $-19088744, %esi, %rdi # imm = 0xFEDCBA98 -; BDVER12-NEXT: # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: # sched: [100:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpval64_rri: ; BDVER3: # %bb.0: @@ -274,8 +274,8 @@ ; BDVER12-LABEL: test_lwpval64_rmi: ; BDVER12: # %bb.0: ; BDVER12-NEXT: lwpval $305419896, (%rsi), %rdi # imm = 0x12345678 -; BDVER12-NEXT: # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: # sched: [100:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_lwpval64_rmi: ; BDVER3: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/lzcnt-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/lzcnt-schedule.ll +++ llvm/trunk/test/CodeGen/X86/lzcnt-schedule.ll @@ -4,7 +4,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+lzcnt | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -43,11 +43,11 @@ ; ; BDVER2-LABEL: test_ctlz_i16: ; BDVER2: # %bb.0: -; BDVER2-NEXT: lzcntw (%rsi), %cx # sched: [8:1.00] -; BDVER2-NEXT: lzcntw %di, %ax # sched: [3:1.00] -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] +; BDVER2-NEXT: lzcntw (%rsi), %cx # sched: [6:0.50] +; BDVER2-NEXT: lzcntw %di, %ax # sched: [2:0.50] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] ; BDVER2-NEXT: # kill: def $ax killed $ax killed $eax -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ctlz_i16: ; BTVER2: # %bb.0: @@ -103,10 +103,10 @@ ; ; BDVER2-LABEL: test_ctlz_i32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: lzcntl (%rsi), %ecx # sched: [8:1.00] -; BDVER2-NEXT: lzcntl %edi, %eax # sched: [3:1.00] -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: lzcntl (%rsi), %ecx # sched: [6:0.50] +; BDVER2-NEXT: lzcntl %edi, %eax # sched: [2:0.50] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ctlz_i32: ; BTVER2: # %bb.0: @@ -160,10 +160,10 @@ ; ; BDVER2-LABEL: test_ctlz_i64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: lzcntq (%rsi), %rcx # sched: [8:1.00] -; BDVER2-NEXT: lzcntq %rdi, %rax # sched: [3:1.00] -; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: lzcntq (%rsi), %rcx # sched: [6:0.50] +; BDVER2-NEXT: lzcntq %rdi, %rax # sched: [2:0.50] +; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ctlz_i64: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/memset.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/memset.ll +++ llvm/trunk/test/CodeGen/X86/memset.ll @@ -22,7 +22,6 @@ ; X86-NEXT: calll _foo ; X86-NEXT: addl $44, %esp ; X86-NEXT: retl -; X86-NEXT: ## -- End function ; ; XMM-LABEL: t: ; XMM: ## %bb.0: ## %entry @@ -35,7 +34,6 @@ ; XMM-NEXT: calll _foo ; XMM-NEXT: addl $60, %esp ; XMM-NEXT: retl -; XMM-NEXT: ## -- End function ; ; YMM-LABEL: t: ; YMM: ## %bb.0: ## %entry @@ -44,15 +42,14 @@ ; YMM-NEXT: andl $-32, %esp ; YMM-NEXT: subl $96, %esp ; YMM-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; YMM-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp) ; YMM-NEXT: leal {{[0-9]+}}(%esp), %eax +; YMM-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp) ; YMM-NEXT: movl %eax, (%esp) ; YMM-NEXT: vzeroupper ; YMM-NEXT: calll _foo ; YMM-NEXT: movl %ebp, %esp ; YMM-NEXT: popl %ebp ; YMM-NEXT: retl -; YMM-NEXT: ## -- End function entry: %up_mvd = alloca [8 x %struct.x] ; <[8 x %struct.x]*> [#uses=2] %up_mvd116 = getelementptr [8 x %struct.x], [8 x %struct.x]* %up_mvd, i32 0, i32 0 ; <%struct.x*> [#uses=1] Index: llvm/trunk/test/CodeGen/X86/mmx-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/mmx-schedule.ll +++ llvm/trunk/test/CodeGen/X86/mmx-schedule.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+ssse3 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -79,11 +79,11 @@ ; ; BDVER2-LABEL: test_cvtpd2pi: ; BDVER2: # %bb.0: -; BDVER2-NEXT: cvtpd2pi (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: cvtpd2pi %xmm0, %mm1 # sched: [4:1.00] -; BDVER2-NEXT: por %mm1, %mm0 # sched: [1:0.33] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [13:1.00] +; BDVER2-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [6:1.00] +; BDVER2-NEXT: por %mm0, %mm1 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm1, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtpd2pi: ; BTVER2: # %bb.0: @@ -168,10 +168,10 @@ ; ; BDVER2-LABEL: test_cvtpi2pd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [13:1.00] +; BDVER2-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [6:1.00] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtpi2pd: ; BTVER2: # %bb.0: @@ -253,10 +253,10 @@ ; ; BDVER2-LABEL: test_cvtpi2ps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [3:1.00] ; BDVER2-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtpi2ps: ; BTVER2: # %bb.0: @@ -346,11 +346,11 @@ ; ; BDVER2-LABEL: test_cvtps2pi: ; BDVER2: # %bb.0: -; BDVER2-NEXT: cvtps2pi %xmm0, %mm0 # sched: [3:1.00] ; BDVER2-NEXT: cvtps2pi (%rdi), %mm1 # sched: [9:1.00] -; BDVER2-NEXT: por %mm0, %mm1 # sched: [1:0.33] -; BDVER2-NEXT: movq %mm1, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: cvtps2pi %xmm0, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: por %mm0, %mm1 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm1, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvtps2pi: ; BTVER2: # %bb.0: @@ -443,11 +443,11 @@ ; ; BDVER2-LABEL: test_cvttpd2pi: ; BDVER2: # %bb.0: -; BDVER2-NEXT: cvttpd2pi (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: cvttpd2pi %xmm0, %mm1 # sched: [4:1.00] -; BDVER2-NEXT: por %mm1, %mm0 # sched: [1:0.33] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [13:1.00] +; BDVER2-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [6:1.00] +; BDVER2-NEXT: por %mm0, %mm1 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm1, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvttpd2pi: ; BTVER2: # %bb.0: @@ -540,11 +540,11 @@ ; ; BDVER2-LABEL: test_cvttps2pi: ; BDVER2: # %bb.0: -; BDVER2-NEXT: cvttps2pi %xmm0, %mm0 # sched: [3:1.00] ; BDVER2-NEXT: cvttps2pi (%rdi), %mm1 # sched: [9:1.00] -; BDVER2-NEXT: por %mm0, %mm1 # sched: [1:0.33] -; BDVER2-NEXT: movq %mm1, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: cvttps2pi %xmm0, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: por %mm0, %mm1 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm1, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cvttps2pi: ; BTVER2: # %bb.0: @@ -613,8 +613,8 @@ ; ; BDVER2-LABEL: test_emms: ; BDVER2: # %bb.0: -; BDVER2-NEXT: emms # sched: [31:10.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: emms # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_emms: ; BTVER2: # %bb.0: @@ -673,8 +673,8 @@ ; ; BDVER2-LABEL: test_maskmovq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: maskmovq %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_maskmovq: ; BTVER2: # %bb.0: @@ -781,14 +781,14 @@ ; ; BDVER2-LABEL: test_movd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movd %edi, %mm1 # sched: [1:1.00] +; BDVER2-NEXT: movd %edi, %mm1 # sched: [10:0.50] ; BDVER2-NEXT: movd (%rsi), %mm2 # sched: [5:0.50] -; BDVER2-NEXT: paddd %mm1, %mm2 # sched: [3:1.00] -; BDVER2-NEXT: paddd %mm2, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: movd %mm2, %ecx # sched: [2:1.00] -; BDVER2-NEXT: movd %mm0, %eax # sched: [2:1.00] -; BDVER2-NEXT: movl %ecx, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddd %mm1, %mm2 # sched: [2:0.50] +; BDVER2-NEXT: paddd %mm2, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movd %mm2, %ecx # sched: [10:1.00] +; BDVER2-NEXT: movd %mm0, %eax # sched: [10:1.00] +; BDVER2-NEXT: movl %ecx, (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movd: ; BTVER2: # %bb.0: @@ -885,10 +885,10 @@ ; ; BDVER2-LABEL: test_movdq2q: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movdq2q %xmm0, %mm0 # sched: [2:1.00] -; BDVER2-NEXT: paddd %mm0, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movdq2q %xmm0, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddd %mm0, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movdq2q: ; BTVER2: # %bb.0: @@ -953,8 +953,8 @@ ; ; BDVER2-LABEL: test_movntq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movntq %mm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movntq: ; BTVER2: # %bb.0: @@ -1032,9 +1032,9 @@ ; BDVER2-LABEL: test_movq: ; BDVER2: # %bb.0: ; BDVER2-NEXT: movq (%rdi), %mm0 # sched: [5:0.50] -; BDVER2-NEXT: paddd %mm0, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: movq %mm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddd %mm0, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movq: ; BTVER2: # %bb.0: @@ -1100,8 +1100,8 @@ ; ; BDVER2-LABEL: test_movq2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movq2dq %mm0, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movq2dq %mm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movq2dq: ; BTVER2: # %bb.0: @@ -1176,10 +1176,10 @@ ; ; BDVER2-LABEL: test_pabsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pabsb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: pabsb %mm0, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pabsb: ; BTVER2: # %bb.0: @@ -1261,10 +1261,10 @@ ; ; BDVER2-LABEL: test_pabsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pabsd (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: pabsd %mm0, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pabsd: ; BTVER2: # %bb.0: @@ -1346,10 +1346,10 @@ ; ; BDVER2-LABEL: test_pabsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pabsw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: pabsw %mm0, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pabsw: ; BTVER2: # %bb.0: @@ -1431,10 +1431,10 @@ ; ; BDVER2-LABEL: test_packssdw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: packssdw %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: packssdw (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: packssdw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: packssdw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_packssdw: ; BTVER2: # %bb.0: @@ -1516,10 +1516,10 @@ ; ; BDVER2-LABEL: test_packsswb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: packsswb %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: packsswb (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: packsswb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: packsswb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_packsswb: ; BTVER2: # %bb.0: @@ -1601,10 +1601,10 @@ ; ; BDVER2-LABEL: test_packuswb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: packuswb %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: packuswb (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: packuswb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: packuswb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_packuswb: ; BTVER2: # %bb.0: @@ -1686,10 +1686,10 @@ ; ; BDVER2-LABEL: test_paddb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: paddb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddb: ; BTVER2: # %bb.0: @@ -1771,10 +1771,10 @@ ; ; BDVER2-LABEL: test_paddd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddd %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: paddd (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddd %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddd (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddd: ; BTVER2: # %bb.0: @@ -1856,10 +1856,10 @@ ; ; BDVER2-LABEL: test_paddq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddq %mm1, %mm0 # sched: [1:0.50] +; BDVER2-NEXT: paddq %mm1, %mm0 # sched: [2:0.50] ; BDVER2-NEXT: paddq (%rdi), %mm0 # sched: [7:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddq: ; BTVER2: # %bb.0: @@ -1941,10 +1941,10 @@ ; ; BDVER2-LABEL: test_paddsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddsb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: paddsb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddsb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddsb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddsb: ; BTVER2: # %bb.0: @@ -2026,10 +2026,10 @@ ; ; BDVER2-LABEL: test_paddsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddsw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: paddsw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddsw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddsw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddsw: ; BTVER2: # %bb.0: @@ -2111,10 +2111,10 @@ ; ; BDVER2-LABEL: test_paddusb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddusb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: paddusb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddusb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddusb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddusb: ; BTVER2: # %bb.0: @@ -2196,10 +2196,10 @@ ; ; BDVER2-LABEL: test_paddusw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddusw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: paddusw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddusw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddusw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddusw: ; BTVER2: # %bb.0: @@ -2281,10 +2281,10 @@ ; ; BDVER2-LABEL: test_paddw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: paddw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: paddw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: paddw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: paddw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_paddw: ; BTVER2: # %bb.0: @@ -2366,10 +2366,10 @@ ; ; BDVER2-LABEL: test_palignr: ; BDVER2: # %bb.0: -; BDVER2-NEXT: palignr $1, %mm1, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: palignr $1, %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: palignr $1, (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_palignr: ; BTVER2: # %bb.0: @@ -2451,10 +2451,10 @@ ; ; BDVER2-LABEL: test_pand: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pand %mm1, %mm0 # sched: [1:0.33] -; BDVER2-NEXT: pand (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pand %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pand (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pand: ; BTVER2: # %bb.0: @@ -2536,10 +2536,10 @@ ; ; BDVER2-LABEL: test_pandn: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pandn %mm1, %mm0 # sched: [1:0.33] -; BDVER2-NEXT: pandn (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pandn %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pandn (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pandn: ; BTVER2: # %bb.0: @@ -2621,10 +2621,10 @@ ; ; BDVER2-LABEL: test_pavgb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pavgb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pavgb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pavgb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pavgb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pavgb: ; BTVER2: # %bb.0: @@ -2706,10 +2706,10 @@ ; ; BDVER2-LABEL: test_pavgw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pavgw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pavgw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pavgw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pavgw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pavgw: ; BTVER2: # %bb.0: @@ -2791,10 +2791,10 @@ ; ; BDVER2-LABEL: test_pcmpeqb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pcmpeqb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pcmpeqb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pcmpeqb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pcmpeqb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pcmpeqb: ; BTVER2: # %bb.0: @@ -2876,10 +2876,10 @@ ; ; BDVER2-LABEL: test_pcmpeqd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pcmpeqd %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pcmpeqd (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pcmpeqd %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pcmpeqd (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pcmpeqd: ; BTVER2: # %bb.0: @@ -2961,10 +2961,10 @@ ; ; BDVER2-LABEL: test_pcmpeqw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pcmpeqw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pcmpeqw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pcmpeqw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pcmpeqw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pcmpeqw: ; BTVER2: # %bb.0: @@ -3046,10 +3046,10 @@ ; ; BDVER2-LABEL: test_pcmpgtb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pcmpgtb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pcmpgtb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pcmpgtb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pcmpgtb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pcmpgtb: ; BTVER2: # %bb.0: @@ -3131,10 +3131,10 @@ ; ; BDVER2-LABEL: test_pcmpgtd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pcmpgtd %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pcmpgtd (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pcmpgtd %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pcmpgtd (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pcmpgtd: ; BTVER2: # %bb.0: @@ -3216,10 +3216,10 @@ ; ; BDVER2-LABEL: test_pcmpgtw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pcmpgtw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pcmpgtw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pcmpgtw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pcmpgtw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pcmpgtw: ; BTVER2: # %bb.0: @@ -3285,8 +3285,8 @@ ; ; BDVER2-LABEL: test_pextrw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pextrw $0, %mm0, %eax # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pextrw $0, %mm0, %eax # sched: [13:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pextrw: ; BTVER2: # %bb.0: @@ -3361,10 +3361,10 @@ ; ; BDVER2-LABEL: test_phaddd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: phaddd %mm1, %mm0 # sched: [3:1.50] -; BDVER2-NEXT: phaddd (%rdi), %mm0 # sched: [8:1.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: phaddd %mm1, %mm0 # sched: [5:0.50] +; BDVER2-NEXT: phaddd (%rdi), %mm0 # sched: [10:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_phaddd: ; BTVER2: # %bb.0: @@ -3446,10 +3446,10 @@ ; ; BDVER2-LABEL: test_phaddsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: phaddsw %mm1, %mm0 # sched: [3:1.50] -; BDVER2-NEXT: phaddsw (%rdi), %mm0 # sched: [8:1.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: phaddsw %mm1, %mm0 # sched: [5:0.50] +; BDVER2-NEXT: phaddsw (%rdi), %mm0 # sched: [10:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_phaddsw: ; BTVER2: # %bb.0: @@ -3531,10 +3531,10 @@ ; ; BDVER2-LABEL: test_phaddw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: phaddw %mm1, %mm0 # sched: [3:1.50] -; BDVER2-NEXT: phaddw (%rdi), %mm0 # sched: [8:1.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: phaddw %mm1, %mm0 # sched: [5:0.50] +; BDVER2-NEXT: phaddw (%rdi), %mm0 # sched: [10:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_phaddw: ; BTVER2: # %bb.0: @@ -3616,10 +3616,10 @@ ; ; BDVER2-LABEL: test_phsubd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: phsubd %mm1, %mm0 # sched: [3:1.50] -; BDVER2-NEXT: phsubd (%rdi), %mm0 # sched: [8:1.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: phsubd %mm1, %mm0 # sched: [5:0.50] +; BDVER2-NEXT: phsubd (%rdi), %mm0 # sched: [10:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_phsubd: ; BTVER2: # %bb.0: @@ -3701,10 +3701,10 @@ ; ; BDVER2-LABEL: test_phsubsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: phsubsw %mm1, %mm0 # sched: [3:1.50] -; BDVER2-NEXT: phsubsw (%rdi), %mm0 # sched: [8:1.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: phsubsw %mm1, %mm0 # sched: [5:0.50] +; BDVER2-NEXT: phsubsw (%rdi), %mm0 # sched: [10:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_phsubsw: ; BTVER2: # %bb.0: @@ -3786,10 +3786,10 @@ ; ; BDVER2-LABEL: test_phsubw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: phsubw %mm1, %mm0 # sched: [3:1.50] -; BDVER2-NEXT: phsubw (%rdi), %mm0 # sched: [8:1.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: phsubw %mm1, %mm0 # sched: [5:0.50] +; BDVER2-NEXT: phsubw (%rdi), %mm0 # sched: [10:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_phsubw: ; BTVER2: # %bb.0: @@ -3879,11 +3879,11 @@ ; ; BDVER2-LABEL: test_pinsrw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:1.00] ; BDVER2-NEXT: movswl (%rsi), %eax # sched: [5:0.50] -; BDVER2-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pinsrw: ; BTVER2: # %bb.0: @@ -3968,10 +3968,10 @@ ; ; BDVER2-LABEL: test_pmaddwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmaddwd %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: pmaddwd (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmaddwd %mm1, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: pmaddwd (%rdi), %mm0 # sched: [9:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmaddwd: ; BTVER2: # %bb.0: @@ -4053,10 +4053,10 @@ ; ; BDVER2-LABEL: test_pmaddubsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmaddubsw %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: pmaddubsw (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: pmaddubsw (%rdi), %mm0 # sched: [9:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmaddubsw: ; BTVER2: # %bb.0: @@ -4138,10 +4138,10 @@ ; ; BDVER2-LABEL: test_pmaxsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmaxsw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pmaxsw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmaxsw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pmaxsw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmaxsw: ; BTVER2: # %bb.0: @@ -4223,10 +4223,10 @@ ; ; BDVER2-LABEL: test_pmaxub: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmaxub %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pmaxub (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmaxub %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pmaxub (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmaxub: ; BTVER2: # %bb.0: @@ -4308,10 +4308,10 @@ ; ; BDVER2-LABEL: test_pminsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pminsw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pminsw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pminsw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pminsw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pminsw: ; BTVER2: # %bb.0: @@ -4393,10 +4393,10 @@ ; ; BDVER2-LABEL: test_pminub: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pminub %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: pminub (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pminub %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pminub (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pminub: ; BTVER2: # %bb.0: @@ -4462,8 +4462,8 @@ ; ; BDVER2-LABEL: test_pmovmskb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmovmskb %mm0, %eax # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmovmskb %mm0, %eax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmovmskb: ; BTVER2: # %bb.0: @@ -4538,10 +4538,10 @@ ; ; BDVER2-LABEL: test_pmulhrsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmulhrsw %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: pmulhrsw (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: pmulhrsw (%rdi), %mm0 # sched: [9:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmulhrsw: ; BTVER2: # %bb.0: @@ -4623,10 +4623,10 @@ ; ; BDVER2-LABEL: test_pmulhw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmulhw %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: pmulhw (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmulhw %mm1, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: pmulhw (%rdi), %mm0 # sched: [9:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmulhw: ; BTVER2: # %bb.0: @@ -4708,10 +4708,10 @@ ; ; BDVER2-LABEL: test_pmulhuw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmulhuw %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: pmulhuw (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmulhuw %mm1, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: pmulhuw (%rdi), %mm0 # sched: [9:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmulhuw: ; BTVER2: # %bb.0: @@ -4793,10 +4793,10 @@ ; ; BDVER2-LABEL: test_pmullw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmullw %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: pmullw (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmullw %mm1, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: pmullw (%rdi), %mm0 # sched: [9:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmullw: ; BTVER2: # %bb.0: @@ -4878,10 +4878,10 @@ ; ; BDVER2-LABEL: test_pmuludq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pmuludq %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: pmuludq (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pmuludq %mm1, %mm0 # sched: [4:1.00] +; BDVER2-NEXT: pmuludq (%rdi), %mm0 # sched: [9:1.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pmuludq: ; BTVER2: # %bb.0: @@ -4963,10 +4963,10 @@ ; ; BDVER2-LABEL: test_por: ; BDVER2: # %bb.0: -; BDVER2-NEXT: por %mm1, %mm0 # sched: [1:0.33] -; BDVER2-NEXT: por (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: por %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: por (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_por: ; BTVER2: # %bb.0: @@ -5048,10 +5048,10 @@ ; ; BDVER2-LABEL: test_psadbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psadbw %mm1, %mm0 # sched: [5:1.00] -; BDVER2-NEXT: psadbw (%rdi), %mm0 # sched: [10:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psadbw %mm1, %mm0 # sched: [4:0.50] +; BDVER2-NEXT: psadbw (%rdi), %mm0 # sched: [9:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psadbw: ; BTVER2: # %bb.0: @@ -5133,10 +5133,10 @@ ; ; BDVER2-LABEL: test_pshufb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pshufb %mm1, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: pshufb (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pshufb %mm1, %mm0 # sched: [3:2.00] +; BDVER2-NEXT: pshufb (%rdi), %mm0 # sched: [8:2.00] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pshufb: ; BTVER2: # %bb.0: @@ -5218,10 +5218,10 @@ ; ; BDVER2-LABEL: test_pshufw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [6:1.00] -; BDVER2-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [7:0.50] +; BDVER2-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pshufw: ; BTVER2: # %bb.0: @@ -5303,10 +5303,10 @@ ; ; BDVER2-LABEL: test_psignb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psignb %mm1, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psignb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psignb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psignb: ; BTVER2: # %bb.0: @@ -5388,10 +5388,10 @@ ; ; BDVER2-LABEL: test_psignd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psignd %mm1, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psignd %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psignd (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psignd: ; BTVER2: # %bb.0: @@ -5473,10 +5473,10 @@ ; ; BDVER2-LABEL: test_psignw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psignw %mm1, %mm0 # sched: [1:0.50] -; BDVER2-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psignw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psignw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psignw: ; BTVER2: # %bb.0: @@ -5566,11 +5566,11 @@ ; ; BDVER2-LABEL: test_pslld: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pslld %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: pslld (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: pslld $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pslld %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: pslld (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: pslld $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pslld: ; BTVER2: # %bb.0: @@ -5664,11 +5664,11 @@ ; ; BDVER2-LABEL: test_psllq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psllq %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: psllq (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: psllq $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psllq %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: psllq (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: psllq $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psllq: ; BTVER2: # %bb.0: @@ -5762,11 +5762,11 @@ ; ; BDVER2-LABEL: test_psllw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psllw %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: psllw (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: psllw $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psllw %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: psllw (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: psllw $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psllw: ; BTVER2: # %bb.0: @@ -5860,11 +5860,11 @@ ; ; BDVER2-LABEL: test_psrad: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psrad %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: psrad (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: psrad $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psrad %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: psrad (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: psrad $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psrad: ; BTVER2: # %bb.0: @@ -5958,11 +5958,11 @@ ; ; BDVER2-LABEL: test_psraw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psraw %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: psraw (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: psraw $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psraw %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: psraw (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: psraw $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psraw: ; BTVER2: # %bb.0: @@ -6056,11 +6056,11 @@ ; ; BDVER2-LABEL: test_psrld: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psrld %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: psrld (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: psrld $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psrld %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: psrld (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: psrld $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psrld: ; BTVER2: # %bb.0: @@ -6154,11 +6154,11 @@ ; ; BDVER2-LABEL: test_psrlq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: psrlq (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: psrlq $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psrlq %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: psrlq (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: psrlq $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psrlq: ; BTVER2: # %bb.0: @@ -6252,11 +6252,11 @@ ; ; BDVER2-LABEL: test_psrlw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: psrlw (%rdi), %mm0 # sched: [6:1.00] -; BDVER2-NEXT: psrlw $7, %mm0 # sched: [1:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psrlw %mm1, %mm0 # sched: [3:0.50] +; BDVER2-NEXT: psrlw (%rdi), %mm0 # sched: [8:0.50] +; BDVER2-NEXT: psrlw $7, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psrlw: ; BTVER2: # %bb.0: @@ -6342,10 +6342,10 @@ ; ; BDVER2-LABEL: test_psubb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubb: ; BTVER2: # %bb.0: @@ -6427,10 +6427,10 @@ ; ; BDVER2-LABEL: test_psubd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubd %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubd (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubd %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubd (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubd: ; BTVER2: # %bb.0: @@ -6512,10 +6512,10 @@ ; ; BDVER2-LABEL: test_psubq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubq %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubq (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubq %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubq (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubq: ; BTVER2: # %bb.0: @@ -6597,10 +6597,10 @@ ; ; BDVER2-LABEL: test_psubsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubsb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubsb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubsb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubsb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubsb: ; BTVER2: # %bb.0: @@ -6682,10 +6682,10 @@ ; ; BDVER2-LABEL: test_psubsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubsw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubsw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubsw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubsw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubsw: ; BTVER2: # %bb.0: @@ -6767,10 +6767,10 @@ ; ; BDVER2-LABEL: test_psubusb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubusb %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubusb (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubusb %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubusb (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubusb: ; BTVER2: # %bb.0: @@ -6852,10 +6852,10 @@ ; ; BDVER2-LABEL: test_psubusw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubusw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubusw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubusw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubusw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubusw: ; BTVER2: # %bb.0: @@ -6937,10 +6937,10 @@ ; ; BDVER2-LABEL: test_psubw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: psubw %mm1, %mm0 # sched: [3:1.00] -; BDVER2-NEXT: psubw (%rdi), %mm0 # sched: [8:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: psubw %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: psubw (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_psubw: ; BTVER2: # %bb.0: @@ -7022,10 +7022,10 @@ ; ; BDVER2-LABEL: test_punpckhbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00] -; BDVER2-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [2:0.50] +; BDVER2-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_punpckhbw: ; BTVER2: # %bb.0: @@ -7107,10 +7107,10 @@ ; ; BDVER2-LABEL: test_punpckhdq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00] -; BDVER2-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [2:0.50] +; BDVER2-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_punpckhdq: ; BTVER2: # %bb.0: @@ -7192,10 +7192,10 @@ ; ; BDVER2-LABEL: test_punpckhwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00] -; BDVER2-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [2:0.50] +; BDVER2-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_punpckhwd: ; BTVER2: # %bb.0: @@ -7277,10 +7277,10 @@ ; ; BDVER2-LABEL: test_punpcklbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00] -; BDVER2-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [2:0.50] +; BDVER2-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_punpcklbw: ; BTVER2: # %bb.0: @@ -7362,10 +7362,10 @@ ; ; BDVER2-LABEL: test_punpckldq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00] -; BDVER2-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [2:0.50] +; BDVER2-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_punpckldq: ; BTVER2: # %bb.0: @@ -7447,10 +7447,10 @@ ; ; BDVER2-LABEL: test_punpcklwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00] -; BDVER2-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [6:1.00] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [2:0.50] +; BDVER2-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_punpcklwd: ; BTVER2: # %bb.0: @@ -7532,10 +7532,10 @@ ; ; BDVER2-LABEL: test_pxor: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pxor %mm1, %mm0 # sched: [1:0.33] -; BDVER2-NEXT: pxor (%rdi), %mm0 # sched: [6:0.50] -; BDVER2-NEXT: movq %mm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: pxor %mm1, %mm0 # sched: [2:0.50] +; BDVER2-NEXT: pxor (%rdi), %mm0 # sched: [7:0.50] +; BDVER2-NEXT: movq %mm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pxor: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll +++ llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+popcnt | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -63,11 +63,11 @@ ; ; BDVER2-LABEL: test_ctpop_i16: ; BDVER2: # %bb.0: -; BDVER2-NEXT: popcntw (%rsi), %cx # sched: [9:1.00] -; BDVER2-NEXT: popcntw %di, %ax # sched: [3:1.00] -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] +; BDVER2-NEXT: popcntw (%rsi), %cx # sched: [8:0.50] +; BDVER2-NEXT: popcntw %di, %ax # sched: [4:0.50] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] ; BDVER2-NEXT: # kill: def $ax killed $ax killed $eax -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ctpop_i16: ; BTVER2: # %bb.0: @@ -137,10 +137,10 @@ ; ; BDVER2-LABEL: test_ctpop_i32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: popcntl (%rsi), %ecx # sched: [9:1.00] -; BDVER2-NEXT: popcntl %edi, %eax # sched: [3:1.00] -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: popcntl (%rsi), %ecx # sched: [8:0.50] +; BDVER2-NEXT: popcntl %edi, %eax # sched: [4:0.50] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ctpop_i32: ; BTVER2: # %bb.0: @@ -208,10 +208,10 @@ ; ; BDVER2-LABEL: test_ctpop_i64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: popcntq (%rsi), %rcx # sched: [9:1.00] -; BDVER2-NEXT: popcntq %rdi, %rax # sched: [3:1.00] -; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: popcntq (%rsi), %rcx # sched: [8:0.50] +; BDVER2-NEXT: popcntq %rdi, %rax # sched: [4:0.50] +; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ctpop_i64: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/recip-fastmath.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/recip-fastmath.ll +++ llvm/trunk/test/CodeGen/X86/recip-fastmath.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE-RECIP ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX-RECIP ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=FMA-RECIP -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+fma4 -mattr=+avx -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=SANDY ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=HASWELL @@ -40,9 +40,9 @@ ; ; BDVER2-LABEL: f32_no_estimate: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [6:0.50] -; BDVER2-NEXT: vdivss %xmm0, %xmm1, %xmm0 # sched: [14:14.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50] +; BDVER2-NEXT: vdivss %xmm0, %xmm1, %xmm0 # sched: [9:9.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: f32_no_estimate: ; BTVER2: # %bb.0: @@ -117,7 +117,7 @@ ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00] ; BDVER2-NEXT: vfnmaddss {{.*}}(%rip), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER2-NEXT: vfmaddss %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: f32_one_step: ; BTVER2: # %bb.0: @@ -219,12 +219,12 @@ ; BDVER2-LABEL: f32_two_step: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [6:0.50] +; BDVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:0.50] ; BDVER2-NEXT: vfnmaddss %xmm2, %xmm1, %xmm0, %xmm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddss %xmm1, %xmm3, %xmm1, %xmm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddss %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddss %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: f32_two_step: ; BTVER2: # %bb.0: @@ -326,9 +326,9 @@ ; ; BDVER2-LABEL: v4f32_no_estimate: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] sched: [6:0.50] -; BDVER2-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [14:14.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [9:9.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v4f32_no_estimate: ; BTVER2: # %bb.0: @@ -403,7 +403,7 @@ ; BDVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v4f32_one_step: ; BTVER2: # %bb.0: @@ -507,12 +507,12 @@ ; BDVER2-LABEL: v4f32_two_step: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm3, %xmm1, %xmm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v4f32_two_step: ; BTVER2: # %bb.0: @@ -617,9 +617,9 @@ ; ; BDVER2-LABEL: v8f32_no_estimate: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [7:0.50] -; BDVER2-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [29:28.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [9:19.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_no_estimate: ; BTVER2: # %bb.0: @@ -698,10 +698,10 @@ ; ; BDVER2-LABEL: v8f32_one_step: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] -; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm0, %ymm1, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_one_step: ; BTVER2: # %bb.0: @@ -817,13 +817,13 @@ ; ; BDVER2-LABEL: v8f32_two_step: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm3, %ymm1, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm0, %ymm1, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_two_step: ; BTVER2: # %bb.0: @@ -936,10 +936,10 @@ ; ; BDVER2-LABEL: v16f32_no_estimate: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] -; BDVER2-NEXT: vdivps %ymm0, %ymm2, %ymm0 # sched: [29:28.00] -; BDVER2-NEXT: vdivps %ymm1, %ymm2, %ymm1 # sched: [29:28.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vdivps %ymm0, %ymm2, %ymm0 # sched: [9:19.00] +; BDVER2-NEXT: vdivps %ymm1, %ymm2, %ymm1 # sched: [9:19.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_no_estimate: ; BTVER2: # %bb.0: @@ -1045,14 +1045,14 @@ ; ; BDVER2-LABEL: v16f32_one_step: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [7:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] -; BDVER2-NEXT: vrcpps %ymm1, %ymm4 # sched: [7:2.00] +; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [5:2.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vrcpps %ymm1, %ymm4 # sched: [5:2.00] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm4, %ymm1, %ymm1 # sched: [5:0.50] +; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm4, %ymm1, %ymm4, %ymm1 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_one_step: ; BTVER2: # %bb.0: @@ -1226,18 +1226,18 @@ ; ; BDVER2-LABEL: v16f32_two_step: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [7:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [5:2.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm4 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [7:2.00] +; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [5:2.00] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm4 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm1, %ymm2, %ymm1 # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_two_step: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/recip-fastmath2.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/recip-fastmath2.ll +++ llvm/trunk/test/CodeGen/X86/recip-fastmath2.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE-RECIP ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX-RECIP ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=FMA-RECIP -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+fma4 -mattr=+avx -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=SANDY ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -print-schedule | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=HASWELL @@ -34,8 +34,8 @@ ; BDVER2-LABEL: f32_no_step_2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: f32_no_step_2: ; BTVER2: # %bb.0: @@ -113,8 +113,8 @@ ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00] ; BDVER2-NEXT: vfnmaddss {{.*}}(%rip), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER2-NEXT: vfmaddss %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: f32_one_step_2: ; BTVER2: # %bb.0: @@ -216,9 +216,9 @@ ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00] ; BDVER2-NEXT: vfnmaddss {{.*}}(%rip), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER2-NEXT: vfmaddss %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm1 # sched: [11:1.00] +; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm1 # sched: [10:1.00] ; BDVER2-NEXT: vmulss %xmm0, %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: f32_one_step_2_divs: ; BTVER2: # %bb.0: @@ -336,13 +336,13 @@ ; BDVER2-LABEL: f32_two_step_2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [6:0.50] +; BDVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:0.50] ; BDVER2-NEXT: vfnmaddss %xmm2, %xmm1, %xmm0, %xmm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddss %xmm1, %xmm3, %xmm1, %xmm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddss %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddss %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: f32_two_step_2: ; BTVER2: # %bb.0: @@ -465,8 +465,8 @@ ; BDVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v4f32_one_step2: ; BTVER2: # %bb.0: @@ -570,9 +570,9 @@ ; BDVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %xmm1, %xmm0, %xmm0 # sched: [10:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm1 # sched: [11:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm1 # sched: [10:1.00] ; BDVER2-NEXT: vmulps %xmm0, %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v4f32_one_step_2_divs: ; BTVER2: # %bb.0: @@ -692,13 +692,13 @@ ; BDVER2-LABEL: v4f32_two_step2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm3, %xmm1, %xmm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm0, %xmm1, %xmm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v4f32_two_step2: ; BTVER2: # %bb.0: @@ -826,11 +826,11 @@ ; ; BDVER2-LABEL: v8f32_one_step2: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] -; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm0, %ymm1, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_one_step2: ; BTVER2: # %bb.0: @@ -940,12 +940,12 @@ ; ; BDVER2-LABEL: v8f32_one_step_2_divs: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] -; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %ymm1, %ymm0, %ymm0 # sched: [10:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %ymm1, %ymm0, %ymm0 # sched: [10:1.00] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm0, %ymm1, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm1 # sched: [12:1.00] -; BDVER2-NEXT: vmulps %ymm0, %ymm1, %ymm0 # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm1 # sched: [10:2.00] +; BDVER2-NEXT: vmulps %ymm0, %ymm1, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_one_step_2_divs: ; BTVER2: # %bb.0: @@ -1078,14 +1078,14 @@ ; ; BDVER2-LABEL: v8f32_two_step2: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm3, %ymm1, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm0, %ymm1, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_two_step2: ; BTVER2: # %bb.0: @@ -1190,8 +1190,8 @@ ; ; BDVER2-LABEL: v8f32_no_step: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_no_step: ; BTVER2: # %bb.0: @@ -1249,9 +1249,9 @@ ; ; BDVER2-LABEL: v8f32_no_step2: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_no_step2: ; BTVER2: # %bb.0: @@ -1361,16 +1361,16 @@ ; ; BDVER2-LABEL: v16f32_one_step2: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [7:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] -; BDVER2-NEXT: vrcpps %ymm0, %ymm4 # sched: [7:2.00] +; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [5:2.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm4 # sched: [5:2.00] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm1 # sched: [5:0.50] -; BDVER2-NEXT: vfmaddps %ymm2, %ymm1, %ymm2, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm4, %ymm0, %ymm0 # sched: [5:0.50] +; BDVER2-NEXT: vfmaddps %ymm2, %ymm1, %ymm2, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm4, %ymm0, %ymm4, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_one_step2: ; BTVER2: # %bb.0: @@ -1532,18 +1532,18 @@ ; ; BDVER2-LABEL: v16f32_one_step_2_divs: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [7:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [5:2.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [7:2.00] +; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [5:2.00] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm1 # sched: [5:0.50] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm3 # sched: [10:2.00] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm1, %ymm2, %ymm1 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm2 # sched: [12:1.00] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm3 # sched: [12:1.00] -; BDVER2-NEXT: vmulps %ymm0, %ymm3, %ymm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulps %ymm1, %ymm2, %ymm1 # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm2 # sched: [10:2.00] +; BDVER2-NEXT: vmulps %ymm0, %ymm3, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vmulps %ymm1, %ymm2, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_one_step_2_divs: ; BTVER2: # %bb.0: @@ -1745,20 +1745,20 @@ ; ; BDVER2-LABEL: v16f32_two_step2: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [7:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [5:2.00] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm4 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm1, %ymm2, %ymm1 # sched: [5:0.50] -; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [7:2.00] +; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [5:2.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 # sched: [10:2.00] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm4 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0 # sched: [5:0.50] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_two_step2: ; BTVER2: # %bb.0: @@ -1904,9 +1904,9 @@ ; ; BDVER2-LABEL: v16f32_no_step: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00] -; BDVER2-NEXT: vrcpps %ymm1, %ymm1 # sched: [7:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vrcpps %ymm1, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_no_step: ; BTVER2: # %bb.0: @@ -1976,11 +1976,11 @@ ; ; BDVER2-LABEL: v16f32_no_step2: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vrcpps %ymm1, %ymm1 # sched: [7:2.00] -; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00] -; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 # sched: [12:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vrcpps %ymm1, %ymm1 # sched: [5:2.00] +; BDVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:2.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [10:2.00] +; BDVER2-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_no_step2: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/schedule-x86-64-shld.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/schedule-x86-64-shld.ll +++ llvm/trunk/test/CodeGen/X86/schedule-x86-64-shld.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+slow-shld | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER12 --check-prefix=BDVER1 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+slow-shld | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER12 --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER12 --check-prefix=BDVER1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER12 --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 @@ -19,9 +19,9 @@ ; ; BDVER12-LABEL: lshift10_optsize: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] -; BDVER12-NEXT: shldq $10, %rsi, %rax # sched: [2:0.67] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.50] +; BDVER12-NEXT: shldq $10, %rsi, %rax # sched: [4:3.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift10_optsize: ; BTVER2: # %bb.0: # %entry @@ -47,7 +47,7 @@ ; BDVER12-NEXT: shlq $10, %rdi # sched: [1:0.50] ; BDVER12-NEXT: shrq $54, %rsi # sched: [1:0.50] ; BDVER12-NEXT: leaq (%rsi,%rdi), %rax # sched: [1:0.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift10: ; BTVER2: # %bb.0: # %entry @@ -77,9 +77,9 @@ ; ; BDVER12-LABEL: rshift10_optsize: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] -; BDVER12-NEXT: shrdq $62, %rsi, %rax # sched: [2:0.67] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.50] +; BDVER12-NEXT: shrdq $62, %rsi, %rax # sched: [4:3.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: rshift10_optsize: ; BTVER2: # %bb.0: # %entry @@ -105,7 +105,7 @@ ; BDVER12: # %bb.0: # %entry ; BDVER12-NEXT: shrq $62, %rdi # sched: [1:0.50] ; BDVER12-NEXT: leaq (%rdi,%rsi,4), %rax # sched: [1:0.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: rshift10: ; BTVER2: # %bb.0: # %entry @@ -135,11 +135,11 @@ ; ; BDVER12-LABEL: lshift_cl_optsize: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] -; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.50] +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.50] ; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER12-NEXT: shldq %cl, %rsi, %rax # sched: [4:1.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shldq %cl, %rsi, %rax # sched: [4:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_cl_optsize: ; BTVER2: # %bb.0: # %entry @@ -167,14 +167,14 @@ ; ; BDVER12-LABEL: lshift_cl: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] -; BDVER12-NEXT: movq %rsi, %rax # sched: [1:0.33] -; BDVER12-NEXT: shlq %cl, %rdi # sched: [3:1.50] -; BDVER12-NEXT: negl %ecx # sched: [1:0.33] +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.50] +; BDVER12-NEXT: movq %rsi, %rax # sched: [1:0.50] +; BDVER12-NEXT: shlq %cl, %rdi # sched: [1:0.50] +; BDVER12-NEXT: negl %ecx # sched: [1:0.50] ; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER12-NEXT: shrq %cl, %rax # sched: [3:1.50] -; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shrq %cl, %rax # sched: [1:0.50] +; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_cl: ; BTVER2: # %bb.0: # %entry @@ -211,11 +211,11 @@ ; ; BDVER12-LABEL: rshift_cl_optsize: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] -; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.50] +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.50] ; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER12-NEXT: shrdq %cl, %rsi, %rax # sched: [4:1.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shrdq %cl, %rsi, %rax # sched: [4:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: rshift_cl_optsize: ; BTVER2: # %bb.0: # %entry @@ -243,14 +243,14 @@ ; ; BDVER12-LABEL: rshift_cl: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] -; BDVER12-NEXT: movq %rsi, %rax # sched: [1:0.33] -; BDVER12-NEXT: shrq %cl, %rdi # sched: [3:1.50] -; BDVER12-NEXT: negl %ecx # sched: [1:0.33] +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.50] +; BDVER12-NEXT: movq %rsi, %rax # sched: [1:0.50] +; BDVER12-NEXT: shrq %cl, %rdi # sched: [1:0.50] +; BDVER12-NEXT: negl %ecx # sched: [1:0.50] ; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER12-NEXT: shlq %cl, %rax # sched: [3:1.50] -; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shlq %cl, %rax # sched: [1:0.50] +; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: rshift_cl: ; BTVER2: # %bb.0: # %entry @@ -287,10 +287,10 @@ ; ; BDVER12-LABEL: lshift_mem_cl_optsize: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rsi, %rcx # sched: [1:0.33] +; BDVER12-NEXT: movq %rsi, %rcx # sched: [1:0.50] ; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER12-NEXT: shldq %cl, %rdi, {{.*}}(%rip) # sched: [10:1.50] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shldq %cl, %rdi, {{.*}}(%rip) # sched: [4:11.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_mem_cl_optsize: ; BTVER2: # %bb.0: # %entry @@ -318,15 +318,15 @@ ; ; BDVER12-LABEL: lshift_mem_cl: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: movq %rsi, %rcx # sched: [1:0.33] ; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] -; BDVER12-NEXT: shlq %cl, %rax # sched: [3:1.50] -; BDVER12-NEXT: negl %ecx # sched: [1:0.33] +; BDVER12-NEXT: movq %rsi, %rcx # sched: [1:0.50] +; BDVER12-NEXT: shlq %cl, %rax # sched: [1:0.50] +; BDVER12-NEXT: negl %ecx # sched: [1:0.50] ; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER12-NEXT: shrq %cl, %rdi # sched: [3:1.50] -; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.33] -; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shrq %cl, %rdi # sched: [1:0.50] +; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.50] +; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_mem_cl: ; BTVER2: # %bb.0: # %entry @@ -358,11 +358,11 @@ ; BDVER12-LABEL: lshift_mem: ; BDVER12: # %bb.0: # %entry ; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] -; BDVER12-NEXT: shlq $10, %rax # sched: [1:0.50] ; BDVER12-NEXT: shrq $54, %rdi # sched: [1:0.50] -; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.33] -; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shlq $10, %rax # sched: [1:0.50] +; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.50] +; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_mem: ; BTVER2: # %bb.0: # %entry @@ -389,8 +389,8 @@ ; ; BDVER12-LABEL: lshift_mem_optsize: ; BDVER12: # %bb.0: # %entry -; BDVER12-NEXT: shldq $10, %rdi, {{.*}}(%rip) # sched: [8:1.00] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shldq $10, %rdi, {{.*}}(%rip) # sched: [4:11.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_mem_optsize: ; BTVER2: # %bb.0: # %entry @@ -418,9 +418,9 @@ ; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] ; BDVER12-NEXT: shlq $10, %rdi # sched: [1:0.50] ; BDVER12-NEXT: shrq $54, %rax # sched: [1:0.50] -; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.33] -; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.50] +; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_mem_b: ; BTVER2: # %bb.0: # %entry @@ -450,9 +450,9 @@ ; BDVER12-LABEL: lshift_mem_b_optsize: ; BDVER12: # %bb.0: # %entry ; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] -; BDVER12-NEXT: shrdq $54, %rdi, %rax # sched: [2:0.67] -; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: shrdq $54, %rdi, %rax # sched: [4:3.00] +; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: lshift_mem_b_optsize: ; BTVER2: # %bb.0: # %entry Index: llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll +++ llvm/trunk/test/CodeGen/X86/schedule-x86_32.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX -; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -81,9 +81,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: aaa # sched: [100:0.33] +; BDVER2-NEXT: aaa # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_aaa: ; BTVER2: # %bb.0: @@ -181,10 +181,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: aad # sched: [100:0.33] -; BDVER2-NEXT: aad $16 # sched: [100:0.33] +; BDVER2-NEXT: aad # sched: [100:0.50] +; BDVER2-NEXT: aad $16 # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_aad: ; BTVER2: # %bb.0: @@ -284,10 +284,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: aam # sched: [100:0.33] -; BDVER2-NEXT: aam $16 # sched: [100:0.33] +; BDVER2-NEXT: aam # sched: [100:0.50] +; BDVER2-NEXT: aam $16 # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_aam: ; BTVER2: # %bb.0: @@ -379,9 +379,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: aas # sched: [100:0.33] +; BDVER2-NEXT: aas # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_aas: ; BTVER2: # %bb.0: @@ -480,9 +480,9 @@ ; BDVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: arpl %ax, (%ecx) # sched: [100:0.33] +; BDVER2-NEXT: arpl %ax, (%ecx) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_arpl: ; BTVER2: # %bb.0: @@ -644,7 +644,7 @@ ; ; BDVER2-LABEL: test_bound: ; BDVER2: # %bb.0: -; BDVER2-NEXT: pushl %esi # sched: [5:1.00] +; BDVER2-NEXT: pushl %esi # sched: [1:0.50] ; BDVER2-NEXT: .cfi_def_cfa_offset 8 ; BDVER2-NEXT: .cfi_offset %esi, -8 ; BDVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] @@ -652,12 +652,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %esi # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: bound %ax, (%esi) # sched: [100:0.33] -; BDVER2-NEXT: bound %ecx, (%edx) # sched: [100:0.33] +; BDVER2-NEXT: bound %ax, (%esi) # sched: [100:0.50] +; BDVER2-NEXT: bound %ecx, (%edx) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: popl %esi # sched: [6:0.50] +; BDVER2-NEXT: popl %esi # sched: [5:0.50] ; BDVER2-NEXT: .cfi_def_cfa_offset 4 -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_bound: ; BTVER2: # %bb.0: @@ -767,9 +767,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: daa # sched: [100:0.33] +; BDVER2-NEXT: daa # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_daa: ; BTVER2: # %bb.0: @@ -859,9 +859,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movb {{[0-9]+}}(%esp), %al # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: das # sched: [100:0.33] +; BDVER2-NEXT: das # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_das: ; BTVER2: # %bb.0: @@ -968,10 +968,10 @@ ; BDVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: decw %ax # sched: [1:0.33] -; BDVER2-NEXT: decw (%ecx) # sched: [7:1.00] +; BDVER2-NEXT: decw %ax # sched: [1:0.50] +; BDVER2-NEXT: decw (%ecx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_dec16: ; BTVER2: # %bb.0: @@ -1081,10 +1081,10 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: decl %eax # sched: [1:0.33] -; BDVER2-NEXT: decl (%ecx) # sched: [7:1.00] +; BDVER2-NEXT: decl %eax # sched: [1:0.50] +; BDVER2-NEXT: decl (%ecx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_dec32: ; BTVER2: # %bb.0: @@ -1195,10 +1195,10 @@ ; BDVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: incw %ax # sched: [1:0.33] -; BDVER2-NEXT: incw (%ecx) # sched: [7:1.00] +; BDVER2-NEXT: incw %ax # sched: [1:0.50] +; BDVER2-NEXT: incw (%ecx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_inc16: ; BTVER2: # %bb.0: @@ -1308,10 +1308,10 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: incl %eax # sched: [1:0.33] -; BDVER2-NEXT: incl (%ecx) # sched: [7:1.00] +; BDVER2-NEXT: incl %eax # sched: [1:0.50] +; BDVER2-NEXT: incl (%ecx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_inc32: ; BTVER2: # %bb.0: @@ -1396,9 +1396,9 @@ ; BDVER2-LABEL: test_into: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: into # sched: [100:0.33] +; BDVER2-NEXT: into # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_into: ; BTVER2: # %bb.0: @@ -1496,10 +1496,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: JXTGT: -; BDVER2-NEXT: jcxz JXTGT # sched: [2:1.00] -; BDVER2-NEXT: jecxz JXTGT # sched: [2:1.00] +; BDVER2-NEXT: jcxz JXTGT # sched: [1:1.00] +; BDVER2-NEXT: jecxz JXTGT # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_jcxz_jecxz: ; BTVER2: # %bb.0: @@ -1584,9 +1584,9 @@ ; BDVER2-LABEL: test_leave: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: leave # sched: [7:0.67] +; BDVER2-NEXT: leave # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_leave: ; BTVER2: # %bb.0: @@ -1747,19 +1747,19 @@ ; BDVER2-LABEL: test_pop_push: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: popl %ds # sched: [100:0.33] -; BDVER2-NEXT: popl %es # sched: [100:0.33] -; BDVER2-NEXT: popl %ss # sched: [100:0.33] -; BDVER2-NEXT: popl %fs # sched: [100:0.33] -; BDVER2-NEXT: popl %gs # sched: [100:0.33] -; BDVER2-NEXT: pushl %cs # sched: [100:0.33] -; BDVER2-NEXT: pushl %ds # sched: [100:0.33] -; BDVER2-NEXT: pushl %es # sched: [100:0.33] -; BDVER2-NEXT: pushl %ss # sched: [100:0.33] -; BDVER2-NEXT: pushl %fs # sched: [100:0.33] -; BDVER2-NEXT: pushl %gs # sched: [100:0.33] +; BDVER2-NEXT: popl %ds # sched: [100:0.50] +; BDVER2-NEXT: popl %es # sched: [100:0.50] +; BDVER2-NEXT: popl %ss # sched: [100:0.50] +; BDVER2-NEXT: popl %fs # sched: [100:0.50] +; BDVER2-NEXT: popl %gs # sched: [100:0.50] +; BDVER2-NEXT: pushl %cs # sched: [100:0.50] +; BDVER2-NEXT: pushl %ds # sched: [100:0.50] +; BDVER2-NEXT: pushl %es # sched: [100:0.50] +; BDVER2-NEXT: pushl %ss # sched: [100:0.50] +; BDVER2-NEXT: pushl %fs # sched: [100:0.50] +; BDVER2-NEXT: pushl %gs # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_pop_push: ; BTVER2: # %bb.0: @@ -1922,15 +1922,15 @@ ; BDVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: popw %ax # sched: [6:0.50] -; BDVER2-NEXT: popw (%ecx) # sched: [6:0.50] -; BDVER2-NEXT: pushw %ax # sched: [5:1.00] -; BDVER2-NEXT: pushw (%ecx) # sched: [5:1.00] +; BDVER2-NEXT: popw %ax # sched: [5:0.50] +; BDVER2-NEXT: popw (%ecx) # sched: [6:1.00] +; BDVER2-NEXT: pushw %ax # sched: [1:0.50] +; BDVER2-NEXT: pushw (%ecx) # sched: [6:1.00] ; BDVER2-NEXT: pushw $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [1:1.00] -; BDVER2-NEXT: pushw $7 # sched: [1:1.00] +; BDVER2-NEXT: # sched: [1:0.50] +; BDVER2-NEXT: pushw $7 # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_pop_push_16: ; BTVER2: # %bb.0: @@ -2089,15 +2089,15 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: popl %eax # sched: [6:0.50] -; BDVER2-NEXT: popl (%ecx) # sched: [6:0.50] -; BDVER2-NEXT: pushl %eax # sched: [5:1.00] -; BDVER2-NEXT: pushl (%ecx) # sched: [5:1.00] +; BDVER2-NEXT: popl %eax # sched: [5:0.50] +; BDVER2-NEXT: popl (%ecx) # sched: [6:1.00] +; BDVER2-NEXT: pushl %eax # sched: [1:0.50] +; BDVER2-NEXT: pushl (%ecx) # sched: [6:1.00] ; BDVER2-NEXT: pushl $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [1:1.00] -; BDVER2-NEXT: pushl $7 # sched: [1:1.00] +; BDVER2-NEXT: # sched: [1:0.50] +; BDVER2-NEXT: pushl $7 # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_pop_push_32: ; BTVER2: # %bb.0: @@ -2218,10 +2218,10 @@ ; BDVER2-NEXT: #APP ; BDVER2-NEXT: popal # sched: [5:0.50] ; BDVER2-NEXT: popfl # sched: [5:0.50] -; BDVER2-NEXT: pushal # sched: [1:1.00] -; BDVER2-NEXT: pushfl # sched: [1:1.00] +; BDVER2-NEXT: pushal # sched: [1:0.50] +; BDVER2-NEXT: pushfl # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_popa_popf_pusha_pushf: ; BTVER2: # %bb.0: @@ -2344,14 +2344,14 @@ ; BDVER2-LABEL: test_ret: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; BDVER2-NEXT: retl $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [6:1.00] -; BDVER2-NEXT: lretl # sched: [6:1.00] +; BDVER2-NEXT: # sched: [5:1.00] +; BDVER2-NEXT: lretl # sched: [5:1.00] ; BDVER2-NEXT: lretl $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_ret: ; BTVER2: # %bb.0: @@ -2440,9 +2440,9 @@ ; BDVER2-LABEL: test_salc: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: salc # sched: [1:0.33] +; BDVER2-NEXT: salc # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_salc: ; BTVER2: # %bb.0: @@ -2567,11 +2567,11 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: xchgl %eax, %eax # sched: [2:1.00] -; BDVER2-NEXT: xchgl %ecx, %eax # sched: [2:1.00] -; BDVER2-NEXT: xchgl %eax, (%edx) # sched: [6:1.00] +; BDVER2-NEXT: xchgl %eax, %eax # sched: [1:1.00] +; BDVER2-NEXT: xchgl %ecx, %eax # sched: [1:1.00] +; BDVER2-NEXT: xchgl %eax, (%edx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_xchg_32: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll +++ llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -112,14 +112,14 @@ ; BDVER2-LABEL: test_adc_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: adcb $7, %al # sched: [2:0.67] -; BDVER2-NEXT: adcb $7, %dil # sched: [2:0.67] -; BDVER2-NEXT: adcb $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcb %dl, %dil # sched: [2:0.67] -; BDVER2-NEXT: adcb %dil, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcb (%rsi), %dil # sched: [7:0.67] +; BDVER2-NEXT: adcb $7, %al # sched: [1:1.00] +; BDVER2-NEXT: adcb $7, %dil # sched: [1:1.00] +; BDVER2-NEXT: adcb $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcb %dl, %dil # sched: [1:1.00] +; BDVER2-NEXT: adcb %dil, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcb (%rsi), %dil # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_adc_8: ; BTVER2: # %bb.0: @@ -288,18 +288,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: adcw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: adcw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: adcw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [9:1.00] -; BDVER2-NEXT: adcw $7, %di # sched: [2:0.67] -; BDVER2-NEXT: adcw $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcw %dx, %di # sched: [2:0.67] -; BDVER2-NEXT: adcw %di, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcw (%rsi), %di # sched: [7:0.67] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: adcw $7, %di # sched: [1:1.00] +; BDVER2-NEXT: adcw $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcw %dx, %di # sched: [1:1.00] +; BDVER2-NEXT: adcw %di, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcw (%rsi), %di # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_adc_16: ; BTVER2: # %bb.0: @@ -478,18 +478,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: adcl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: adcl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: adcl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [9:1.00] -; BDVER2-NEXT: adcl $7, %edi # sched: [2:0.67] -; BDVER2-NEXT: adcl $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcl %edx, %edi # sched: [2:0.67] -; BDVER2-NEXT: adcl %edi, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcl (%rsi), %edi # sched: [7:0.67] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: adcl $7, %edi # sched: [1:1.00] +; BDVER2-NEXT: adcl $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcl %edx, %edi # sched: [1:1.00] +; BDVER2-NEXT: adcl %edi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcl (%rsi), %edi # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_adc_32: ; BTVER2: # %bb.0: @@ -668,18 +668,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: adcq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: adcq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: adcq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [9:1.00] -; BDVER2-NEXT: adcq $7, %rdi # sched: [2:0.67] -; BDVER2-NEXT: adcq $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcq %rdx, %rdi # sched: [2:0.67] -; BDVER2-NEXT: adcq %rdi, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: adcq (%rsi), %rdi # sched: [7:0.67] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: adcq $7, %rdi # sched: [1:1.00] +; BDVER2-NEXT: adcq $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcq %rdx, %rdi # sched: [1:1.00] +; BDVER2-NEXT: adcq %rdi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: adcq (%rsi), %rdi # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_adc_64: ; BTVER2: # %bb.0: @@ -818,14 +818,14 @@ ; BDVER2-LABEL: test_add_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: addb $7, %al # sched: [1:0.33] -; BDVER2-NEXT: addb $7, %dil # sched: [1:0.33] -; BDVER2-NEXT: addb $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addb %dl, %dil # sched: [1:0.33] -; BDVER2-NEXT: addb %dil, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addb (%rsi), %dil # sched: [6:0.50] +; BDVER2-NEXT: addb $7, %al # sched: [1:0.50] +; BDVER2-NEXT: addb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: addb $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addb %dl, %dil # sched: [1:0.50] +; BDVER2-NEXT: addb %dil, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addb (%rsi), %dil # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_add_8: ; BTVER2: # %bb.0: @@ -994,18 +994,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: addw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: addw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: addw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: addw $7, %di # sched: [1:0.33] -; BDVER2-NEXT: addw $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addw %dx, %di # sched: [1:0.33] -; BDVER2-NEXT: addw %di, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addw (%rsi), %di # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: addw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: addw $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addw %dx, %di # sched: [1:0.50] +; BDVER2-NEXT: addw %di, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addw (%rsi), %di # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_add_16: ; BTVER2: # %bb.0: @@ -1184,18 +1184,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: addl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: addl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: addl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: addl $7, %edi # sched: [1:0.33] -; BDVER2-NEXT: addl $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addl %edx, %edi # sched: [1:0.33] -; BDVER2-NEXT: addl %edi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addl (%rsi), %edi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: addl $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: addl $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addl %edx, %edi # sched: [1:0.50] +; BDVER2-NEXT: addl %edi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addl (%rsi), %edi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_add_32: ; BTVER2: # %bb.0: @@ -1374,18 +1374,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: addq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: addq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: addq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: addq $7, %rdi # sched: [1:0.33] -; BDVER2-NEXT: addq $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addq %rdx, %rdi # sched: [1:0.33] -; BDVER2-NEXT: addq %rdi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: addq (%rsi), %rdi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: addq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: addq $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addq %rdx, %rdi # sched: [1:0.50] +; BDVER2-NEXT: addq %rdi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: addq (%rsi), %rdi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_add_64: ; BTVER2: # %bb.0: @@ -1524,14 +1524,14 @@ ; BDVER2-LABEL: test_and_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: andb $7, %al # sched: [1:0.33] -; BDVER2-NEXT: andb $7, %dil # sched: [1:0.33] -; BDVER2-NEXT: andb $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andb %dl, %dil # sched: [1:0.33] -; BDVER2-NEXT: andb %dil, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andb (%rsi), %dil # sched: [6:0.50] +; BDVER2-NEXT: andb $7, %al # sched: [1:0.50] +; BDVER2-NEXT: andb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: andb $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andb %dl, %dil # sched: [1:0.50] +; BDVER2-NEXT: andb %dil, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andb (%rsi), %dil # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_and_8: ; BTVER2: # %bb.0: @@ -1700,18 +1700,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: andw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: andw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: andw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: andw $7, %di # sched: [1:0.33] -; BDVER2-NEXT: andw $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andw %dx, %di # sched: [1:0.33] -; BDVER2-NEXT: andw %di, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andw (%rsi), %di # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: andw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: andw $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andw %dx, %di # sched: [1:0.50] +; BDVER2-NEXT: andw %di, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andw (%rsi), %di # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_and_16: ; BTVER2: # %bb.0: @@ -1890,18 +1890,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: andl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: andl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: andl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: andl $7, %edi # sched: [1:0.33] -; BDVER2-NEXT: andl $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andl %edx, %edi # sched: [1:0.33] -; BDVER2-NEXT: andl %edi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andl (%rsi), %edi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: andl $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: andl $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andl %edx, %edi # sched: [1:0.50] +; BDVER2-NEXT: andl %edi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andl (%rsi), %edi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_and_32: ; BTVER2: # %bb.0: @@ -2080,18 +2080,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: andq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: andq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: andq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: andq $7, %rdi # sched: [1:0.33] -; BDVER2-NEXT: andq $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andq %rdx, %rdi # sched: [1:0.33] -; BDVER2-NEXT: andq %rdi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: andq (%rsi), %rdi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: andq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: andq $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andq %rdx, %rdi # sched: [1:0.50] +; BDVER2-NEXT: andq %rdi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: andq (%rsi), %rdi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_and_64: ; BTVER2: # %bb.0: @@ -2214,12 +2214,12 @@ ; BDVER2-LABEL: test_bsf16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: bsfw %di, %ax # sched: [3:1.00] -; BDVER2-NEXT: bsfw (%rsi), %cx # sched: [8:1.00] +; BDVER2-NEXT: bsfw %di, %ax # sched: [3:2.00] +; BDVER2-NEXT: bsfw (%rsi), %cx # sched: [7:2.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] ; BDVER2-NEXT: # kill: def $ax killed $ax killed $eax -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bsf16: ; BTVER2: # %bb.0: @@ -2322,11 +2322,11 @@ ; BDVER2-LABEL: test_bsf32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: bsfl %edi, %eax # sched: [3:1.00] -; BDVER2-NEXT: bsfl (%rsi), %ecx # sched: [8:1.00] +; BDVER2-NEXT: bsfl %edi, %eax # sched: [3:2.00] +; BDVER2-NEXT: bsfl (%rsi), %ecx # sched: [7:2.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bsf32: ; BTVER2: # %bb.0: @@ -2427,11 +2427,11 @@ ; BDVER2-LABEL: test_bsf64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: bsfq %rdi, %rax # sched: [3:1.00] -; BDVER2-NEXT: bsfq (%rsi), %rcx # sched: [8:1.00] +; BDVER2-NEXT: bsfq %rdi, %rax # sched: [3:2.00] +; BDVER2-NEXT: bsfq (%rsi), %rcx # sched: [7:2.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bsf64: ; BTVER2: # %bb.0: @@ -2541,12 +2541,12 @@ ; BDVER2-LABEL: test_bsr16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: bsrw %di, %ax # sched: [3:1.00] -; BDVER2-NEXT: bsrw (%rsi), %cx # sched: [8:1.00] +; BDVER2-NEXT: bsrw %di, %ax # sched: [4:2.00] +; BDVER2-NEXT: bsrw (%rsi), %cx # sched: [8:2.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] ; BDVER2-NEXT: # kill: def $ax killed $ax killed $eax -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bsr16: ; BTVER2: # %bb.0: @@ -2649,11 +2649,11 @@ ; BDVER2-LABEL: test_bsr32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: bsrl %edi, %eax # sched: [3:1.00] -; BDVER2-NEXT: bsrl (%rsi), %ecx # sched: [8:1.00] +; BDVER2-NEXT: bsrl %edi, %eax # sched: [4:2.00] +; BDVER2-NEXT: bsrl (%rsi), %ecx # sched: [8:2.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: orl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bsr32: ; BTVER2: # %bb.0: @@ -2754,11 +2754,11 @@ ; BDVER2-LABEL: test_bsr64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: bsrq %rdi, %rax # sched: [3:1.00] -; BDVER2-NEXT: bsrq (%rsi), %rcx # sched: [8:1.00] +; BDVER2-NEXT: bsrq %rdi, %rax # sched: [4:2.00] +; BDVER2-NEXT: bsrq (%rsi), %rcx # sched: [8:2.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bsr64: ; BTVER2: # %bb.0: @@ -2835,9 +2835,9 @@ ; ; BDVER2-LABEL: test_bswap32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.33] +; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.50] ; BDVER2-NEXT: bswapl %eax # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bswap32: ; BTVER2: # %bb.0: @@ -2904,9 +2904,9 @@ ; ; BDVER2-LABEL: test_bswap64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.33] -; BDVER2-NEXT: bswapq %rax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.50] +; BDVER2-NEXT: bswapq %rax # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bswap64: ; BTVER2: # %bb.0: @@ -3104,23 +3104,23 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: btw %si, %di # sched: [1:0.50] -; BDVER2-NEXT: btcw %si, %di # sched: [1:0.50] -; BDVER2-NEXT: btrw %si, %di # sched: [1:0.50] -; BDVER2-NEXT: btsw %si, %di # sched: [1:0.50] -; BDVER2-NEXT: btw %si, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btcw %si, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btrw %si, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btsw %si, (%rdx) # sched: [9:1.00] +; BDVER2-NEXT: btcw %si, %di # sched: [2:0.50] +; BDVER2-NEXT: btrw %si, %di # sched: [2:0.50] +; BDVER2-NEXT: btsw %si, %di # sched: [2:0.50] +; BDVER2-NEXT: btw %si, (%rdx) # sched: [5:0.50] +; BDVER2-NEXT: btcw %si, (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: btrw %si, (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: btsw %si, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btw $7, %di # sched: [1:0.50] -; BDVER2-NEXT: btcw $7, %di # sched: [1:0.50] -; BDVER2-NEXT: btrw $7, %di # sched: [1:0.50] -; BDVER2-NEXT: btsw $7, %di # sched: [1:0.50] -; BDVER2-NEXT: btw $7, (%rdx) # sched: [6:0.50] +; BDVER2-NEXT: btcw $7, %di # sched: [2:0.50] +; BDVER2-NEXT: btrw $7, %di # sched: [2:0.50] +; BDVER2-NEXT: btsw $7, %di # sched: [2:0.50] +; BDVER2-NEXT: btw $7, (%rdx) # sched: [5:0.50] ; BDVER2-NEXT: btcw $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btrw $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btsw $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bt_btc_btr_bts_16: ; BTVER2: # %bb.0: @@ -3349,23 +3349,23 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: btl %esi, %edi # sched: [1:0.50] -; BDVER2-NEXT: btcl %esi, %edi # sched: [1:0.50] -; BDVER2-NEXT: btrl %esi, %edi # sched: [1:0.50] -; BDVER2-NEXT: btsl %esi, %edi # sched: [1:0.50] -; BDVER2-NEXT: btl %esi, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btcl %esi, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btrl %esi, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btsl %esi, (%rdx) # sched: [9:1.00] +; BDVER2-NEXT: btcl %esi, %edi # sched: [2:0.50] +; BDVER2-NEXT: btrl %esi, %edi # sched: [2:0.50] +; BDVER2-NEXT: btsl %esi, %edi # sched: [2:0.50] +; BDVER2-NEXT: btl %esi, (%rdx) # sched: [5:0.50] +; BDVER2-NEXT: btcl %esi, (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: btrl %esi, (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: btsl %esi, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btl $7, %edi # sched: [1:0.50] -; BDVER2-NEXT: btcl $7, %edi # sched: [1:0.50] -; BDVER2-NEXT: btrl $7, %edi # sched: [1:0.50] -; BDVER2-NEXT: btsl $7, %edi # sched: [1:0.50] -; BDVER2-NEXT: btl $7, (%rdx) # sched: [6:0.50] +; BDVER2-NEXT: btcl $7, %edi # sched: [2:0.50] +; BDVER2-NEXT: btrl $7, %edi # sched: [2:0.50] +; BDVER2-NEXT: btsl $7, %edi # sched: [2:0.50] +; BDVER2-NEXT: btl $7, (%rdx) # sched: [5:0.50] ; BDVER2-NEXT: btcl $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btrl $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btsl $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bt_btc_btr_bts_32: ; BTVER2: # %bb.0: @@ -3594,23 +3594,23 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: btq %rsi, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btcq %rsi, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btrq %rsi, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btsq %rsi, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btq %rsi, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btcq %rsi, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btrq %rsi, (%rdx) # sched: [9:1.00] -; BDVER2-NEXT: btsq %rsi, (%rdx) # sched: [9:1.00] +; BDVER2-NEXT: btcq %rsi, %rdi # sched: [2:0.50] +; BDVER2-NEXT: btrq %rsi, %rdi # sched: [2:0.50] +; BDVER2-NEXT: btsq %rsi, %rdi # sched: [2:0.50] +; BDVER2-NEXT: btq %rsi, (%rdx) # sched: [5:0.50] +; BDVER2-NEXT: btcq %rsi, (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: btrq %rsi, (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: btsq %rsi, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btq $7, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btcq $7, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btrq $7, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btsq $7, %rdi # sched: [1:0.50] -; BDVER2-NEXT: btq $7, (%rdx) # sched: [6:0.50] +; BDVER2-NEXT: btcq $7, %rdi # sched: [2:0.50] +; BDVER2-NEXT: btrq $7, %rdi # sched: [2:0.50] +; BDVER2-NEXT: btsq $7, %rdi # sched: [2:0.50] +; BDVER2-NEXT: btq $7, (%rdx) # sched: [5:0.50] ; BDVER2-NEXT: btcq $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btrq $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: btsq $7, (%rdx) # sched: [7:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_bt_btc_btr_bts_64: ; BTVER2: # %bb.0: @@ -3761,14 +3761,14 @@ ; BDVER2-LABEL: test_cbw_cdq_cdqe_cqo_cwd_cwde: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cbtw # sched: [1:0.33] +; BDVER2-NEXT: cbtw # sched: [1:0.50] ; BDVER2-NEXT: cltd # sched: [1:0.50] -; BDVER2-NEXT: cltq # sched: [1:0.33] +; BDVER2-NEXT: cltq # sched: [1:0.50] ; BDVER2-NEXT: cqto # sched: [1:0.50] -; BDVER2-NEXT: cwtd # sched: [2:1.00] -; BDVER2-NEXT: cwtl # sched: [1:0.33] +; BDVER2-NEXT: cwtd # sched: [1:0.50] +; BDVER2-NEXT: cwtl # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cbw_cdq_cdqe_cqo_cwd_cwde: ; BTVER2: # %bb.0: @@ -3873,11 +3873,11 @@ ; BDVER2-LABEL: test_clc_cld_cmc: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: clc # sched: [1:0.25] -; BDVER2-NEXT: cld # sched: [1:0.33] -; BDVER2-NEXT: cmc # sched: [1:0.33] +; BDVER2-NEXT: clc # sched: [1:0.50] +; BDVER2-NEXT: cld # sched: [1:0.50] +; BDVER2-NEXT: cmc # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_clc_cld_cmc: ; BTVER2: # %bb.0: @@ -4000,14 +4000,14 @@ ; BDVER2-LABEL: test_cmp_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmpb $7, %al # sched: [1:0.33] -; BDVER2-NEXT: cmpb $7, %dil # sched: [1:0.33] -; BDVER2-NEXT: cmpb $7, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpb %dil, %dil # sched: [1:0.33] -; BDVER2-NEXT: cmpb %dil, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpb (%rsi), %dil # sched: [6:0.50] +; BDVER2-NEXT: cmpb $7, %al # sched: [1:0.50] +; BDVER2-NEXT: cmpb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: cmpb $7, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpb %dil, %dil # sched: [1:0.50] +; BDVER2-NEXT: cmpb %dil, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpb (%rsi), %dil # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmp_8: ; BTVER2: # %bb.0: @@ -4176,18 +4176,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: cmpw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: cmpw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: cmpw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [6:0.50] -; BDVER2-NEXT: cmpw $7, %di # sched: [1:0.33] -; BDVER2-NEXT: cmpw $7, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpw %di, %di # sched: [1:0.33] -; BDVER2-NEXT: cmpw %di, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpw (%rsi), %di # sched: [6:0.50] +; BDVER2-NEXT: # sched: [5:0.50] +; BDVER2-NEXT: cmpw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: cmpw $7, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpw %di, %di # sched: [1:0.50] +; BDVER2-NEXT: cmpw %di, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpw (%rsi), %di # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmp_16: ; BTVER2: # %bb.0: @@ -4366,18 +4366,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: cmpl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: cmpl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: cmpl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [6:0.50] -; BDVER2-NEXT: cmpl $7, %edi # sched: [1:0.33] -; BDVER2-NEXT: cmpl $7, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpl %edi, %edi # sched: [1:0.33] -; BDVER2-NEXT: cmpl %edi, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpl (%rsi), %edi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [5:0.50] +; BDVER2-NEXT: cmpl $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmpl $7, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpl %edi, %edi # sched: [1:0.50] +; BDVER2-NEXT: cmpl %edi, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpl (%rsi), %edi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmp_32: ; BTVER2: # %bb.0: @@ -4556,18 +4556,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: cmpq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: cmpq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: cmpq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [6:0.50] -; BDVER2-NEXT: cmpq $7, %rdi # sched: [1:0.33] -; BDVER2-NEXT: cmpq $7, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpq %rdi, %rdi # sched: [1:0.33] -; BDVER2-NEXT: cmpq %rdi, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: cmpq (%rsi), %rdi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [5:0.50] +; BDVER2-NEXT: cmpq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmpq $7, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpq %rdi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: cmpq %rdi, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: cmpq (%rsi), %rdi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmp_64: ; BTVER2: # %bb.0: @@ -4690,12 +4690,12 @@ ; BDVER2-LABEL: test_cmps: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmpsb %es:(%rdi), (%rsi) # sched: [8:1.00] -; BDVER2-NEXT: cmpsw %es:(%rdi), (%rsi) # sched: [8:1.00] -; BDVER2-NEXT: cmpsl %es:(%rdi), (%rsi) # sched: [8:1.00] -; BDVER2-NEXT: cmpsq %es:(%rdi), (%rsi) # sched: [8:1.00] +; BDVER2-NEXT: cmpsb %es:(%rdi), (%rsi) # sched: [100:0.50] +; BDVER2-NEXT: cmpsw %es:(%rdi), (%rsi) # sched: [100:0.50] +; BDVER2-NEXT: cmpsl %es:(%rdi), (%rsi) # sched: [100:0.50] +; BDVER2-NEXT: cmpsq %es:(%rdi), (%rsi) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmps: ; BTVER2: # %bb.0: @@ -4788,10 +4788,10 @@ ; BDVER2-LABEL: test_cmpxchg_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmpxchgb %dil, %sil # sched: [5:1.33] -; BDVER2-NEXT: cmpxchgb %dil, (%rdx) # sched: [8:2.00] +; BDVER2-NEXT: cmpxchgb %dil, %sil # sched: [3:1.00] +; BDVER2-NEXT: cmpxchgb %dil, (%rdx) # sched: [3:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmpxchg_8: ; BTVER2: # %bb.0: @@ -4879,10 +4879,10 @@ ; BDVER2-LABEL: test_cmpxchg_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmpxchgw %di, %si # sched: [5:1.33] -; BDVER2-NEXT: cmpxchgw %di, (%rdx) # sched: [8:2.00] +; BDVER2-NEXT: cmpxchgw %di, %si # sched: [3:1.00] +; BDVER2-NEXT: cmpxchgw %di, (%rdx) # sched: [3:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmpxchg_16: ; BTVER2: # %bb.0: @@ -4970,10 +4970,10 @@ ; BDVER2-LABEL: test_cmpxchg_32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmpxchgl %edi, %esi # sched: [5:1.33] -; BDVER2-NEXT: cmpxchgl %edi, (%rdx) # sched: [8:2.00] +; BDVER2-NEXT: cmpxchgl %edi, %esi # sched: [3:1.00] +; BDVER2-NEXT: cmpxchgl %edi, (%rdx) # sched: [3:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmpxchg_32: ; BTVER2: # %bb.0: @@ -5061,10 +5061,10 @@ ; BDVER2-LABEL: test_cmpxchg_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmpxchgq %rdi, %rsi # sched: [5:1.33] -; BDVER2-NEXT: cmpxchgq %rdi, (%rdx) # sched: [8:2.00] +; BDVER2-NEXT: cmpxchgq %rdi, %rsi # sched: [3:1.00] +; BDVER2-NEXT: cmpxchgq %rdi, (%rdx) # sched: [3:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmpxchg_64: ; BTVER2: # %bb.0: @@ -5152,10 +5152,10 @@ ; BDVER2-LABEL: test_cmpxchg8b_cmpxchg16b: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cmpxchg8b (%rdi) # sched: [6:1.00] -; BDVER2-NEXT: cmpxchg16b (%rdi) # sched: [6:1.00] +; BDVER2-NEXT: cmpxchg8b (%rdi) # sched: [3:1.00] +; BDVER2-NEXT: cmpxchg16b (%rdi) # sched: [3:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cmpxchg8b_cmpxchg16b: ; BTVER2: # %bb.0: @@ -5236,9 +5236,9 @@ ; BDVER2-LABEL: test_cpuid: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: cpuid # sched: [100:0.33] +; BDVER2-NEXT: cpuid # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_cpuid: ; BTVER2: # %bb.0: @@ -5325,10 +5325,10 @@ ; BDVER2-LABEL: test_dec8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: decb %dil # sched: [1:0.33] -; BDVER2-NEXT: decb (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: decb %dil # sched: [1:0.50] +; BDVER2-NEXT: decb (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_dec8: ; BTVER2: # %bb.0: @@ -5416,10 +5416,10 @@ ; BDVER2-LABEL: test_dec16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: decw %di # sched: [1:0.33] -; BDVER2-NEXT: decw (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: decw %di # sched: [1:0.50] +; BDVER2-NEXT: decw (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_dec16: ; BTVER2: # %bb.0: @@ -5507,10 +5507,10 @@ ; BDVER2-LABEL: test_dec32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: decl %edi # sched: [1:0.33] -; BDVER2-NEXT: decl (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: decl %edi # sched: [1:0.50] +; BDVER2-NEXT: decl (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_dec32: ; BTVER2: # %bb.0: @@ -5598,10 +5598,10 @@ ; BDVER2-LABEL: test_dec64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: decq %rdi # sched: [1:0.33] -; BDVER2-NEXT: decq (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: decq %rdi # sched: [1:0.50] +; BDVER2-NEXT: decq (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_dec64: ; BTVER2: # %bb.0: @@ -5756,16 +5756,16 @@ ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:0.50] ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: divb %dil # sched: [25:10.00] -; BDVER2-NEXT: divb (%r8) # sched: [30:10.00] -; BDVER2-NEXT: divw %si # sched: [25:10.00] -; BDVER2-NEXT: divw (%r9) # sched: [30:10.00] -; BDVER2-NEXT: divl %edx # sched: [25:10.00] -; BDVER2-NEXT: divl (%rax) # sched: [30:10.00] -; BDVER2-NEXT: divq %rcx # sched: [25:10.00] -; BDVER2-NEXT: divq (%r10) # sched: [30:10.00] +; BDVER2-NEXT: divb %dil # sched: [12:12.00] +; BDVER2-NEXT: divb (%r8) # sched: [16:12.00] +; BDVER2-NEXT: divw %si # sched: [15:15.00] +; BDVER2-NEXT: divw (%r9) # sched: [19:15.00] +; BDVER2-NEXT: divl %edx # sched: [14:14.00] +; BDVER2-NEXT: divl (%rax) # sched: [18:14.00] +; BDVER2-NEXT: divq %rcx # sched: [14:14.00] +; BDVER2-NEXT: divq (%r10) # sched: [18:14.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_div: ; BTVER2: # %bb.0: @@ -5871,9 +5871,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: enter $7, $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [100:0.33] +; BDVER2-NEXT: # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_enter: ; BTVER2: # %bb.0: @@ -6028,16 +6028,16 @@ ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:0.50] ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: idivb %dil # sched: [25:10.00] -; BDVER2-NEXT: idivb (%r8) # sched: [30:10.00] -; BDVER2-NEXT: idivw %si # sched: [25:10.00] -; BDVER2-NEXT: idivw (%r9) # sched: [30:10.00] -; BDVER2-NEXT: idivl %edx # sched: [25:10.00] -; BDVER2-NEXT: idivl (%rax) # sched: [30:10.00] -; BDVER2-NEXT: idivq %rcx # sched: [25:10.00] -; BDVER2-NEXT: idivq (%r10) # sched: [30:10.00] +; BDVER2-NEXT: idivb %dil # sched: [12:12.00] +; BDVER2-NEXT: idivb (%r8) # sched: [16:12.00] +; BDVER2-NEXT: idivw %si # sched: [15:17.00] +; BDVER2-NEXT: idivw (%r9) # sched: [19:17.00] +; BDVER2-NEXT: idivl %edx # sched: [14:25.00] +; BDVER2-NEXT: idivl (%rax) # sched: [18:25.00] +; BDVER2-NEXT: idivq %rcx # sched: [14:14.00] +; BDVER2-NEXT: idivq (%r10) # sched: [18:14.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_idiv: ; BTVER2: # %bb.0: @@ -6142,10 +6142,10 @@ ; BDVER2-LABEL: test_imul_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: imulb %dil # sched: [3:1.00] +; BDVER2-NEXT: imulb %dil # sched: [4:1.00] ; BDVER2-NEXT: imulb (%rsi) # sched: [8:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_imul_8: ; BTVER2: # %bb.0: @@ -6297,18 +6297,18 @@ ; BDVER2-LABEL: test_imul_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: imulw %di # sched: [4:1.33] -; BDVER2-NEXT: imulw (%rsi) # sched: [9:1.33] -; BDVER2-NEXT: imulw %dx, %di # sched: [3:1.00] +; BDVER2-NEXT: imulw %di # sched: [4:1.00] +; BDVER2-NEXT: imulw (%rsi) # sched: [8:1.00] +; BDVER2-NEXT: imulw %dx, %di # sched: [4:1.00] ; BDVER2-NEXT: imulw (%rsi), %di # sched: [8:1.00] ; BDVER2-NEXT: imulw $511, %di, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [4:1.00] +; BDVER2-NEXT: # sched: [5:1.00] ; BDVER2-NEXT: imulw $511, (%rsi), %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [8:1.00] -; BDVER2-NEXT: imulw $7, %di, %di # sched: [4:1.00] -; BDVER2-NEXT: imulw $7, (%rsi), %di # sched: [8:1.00] +; BDVER2-NEXT: # sched: [9:1.00] +; BDVER2-NEXT: imulw $7, %di, %di # sched: [5:1.00] +; BDVER2-NEXT: imulw $7, (%rsi), %di # sched: [9:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_imul_16: ; BTVER2: # %bb.0: @@ -6477,17 +6477,17 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: imull %edi # sched: [4:1.00] -; BDVER2-NEXT: imull (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: imull %edx, %edi # sched: [3:1.00] +; BDVER2-NEXT: imull (%rsi) # sched: [8:1.00] +; BDVER2-NEXT: imull %edx, %edi # sched: [4:1.00] ; BDVER2-NEXT: imull (%rsi), %edi # sched: [8:1.00] ; BDVER2-NEXT: imull $665536, %edi, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [3:1.00] +; BDVER2-NEXT: # sched: [4:1.00] ; BDVER2-NEXT: imull $665536, (%rsi), %edi # imm = 0xA27C0 ; BDVER2-NEXT: # sched: [8:1.00] -; BDVER2-NEXT: imull $7, %edi, %edi # sched: [3:1.00] +; BDVER2-NEXT: imull $7, %edi, %edi # sched: [4:1.00] ; BDVER2-NEXT: imull $7, (%rsi), %edi # sched: [8:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_imul_32: ; BTVER2: # %bb.0: @@ -6655,18 +6655,18 @@ ; BDVER2-LABEL: test_imul_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: imulq %rdi # sched: [4:1.00] -; BDVER2-NEXT: imulq (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: imulq %rdx, %rdi # sched: [3:1.00] -; BDVER2-NEXT: imulq (%rsi), %rdi # sched: [8:1.00] +; BDVER2-NEXT: imulq %rdi # sched: [6:4.00] +; BDVER2-NEXT: imulq (%rsi) # sched: [10:4.00] +; BDVER2-NEXT: imulq %rdx, %rdi # sched: [6:4.00] +; BDVER2-NEXT: imulq (%rsi), %rdi # sched: [10:4.00] ; BDVER2-NEXT: imulq $665536, %rdi, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [3:1.00] +; BDVER2-NEXT: # sched: [6:4.00] ; BDVER2-NEXT: imulq $665536, (%rsi), %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [8:1.00] -; BDVER2-NEXT: imulq $7, %rdi, %rdi # sched: [3:1.00] -; BDVER2-NEXT: imulq $7, (%rsi), %rdi # sched: [8:1.00] +; BDVER2-NEXT: # sched: [10:4.00] +; BDVER2-NEXT: imulq $7, %rdi, %rdi # sched: [6:4.00] +; BDVER2-NEXT: imulq $7, (%rsi), %rdi # sched: [10:4.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_imul_64: ; BTVER2: # %bb.0: @@ -6803,14 +6803,14 @@ ; BDVER2-LABEL: test_in: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: inb $7, %al # sched: [100:0.33] -; BDVER2-NEXT: inw $7, %ax # sched: [100:0.33] -; BDVER2-NEXT: inl $7, %eax # sched: [100:0.33] -; BDVER2-NEXT: inb %dx, %al # sched: [100:0.33] -; BDVER2-NEXT: inw %dx, %ax # sched: [100:0.33] -; BDVER2-NEXT: inl %dx, %eax # sched: [100:0.33] +; BDVER2-NEXT: inb $7, %al # sched: [100:0.50] +; BDVER2-NEXT: inw $7, %ax # sched: [100:0.50] +; BDVER2-NEXT: inl $7, %eax # sched: [100:0.50] +; BDVER2-NEXT: inb %dx, %al # sched: [100:0.50] +; BDVER2-NEXT: inw %dx, %ax # sched: [100:0.50] +; BDVER2-NEXT: inl %dx, %eax # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_in: ; BTVER2: # %bb.0: @@ -6907,10 +6907,10 @@ ; BDVER2-LABEL: test_inc8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: incb %dil # sched: [1:0.33] -; BDVER2-NEXT: incb (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: incb %dil # sched: [1:0.50] +; BDVER2-NEXT: incb (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_inc8: ; BTVER2: # %bb.0: @@ -6998,10 +6998,10 @@ ; BDVER2-LABEL: test_inc16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: incw %di # sched: [1:0.33] -; BDVER2-NEXT: incw (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: incw %di # sched: [1:0.50] +; BDVER2-NEXT: incw (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_inc16: ; BTVER2: # %bb.0: @@ -7089,10 +7089,10 @@ ; BDVER2-LABEL: test_inc32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: incl %edi # sched: [1:0.33] -; BDVER2-NEXT: incl (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: incl %edi # sched: [1:0.50] +; BDVER2-NEXT: incl (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_inc32: ; BTVER2: # %bb.0: @@ -7180,10 +7180,10 @@ ; BDVER2-LABEL: test_inc64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: incq %rdi # sched: [1:0.33] -; BDVER2-NEXT: incq (%rsi) # sched: [7:1.00] +; BDVER2-NEXT: incq %rdi # sched: [1:0.50] +; BDVER2-NEXT: incq (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_inc64: ; BTVER2: # %bb.0: @@ -7280,11 +7280,11 @@ ; BDVER2-LABEL: test_ins: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: insb %dx, %es:(%rdi) # sched: [100:0.33] -; BDVER2-NEXT: insw %dx, %es:(%rdi) # sched: [100:0.33] -; BDVER2-NEXT: insl %dx, %es:(%rdi) # sched: [100:0.33] +; BDVER2-NEXT: insb %dx, %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: insw %dx, %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: insl %dx, %es:(%rdi) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ins: ; BTVER2: # %bb.0: @@ -7367,9 +7367,9 @@ ; BDVER2-LABEL: test_int: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: int $7 # sched: [100:0.33] +; BDVER2-NEXT: int $7 # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_int: ; BTVER2: # %bb.0: @@ -7456,10 +7456,10 @@ ; BDVER2-LABEL: test_invlpg_invlpga: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: invlpg (%rdi) # sched: [100:0.33] -; BDVER2-NEXT: invlpga %rax, %ecx # sched: [100:0.33] +; BDVER2-NEXT: invlpg (%rdi) # sched: [100:0.50] +; BDVER2-NEXT: invlpga %rax, %ecx # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_invlpg_invlpga: ; BTVER2: # %bb.0: @@ -7812,7 +7812,7 @@ ; BDVER2-NEXT: jg JCCTGT # sched: [1:1.00] ; BDVER2-NEXT: jg JCCTGT # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_jcc: ; BTVER2: # %bb.0: @@ -7968,10 +7968,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: JXTGT: -; BDVER2-NEXT: jecxz JXTGT # sched: [2:1.00] -; BDVER2-NEXT: jrcxz JXTGT # sched: [2:1.00] +; BDVER2-NEXT: jecxz JXTGT # sched: [1:1.00] +; BDVER2-NEXT: jrcxz JXTGT # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_jecxz_jrcxz: ; BTVER2: # %bb.0: @@ -8064,10 +8064,10 @@ ; BDVER2-LABEL: test_lahf_sahf: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: lahf # sched: [1:0.50] -; BDVER2-NEXT: sahf # sched: [1:0.50] +; BDVER2-NEXT: lahf # sched: [2:0.50] +; BDVER2-NEXT: sahf # sched: [2:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lahf_sahf: ; BTVER2: # %bb.0: @@ -8156,9 +8156,9 @@ ; BDVER2-LABEL: test_leave: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: leave # sched: [7:0.67] +; BDVER2-NEXT: leave # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_leave: ; BTVER2: # %bb.0: @@ -8261,12 +8261,12 @@ ; BDVER2-LABEL: test_lods: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: lodsb (%rsi), %al # sched: [7:0.67] -; BDVER2-NEXT: lodsw (%rsi), %ax # sched: [7:0.67] -; BDVER2-NEXT: lodsl (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: lodsq (%rsi), %rax # sched: [6:0.50] +; BDVER2-NEXT: lodsb (%rsi), %al # sched: [100:0.50] +; BDVER2-NEXT: lodsw (%rsi), %ax # sched: [100:0.50] +; BDVER2-NEXT: lodsl (%rsi), %eax # sched: [100:0.50] +; BDVER2-NEXT: lodsq (%rsi), %rax # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_lods: ; BTVER2: # %bb.0: @@ -8380,7 +8380,7 @@ ; BDVER2-NEXT: loope LTGT # sched: [1:1.00] ; BDVER2-NEXT: loopne LTGT # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_loop: ; BTVER2: # %bb.0: @@ -8475,10 +8475,10 @@ ; BDVER2-LABEL: test_movnti: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: movntil %edi, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: movntiq %rdx, (%rcx) # sched: [1:1.00] +; BDVER2-NEXT: movntil %edi, (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: movntiq %rdx, (%rcx) # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movnti: ; BTVER2: # %bb.0: @@ -8583,12 +8583,12 @@ ; BDVER2-LABEL: test_movs: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: movsb (%rsi), %es:(%rdi) # sched: [8:1.00] -; BDVER2-NEXT: movsw (%rsi), %es:(%rdi) # sched: [8:1.00] -; BDVER2-NEXT: movsl (%rsi), %es:(%rdi) # sched: [8:1.00] -; BDVER2-NEXT: movsq (%rsi), %es:(%rdi) # sched: [8:1.00] +; BDVER2-NEXT: movsb (%rsi), %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: movsw (%rsi), %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: movsl (%rsi), %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: movsq (%rsi), %es:(%rdi) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movs: ; BTVER2: # %bb.0: @@ -8692,11 +8692,11 @@ ; BDVER2-LABEL: test_movslq: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: movslq %edi, %rax # sched: [1:0.33] +; BDVER2-NEXT: movslq %edi, %rax # sched: [1:0.50] ; BDVER2-NEXT: movslq (%rsi), %rcx # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: orq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movslq: ; BTVER2: # %bb.0: @@ -8856,16 +8856,16 @@ ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:0.50] ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: mulb %dil # sched: [3:1.00] +; BDVER2-NEXT: mulb %dil # sched: [4:1.00] ; BDVER2-NEXT: mulb (%r8) # sched: [8:1.00] -; BDVER2-NEXT: mulw %si # sched: [4:1.33] -; BDVER2-NEXT: mulw (%r9) # sched: [9:1.33] +; BDVER2-NEXT: mulw %si # sched: [4:1.00] +; BDVER2-NEXT: mulw (%r9) # sched: [8:1.00] ; BDVER2-NEXT: mull %edx # sched: [4:1.00] -; BDVER2-NEXT: mull (%rax) # sched: [9:1.00] -; BDVER2-NEXT: mulq %rcx # sched: [4:1.00] -; BDVER2-NEXT: mulq (%r10) # sched: [9:1.00] +; BDVER2-NEXT: mull (%rax) # sched: [8:1.00] +; BDVER2-NEXT: mulq %rcx # sched: [6:4.00] +; BDVER2-NEXT: mulq (%r10) # sched: [10:4.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_mul: ; BTVER2: # %bb.0: @@ -9036,16 +9036,16 @@ ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:0.50] ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: negb %dil # sched: [1:0.33] -; BDVER2-NEXT: negb (%r8) # sched: [7:1.00] -; BDVER2-NEXT: negw %si # sched: [1:0.33] -; BDVER2-NEXT: negw (%r9) # sched: [7:1.00] -; BDVER2-NEXT: negl %edx # sched: [1:0.33] -; BDVER2-NEXT: negl (%rax) # sched: [7:1.00] -; BDVER2-NEXT: negq %rcx # sched: [1:0.33] -; BDVER2-NEXT: negq (%r10) # sched: [7:1.00] +; BDVER2-NEXT: negb %dil # sched: [1:0.50] +; BDVER2-NEXT: negb (%r8) # sched: [6:1.00] +; BDVER2-NEXT: negw %si # sched: [1:0.50] +; BDVER2-NEXT: negw (%r9) # sched: [6:1.00] +; BDVER2-NEXT: negl %edx # sched: [1:0.50] +; BDVER2-NEXT: negl (%rax) # sched: [6:1.00] +; BDVER2-NEXT: negq %rcx # sched: [1:0.50] +; BDVER2-NEXT: negq (%r10) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_neg: ; BTVER2: # %bb.0: @@ -9190,15 +9190,15 @@ ; BDVER2-LABEL: test_nop: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: nop # sched: [1:0.25] -; BDVER2-NEXT: nopw %di # sched: [1:0.25] -; BDVER2-NEXT: nopw (%rcx) # sched: [1:0.25] -; BDVER2-NEXT: nopl %esi # sched: [1:0.25] -; BDVER2-NEXT: nopl (%r8) # sched: [1:0.25] -; BDVER2-NEXT: nopq %rdx # sched: [1:0.25] -; BDVER2-NEXT: nopq (%r9) # sched: [1:0.25] +; BDVER2-NEXT: nop # sched: [1:0.50] +; BDVER2-NEXT: nopw %di # sched: [1:0.50] +; BDVER2-NEXT: nopw (%rcx) # sched: [1:0.50] +; BDVER2-NEXT: nopl %esi # sched: [1:0.50] +; BDVER2-NEXT: nopl (%r8) # sched: [1:0.50] +; BDVER2-NEXT: nopq %rdx # sched: [1:0.50] +; BDVER2-NEXT: nopq (%r9) # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_nop: ; BTVER2: # %bb.0: @@ -9363,16 +9363,16 @@ ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %r10 # sched: [5:0.50] ; BDVER2-NEXT: movq {{[0-9]+}}(%rsp), %rax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: notb %dil # sched: [1:0.33] -; BDVER2-NEXT: notb (%r8) # sched: [7:1.00] -; BDVER2-NEXT: notw %si # sched: [1:0.33] -; BDVER2-NEXT: notw (%r9) # sched: [7:1.00] -; BDVER2-NEXT: notl %edx # sched: [1:0.33] -; BDVER2-NEXT: notl (%rax) # sched: [7:1.00] -; BDVER2-NEXT: notq %rcx # sched: [1:0.33] -; BDVER2-NEXT: notq (%r10) # sched: [7:1.00] +; BDVER2-NEXT: notb %dil # sched: [1:0.50] +; BDVER2-NEXT: notb (%r8) # sched: [6:1.00] +; BDVER2-NEXT: notw %si # sched: [1:0.50] +; BDVER2-NEXT: notw (%r9) # sched: [6:1.00] +; BDVER2-NEXT: notl %edx # sched: [1:0.50] +; BDVER2-NEXT: notl (%rax) # sched: [6:1.00] +; BDVER2-NEXT: notq %rcx # sched: [1:0.50] +; BDVER2-NEXT: notq (%r10) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_not: ; BTVER2: # %bb.0: @@ -9509,14 +9509,14 @@ ; BDVER2-LABEL: test_or_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: orb $7, %al # sched: [1:0.33] -; BDVER2-NEXT: orb $7, %dil # sched: [1:0.33] -; BDVER2-NEXT: orb $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orb %dl, %dil # sched: [1:0.33] -; BDVER2-NEXT: orb %dil, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orb (%rsi), %dil # sched: [6:0.50] +; BDVER2-NEXT: orb $7, %al # sched: [1:0.50] +; BDVER2-NEXT: orb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: orb $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orb %dl, %dil # sched: [1:0.50] +; BDVER2-NEXT: orb %dil, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orb (%rsi), %dil # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_or_8: ; BTVER2: # %bb.0: @@ -9685,18 +9685,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: orw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: orw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: orw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: orw $7, %di # sched: [1:0.33] -; BDVER2-NEXT: orw $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orw %dx, %di # sched: [1:0.33] -; BDVER2-NEXT: orw %di, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orw (%rsi), %di # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: orw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: orw $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orw %dx, %di # sched: [1:0.50] +; BDVER2-NEXT: orw %di, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orw (%rsi), %di # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_or_16: ; BTVER2: # %bb.0: @@ -9875,18 +9875,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: orl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: orl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: orl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: orl $7, %edi # sched: [1:0.33] -; BDVER2-NEXT: orl $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orl %edx, %edi # sched: [1:0.33] -; BDVER2-NEXT: orl %edi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orl (%rsi), %edi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: orl $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: orl $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orl %edx, %edi # sched: [1:0.50] +; BDVER2-NEXT: orl %edi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orl (%rsi), %edi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_or_32: ; BTVER2: # %bb.0: @@ -10065,18 +10065,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: orq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: orq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: orq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: orq $7, %rdi # sched: [1:0.33] -; BDVER2-NEXT: orq $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orq %rdx, %rdi # sched: [1:0.33] -; BDVER2-NEXT: orq %rdi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: orq (%rsi), %rdi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: orq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: orq $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orq %rdx, %rdi # sched: [1:0.50] +; BDVER2-NEXT: orq %rdi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: orq (%rsi), %rdi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_or_64: ; BTVER2: # %bb.0: @@ -10215,14 +10215,14 @@ ; BDVER2-LABEL: test_out: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: outb %al, $7 # sched: [100:0.33] -; BDVER2-NEXT: outw %ax, $7 # sched: [100:0.33] -; BDVER2-NEXT: outl %eax, $7 # sched: [100:0.33] -; BDVER2-NEXT: outb %al, %dx # sched: [100:0.33] -; BDVER2-NEXT: outw %ax, %dx # sched: [100:0.33] -; BDVER2-NEXT: outl %eax, %dx # sched: [100:0.33] +; BDVER2-NEXT: outb %al, $7 # sched: [100:0.50] +; BDVER2-NEXT: outw %ax, $7 # sched: [100:0.50] +; BDVER2-NEXT: outl %eax, $7 # sched: [100:0.50] +; BDVER2-NEXT: outb %al, %dx # sched: [100:0.50] +; BDVER2-NEXT: outw %ax, %dx # sched: [100:0.50] +; BDVER2-NEXT: outl %eax, %dx # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_out: ; BTVER2: # %bb.0: @@ -10327,11 +10327,11 @@ ; BDVER2-LABEL: test_outs: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: outsb (%rsi), %dx # sched: [100:0.33] -; BDVER2-NEXT: outsw (%rsi), %dx # sched: [100:0.33] -; BDVER2-NEXT: outsl (%rsi), %dx # sched: [100:0.33] +; BDVER2-NEXT: outsb (%rsi), %dx # sched: [100:0.50] +; BDVER2-NEXT: outsw (%rsi), %dx # sched: [100:0.50] +; BDVER2-NEXT: outsl (%rsi), %dx # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_outs: ; BTVER2: # %bb.0: @@ -10414,9 +10414,9 @@ ; BDVER2-LABEL: test_pause: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: pause # sched: [4:1.33] +; BDVER2-NEXT: pause # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pause: ; BTVER2: # %bb.0: @@ -10519,12 +10519,12 @@ ; BDVER2-LABEL: test_pop_push: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: popq %fs # sched: [100:0.33] -; BDVER2-NEXT: popq %gs # sched: [100:0.33] -; BDVER2-NEXT: pushq %fs # sched: [3:1.00] -; BDVER2-NEXT: pushq %gs # sched: [5:1.00] +; BDVER2-NEXT: popq %fs # sched: [100:0.50] +; BDVER2-NEXT: popq %gs # sched: [100:0.50] +; BDVER2-NEXT: pushq %fs # sched: [100:0.50] +; BDVER2-NEXT: pushq %gs # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pop_push: ; BTVER2: # %bb.0: @@ -10656,15 +10656,15 @@ ; BDVER2-LABEL: test_pop_push_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: popw %ax # sched: [6:0.50] -; BDVER2-NEXT: popw (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: pushw %di # sched: [5:1.00] -; BDVER2-NEXT: pushw (%rsi) # sched: [5:1.00] +; BDVER2-NEXT: popw %ax # sched: [5:0.50] +; BDVER2-NEXT: popw (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: pushw %di # sched: [1:0.50] +; BDVER2-NEXT: pushw (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: pushw $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [1:1.00] -; BDVER2-NEXT: pushw $7 # sched: [1:1.00] +; BDVER2-NEXT: # sched: [1:0.50] +; BDVER2-NEXT: pushw $7 # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pop_push_16: ; BTVER2: # %bb.0: @@ -10802,15 +10802,15 @@ ; BDVER2-LABEL: test_pop_push_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: popq %rax # sched: [6:0.50] -; BDVER2-NEXT: popq (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: pushq %rdi # sched: [5:1.00] -; BDVER2-NEXT: pushq (%rsi) # sched: [5:1.00] +; BDVER2-NEXT: popq %rax # sched: [5:0.50] +; BDVER2-NEXT: popq (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: pushq %rdi # sched: [1:0.50] +; BDVER2-NEXT: pushq (%rsi) # sched: [6:1.00] ; BDVER2-NEXT: pushq $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [1:1.00] -; BDVER2-NEXT: pushq $7 # sched: [5:1.00] +; BDVER2-NEXT: # sched: [1:0.50] +; BDVER2-NEXT: pushq $7 # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_pop_push_64: ; BTVER2: # %bb.0: @@ -10910,9 +10910,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: popfq # sched: [5:0.50] -; BDVER2-NEXT: pushfq # sched: [5:1.00] +; BDVER2-NEXT: pushfq # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_popf_pushf: ; BTVER2: # %bb.0: @@ -11081,20 +11081,20 @@ ; BDVER2-LABEL: test_rcl_rcr_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rclb %dil # sched: [2:1.50] -; BDVER2-NEXT: rcrb %dil # sched: [2:1.50] -; BDVER2-NEXT: rclb (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrb (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rclb $7, %dil # sched: [5:4.00] -; BDVER2-NEXT: rcrb $7, %dil # sched: [5:4.00] -; BDVER2-NEXT: rclb $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrb $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rclb %cl, %dil # sched: [5:4.00] -; BDVER2-NEXT: rcrb %cl, %dil # sched: [5:4.00] -; BDVER2-NEXT: rclb %cl, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrb %cl, (%rdx) # sched: [11:3.50] +; BDVER2-NEXT: rclb %dil # sched: [1:0.50] +; BDVER2-NEXT: rcrb %dil # sched: [1:0.50] +; BDVER2-NEXT: rclb (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrb (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rclb $7, %dil # sched: [13:0.50] +; BDVER2-NEXT: rcrb $7, %dil # sched: [12:0.50] +; BDVER2-NEXT: rclb $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrb $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rclb %cl, %dil # sched: [12:0.50] +; BDVER2-NEXT: rcrb %cl, %dil # sched: [11:0.50] +; BDVER2-NEXT: rclb %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrb %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rcl_rcr_8: ; BTVER2: # %bb.0: @@ -11282,20 +11282,20 @@ ; BDVER2-LABEL: test_rcl_rcr_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rclw %di # sched: [2:1.50] -; BDVER2-NEXT: rcrw %di # sched: [2:1.50] -; BDVER2-NEXT: rclw (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrw (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rclw $7, %di # sched: [5:4.00] -; BDVER2-NEXT: rcrw $7, %di # sched: [5:4.00] -; BDVER2-NEXT: rclw $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrw $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rclw %cl, %di # sched: [5:4.00] -; BDVER2-NEXT: rcrw %cl, %di # sched: [5:4.00] -; BDVER2-NEXT: rclw %cl, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrw %cl, (%rdx) # sched: [11:3.50] +; BDVER2-NEXT: rclw %di # sched: [1:0.50] +; BDVER2-NEXT: rcrw %di # sched: [1:0.50] +; BDVER2-NEXT: rclw (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrw (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rclw $7, %di # sched: [11:0.50] +; BDVER2-NEXT: rcrw $7, %di # sched: [10:0.50] +; BDVER2-NEXT: rclw $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrw $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rclw %cl, %di # sched: [10:0.50] +; BDVER2-NEXT: rcrw %cl, %di # sched: [9:0.50] +; BDVER2-NEXT: rclw %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrw %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rcl_rcr_16: ; BTVER2: # %bb.0: @@ -11483,20 +11483,20 @@ ; BDVER2-LABEL: test_rcl_rcr_32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rcll %edi # sched: [2:1.50] -; BDVER2-NEXT: rcrl %edi # sched: [2:1.50] -; BDVER2-NEXT: rcll (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrl (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcll $7, %edi # sched: [5:4.00] -; BDVER2-NEXT: rcrl $7, %edi # sched: [5:4.00] -; BDVER2-NEXT: rcll $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrl $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcll %cl, %edi # sched: [5:4.00] -; BDVER2-NEXT: rcrl %cl, %edi # sched: [5:4.00] -; BDVER2-NEXT: rcll %cl, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrl %cl, (%rdx) # sched: [11:3.50] +; BDVER2-NEXT: rcll %edi # sched: [1:0.50] +; BDVER2-NEXT: rcrl %edi # sched: [1:0.50] +; BDVER2-NEXT: rcll (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrl (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcll $7, %edi # sched: [8:0.50] +; BDVER2-NEXT: rcrl $7, %edi # sched: [7:0.50] +; BDVER2-NEXT: rcll $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrl $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcll %cl, %edi # sched: [7:0.50] +; BDVER2-NEXT: rcrl %cl, %edi # sched: [7:0.50] +; BDVER2-NEXT: rcll %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrl %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rcl_rcr_32: ; BTVER2: # %bb.0: @@ -11684,20 +11684,20 @@ ; BDVER2-LABEL: test_rcl_rcr_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rclq %rdi # sched: [2:1.50] -; BDVER2-NEXT: rcrq %rdi # sched: [2:1.50] -; BDVER2-NEXT: rclq (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrq (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rclq $7, %rdi # sched: [5:4.00] -; BDVER2-NEXT: rcrq $7, %rdi # sched: [5:4.00] -; BDVER2-NEXT: rclq $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrq $7, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rclq %cl, %rdi # sched: [5:4.00] -; BDVER2-NEXT: rcrq %cl, %rdi # sched: [5:4.00] -; BDVER2-NEXT: rclq %cl, (%rdx) # sched: [11:3.50] -; BDVER2-NEXT: rcrq %cl, (%rdx) # sched: [11:3.50] +; BDVER2-NEXT: rclq %rdi # sched: [1:0.50] +; BDVER2-NEXT: rcrq %rdi # sched: [1:0.50] +; BDVER2-NEXT: rclq (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrq (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rclq $7, %rdi # sched: [8:0.50] +; BDVER2-NEXT: rcrq $7, %rdi # sched: [7:0.50] +; BDVER2-NEXT: rclq $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrq $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rclq %cl, %rdi # sched: [7:0.50] +; BDVER2-NEXT: rcrq %cl, %rdi # sched: [7:0.50] +; BDVER2-NEXT: rclq %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rcrq %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rcl_rcr_64: ; BTVER2: # %bb.0: @@ -11806,10 +11806,10 @@ ; BDVER2-LABEL: test_rdmsr_wrmsr: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rdmsr # sched: [100:0.33] -; BDVER2-NEXT: wrmsr # sched: [100:0.33] +; BDVER2-NEXT: rdmsr # sched: [100:0.50] +; BDVER2-NEXT: wrmsr # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rdmsr_wrmsr: ; BTVER2: # %bb.0: @@ -11890,9 +11890,9 @@ ; BDVER2-LABEL: test_rdpmc: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rdpmc # sched: [100:0.33] +; BDVER2-NEXT: rdpmc # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rdpmc: ; BTVER2: # %bb.0: @@ -11979,10 +11979,10 @@ ; BDVER2-LABEL: test_rdtsc_rdtscp: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rdtsc # sched: [100:0.33] -; BDVER2-NEXT: rdtscp # sched: [100:0.33] +; BDVER2-NEXT: rdtsc # sched: [100:0.50] +; BDVER2-NEXT: rdtscp # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rdtsc_rdtscp: ; BTVER2: # %bb.0: @@ -12103,14 +12103,14 @@ ; BDVER2-LABEL: test_ret: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; BDVER2-NEXT: retq $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [6:1.00] -; BDVER2-NEXT: lretl # sched: [6:1.00] +; BDVER2-NEXT: # sched: [5:1.00] +; BDVER2-NEXT: lretl # sched: [5:1.00] ; BDVER2-NEXT: lretl $4095 # imm = 0xFFF -; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ret: ; BTVER2: # %bb.0: @@ -12287,20 +12287,20 @@ ; BDVER2-LABEL: test_rol_ror_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rolb %dil # sched: [2:1.00] -; BDVER2-NEXT: rorb %dil # sched: [2:1.00] -; BDVER2-NEXT: rolb (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorb (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rolb $7, %dil # sched: [2:1.00] -; BDVER2-NEXT: rorb $7, %dil # sched: [2:1.00] -; BDVER2-NEXT: rolb $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorb $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rolb %cl, %dil # sched: [3:1.50] -; BDVER2-NEXT: rorb %cl, %dil # sched: [3:1.50] -; BDVER2-NEXT: rolb %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: rorb %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: rolb %dil # sched: [1:0.50] +; BDVER2-NEXT: rorb %dil # sched: [1:0.50] +; BDVER2-NEXT: rolb (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorb (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rolb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: rorb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: rolb $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorb $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rolb %cl, %dil # sched: [1:0.50] +; BDVER2-NEXT: rorb %cl, %dil # sched: [1:0.50] +; BDVER2-NEXT: rolb %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorb %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rol_ror_8: ; BTVER2: # %bb.0: @@ -12488,20 +12488,20 @@ ; BDVER2-LABEL: test_rol_ror_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rolw %di # sched: [2:1.00] -; BDVER2-NEXT: rorw %di # sched: [2:1.00] -; BDVER2-NEXT: rolw (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorw (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rolw $7, %di # sched: [2:1.00] -; BDVER2-NEXT: rorw $7, %di # sched: [2:1.00] -; BDVER2-NEXT: rolw $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorw $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rolw %cl, %di # sched: [3:1.50] -; BDVER2-NEXT: rorw %cl, %di # sched: [3:1.50] -; BDVER2-NEXT: rolw %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: rorw %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: rolw %di # sched: [1:0.50] +; BDVER2-NEXT: rorw %di # sched: [1:0.50] +; BDVER2-NEXT: rolw (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorw (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rolw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: rorw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: rolw $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorw $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rolw %cl, %di # sched: [1:0.50] +; BDVER2-NEXT: rorw %cl, %di # sched: [1:0.50] +; BDVER2-NEXT: rolw %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorw %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rol_ror_16: ; BTVER2: # %bb.0: @@ -12689,20 +12689,20 @@ ; BDVER2-LABEL: test_rol_ror_32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: roll %edi # sched: [2:1.00] -; BDVER2-NEXT: rorl %edi # sched: [2:1.00] -; BDVER2-NEXT: roll (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorl (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: roll $7, %edi # sched: [2:1.00] -; BDVER2-NEXT: rorl $7, %edi # sched: [2:1.00] -; BDVER2-NEXT: roll $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorl $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: roll %cl, %edi # sched: [3:1.50] -; BDVER2-NEXT: rorl %cl, %edi # sched: [3:1.50] -; BDVER2-NEXT: roll %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: rorl %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: roll %edi # sched: [1:0.50] +; BDVER2-NEXT: rorl %edi # sched: [1:0.50] +; BDVER2-NEXT: roll (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorl (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: roll $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: rorl $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: roll $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorl $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: roll %cl, %edi # sched: [1:0.50] +; BDVER2-NEXT: rorl %cl, %edi # sched: [1:0.50] +; BDVER2-NEXT: roll %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorl %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rol_ror_32: ; BTVER2: # %bb.0: @@ -12890,20 +12890,20 @@ ; BDVER2-LABEL: test_rol_ror_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: rolq %rdi # sched: [2:1.00] -; BDVER2-NEXT: rorq %rdi # sched: [2:1.00] -; BDVER2-NEXT: rolq (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorq (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rolq $7, %rdi # sched: [2:1.00] -; BDVER2-NEXT: rorq $7, %rdi # sched: [2:1.00] -; BDVER2-NEXT: rolq $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rorq $7, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: rolq %cl, %rdi # sched: [3:1.50] -; BDVER2-NEXT: rorq %cl, %rdi # sched: [3:1.50] -; BDVER2-NEXT: rolq %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: rorq %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: rolq %rdi # sched: [1:0.50] +; BDVER2-NEXT: rorq %rdi # sched: [1:0.50] +; BDVER2-NEXT: rolq (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorq (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rolq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: rorq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: rolq $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorq $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rolq %cl, %rdi # sched: [1:0.50] +; BDVER2-NEXT: rorq %cl, %rdi # sched: [1:0.50] +; BDVER2-NEXT: rolq %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: rorq %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_rol_ror_64: ; BTVER2: # %bb.0: @@ -13143,23 +13143,23 @@ ; BDVER2-NEXT: sarb %dil # sched: [1:0.50] ; BDVER2-NEXT: shlb %dil # sched: [1:0.50] ; BDVER2-NEXT: shrb %dil # sched: [1:0.50] -; BDVER2-NEXT: sarb (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shlb (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrb (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: sarb (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlb (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrb (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: sarb $7, %dil # sched: [1:0.50] ; BDVER2-NEXT: shlb $7, %dil # sched: [1:0.50] ; BDVER2-NEXT: shrb $7, %dil # sched: [1:0.50] -; BDVER2-NEXT: sarb $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shlb $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrb $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: sarb %cl, %dil # sched: [3:1.50] -; BDVER2-NEXT: shlb %cl, %dil # sched: [3:1.50] -; BDVER2-NEXT: shrb %cl, %dil # sched: [3:1.50] -; BDVER2-NEXT: sarb %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shlb %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shrb %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: sarb $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlb $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrb $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: sarb %cl, %dil # sched: [1:0.50] +; BDVER2-NEXT: shlb %cl, %dil # sched: [1:0.50] +; BDVER2-NEXT: shrb %cl, %dil # sched: [1:0.50] +; BDVER2-NEXT: sarb %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlb %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrb %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sar_shl_shr_8: ; BTVER2: # %bb.0: @@ -13410,23 +13410,23 @@ ; BDVER2-NEXT: sarw %di # sched: [1:0.50] ; BDVER2-NEXT: shlw %di # sched: [1:0.50] ; BDVER2-NEXT: shrw %di # sched: [1:0.50] -; BDVER2-NEXT: sarw (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shlw (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrw (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: sarw (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlw (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrw (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: sarw $7, %di # sched: [1:0.50] ; BDVER2-NEXT: shlw $7, %di # sched: [1:0.50] ; BDVER2-NEXT: shrw $7, %di # sched: [1:0.50] -; BDVER2-NEXT: sarw $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shlw $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrw $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: sarw %cl, %di # sched: [3:1.50] -; BDVER2-NEXT: shlw %cl, %di # sched: [3:1.50] -; BDVER2-NEXT: shrw %cl, %di # sched: [3:1.50] -; BDVER2-NEXT: sarw %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shlw %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shrw %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: sarw $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlw $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrw $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: sarw %cl, %di # sched: [1:0.50] +; BDVER2-NEXT: shlw %cl, %di # sched: [1:0.50] +; BDVER2-NEXT: shrw %cl, %di # sched: [1:0.50] +; BDVER2-NEXT: sarw %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlw %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrw %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sar_shl_shr_16: ; BTVER2: # %bb.0: @@ -13677,23 +13677,23 @@ ; BDVER2-NEXT: sarl %edi # sched: [1:0.50] ; BDVER2-NEXT: shll %edi # sched: [1:0.50] ; BDVER2-NEXT: shrl %edi # sched: [1:0.50] -; BDVER2-NEXT: sarl (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shll (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrl (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: sarl (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shll (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrl (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: sarl $7, %edi # sched: [1:0.50] ; BDVER2-NEXT: shll $7, %edi # sched: [1:0.50] ; BDVER2-NEXT: shrl $7, %edi # sched: [1:0.50] -; BDVER2-NEXT: sarl $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shll $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrl $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: sarl %cl, %edi # sched: [3:1.50] -; BDVER2-NEXT: shll %cl, %edi # sched: [3:1.50] -; BDVER2-NEXT: shrl %cl, %edi # sched: [3:1.50] -; BDVER2-NEXT: sarl %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shll %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shrl %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: sarl $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shll $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrl $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: sarl %cl, %edi # sched: [1:0.50] +; BDVER2-NEXT: shll %cl, %edi # sched: [1:0.50] +; BDVER2-NEXT: shrl %cl, %edi # sched: [1:0.50] +; BDVER2-NEXT: sarl %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shll %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrl %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sar_shl_shr_32: ; BTVER2: # %bb.0: @@ -13944,23 +13944,23 @@ ; BDVER2-NEXT: sarq %rdi # sched: [1:0.50] ; BDVER2-NEXT: shlq %rdi # sched: [1:0.50] ; BDVER2-NEXT: shrq %rdi # sched: [1:0.50] -; BDVER2-NEXT: sarq (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shlq (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrq (%rdx) # sched: [7:1.00] +; BDVER2-NEXT: sarq (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlq (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrq (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: sarq $7, %rdi # sched: [1:0.50] ; BDVER2-NEXT: shlq $7, %rdi # sched: [1:0.50] ; BDVER2-NEXT: shrq $7, %rdi # sched: [1:0.50] -; BDVER2-NEXT: sarq $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shlq $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: shrq $7, (%rdx) # sched: [7:1.00] -; BDVER2-NEXT: sarq %cl, %rdi # sched: [3:1.50] -; BDVER2-NEXT: shlq %cl, %rdi # sched: [3:1.50] -; BDVER2-NEXT: shrq %cl, %rdi # sched: [3:1.50] -; BDVER2-NEXT: sarq %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shlq %cl, (%rdx) # sched: [9:1.50] -; BDVER2-NEXT: shrq %cl, (%rdx) # sched: [9:1.50] +; BDVER2-NEXT: sarq $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlq $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrq $7, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: sarq %cl, %rdi # sched: [1:0.50] +; BDVER2-NEXT: shlq %cl, %rdi # sched: [1:0.50] +; BDVER2-NEXT: shrq %cl, %rdi # sched: [1:0.50] +; BDVER2-NEXT: sarq %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shlq %cl, (%rdx) # sched: [5:1.00] +; BDVER2-NEXT: shrq %cl, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sar_shl_shr_64: ; BTVER2: # %bb.0: @@ -14113,14 +14113,14 @@ ; BDVER2-LABEL: test_sbb_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: sbbb $7, %al # sched: [2:0.67] -; BDVER2-NEXT: sbbb $7, %dil # sched: [2:0.67] -; BDVER2-NEXT: sbbb $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbb %dl, %dil # sched: [2:0.67] -; BDVER2-NEXT: sbbb %dil, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbb (%rsi), %dil # sched: [7:0.67] +; BDVER2-NEXT: sbbb $7, %al # sched: [1:1.00] +; BDVER2-NEXT: sbbb $7, %dil # sched: [1:1.00] +; BDVER2-NEXT: sbbb $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbb %dl, %dil # sched: [1:1.00] +; BDVER2-NEXT: sbbb %dil, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbb (%rsi), %dil # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sbb_8: ; BTVER2: # %bb.0: @@ -14289,18 +14289,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: sbbw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: sbbw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: sbbw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [9:1.00] -; BDVER2-NEXT: sbbw $7, %di # sched: [2:0.67] -; BDVER2-NEXT: sbbw $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbw %dx, %di # sched: [2:0.67] -; BDVER2-NEXT: sbbw %di, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbw (%rsi), %di # sched: [7:0.67] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: sbbw $7, %di # sched: [1:1.00] +; BDVER2-NEXT: sbbw $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbw %dx, %di # sched: [1:1.00] +; BDVER2-NEXT: sbbw %di, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbw (%rsi), %di # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sbb_16: ; BTVER2: # %bb.0: @@ -14479,18 +14479,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: sbbl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: sbbl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: sbbl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [9:1.00] -; BDVER2-NEXT: sbbl $7, %edi # sched: [2:0.67] -; BDVER2-NEXT: sbbl $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbl %edx, %edi # sched: [2:0.67] -; BDVER2-NEXT: sbbl %edi, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbl (%rsi), %edi # sched: [7:0.67] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: sbbl $7, %edi # sched: [1:1.00] +; BDVER2-NEXT: sbbl $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbl %edx, %edi # sched: [1:1.00] +; BDVER2-NEXT: sbbl %edi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbl (%rsi), %edi # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sbb_32: ; BTVER2: # %bb.0: @@ -14669,18 +14669,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: sbbq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: sbbq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [2:0.67] +; BDVER2-NEXT: # sched: [1:1.00] ; BDVER2-NEXT: sbbq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [9:1.00] -; BDVER2-NEXT: sbbq $7, %rdi # sched: [2:0.67] -; BDVER2-NEXT: sbbq $7, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbq %rdx, %rdi # sched: [2:0.67] -; BDVER2-NEXT: sbbq %rdi, (%rsi) # sched: [9:1.00] -; BDVER2-NEXT: sbbq (%rsi), %rdi # sched: [7:0.67] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: sbbq $7, %rdi # sched: [1:1.00] +; BDVER2-NEXT: sbbq $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbq %rdx, %rdi # sched: [1:1.00] +; BDVER2-NEXT: sbbq %rdi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: sbbq (%rsi), %rdi # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sbb_64: ; BTVER2: # %bb.0: @@ -14803,12 +14803,12 @@ ; BDVER2-LABEL: test_scas: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: scasb %es:(%rdi), %al # sched: [2:0.67] -; BDVER2-NEXT: scasw %es:(%rdi), %ax # sched: [2:0.67] -; BDVER2-NEXT: scasl %es:(%rdi), %eax # sched: [2:0.67] -; BDVER2-NEXT: scasq %es:(%rdi), %rax # sched: [2:0.67] +; BDVER2-NEXT: scasb %es:(%rdi), %al # sched: [100:0.50] +; BDVER2-NEXT: scasw %es:(%rdi), %ax # sched: [100:0.50] +; BDVER2-NEXT: scasl %es:(%rdi), %eax # sched: [100:0.50] +; BDVER2-NEXT: scasq %es:(%rdi), %rax # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_scas: ; BTVER2: # %bb.0: @@ -15147,8 +15147,8 @@ ; BDVER2-NEXT: setae %dil # sched: [1:0.50] ; BDVER2-NEXT: sete %dil # sched: [1:0.50] ; BDVER2-NEXT: setne %dil # sched: [1:0.50] -; BDVER2-NEXT: setbe %dil # sched: [2:1.00] -; BDVER2-NEXT: seta %dil # sched: [2:1.00] +; BDVER2-NEXT: setbe %dil # sched: [1:0.50] +; BDVER2-NEXT: seta %dil # sched: [1:0.50] ; BDVER2-NEXT: sets %dil # sched: [1:0.50] ; BDVER2-NEXT: setns %dil # sched: [1:0.50] ; BDVER2-NEXT: setp %dil # sched: [1:0.50] @@ -15157,24 +15157,24 @@ ; BDVER2-NEXT: setge %dil # sched: [1:0.50] ; BDVER2-NEXT: setle %dil # sched: [1:0.50] ; BDVER2-NEXT: setg %dil # sched: [1:0.50] -; BDVER2-NEXT: seto (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setno (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setb (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setae (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: sete (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setne (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setbe (%rsi) # sched: [3:1.00] -; BDVER2-NEXT: seta (%rsi) # sched: [3:1.00] -; BDVER2-NEXT: sets (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setns (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setp (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setnp (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setl (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setge (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setle (%rsi) # sched: [2:1.00] -; BDVER2-NEXT: setg (%rsi) # sched: [2:1.00] +; BDVER2-NEXT: seto (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setno (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setb (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setae (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: sete (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setne (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setbe (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: seta (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: sets (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setns (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setp (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setnp (%rsi) # sched: [1:0.50] +; BDVER2-NEXT: setl (%rsi) # sched: [1:1.00] +; BDVER2-NEXT: setge (%rsi) # sched: [1:1.00] +; BDVER2-NEXT: setle (%rsi) # sched: [1:1.00] +; BDVER2-NEXT: setg (%rsi) # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_setcc: ; BTVER2: # %bb.0: @@ -15373,16 +15373,16 @@ ; BDVER2-LABEL: test_shld_shrd_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: shldw %cl, %si, %di # sched: [4:1.50] -; BDVER2-NEXT: shrdw %cl, %si, %di # sched: [4:1.50] -; BDVER2-NEXT: shldw %cl, %si, (%rdx) # sched: [10:1.50] -; BDVER2-NEXT: shrdw %cl, %si, (%rdx) # sched: [10:1.50] -; BDVER2-NEXT: shldw $7, %si, %di # sched: [2:0.67] -; BDVER2-NEXT: shrdw $7, %si, %di # sched: [2:0.67] -; BDVER2-NEXT: shldw $7, %si, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: shrdw $7, %si, (%rdx) # sched: [8:1.00] +; BDVER2-NEXT: shldw %cl, %si, %di # sched: [4:4.00] +; BDVER2-NEXT: shrdw %cl, %si, %di # sched: [4:4.00] +; BDVER2-NEXT: shldw %cl, %si, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shrdw %cl, %si, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shldw $7, %si, %di # sched: [4:3.00] +; BDVER2-NEXT: shrdw $7, %si, %di # sched: [3:3.00] +; BDVER2-NEXT: shldw $7, %si, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shrdw $7, %si, (%rdx) # sched: [4:11.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_shld_shrd_16: ; BTVER2: # %bb.0: @@ -15530,16 +15530,16 @@ ; BDVER2-LABEL: test_shld_shrd_32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: shldl %cl, %esi, %edi # sched: [4:1.50] -; BDVER2-NEXT: shrdl %cl, %esi, %edi # sched: [4:1.50] -; BDVER2-NEXT: shldl %cl, %esi, (%rdx) # sched: [10:1.50] -; BDVER2-NEXT: shrdl %cl, %esi, (%rdx) # sched: [10:1.50] -; BDVER2-NEXT: shldl $7, %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: shrdl $7, %esi, %edi # sched: [2:0.67] -; BDVER2-NEXT: shldl $7, %esi, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: shrdl $7, %esi, (%rdx) # sched: [8:1.00] +; BDVER2-NEXT: shldl %cl, %esi, %edi # sched: [4:4.00] +; BDVER2-NEXT: shrdl %cl, %esi, %edi # sched: [4:4.00] +; BDVER2-NEXT: shldl %cl, %esi, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shrdl %cl, %esi, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shldl $7, %esi, %edi # sched: [3:3.00] +; BDVER2-NEXT: shrdl $7, %esi, %edi # sched: [4:3.00] +; BDVER2-NEXT: shldl $7, %esi, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shrdl $7, %esi, (%rdx) # sched: [4:11.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_shld_shrd_32: ; BTVER2: # %bb.0: @@ -15687,16 +15687,16 @@ ; BDVER2-LABEL: test_shld_shrd_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: shldq %cl, %rsi, %rdi # sched: [4:1.50] -; BDVER2-NEXT: shrdq %cl, %rsi, %rdi # sched: [4:1.50] -; BDVER2-NEXT: shldq %cl, %rsi, (%rdx) # sched: [10:1.50] -; BDVER2-NEXT: shrdq %cl, %rsi, (%rdx) # sched: [10:1.50] -; BDVER2-NEXT: shldq $7, %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: shrdq $7, %rsi, %rdi # sched: [2:0.67] -; BDVER2-NEXT: shldq $7, %rsi, (%rdx) # sched: [8:1.00] -; BDVER2-NEXT: shrdq $7, %rsi, (%rdx) # sched: [8:1.00] +; BDVER2-NEXT: shldq %cl, %rsi, %rdi # sched: [4:4.00] +; BDVER2-NEXT: shrdq %cl, %rsi, %rdi # sched: [4:4.00] +; BDVER2-NEXT: shldq %cl, %rsi, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shrdq %cl, %rsi, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shldq $7, %rsi, %rdi # sched: [4:3.00] +; BDVER2-NEXT: shrdq $7, %rsi, %rdi # sched: [4:3.00] +; BDVER2-NEXT: shldq $7, %rsi, (%rdx) # sched: [4:11.00] +; BDVER2-NEXT: shrdq $7, %rsi, (%rdx) # sched: [4:11.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_shld_shrd_64: ; BTVER2: # %bb.0: @@ -15801,10 +15801,10 @@ ; BDVER2-LABEL: test_stc_std: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: stc # sched: [1:0.33] -; BDVER2-NEXT: std # sched: [1:0.33] +; BDVER2-NEXT: stc # sched: [1:0.50] +; BDVER2-NEXT: std # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_stc_std: ; BTVER2: # %bb.0: @@ -15912,12 +15912,12 @@ ; BDVER2-LABEL: test_stos: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: stosb %al, %es:(%rdi) # sched: [5:1.00] -; BDVER2-NEXT: stosw %ax, %es:(%rdi) # sched: [5:1.00] -; BDVER2-NEXT: stosl %eax, %es:(%rdi) # sched: [5:1.00] -; BDVER2-NEXT: stosq %rax, %es:(%rdi) # sched: [5:1.00] +; BDVER2-NEXT: stosb %al, %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: stosw %ax, %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: stosl %eax, %es:(%rdi) # sched: [100:0.50] +; BDVER2-NEXT: stosq %rax, %es:(%rdi) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_stos: ; BTVER2: # %bb.0: @@ -16044,14 +16044,14 @@ ; BDVER2-LABEL: test_sub_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: subb $7, %al # sched: [1:0.33] -; BDVER2-NEXT: subb $7, %dil # sched: [1:0.33] -; BDVER2-NEXT: subb $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subb %dl, %dil # sched: [1:0.33] -; BDVER2-NEXT: subb %dil, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subb (%rsi), %dil # sched: [6:0.50] +; BDVER2-NEXT: subb $7, %al # sched: [1:0.50] +; BDVER2-NEXT: subb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: subb $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subb %dl, %dil # sched: [1:0.50] +; BDVER2-NEXT: subb %dil, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subb (%rsi), %dil # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sub_8: ; BTVER2: # %bb.0: @@ -16220,18 +16220,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: subw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: subw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: subw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: subw $7, %di # sched: [1:0.33] -; BDVER2-NEXT: subw $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subw %dx, %di # sched: [1:0.33] -; BDVER2-NEXT: subw %di, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subw (%rsi), %di # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: subw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: subw $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subw %dx, %di # sched: [1:0.50] +; BDVER2-NEXT: subw %di, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subw (%rsi), %di # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sub_16: ; BTVER2: # %bb.0: @@ -16410,18 +16410,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: subl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: subl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: subl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: subl $7, %edi # sched: [1:0.33] -; BDVER2-NEXT: subl $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subl %edx, %edi # sched: [1:0.33] -; BDVER2-NEXT: subl %edi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subl (%rsi), %edi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: subl $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: subl $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subl %edx, %edi # sched: [1:0.50] +; BDVER2-NEXT: subl %edi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subl (%rsi), %edi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sub_32: ; BTVER2: # %bb.0: @@ -16600,18 +16600,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: subq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: subq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: subq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: subq $7, %rdi # sched: [1:0.33] -; BDVER2-NEXT: subq $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subq %rdx, %rdi # sched: [1:0.33] -; BDVER2-NEXT: subq %rdi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: subq (%rsi), %rdi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: subq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: subq $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subq %rdx, %rdi # sched: [1:0.50] +; BDVER2-NEXT: subq %rdi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: subq (%rsi), %rdi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_sub_64: ; BTVER2: # %bb.0: @@ -16748,13 +16748,13 @@ ; BDVER2-LABEL: test_test_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: testb $7, %al # sched: [1:0.33] -; BDVER2-NEXT: testb $7, %dil # sched: [1:0.33] -; BDVER2-NEXT: testb $7, (%rsi) # sched: [6:0.50] -; BDVER2-NEXT: testb %dil, %dil # sched: [1:0.33] -; BDVER2-NEXT: testb %dil, (%rsi) # sched: [6:0.50] +; BDVER2-NEXT: testb $7, %al # sched: [1:0.50] +; BDVER2-NEXT: testb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: testb $7, (%rsi) # sched: [5:0.50] +; BDVER2-NEXT: testb %dil, %dil # sched: [1:0.50] +; BDVER2-NEXT: testb %dil, (%rsi) # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_test_8: ; BTVER2: # %bb.0: @@ -16897,15 +16897,15 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: testw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: testw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: testw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [6:0.50] -; BDVER2-NEXT: testw %di, %di # sched: [1:0.33] -; BDVER2-NEXT: testw %di, (%rsi) # sched: [6:0.50] +; BDVER2-NEXT: # sched: [5:0.50] +; BDVER2-NEXT: testw %di, %di # sched: [1:0.50] +; BDVER2-NEXT: testw %di, (%rsi) # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_test_16: ; BTVER2: # %bb.0: @@ -17054,15 +17054,15 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: testl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: testl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: testl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [6:0.50] -; BDVER2-NEXT: testl %edi, %edi # sched: [1:0.33] -; BDVER2-NEXT: testl %edi, (%rsi) # sched: [6:0.50] +; BDVER2-NEXT: # sched: [5:0.50] +; BDVER2-NEXT: testl %edi, %edi # sched: [1:0.50] +; BDVER2-NEXT: testl %edi, (%rsi) # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_test_32: ; BTVER2: # %bb.0: @@ -17211,15 +17211,15 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: testq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: testq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: testq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [6:0.50] -; BDVER2-NEXT: testq %rdi, %rdi # sched: [1:0.33] -; BDVER2-NEXT: testq %rdi, (%rsi) # sched: [6:0.50] +; BDVER2-NEXT: # sched: [5:0.50] +; BDVER2-NEXT: testq %rdi, %rdi # sched: [1:0.50] +; BDVER2-NEXT: testq %rdi, (%rsi) # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_test_64: ; BTVER2: # %bb.0: @@ -17313,9 +17313,9 @@ ; BDVER2-LABEL: test_ud2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: ud2 # sched: [100:0.33] +; BDVER2-NEXT: ud2 # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_ud2: ; BTVER2: # %bb.0: @@ -17411,9 +17411,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: xaddb %dil, %sil # sched: [2:1.00] -; BDVER2-NEXT: xaddb %dil, (%rdx) # sched: [8:1.00] +; BDVER2-NEXT: xaddb %dil, (%rdx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xadd_8: ; BTVER2: # %bb.0: @@ -17502,9 +17502,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: xaddw %di, %si # sched: [2:1.00] -; BDVER2-NEXT: xaddw %di, (%rdx) # sched: [8:1.00] +; BDVER2-NEXT: xaddw %di, (%rdx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xadd_16: ; BTVER2: # %bb.0: @@ -17593,9 +17593,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: xaddl %edi, %esi # sched: [2:1.00] -; BDVER2-NEXT: xaddl %edi, (%rdx) # sched: [8:1.00] +; BDVER2-NEXT: xaddl %edi, (%rdx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xadd_32: ; BTVER2: # %bb.0: @@ -17684,9 +17684,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: xaddq %rdi, %rsi # sched: [2:1.00] -; BDVER2-NEXT: xaddq %rdi, (%rdx) # sched: [8:1.00] +; BDVER2-NEXT: xaddq %rdi, (%rdx) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xadd_64: ; BTVER2: # %bb.0: @@ -17775,10 +17775,10 @@ ; BDVER2-LABEL: test_xchg_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: xchgb %sil, %dil # sched: [2:1.00] -; BDVER2-NEXT: xchgb %dil, (%rdx) # sched: [6:1.00] +; BDVER2-NEXT: xchgb %sil, %dil # sched: [1:1.00] +; BDVER2-NEXT: xchgb %dil, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xchg_8: ; BTVER2: # %bb.0: @@ -17874,11 +17874,11 @@ ; BDVER2-LABEL: test_xchg_16: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: xchgw %di, %ax # sched: [2:1.00] +; BDVER2-NEXT: xchgw %di, %ax # sched: [1:1.00] ; BDVER2-NEXT: xchgw %si, %di # sched: [2:1.00] -; BDVER2-NEXT: xchgw %di, (%rdx) # sched: [6:1.00] +; BDVER2-NEXT: xchgw %di, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xchg_16: ; BTVER2: # %bb.0: @@ -17976,11 +17976,11 @@ ; BDVER2-LABEL: test_xchg_32: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: xchgl %edi, %eax # sched: [2:1.00] -; BDVER2-NEXT: xchgl %esi, %edi # sched: [2:1.00] -; BDVER2-NEXT: xchgl %edi, (%rdx) # sched: [6:1.00] +; BDVER2-NEXT: xchgl %edi, %eax # sched: [1:1.00] +; BDVER2-NEXT: xchgl %esi, %edi # sched: [1:1.00] +; BDVER2-NEXT: xchgl %edi, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xchg_32: ; BTVER2: # %bb.0: @@ -18078,11 +18078,11 @@ ; BDVER2-LABEL: test_xchg_64: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: xchgq %rdi, %rax # sched: [2:1.00] -; BDVER2-NEXT: xchgq %rsi, %rdi # sched: [2:1.00] -; BDVER2-NEXT: xchgq %rdi, (%rdx) # sched: [6:1.00] +; BDVER2-NEXT: xchgq %rdi, %rax # sched: [1:1.00] +; BDVER2-NEXT: xchgq %rsi, %rdi # sched: [1:1.00] +; BDVER2-NEXT: xchgq %rdi, (%rdx) # sched: [5:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xchg_64: ; BTVER2: # %bb.0: @@ -18165,9 +18165,9 @@ ; BDVER2-LABEL: test_xlat: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: xlatb # sched: [5:0.50] +; BDVER2-NEXT: xlatb # sched: [6:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xlat: ; BTVER2: # %bb.0: @@ -18286,14 +18286,14 @@ ; BDVER2-LABEL: test_xor_8: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: xorb $7, %al # sched: [1:0.33] -; BDVER2-NEXT: xorb $7, %dil # sched: [1:0.33] -; BDVER2-NEXT: xorb $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorb %dl, %dil # sched: [1:0.33] -; BDVER2-NEXT: xorb %dil, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorb (%rsi), %dil # sched: [6:0.50] +; BDVER2-NEXT: xorb $7, %al # sched: [1:0.50] +; BDVER2-NEXT: xorb $7, %dil # sched: [1:0.50] +; BDVER2-NEXT: xorb $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorb %dl, %dil # sched: [1:0.50] +; BDVER2-NEXT: xorb %dil, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorb (%rsi), %dil # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xor_8: ; BTVER2: # %bb.0: @@ -18462,18 +18462,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: xorw $511, %ax # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: xorw $511, %di # imm = 0x1FF -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: xorw $511, (%rsi) # imm = 0x1FF -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: xorw $7, %di # sched: [1:0.33] -; BDVER2-NEXT: xorw $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorw %dx, %di # sched: [1:0.33] -; BDVER2-NEXT: xorw %di, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorw (%rsi), %di # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: xorw $7, %di # sched: [1:0.50] +; BDVER2-NEXT: xorw $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorw %dx, %di # sched: [1:0.50] +; BDVER2-NEXT: xorw %di, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorw (%rsi), %di # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xor_16: ; BTVER2: # %bb.0: @@ -18652,18 +18652,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: xorl $665536, %eax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: xorl $665536, %edi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: xorl $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: xorl $7, %edi # sched: [1:0.33] -; BDVER2-NEXT: xorl $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorl %edx, %edi # sched: [1:0.33] -; BDVER2-NEXT: xorl %edi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorl (%rsi), %edi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: xorl $7, %edi # sched: [1:0.50] +; BDVER2-NEXT: xorl $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorl %edx, %edi # sched: [1:0.50] +; BDVER2-NEXT: xorl %edi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorl (%rsi), %edi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xor_32: ; BTVER2: # %bb.0: @@ -18842,18 +18842,18 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP ; BDVER2-NEXT: xorq $665536, %rax # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: xorq $665536, %rdi # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [1:0.33] +; BDVER2-NEXT: # sched: [1:0.50] ; BDVER2-NEXT: xorq $665536, (%rsi) # imm = 0xA27C0 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: xorq $7, %rdi # sched: [1:0.33] -; BDVER2-NEXT: xorq $7, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorq %rdx, %rdi # sched: [1:0.33] -; BDVER2-NEXT: xorq %rdi, (%rsi) # sched: [7:1.00] -; BDVER2-NEXT: xorq (%rsi), %rdi # sched: [6:0.50] +; BDVER2-NEXT: # sched: [6:1.00] +; BDVER2-NEXT: xorq $7, %rdi # sched: [1:0.50] +; BDVER2-NEXT: xorq $7, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorq %rdx, %rdi # sched: [1:0.50] +; BDVER2-NEXT: xorq %rdi, (%rsi) # sched: [6:1.00] +; BDVER2-NEXT: xorq (%rsi), %rdi # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_xor_64: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/small-byval-memcpy.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/small-byval-memcpy.ll +++ llvm/trunk/test/CodeGen/X86/small-byval-memcpy.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s --check-prefix=CORE2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=nehalem | FileCheck %s --check-prefix=NEHALEM -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=x86-64 | FileCheck %s --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=btver2 | FileCheck %s --check-prefix=BTVER2 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) Index: llvm/trunk/test/CodeGen/X86/sse-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/sse-schedule.ll +++ llvm/trunk/test/CodeGen/X86/sse-schedule.ll @@ -14,8 +14,8 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,SKX-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE @@ -104,15 +104,15 @@ ; ; BDVER2-SSE-LABEL: test_addps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: addps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: addps (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_addps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddps (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vaddps (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_addps: ; BTVER2-SSE: # %bb.0: @@ -224,15 +224,15 @@ ; ; BDVER2-SSE-LABEL: test_addss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: addss (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: addss (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_addss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddss (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vaddss (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_addss: ; BTVER2-SSE: # %bb.0: @@ -348,15 +348,15 @@ ; ; BDVER2-SSE-LABEL: test_andps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: andps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: andps (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andps %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: andps (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_andps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandps %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vandps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandps %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vandps (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_andps: ; BTVER2-SSE: # %bb.0: @@ -476,15 +476,15 @@ ; ; BDVER2-SSE-LABEL: test_andnotps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: andnps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: andnps (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andnps %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: andnps (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_andnotps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandnps %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vandnps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandnps %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vandnps (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_andnotps: ; BTVER2-SSE: # %bb.0: @@ -615,17 +615,17 @@ ; ; BDVER2-SSE-LABEL: test_cmpps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cmpeqps %xmm0, %xmm1 # sched: [3:1.00] -; BDVER2-SSE-NEXT: cmpeqps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: orps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cmpeqps %xmm0, %xmm1 # sched: [2:1.00] +; BDVER2-SSE-NEXT: cmpeqps (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: orps %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cmpps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcmpeqps %xmm1, %xmm0, %xmm1 # sched: [3:1.00] -; BDVER2-NEXT: vcmpeqps (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: vorps %xmm0, %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcmpeqps %xmm1, %xmm0, %xmm1 # sched: [2:1.00] +; BDVER2-NEXT: vcmpeqps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: vorps %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cmpps: ; BTVER2-SSE: # %bb.0: @@ -745,15 +745,15 @@ ; ; BDVER2-SSE-LABEL: test_cmpss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cmpeqss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: cmpeqss (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cmpeqss %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: cmpeqss (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cmpss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vcmpeqss (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vcmpeqss (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cmpss: ; BTVER2-SSE: # %bb.0: @@ -974,31 +974,31 @@ ; ; BDVER2-SSE-LABEL: test_comiss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: comiss %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: comiss %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-SSE-NEXT: comiss (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-SSE-NEXT: comiss (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_comiss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcomiss %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vcomiss %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-NEXT: vcomiss (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-NEXT: vcomiss (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_comiss: ; BTVER2-SSE: # %bb.0: @@ -1157,17 +1157,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtsi2ss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtsi2ssl %edi, %xmm1 # sched: [5:2.00] -; BDVER2-SSE-NEXT: cvtsi2ssl (%rsi), %xmm0 # sched: [10:1.00] -; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtsi2ssl (%rsi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: cvtsi2ssl %edi, %xmm1 # sched: [4:1.00] +; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtsi2ss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtsi2ssl %edi, %xmm0, %xmm0 # sched: [5:2.00] -; BDVER2-NEXT: vcvtsi2ssl (%rsi), %xmm1, %xmm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtsi2ssl %edi, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vcvtsi2ssl (%rsi), %xmm1, %xmm1 # sched: [9:1.00] +; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtsi2ss: ; BTVER2-SSE: # %bb.0: @@ -1297,17 +1297,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtsi2ssq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtsi2ssq %rdi, %xmm1 # sched: [5:2.00] -; BDVER2-SSE-NEXT: cvtsi2ssq (%rsi), %xmm0 # sched: [10:1.00] -; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtsi2ssq %rdi, %xmm1 # sched: [13:1.00] +; BDVER2-SSE-NEXT: cvtsi2ssq (%rsi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtsi2ssq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0 # sched: [5:2.00] -; BDVER2-NEXT: vcvtsi2ssq (%rsi), %xmm1, %xmm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vcvtsi2ssq (%rsi), %xmm1, %xmm1 # sched: [9:1.00] +; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtsi2ssq: ; BTVER2-SSE: # %bb.0: @@ -1437,17 +1437,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtss2si: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtss2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvtss2si (%rdi), %eax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtss2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvtss2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtss2si: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtss2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-NEXT: vcvtss2si (%rdi), %eax # sched: [10:1.00] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtss2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-NEXT: vcvtss2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtss2si: ; BTVER2-SSE: # %bb.0: @@ -1580,17 +1580,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtss2siq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtss2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvtss2si (%rdi), %rax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtss2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvtss2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtss2siq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtss2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-NEXT: vcvtss2si (%rdi), %rax # sched: [10:1.00] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtss2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-NEXT: vcvtss2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtss2siq: ; BTVER2-SSE: # %bb.0: @@ -1723,17 +1723,17 @@ ; ; BDVER2-SSE-LABEL: test_cvttss2si: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvttss2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvttss2si (%rdi), %eax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvttss2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvttss2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvttss2si: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttss2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-NEXT: vcvttss2si (%rdi), %eax # sched: [10:1.00] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttss2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-NEXT: vcvttss2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvttss2si: ; BTVER2-SSE: # %bb.0: @@ -1863,17 +1863,17 @@ ; ; BDVER2-SSE-LABEL: test_cvttss2siq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvttss2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvttss2si (%rdi), %rax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvttss2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvttss2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvttss2siq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttss2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-NEXT: vcvttss2si (%rdi), %rax # sched: [10:1.00] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttss2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-NEXT: vcvttss2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvttss2siq: ; BTVER2-SSE: # %bb.0: @@ -1990,15 +1990,15 @@ ; ; BDVER2-SSE-LABEL: test_divps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: divps %xmm1, %xmm0 # sched: [14:14.00] -; BDVER2-SSE-NEXT: divps (%rdi), %xmm0 # sched: [20:14.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: divps %xmm1, %xmm0 # sched: [9:9.50] +; BDVER2-SSE-NEXT: divps (%rdi), %xmm0 # sched: [14:9.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_divps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdivps %xmm1, %xmm0, %xmm0 # sched: [14:14.00] -; BDVER2-NEXT: vdivps (%rdi), %xmm0, %xmm0 # sched: [20:14.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdivps %xmm1, %xmm0, %xmm0 # sched: [9:9.50] +; BDVER2-NEXT: vdivps (%rdi), %xmm0, %xmm0 # sched: [14:9.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_divps: ; BTVER2-SSE: # %bb.0: @@ -2110,15 +2110,15 @@ ; ; BDVER2-SSE-LABEL: test_divss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: divss %xmm1, %xmm0 # sched: [14:14.00] -; BDVER2-SSE-NEXT: divss (%rdi), %xmm0 # sched: [20:14.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: divss %xmm1, %xmm0 # sched: [9:9.50] +; BDVER2-SSE-NEXT: divss (%rdi), %xmm0 # sched: [14:9.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_divss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdivss %xmm1, %xmm0, %xmm0 # sched: [14:14.00] -; BDVER2-NEXT: vdivss (%rdi), %xmm0, %xmm0 # sched: [20:14.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdivss %xmm1, %xmm0, %xmm0 # sched: [9:9.50] +; BDVER2-NEXT: vdivss (%rdi), %xmm0, %xmm0 # sched: [14:9.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_divss: ; BTVER2-SSE: # %bb.0: @@ -2230,15 +2230,15 @@ ; ; BDVER2-SSE-LABEL: test_ldmxcsr: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:1.00] -; BDVER2-SSE-NEXT: ldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:0.50] +; BDVER2-SSE-NEXT: ldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_ldmxcsr: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:1.00] -; BDVER2-NEXT: vldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:0.50] +; BDVER2-NEXT: vldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_ldmxcsr: ; BTVER2-SSE: # %bb.0: @@ -2352,15 +2352,15 @@ ; ; BDVER2-SSE-LABEL: test_maxps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: maxps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: maxps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: maxps %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: maxps (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_maxps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaxps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmaxps (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaxps %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vmaxps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_maxps: ; BTVER2-SSE: # %bb.0: @@ -2473,15 +2473,15 @@ ; ; BDVER2-SSE-LABEL: test_maxss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: maxss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: maxss (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: maxss %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: maxss (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_maxss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaxss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmaxss (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaxss %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vmaxss (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_maxss: ; BTVER2-SSE: # %bb.0: @@ -2594,15 +2594,15 @@ ; ; BDVER2-SSE-LABEL: test_minps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: minps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: minps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: minps %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: minps (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_minps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vminps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vminps (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vminps %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vminps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_minps: ; BTVER2-SSE: # %bb.0: @@ -2715,15 +2715,15 @@ ; ; BDVER2-SSE-LABEL: test_minss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: minss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: minss (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: minss %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: minss (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_minss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vminss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vminss (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vminss %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vminss (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_minss: ; BTVER2-SSE: # %bb.0: @@ -2849,17 +2849,17 @@ ; ; BDVER2-SSE-LABEL: test_movaps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movaps (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: addps %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-SSE-NEXT: movaps (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: addps %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-SSE-NEXT: movaps %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movaps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: vaddps %xmm0, %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovaps (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddps %xmm0, %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-NEXT: vmovaps %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movaps: ; BTVER2-SSE: # %bb.0: @@ -2970,13 +2970,13 @@ ; ; BDVER2-SSE-LABEL: test_movhlps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1] sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1] sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movhlps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm1[1],xmm0[1] sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm1[1],xmm0[1] sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movhlps: ; BTVER2-SSE: # %bb.0: @@ -3111,19 +3111,19 @@ ; ; BDVER2-SSE-LABEL: test_movhps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: movhps %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: movaps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: movhps %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: movaps %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movhps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovhpd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: vmovaps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vmovhpd %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: vmovaps %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movhps: ; BTVER2-SSE: # %bb.0: @@ -3249,15 +3249,15 @@ ; ; BDVER2-SSE-LABEL: test_movlhps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [1:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [2:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movlhps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [1:1.00] -; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [2:0.50] +; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movlhps: ; BTVER2-SSE: # %bb.0: @@ -3395,19 +3395,19 @@ ; ; BDVER2-SSE-LABEL: test_movlps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: movlps %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: movaps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: movlps %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: movaps %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movlps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovlps %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: vmovaps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vmovlps %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: vmovaps %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movlps: ; BTVER2-SSE: # %bb.0: @@ -3520,13 +3520,13 @@ ; ; BDVER2-SSE-LABEL: test_movmskps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movmskps %xmm0, %eax # sched: [2:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movmskps %xmm0, %eax # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movmskps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovmskps %xmm0, %eax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovmskps %xmm0, %eax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movmskps: ; BTVER2-SSE: # %bb.0: @@ -3626,13 +3626,13 @@ ; ; BDVER2-SSE-LABEL: test_movntps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movntps %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movntps %xmm0, (%rdi) # sched: [3:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movntps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovntps %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovntps %xmm0, (%rdi) # sched: [3:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movntps: ; BTVER2-SSE: # %bb.0: @@ -3751,17 +3751,17 @@ ; ; BDVER2-SSE-LABEL: test_movss_mem: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [6:0.50] -; BDVER2-SSE-NEXT: addss %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: movss %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [5:0.50] +; BDVER2-SSE-NEXT: addss %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: movss %xmm0, (%rsi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movss_mem: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [6:0.50] -; BDVER2-NEXT: vaddss %xmm0, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovss %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [5:0.50] +; BDVER2-NEXT: vaddss %xmm0, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vmovss %xmm0, (%rsi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movss_mem: ; BTVER2-SSE: # %bb.0: @@ -3870,13 +3870,13 @@ ; ; BDVER2-SSE-LABEL: test_movss_reg: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movss_reg: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movss_reg: ; BTVER2-SSE: # %bb.0: @@ -3995,17 +3995,17 @@ ; ; BDVER2-SSE-LABEL: test_movups: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movups (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: addps %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-SSE-NEXT: movups (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: addps %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-SSE-NEXT: movups %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movups: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovups (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: vaddps %xmm0, %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovups (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddps %xmm0, %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-NEXT: vmovups %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movups: ; BTVER2-SSE: # %bb.0: @@ -4122,14 +4122,14 @@ ; BDVER2-SSE-LABEL: test_mulps: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: mulps %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: mulps (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: mulps (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_mulps: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulps (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulps (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_mulps: ; BTVER2-SSE: # %bb.0: @@ -4242,14 +4242,14 @@ ; BDVER2-SSE-LABEL: test_mulss: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: mulss %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: mulss (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: mulss (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_mulss: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulss (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulss (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_mulss: ; BTVER2-SSE: # %bb.0: @@ -4365,15 +4365,15 @@ ; ; BDVER2-SSE-LABEL: test_orps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: orps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: orps (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: orps %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: orps (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_orps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vorps %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vorps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vorps %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vorps (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_orps: ; BTVER2-SSE: # %bb.0: @@ -4547,7 +4547,7 @@ ; BDVER2-SSE-NEXT: prefetcht1 (%rdi) # sched: [5:0.50] ; BDVER2-SSE-NEXT: prefetcht2 (%rdi) # sched: [5:0.50] ; BDVER2-SSE-NEXT: #NO_APP -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_prefetch: ; BDVER2: # %bb.0: @@ -4557,7 +4557,7 @@ ; BDVER2-NEXT: prefetcht1 (%rdi) # sched: [5:0.50] ; BDVER2-NEXT: prefetcht2 (%rdi) # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_prefetch: ; BTVER2-SSE: # %bb.0: @@ -4699,16 +4699,16 @@ ; BDVER2-SSE-LABEL: test_rcpps: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: rcpps %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-SSE-NEXT: rcpps (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: rcpps (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_rcpps: ; BDVER2: # %bb.0: +; BDVER2-NEXT: vrcpps (%rdi), %xmm1 # sched: [10:1.00] ; BDVER2-NEXT: vrcpps %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vrcpps (%rdi), %xmm1 # sched: [11:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_rcpps: ; BTVER2-SSE: # %bb.0: @@ -4854,19 +4854,19 @@ ; ; BDVER2-SSE-LABEL: test_rcpss: ; BDVER2-SSE: # %bb.0: +; BDVER2-SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50] ; BDVER2-SSE-NEXT: rcpss %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [6:0.50] ; BDVER2-SSE-NEXT: rcpss %xmm1, %xmm1 # sched: [5:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_rcpss: ; BDVER2: # %bb.0: +; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50] ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [6:0.50] ; BDVER2-NEXT: vrcpss %xmm1, %xmm1, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_rcpss: ; BTVER2-SSE: # %bb.0: @@ -5006,16 +5006,16 @@ ; BDVER2-SSE-LABEL: test_rsqrtps: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: rsqrtps %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-SSE-NEXT: rsqrtps (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: rsqrtps (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_rsqrtps: ; BDVER2: # %bb.0: +; BDVER2-NEXT: vrsqrtps (%rdi), %xmm1 # sched: [10:1.00] ; BDVER2-NEXT: vrsqrtps %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vrsqrtps (%rdi), %xmm1 # sched: [11:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_rsqrtps: ; BTVER2-SSE: # %bb.0: @@ -5161,19 +5161,19 @@ ; ; BDVER2-SSE-LABEL: test_rsqrtss: ; BDVER2-SSE: # %bb.0: +; BDVER2-SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50] ; BDVER2-SSE-NEXT: rsqrtss %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [6:0.50] ; BDVER2-SSE-NEXT: rsqrtss %xmm1, %xmm1 # sched: [5:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_rsqrtss: ; BDVER2: # %bb.0: +; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50] ; BDVER2-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [6:0.50] ; BDVER2-NEXT: vrsqrtss %xmm1, %xmm1, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_rsqrtss: ; BTVER2-SSE: # %bb.0: @@ -5290,13 +5290,13 @@ ; ; BDVER2-SSE-LABEL: test_sfence: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: sfence # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: sfence # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_sfence: ; BDVER2: # %bb.0: -; BDVER2-NEXT: sfence # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: sfence # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_sfence: ; BTVER2-SSE: # %bb.0: @@ -5416,17 +5416,17 @@ ; ; BDVER2-SSE-LABEL: test_shufps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] sched: [1:1.00] -; BDVER2-SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],mem[0,0] sched: [7:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] sched: [2:0.50] +; BDVER2-SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],mem[0,0] sched: [7:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_shufps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] sched: [1:1.00] -; BDVER2-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,3],mem[0,0] sched: [7:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] sched: [2:0.50] +; BDVER2-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,3],mem[0,0] sched: [7:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_shufps: ; BTVER2-SSE: # %bb.0: @@ -5557,17 +5557,17 @@ ; ; BDVER2-SSE-LABEL: test_sqrtps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: sqrtps %xmm0, %xmm1 # sched: [14:14.00] -; BDVER2-SSE-NEXT: sqrtps (%rdi), %xmm0 # sched: [20:14.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: sqrtps %xmm0, %xmm1 # sched: [9:10.50] +; BDVER2-SSE-NEXT: sqrtps (%rdi), %xmm0 # sched: [14:10.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_sqrtps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsqrtps %xmm0, %xmm0 # sched: [14:14.00] -; BDVER2-NEXT: vsqrtps (%rdi), %xmm1 # sched: [20:14.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsqrtps (%rdi), %xmm1 # sched: [14:10.50] +; BDVER2-NEXT: vsqrtps %xmm0, %xmm0 # sched: [9:10.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_sqrtps: ; BTVER2-SSE: # %bb.0: @@ -5713,19 +5713,19 @@ ; ; BDVER2-SSE-LABEL: test_sqrtss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: sqrtss %xmm0, %xmm0 # sched: [14:14.00] -; BDVER2-SSE-NEXT: movaps (%rdi), %xmm1 # sched: [6:0.50] -; BDVER2-SSE-NEXT: sqrtss %xmm1, %xmm1 # sched: [14:14.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movaps (%rdi), %xmm1 # sched: [5:0.50] +; BDVER2-SSE-NEXT: sqrtss %xmm0, %xmm0 # sched: [9:10.50] +; BDVER2-SSE-NEXT: sqrtss %xmm1, %xmm1 # sched: [9:10.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_sqrtss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 # sched: [14:14.00] -; BDVER2-NEXT: vmovaps (%rdi), %xmm1 # sched: [6:0.50] -; BDVER2-NEXT: vsqrtss %xmm1, %xmm1, %xmm1 # sched: [14:14.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovaps (%rdi), %xmm1 # sched: [5:0.50] +; BDVER2-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 # sched: [9:10.50] +; BDVER2-NEXT: vsqrtss %xmm1, %xmm1, %xmm1 # sched: [9:10.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_sqrtss: ; BTVER2-SSE: # %bb.0: @@ -5847,15 +5847,15 @@ ; ; BDVER2-SSE-LABEL: test_stmxcsr: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: stmxcsr -{{[0-9]+}}(%rsp) # sched: [5:1.00] +; BDVER2-SSE-NEXT: stmxcsr -{{[0-9]+}}(%rsp) # sched: [1:0.50] ; BDVER2-SSE-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [5:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_stmxcsr: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vstmxcsr -{{[0-9]+}}(%rsp) # sched: [5:1.00] +; BDVER2-NEXT: vstmxcsr -{{[0-9]+}}(%rsp) # sched: [1:0.50] ; BDVER2-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [5:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_stmxcsr: ; BTVER2-SSE: # %bb.0: @@ -5969,15 +5969,15 @@ ; ; BDVER2-SSE-LABEL: test_subps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: subps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: subps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: subps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: subps (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_subps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsubps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vsubps (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsubps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vsubps (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_subps: ; BTVER2-SSE: # %bb.0: @@ -6089,15 +6089,15 @@ ; ; BDVER2-SSE-LABEL: test_subss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: subss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: subss (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: subss %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: subss (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_subss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsubss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vsubss (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsubss %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vsubss (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_subss: ; BTVER2-SSE: # %bb.0: @@ -6313,31 +6313,31 @@ ; ; BDVER2-SSE-LABEL: test_ucomiss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: ucomiss %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: ucomiss %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-SSE-NEXT: ucomiss (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-SSE-NEXT: ucomiss (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_ucomiss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vucomiss %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vucomiss %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-NEXT: vucomiss (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-NEXT: vucomiss (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_ucomiss: ; BTVER2-SSE: # %bb.0: @@ -6496,17 +6496,17 @@ ; ; BDVER2-SSE-LABEL: test_unpckhps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [1:1.00] -; BDVER2-SSE-NEXT: unpckhps {{.*#+}} xmm1 = xmm1[2],mem[2],xmm1[3],mem[3] sched: [7:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [2:0.50] +; BDVER2-SSE-NEXT: unpckhps {{.*#+}} xmm1 = xmm1[2],mem[2],xmm1[3],mem[3] sched: [7:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_unpckhps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [1:1.00] -; BDVER2-NEXT: vunpckhps {{.*#+}} xmm1 = xmm1[2],mem[2],xmm1[3],mem[3] sched: [7:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [2:0.50] +; BDVER2-NEXT: vunpckhps {{.*#+}} xmm1 = xmm1[2],mem[2],xmm1[3],mem[3] sched: [7:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_unpckhps: ; BTVER2-SSE: # %bb.0: @@ -6636,17 +6636,17 @@ ; ; BDVER2-SSE-LABEL: test_unpcklps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [1:1.00] -; BDVER2-SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1] sched: [7:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [2:0.50] +; BDVER2-SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1] sched: [7:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_unpcklps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [1:1.00] -; BDVER2-NEXT: vunpcklps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1] sched: [7:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [2:0.50] +; BDVER2-NEXT: vunpcklps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1] sched: [7:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_unpcklps: ; BTVER2-SSE: # %bb.0: @@ -6767,15 +6767,15 @@ ; ; BDVER2-SSE-LABEL: test_xorps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: xorps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: xorps (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: xorps %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: xorps (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_xorps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vxorps %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vxorps (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vxorps %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vxorps (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_xorps: ; BTVER2-SSE: # %bb.0: @@ -6923,19 +6923,19 @@ ; ; BDVER2-SSE-LABEL: test_fnop: ; BDVER2-SSE: # %bb.0: +; BDVER2-SSE-NEXT: xorps %xmm0, %xmm0 # sched: [0:0.25] ; BDVER2-SSE-NEXT: #APP -; BDVER2-SSE-NEXT: nop # sched: [1:0.25] +; BDVER2-SSE-NEXT: nop # sched: [1:0.50] ; BDVER2-SSE-NEXT: #NO_APP -; BDVER2-SSE-NEXT: xorps %xmm0, %xmm0 # sched: [0:0.25] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_fnop: ; BDVER2: # %bb.0: +; BDVER2-NEXT: vxorps %xmm0, %xmm0, %xmm0 # sched: [0:0.25] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: nop # sched: [1:0.25] +; BDVER2-NEXT: nop # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: vxorps %xmm0, %xmm0, %xmm0 # sched: [0:0.25] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_fnop: ; BTVER2-SSE: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/sse2-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/sse2-schedule.ll +++ llvm/trunk/test/CodeGen/X86/sse2-schedule.ll @@ -14,8 +14,8 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,SKX-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx,+xop -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-sse3 | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE @@ -102,15 +102,15 @@ ; ; BDVER2-SSE-LABEL: test_addpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: addpd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: addpd (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_addpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddpd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vaddpd (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_addpd: ; BTVER2-SSE: # %bb.0: @@ -222,15 +222,15 @@ ; ; BDVER2-SSE-LABEL: test_addsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: addsd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: addsd (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_addsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddsd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vaddsd (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_addsd: ; BTVER2-SSE: # %bb.0: @@ -355,17 +355,17 @@ ; ; BDVER2-SSE-LABEL: test_andpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: andpd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: andpd (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andpd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: andpd (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_andpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandpd %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vandpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandpd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vandpd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_andpd: ; BTVER2-SSE: # %bb.0: @@ -499,17 +499,17 @@ ; ; BDVER2-SSE-LABEL: test_andnotpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: andnpd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: andnpd (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andnpd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: andnpd (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_andnotpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vandnpd %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vandnpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vandnpd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vandnpd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_andnotpd: ; BTVER2-SSE: # %bb.0: @@ -625,13 +625,13 @@ ; ; BDVER2-SSE-LABEL: test_clflush: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: clflush (%rdi) # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: clflush (%rdi) # sched: [5:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_clflush: ; BDVER2: # %bb.0: -; BDVER2-NEXT: clflush (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: clflush (%rdi) # sched: [5:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_clflush: ; BTVER2-SSE: # %bb.0: @@ -751,17 +751,17 @@ ; ; BDVER2-SSE-LABEL: test_cmppd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cmpeqpd %xmm0, %xmm1 # sched: [3:1.00] -; BDVER2-SSE-NEXT: cmpeqpd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: orpd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cmpeqpd %xmm0, %xmm1 # sched: [2:1.00] +; BDVER2-SSE-NEXT: cmpeqpd (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: orpd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cmppd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm1 # sched: [3:1.00] -; BDVER2-NEXT: vcmpeqpd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: vorpd %xmm0, %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm1 # sched: [2:1.00] +; BDVER2-NEXT: vcmpeqpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: vorpd %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cmppd: ; BTVER2-SSE: # %bb.0: @@ -880,15 +880,15 @@ ; ; BDVER2-SSE-LABEL: test_cmpsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cmpeqsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: cmpeqsd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cmpeqsd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: cmpeqsd (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cmpsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vcmpeqsd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vcmpeqsd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cmpsd: ; BTVER2-SSE: # %bb.0: @@ -1109,31 +1109,31 @@ ; ; BDVER2-SSE-LABEL: test_comisd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: comisd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: comisd %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-SSE-NEXT: comisd (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-SSE-NEXT: comisd (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_comisd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcomisd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vcomisd %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-NEXT: vcomisd (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-NEXT: vcomisd (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_comisd: ; BTVER2-SSE: # %bb.0: @@ -1294,17 +1294,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtdq2pd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtdq2pd %xmm0, %xmm1 # sched: [4:1.00] -; BDVER2-SSE-NEXT: cvtdq2pd (%rdi), %xmm0 # sched: [10:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtdq2pd %xmm0, %xmm1 # sched: [8:1.00] +; BDVER2-SSE-NEXT: cvtdq2pd (%rdi), %xmm0 # sched: [13:1.00] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtdq2pd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtdq2pd %xmm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvtdq2pd (%rdi), %xmm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtdq2pd (%rdi), %xmm1 # sched: [13:1.00] +; BDVER2-NEXT: vcvtdq2pd %xmm0, %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtdq2pd: ; BTVER2-SSE: # %bb.0: @@ -1437,17 +1437,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtdq2ps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtdq2ps %xmm0, %xmm1 # sched: [3:1.00] +; BDVER2-SSE-NEXT: cvtdq2ps %xmm0, %xmm1 # sched: [4:1.00] ; BDVER2-SSE-NEXT: cvtdq2ps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtdq2ps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtdq2ps %xmm0, %xmm0 # sched: [3:1.00] ; BDVER2-NEXT: vcvtdq2ps (%rdi), %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtdq2ps %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtdq2ps: ; BTVER2-SSE: # %bb.0: @@ -1579,17 +1579,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtpd2dq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtpd2dq %xmm0, %xmm1 # sched: [4:1.00] -; BDVER2-SSE-NEXT: cvtpd2dq (%rdi), %xmm0 # sched: [10:1.00] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtpd2dq %xmm0, %xmm1 # sched: [8:1.00] +; BDVER2-SSE-NEXT: cvtpd2dq (%rdi), %xmm0 # sched: [13:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtpd2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtpd2dq %xmm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvtpd2dqx (%rdi), %xmm1 # sched: [10:1.00] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtpd2dqx (%rdi), %xmm1 # sched: [13:1.00] +; BDVER2-NEXT: vcvtpd2dq %xmm0, %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtpd2dq: ; BTVER2-SSE: # %bb.0: @@ -1722,17 +1722,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtpd2ps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtpd2ps %xmm0, %xmm1 # sched: [4:1.00] -; BDVER2-SSE-NEXT: cvtpd2ps (%rdi), %xmm0 # sched: [10:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtpd2ps %xmm0, %xmm1 # sched: [8:1.00] +; BDVER2-SSE-NEXT: cvtpd2ps (%rdi), %xmm0 # sched: [13:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtpd2ps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtpd2ps %xmm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvtpd2psx (%rdi), %xmm1 # sched: [10:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtpd2psx (%rdi), %xmm1 # sched: [13:1.00] +; BDVER2-NEXT: vcvtpd2ps %xmm0, %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtpd2ps: ; BTVER2-SSE: # %bb.0: @@ -1864,17 +1864,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtps2dq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtps2dq %xmm0, %xmm1 # sched: [3:1.00] +; BDVER2-SSE-NEXT: cvtps2dq %xmm0, %xmm1 # sched: [4:1.00] ; BDVER2-SSE-NEXT: cvtps2dq (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtps2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtps2dq %xmm0, %xmm0 # sched: [3:1.00] ; BDVER2-NEXT: vcvtps2dq (%rdi), %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtps2dq %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtps2dq: ; BTVER2-SSE: # %bb.0: @@ -2006,17 +2006,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtps2pd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtps2pd %xmm0, %xmm1 # sched: [2:1.00] -; BDVER2-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtps2pd %xmm0, %xmm1 # sched: [8:1.00] +; BDVER2-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # sched: [13:1.00] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtps2pd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtps2pd %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vcvtps2pd (%rdi), %xmm1 # sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtps2pd (%rdi), %xmm1 # sched: [13:1.00] +; BDVER2-NEXT: vcvtps2pd %xmm0, %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtps2pd: ; BTVER2-SSE: # %bb.0: @@ -2148,17 +2148,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtsd2si: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtsd2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvtsd2si (%rdi), %eax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtsd2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvtsd2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtsd2si: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtsd2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-NEXT: vcvtsd2si (%rdi), %eax # sched: [10:1.00] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtsd2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-NEXT: vcvtsd2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtsd2si: ; BTVER2-SSE: # %bb.0: @@ -2291,17 +2291,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtsd2siq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtsd2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvtsd2si (%rdi), %rax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtsd2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvtsd2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtsd2siq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtsd2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-NEXT: vcvtsd2si (%rdi), %rax # sched: [10:1.00] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvtsd2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-NEXT: vcvtsd2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtsd2siq: ; BTVER2-SSE: # %bb.0: @@ -2449,18 +2449,18 @@ ; BDVER2-SSE-LABEL: test_cvtsd2ss: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: cvtsd2ss %xmm0, %xmm1 # sched: [4:1.00] -; BDVER2-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero sched: [6:0.50] +; BDVER2-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero sched: [5:0.50] ; BDVER2-SSE-NEXT: cvtsd2ss %xmm0, %xmm0 # sched: [4:1.00] -; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtsd2ss: ; BDVER2: # %bb.0: +; BDVER2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero sched: [5:0.50] ; BDVER2-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero sched: [6:0.50] ; BDVER2-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1 # sched: [4:1.00] -; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtsd2ss: ; BTVER2-SSE: # %bb.0: @@ -2594,17 +2594,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtsi2sd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtsi2sdl %edi, %xmm1 # sched: [4:1.00] ; BDVER2-SSE-NEXT: cvtsi2sdl (%rsi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtsi2sdl %edi, %xmm1 # sched: [4:1.00] +; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtsi2sd: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vcvtsi2sdl %edi, %xmm0, %xmm0 # sched: [4:1.00] ; BDVER2-NEXT: vcvtsi2sdl (%rsi), %xmm1, %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtsi2sd: ; BTVER2-SSE: # %bb.0: @@ -2734,17 +2734,17 @@ ; ; BDVER2-SSE-LABEL: test_cvtsi2sdq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtsi2sdq %rdi, %xmm1 # sched: [4:1.00] +; BDVER2-SSE-NEXT: cvtsi2sdq %rdi, %xmm1 # sched: [13:1.00] ; BDVER2-SSE-NEXT: cvtsi2sdq (%rsi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtsi2sdq: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0 # sched: [4:1.00] ; BDVER2-NEXT: vcvtsi2sdq (%rsi), %xmm1, %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtsi2sdq: ; BTVER2-SSE: # %bb.0: @@ -2890,19 +2890,19 @@ ; ; BDVER2-SSE-LABEL: test_cvtss2sd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm1 # sched: [1:1.00] -; BDVER2-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [6:0.50] -; BDVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm1 # sched: [4:1.00] +; BDVER2-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [5:0.50] +; BDVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvtss2sd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [6:0.50] -; BDVER2-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 # sched: [1:1.00] -; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50] +; BDVER2-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 # sched: [4:1.00] +; BDVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvtss2sd: ; BTVER2-SSE: # %bb.0: @@ -3038,17 +3038,17 @@ ; ; BDVER2-SSE-LABEL: test_cvttpd2dq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvttpd2dq %xmm0, %xmm1 # sched: [4:1.00] -; BDVER2-SSE-NEXT: cvttpd2dq (%rdi), %xmm0 # sched: [10:1.00] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvttpd2dq %xmm0, %xmm1 # sched: [8:1.00] +; BDVER2-SSE-NEXT: cvttpd2dq (%rdi), %xmm0 # sched: [13:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvttpd2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttpd2dq %xmm0, %xmm0 # sched: [4:1.00] -; BDVER2-NEXT: vcvttpd2dqx (%rdi), %xmm1 # sched: [10:1.00] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttpd2dqx (%rdi), %xmm1 # sched: [13:1.00] +; BDVER2-NEXT: vcvttpd2dq %xmm0, %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvttpd2dq: ; BTVER2-SSE: # %bb.0: @@ -3181,17 +3181,17 @@ ; ; BDVER2-SSE-LABEL: test_cvttps2dq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvttps2dq %xmm0, %xmm1 # sched: [3:1.00] +; BDVER2-SSE-NEXT: cvttps2dq %xmm0, %xmm1 # sched: [4:1.00] ; BDVER2-SSE-NEXT: cvttps2dq (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvttps2dq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttps2dq %xmm0, %xmm0 # sched: [3:1.00] ; BDVER2-NEXT: vcvttps2dq (%rdi), %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttps2dq %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvttps2dq: ; BTVER2-SSE: # %bb.0: @@ -3321,17 +3321,17 @@ ; ; BDVER2-SSE-LABEL: test_cvttsd2si: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvttsd2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvttsd2si (%rdi), %eax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvttsd2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvttsd2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvttsd2si: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttsd2si %xmm0, %ecx # sched: [5:1.00] -; BDVER2-NEXT: vcvttsd2si (%rdi), %eax # sched: [10:1.00] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttsd2si (%rdi), %eax # sched: [18:1.00] +; BDVER2-NEXT: vcvttsd2si %xmm0, %ecx # sched: [13:1.00] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvttsd2si: ; BTVER2-SSE: # %bb.0: @@ -3461,17 +3461,17 @@ ; ; BDVER2-SSE-LABEL: test_cvttsd2siq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: cvttsd2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-SSE-NEXT: cvttsd2si (%rdi), %rax # sched: [9:1.00] -; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: cvttsd2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-SSE-NEXT: cvttsd2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_cvttsd2siq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vcvttsd2si %xmm0, %rcx # sched: [5:1.00] -; BDVER2-NEXT: vcvttsd2si (%rdi), %rax # sched: [10:1.00] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vcvttsd2si (%rdi), %rax # sched: [18:1.00] +; BDVER2-NEXT: vcvttsd2si %xmm0, %rcx # sched: [13:1.00] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_cvttsd2siq: ; BTVER2-SSE: # %bb.0: @@ -3588,15 +3588,15 @@ ; ; BDVER2-SSE-LABEL: test_divpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: divpd %xmm1, %xmm0 # sched: [22:22.00] -; BDVER2-SSE-NEXT: divpd (%rdi), %xmm0 # sched: [28:22.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: divpd %xmm1, %xmm0 # sched: [9:9.50] +; BDVER2-SSE-NEXT: divpd (%rdi), %xmm0 # sched: [14:9.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_divpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdivpd %xmm1, %xmm0, %xmm0 # sched: [22:22.00] -; BDVER2-NEXT: vdivpd (%rdi), %xmm0, %xmm0 # sched: [28:22.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdivpd %xmm1, %xmm0, %xmm0 # sched: [9:9.50] +; BDVER2-NEXT: vdivpd (%rdi), %xmm0, %xmm0 # sched: [14:9.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_divpd: ; BTVER2-SSE: # %bb.0: @@ -3708,15 +3708,15 @@ ; ; BDVER2-SSE-LABEL: test_divsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: divsd %xmm1, %xmm0 # sched: [22:22.00] -; BDVER2-SSE-NEXT: divsd (%rdi), %xmm0 # sched: [28:22.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: divsd %xmm1, %xmm0 # sched: [9:9.50] +; BDVER2-SSE-NEXT: divsd (%rdi), %xmm0 # sched: [14:9.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_divsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdivsd %xmm1, %xmm0, %xmm0 # sched: [22:22.00] -; BDVER2-NEXT: vdivsd (%rdi), %xmm0, %xmm0 # sched: [28:22.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdivsd %xmm1, %xmm0, %xmm0 # sched: [9:9.50] +; BDVER2-NEXT: vdivsd (%rdi), %xmm0, %xmm0 # sched: [14:9.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_divsd: ; BTVER2-SSE: # %bb.0: @@ -3821,13 +3821,13 @@ ; ; BDVER2-SSE-LABEL: test_lfence: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: lfence # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: lfence # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_lfence: ; BDVER2: # %bb.0: -; BDVER2-NEXT: lfence # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: lfence # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_lfence: ; BTVER2-SSE: # %bb.0: @@ -3927,13 +3927,13 @@ ; ; BDVER2-SSE-LABEL: test_mfence: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: mfence # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: mfence # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_mfence: ; BDVER2: # %bb.0: -; BDVER2-NEXT: mfence # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: mfence # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_mfence: ; BTVER2-SSE: # %bb.0: @@ -4032,12 +4032,12 @@ ; BDVER2-SSE-LABEL: test_maskmovdqu: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: maskmovdqu %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_maskmovdqu: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vmaskmovdqu %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_maskmovdqu: ; BTVER2-SSE: # %bb.0: @@ -4144,15 +4144,15 @@ ; ; BDVER2-SSE-LABEL: test_maxpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: maxpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: maxpd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: maxpd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: maxpd (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_maxpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmaxpd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vmaxpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_maxpd: ; BTVER2-SSE: # %bb.0: @@ -4265,15 +4265,15 @@ ; ; BDVER2-SSE-LABEL: test_maxsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: maxsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: maxsd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: maxsd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: maxsd (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_maxsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmaxsd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vmaxsd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_maxsd: ; BTVER2-SSE: # %bb.0: @@ -4386,15 +4386,15 @@ ; ; BDVER2-SSE-LABEL: test_minpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: minpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: minpd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: minpd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: minpd (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_minpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vminpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vminpd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vminpd %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vminpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_minpd: ; BTVER2-SSE: # %bb.0: @@ -4507,15 +4507,15 @@ ; ; BDVER2-SSE-LABEL: test_minsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: minsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: minsd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: minsd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: minsd (%rdi), %xmm0 # sched: [7:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_minsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vminsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vminsd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vminsd %xmm1, %xmm0, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vminsd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_minsd: ; BTVER2-SSE: # %bb.0: @@ -4641,17 +4641,17 @@ ; ; BDVER2-SSE-LABEL: test_movapd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movapd (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: addpd %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-SSE-NEXT: movapd (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: addpd %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-SSE-NEXT: movapd %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movapd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovapd (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: vaddpd %xmm0, %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovapd (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddpd %xmm0, %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-NEXT: vmovapd %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movapd: ; BTVER2-SSE: # %bb.0: @@ -4780,17 +4780,17 @@ ; ; BDVER2-SSE-LABEL: test_movdqa: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movdqa (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: paddq %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: movdqa (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: paddq %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: movdqa %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movdqa: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovdqa (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: vpaddq %xmm0, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vmovdqa (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vpaddq %xmm0, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vmovdqa %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movdqa: ; BTVER2-SSE: # %bb.0: @@ -4919,17 +4919,17 @@ ; ; BDVER2-SSE-LABEL: test_movdqu: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movdqu (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: paddq %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: movdqu (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: paddq %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: movdqu %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movdqu: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovdqu (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: vpaddq %xmm0, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vmovdqu (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vpaddq %xmm0, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vmovdqu %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movdqu: ; BTVER2-SSE: # %bb.0: @@ -5097,23 +5097,23 @@ ; ; BDVER2-SSE-LABEL: test_movd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movd %edi, %xmm1 # sched: [1:1.00] -; BDVER2-SSE-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [6:0.50] -; BDVER2-SSE-NEXT: paddd %xmm0, %xmm1 # sched: [1:0.50] -; BDVER2-SSE-NEXT: paddd %xmm0, %xmm2 # sched: [1:0.50] -; BDVER2-SSE-NEXT: movd %xmm2, %eax # sched: [2:1.00] -; BDVER2-SSE-NEXT: movd %xmm1, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:0.50] +; BDVER2-SSE-NEXT: movd %edi, %xmm1 # sched: [10:0.50] +; BDVER2-SSE-NEXT: paddd %xmm0, %xmm2 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movd %xmm2, %eax # sched: [10:1.00] +; BDVER2-SSE-NEXT: paddd %xmm0, %xmm1 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movd %xmm1, (%rsi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovd %edi, %xmm1 # sched: [1:1.00] -; BDVER2-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [6:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm1 # sched: [1:0.50] -; BDVER2-NEXT: vpaddd %xmm2, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: vmovd %xmm0, %eax # sched: [2:1.00] -; BDVER2-NEXT: vmovd %xmm1, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovd %edi, %xmm1 # sched: [10:0.50] +; BDVER2-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:0.50] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm1 # sched: [2:0.50] +; BDVER2-NEXT: vpaddd %xmm2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vmovd %xmm0, %eax # sched: [10:1.00] +; BDVER2-NEXT: vmovd %xmm1, (%rsi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movd: ; BTVER2-SSE: # %bb.0: @@ -5298,23 +5298,23 @@ ; ; BDVER2-SSE-LABEL: test_movd_64: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movq %rdi, %xmm1 # sched: [1:1.00] -; BDVER2-SSE-NEXT: movq {{.*#+}} xmm2 = mem[0],zero sched: [6:0.50] -; BDVER2-SSE-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50] -; BDVER2-SSE-NEXT: paddq %xmm0, %xmm2 # sched: [1:0.50] -; BDVER2-SSE-NEXT: movq %xmm2, %rax # sched: [2:1.00] -; BDVER2-SSE-NEXT: movq %xmm1, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movq {{.*#+}} xmm2 = mem[0],zero sched: [5:0.50] +; BDVER2-SSE-NEXT: movq %rdi, %xmm1 # sched: [10:0.50] +; BDVER2-SSE-NEXT: paddq %xmm0, %xmm2 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movq %xmm2, %rax # sched: [10:1.00] +; BDVER2-SSE-NEXT: paddq %xmm0, %xmm1 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movq %xmm1, (%rsi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movd_64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovq %rdi, %xmm1 # sched: [1:1.00] -; BDVER2-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero sched: [6:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm1 # sched: [1:0.50] -; BDVER2-NEXT: vpaddq %xmm2, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: vmovq %xmm0, %rax # sched: [2:1.00] -; BDVER2-NEXT: vmovq %xmm1, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovq %rdi, %xmm1 # sched: [10:0.50] +; BDVER2-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero sched: [5:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm1 # sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vmovq %xmm0, %rax # sched: [10:1.00] +; BDVER2-NEXT: vmovq %xmm1, (%rsi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movd_64: ; BTVER2-SSE: # %bb.0: @@ -5474,19 +5474,19 @@ ; ; BDVER2-SSE-LABEL: test_movhpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: movhpd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: movapd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: movhpd %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: movapd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movhpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovhpd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: vmovapd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vmovhpd %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: vmovapd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movhpd: ; BTVER2-SSE: # %bb.0: @@ -5636,19 +5636,19 @@ ; ; BDVER2-SSE-LABEL: test_movlpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: movlpd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: movapd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: movlpd %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: movapd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movlpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovlpd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: vmovapd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovlpd {{.*#+}} xmm1 = mem[0],xmm1[1] sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vmovlpd %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: vmovapd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movlpd: ; BTVER2-SSE: # %bb.0: @@ -5760,13 +5760,13 @@ ; ; BDVER2-SSE-LABEL: test_movmskpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movmskpd %xmm0, %eax # sched: [2:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movmskpd %xmm0, %eax # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movmskpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovmskpd %xmm0, %eax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovmskpd %xmm0, %eax # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movmskpd: ; BTVER2-SSE: # %bb.0: @@ -5875,15 +5875,15 @@ ; ; BDVER2-SSE-LABEL: test_movntdqa: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddq %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: movntdq %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movntdq %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movntdqa: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddq %xmm0, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: vmovntdq %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddq %xmm0, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vmovntdq %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movntdqa: ; BTVER2-SSE: # %bb.0: @@ -5994,15 +5994,15 @@ ; ; BDVER2-SSE-LABEL: test_movntpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: addpd %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: movntpd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addpd %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: movntpd %xmm0, (%rdi) # sched: [3:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movntpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddpd %xmm0, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovntpd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddpd %xmm0, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vmovntpd %xmm0, (%rdi) # sched: [3:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movntpd: ; BTVER2-SSE: # %bb.0: @@ -6126,17 +6126,17 @@ ; ; BDVER2-SSE-LABEL: test_movq_mem: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero sched: [6:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: movq %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero sched: [5:0.50] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movq %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movq_mem: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero sched: [6:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: vmovq %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero sched: [5:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vmovq %xmm0, (%rdi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movq_mem: ; BTVER2-SSE: # %bb.0: @@ -6256,15 +6256,15 @@ ; ; BDVER2-SSE-LABEL: test_movq_reg: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero sched: [1:0.33] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero sched: [2:0.50] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movq_reg: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero sched: [1:0.33] -; BDVER2-NEXT: vpaddq %xmm0, %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movq_reg: ; BTVER2-SSE: # %bb.0: @@ -6388,17 +6388,17 @@ ; ; BDVER2-SSE-LABEL: test_movsd_mem: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero sched: [6:0.50] -; BDVER2-SSE-NEXT: addsd %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: movsd %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero sched: [5:0.50] +; BDVER2-SSE-NEXT: addsd %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: movsd %xmm0, (%rsi) # sched: [2:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movsd_mem: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero sched: [6:0.50] -; BDVER2-NEXT: vaddsd %xmm0, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vmovsd %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero sched: [5:0.50] +; BDVER2-NEXT: vaddsd %xmm0, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vmovsd %xmm0, (%rsi) # sched: [2:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movsd_mem: ; BTVER2-SSE: # %bb.0: @@ -6513,14 +6513,14 @@ ; ; BDVER2-SSE-LABEL: test_movsd_reg: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0] sched: [1:1.00] -; BDVER2-SSE-NEXT: movaps %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0] sched: [2:0.50] +; BDVER2-SSE-NEXT: movaps %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movsd_reg: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movsd_reg: ; BTVER2-SSE: # %bb.0: @@ -6641,17 +6641,17 @@ ; ; BDVER2-SSE-LABEL: test_movupd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movupd (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: addpd %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-SSE-NEXT: movupd (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: addpd %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-SSE-NEXT: movupd %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movupd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovupd (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: vaddpd %xmm0, %xmm0, %xmm0 # sched: [3:1.00] +; BDVER2-NEXT: vmovupd (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vaddpd %xmm0, %xmm0, %xmm0 # sched: [5:1.00] ; BDVER2-NEXT: vmovupd %xmm0, (%rsi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movupd: ; BTVER2-SSE: # %bb.0: @@ -6768,14 +6768,14 @@ ; BDVER2-SSE-LABEL: test_mulpd: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: mulpd %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: mulpd (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: mulpd (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_mulpd: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vmulpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulpd (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulpd (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_mulpd: ; BTVER2-SSE: # %bb.0: @@ -6888,14 +6888,14 @@ ; BDVER2-SSE-LABEL: test_mulsd: ; BDVER2-SSE: # %bb.0: ; BDVER2-SSE-NEXT: mulsd %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: mulsd (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: mulsd (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_mulsd: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vmulsd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vmulsd (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmulsd (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_mulsd: ; BTVER2-SSE: # %bb.0: @@ -7020,17 +7020,17 @@ ; ; BDVER2-SSE-LABEL: test_orpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: orpd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: orpd (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: orpd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: orpd (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_orpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vorpd %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vorpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vorpd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vorpd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_orpd: ; BTVER2-SSE: # %bb.0: @@ -7155,15 +7155,15 @@ ; ; BDVER2-SSE-LABEL: test_packssdw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: packssdw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: packssdw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: packssdw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_packssdw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpackssdw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_packssdw: ; BTVER2-SSE: # %bb.0: @@ -7281,15 +7281,15 @@ ; ; BDVER2-SSE-LABEL: test_packsswb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: packsswb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: packsswb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: packsswb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_packsswb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpacksswb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_packsswb: ; BTVER2-SSE: # %bb.0: @@ -7407,15 +7407,15 @@ ; ; BDVER2-SSE-LABEL: test_packuswb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: packuswb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: packuswb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: packuswb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_packuswb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpackuswb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_packuswb: ; BTVER2-SSE: # %bb.0: @@ -7533,15 +7533,15 @@ ; ; BDVER2-SSE-LABEL: test_paddb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddb: ; BTVER2-SSE: # %bb.0: @@ -7657,15 +7657,15 @@ ; ; BDVER2-SSE-LABEL: test_paddd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddd: ; BTVER2-SSE: # %bb.0: @@ -7777,15 +7777,15 @@ ; ; BDVER2-SSE-LABEL: test_paddq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddq (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddq (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddq: ; BTVER2-SSE: # %bb.0: @@ -7901,15 +7901,15 @@ ; ; BDVER2-SSE-LABEL: test_paddsb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddsb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddsb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddsb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddsb: ; BTVER2-SSE: # %bb.0: @@ -8026,15 +8026,15 @@ ; ; BDVER2-SSE-LABEL: test_paddsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddsw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddsw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddsw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddsw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddsw: ; BTVER2-SSE: # %bb.0: @@ -8151,15 +8151,15 @@ ; ; BDVER2-SSE-LABEL: test_paddusb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddusb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddusb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddusb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddusb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddusb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddusb: ; BTVER2-SSE: # %bb.0: @@ -8276,15 +8276,15 @@ ; ; BDVER2-SSE-LABEL: test_paddusw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddusw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddusw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddusw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddusw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddusw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddusw: ; BTVER2-SSE: # %bb.0: @@ -8401,15 +8401,15 @@ ; ; BDVER2-SSE-LABEL: test_paddw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: paddw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_paddw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpaddw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_paddw: ; BTVER2-SSE: # %bb.0: @@ -8534,17 +8534,17 @@ ; ; BDVER2-SSE-LABEL: test_pand: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pand %xmm1, %xmm0 # sched: [1:0.33] +; BDVER2-SSE-NEXT: pand %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pand (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pand: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpand %xmm1, %xmm0, %xmm0 # sched: [1:0.33] +; BDVER2-NEXT: vpand %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpand (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pand: ; BTVER2-SSE: # %bb.0: @@ -8690,19 +8690,19 @@ ; ; BDVER2-SSE-LABEL: test_pandn: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pandn %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm1 # sched: [1:0.33] +; BDVER2-SSE-NEXT: pandn %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pandn (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm0, %xmm1 # sched: [1:0.50] -; BDVER2-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm0, %xmm1 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pandn: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpandn %xmm1, %xmm0, %xmm0 # sched: [1:0.33] +; BDVER2-NEXT: vpandn %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpandn (%rdi), %xmm0, %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pandn: ; BTVER2-SSE: # %bb.0: @@ -8829,15 +8829,15 @@ ; ; BDVER2-SSE-LABEL: test_pavgb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pavgb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pavgb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pavgb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pavgb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpavgb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpavgb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpavgb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pavgb: ; BTVER2-SSE: # %bb.0: @@ -8963,15 +8963,15 @@ ; ; BDVER2-SSE-LABEL: test_pavgw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pavgw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pavgw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pavgw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pavgw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpavgw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpavgw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpavgw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pavgw: ; BTVER2-SSE: # %bb.0: @@ -9108,17 +9108,17 @@ ; ; BDVER2-SSE-LABEL: test_pcmpeqb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pcmpeqb %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpeqb %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pcmpeqb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpeqb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomeqb %xmm1, %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-NEXT: vpcomeqb %xmm1, %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-NEXT: vpcomeqb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpeqb: ; BTVER2-SSE: # %bb.0: @@ -9251,17 +9251,17 @@ ; ; BDVER2-SSE-LABEL: test_pcmpeqd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pcmpeqd %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpeqd %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pcmpeqd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpeqd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomeqd %xmm1, %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-NEXT: vpcomeqd %xmm1, %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-NEXT: vpcomeqd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpeqd: ; BTVER2-SSE: # %bb.0: @@ -9394,17 +9394,17 @@ ; ; BDVER2-SSE-LABEL: test_pcmpeqw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pcmpeqw %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpeqw %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pcmpeqw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpeqw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomeqw %xmm1, %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-NEXT: vpcomeqw %xmm1, %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-NEXT: vpcomeqw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpeqw: ; BTVER2-SSE: # %bb.0: @@ -9543,18 +9543,18 @@ ; ; BDVER2-SSE-LABEL: test_pcmpgtb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm2 # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpgtb %xmm1, %xmm2 # sched: [1:0.50] +; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm2 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pcmpgtb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pcmpgtb %xmm1, %xmm2 # sched: [2:0.50] +; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpgtb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomgtb %xmm1, %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-NEXT: vpcomgtb %xmm1, %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-NEXT: vpcomgtb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpgtb: ; BTVER2-SSE: # %bb.0: @@ -9695,18 +9695,18 @@ ; ; BDVER2-SSE-LABEL: test_pcmpgtd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm2 # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpgtd %xmm1, %xmm2 # sched: [1:0.50] +; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm2 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pcmpeqd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pcmpgtd %xmm1, %xmm2 # sched: [2:0.50] +; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpgtd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomgtd %xmm1, %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-NEXT: vpcomgtd %xmm1, %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-NEXT: vpcomeqd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpgtd: ; BTVER2-SSE: # %bb.0: @@ -9847,18 +9847,18 @@ ; ; BDVER2-SSE-LABEL: test_pcmpgtw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm2 # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpgtw %xmm1, %xmm2 # sched: [1:0.50] +; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm2 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pcmpgtw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pcmpgtw %xmm1, %xmm2 # sched: [2:0.50] +; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpgtw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomgtw %xmm1, %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-NEXT: vpcomgtw %xmm1, %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-NEXT: vpcomgtw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpor %xmm0, %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpgtw: ; BTVER2-SSE: # %bb.0: @@ -9978,15 +9978,15 @@ ; ; BDVER2-SSE-LABEL: test_pextrw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pextrw $6, %xmm0, %eax # sched: [3:1.00] +; BDVER2-SSE-NEXT: pextrw $6, %xmm0, %eax # sched: [13:1.00] ; BDVER2-SSE-NEXT: # kill: def $ax killed $ax killed $eax -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pextrw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpextrw $6, %xmm0, %eax # sched: [3:1.00] +; BDVER2-NEXT: vpextrw $6, %xmm0, %eax # sched: [13:1.00] ; BDVER2-NEXT: # kill: def $ax killed $ax killed $eax -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pextrw: ; BTVER2-SSE: # %bb.0: @@ -10100,15 +10100,15 @@ ; ; BDVER2-SSE-LABEL: test_pinsrw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pinsrw $1, %edi, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: pinsrw $3, (%rsi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pinsrw $1, %edi, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: pinsrw $3, (%rsi), %xmm0 # sched: [6:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pinsrw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpinsrw $1, %edi, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpinsrw $3, (%rsi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpinsrw $1, %edi, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpinsrw $3, (%rsi), %xmm0, %xmm0 # sched: [6:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pinsrw: ; BTVER2-SSE: # %bb.0: @@ -10220,15 +10220,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaddwd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaddwd %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmaddwd (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmaddwd %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: pmaddwd (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaddwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmaddwd (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpmaddwd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaddwd: ; BTVER2-SSE: # %bb.0: @@ -10346,15 +10346,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaxsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaxsw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmaxsw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmaxsw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaxsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpmaxsw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaxsw: ; BTVER2-SSE: # %bb.0: @@ -10471,15 +10471,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaxub: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaxub %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmaxub %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmaxub (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaxub: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpmaxub (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaxub: ; BTVER2-SSE: # %bb.0: @@ -10596,15 +10596,15 @@ ; ; BDVER2-SSE-LABEL: test_pminsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pminsw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pminsw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pminsw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pminsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpminsw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpminsw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpminsw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pminsw: ; BTVER2-SSE: # %bb.0: @@ -10721,15 +10721,15 @@ ; ; BDVER2-SSE-LABEL: test_pminub: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pminub %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pminub %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pminub (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pminub: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpminub %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpminub %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpminub (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pminub: ; BTVER2-SSE: # %bb.0: @@ -10831,13 +10831,13 @@ ; ; BDVER2-SSE-LABEL: test_pmovmskb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovmskb %xmm0, %eax # sched: [2:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmovmskb %xmm0, %eax # sched: [13:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovmskb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovmskb %xmm0, %eax # sched: [2:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovmskb %xmm0, %eax # sched: [13:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovmskb: ; BTVER2-SSE: # %bb.0: @@ -10944,15 +10944,15 @@ ; ; BDVER2-SSE-LABEL: test_pmulhuw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmulhuw %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmulhuw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmulhuw %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: pmulhuw (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmulhuw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmulhuw (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpmulhuw (%rdi), %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmulhuw: ; BTVER2-SSE: # %bb.0: @@ -11065,15 +11065,15 @@ ; ; BDVER2-SSE-LABEL: test_pmulhw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmulhw %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmulhw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmulhw %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: pmulhw (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmulhw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmulhw (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpmulhw (%rdi), %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmulhw: ; BTVER2-SSE: # %bb.0: @@ -11186,15 +11186,15 @@ ; ; BDVER2-SSE-LABEL: test_pmullw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmullw %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmullw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmullw %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: pmullw (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmullw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmullw %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmullw (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmullw %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpmullw (%rdi), %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmullw: ; BTVER2-SSE: # %bb.0: @@ -11306,15 +11306,15 @@ ; ; BDVER2-SSE-LABEL: test_pmuludq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmuludq %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmuludq (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmuludq %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: pmuludq (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmuludq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmuludq (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpmuludq (%rdi), %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmuludq: ; BTVER2-SSE: # %bb.0: @@ -11441,17 +11441,17 @@ ; ; BDVER2-SSE-LABEL: test_por: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: por (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_por: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] +; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpor (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_por: ; BTVER2-SSE: # %bb.0: @@ -11568,15 +11568,15 @@ ; ; BDVER2-SSE-LABEL: test_psadbw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psadbw %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: psadbw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psadbw %xmm1, %xmm0 # sched: [4:0.50] +; BDVER2-SSE-NEXT: psadbw (%rdi), %xmm0 # sched: [9:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psadbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpsadbw (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 # sched: [4:0.50] +; BDVER2-NEXT: vpsadbw (%rdi), %xmm0, %xmm0 # sched: [9:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psadbw: ; BTVER2-SSE: # %bb.0: @@ -11706,17 +11706,17 @@ ; ; BDVER2-SSE-LABEL: test_pshufd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2] sched: [1:0.50] +; BDVER2-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2] sched: [2:0.50] ; BDVER2-SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[3,2,1,0] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pshufd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,3,2] sched: [1:0.50] ; BDVER2-NEXT: vpshufd {{.*#+}} xmm1 = mem[3,2,1,0] sched: [7:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,3,2] sched: [2:0.50] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pshufd: ; BTVER2-SSE: # %bb.0: @@ -11849,17 +11849,17 @@ ; ; BDVER2-SSE-LABEL: test_pshufhw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm0[0,1,2,3,5,4,7,6] sched: [1:0.50] +; BDVER2-SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm0[0,1,2,3,5,4,7,6] sched: [2:0.50] ; BDVER2-SSE-NEXT: pshufhw {{.*#+}} xmm0 = mem[0,1,2,3,7,6,5,4] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pshufhw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6] sched: [1:0.50] ; BDVER2-NEXT: vpshufhw {{.*#+}} xmm1 = mem[0,1,2,3,7,6,5,4] sched: [7:0.50] -; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6] sched: [2:0.50] +; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pshufhw: ; BTVER2-SSE: # %bb.0: @@ -11992,17 +11992,17 @@ ; ; BDVER2-SSE-LABEL: test_pshuflw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[1,0,3,2,4,5,6,7] sched: [1:0.50] +; BDVER2-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[1,0,3,2,4,5,6,7] sched: [2:0.50] ; BDVER2-SSE-NEXT: pshuflw {{.*#+}} xmm0 = mem[3,2,1,0,4,5,6,7] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pshuflw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7] sched: [1:0.50] ; BDVER2-NEXT: vpshuflw {{.*#+}} xmm1 = mem[3,2,1,0,4,5,6,7] sched: [7:0.50] -; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7] sched: [2:0.50] +; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pshuflw: ; BTVER2-SSE: # %bb.0: @@ -12132,17 +12132,17 @@ ; ; BDVER2-SSE-LABEL: test_pslld: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pslld %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: pslld (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: pslld $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pslld %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: pslld (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: pslld $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pslld: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpslld %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpslld (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpslld $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpslld %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpslld (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpslld $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pslld: ; BTVER2-SSE: # %bb.0: @@ -12254,13 +12254,13 @@ ; ; BDVER2-SSE-LABEL: test_pslldq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11] sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11] sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pslldq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11] sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11] sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pslldq: ; BTVER2-SSE: # %bb.0: @@ -12379,17 +12379,17 @@ ; ; BDVER2-SSE-LABEL: test_psllq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psllq %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: psllq (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: psllq $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psllq %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: psllq (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: psllq $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psllq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsllq %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpsllq (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpsllq $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsllq %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpsllq (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpsllq $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psllq: ; BTVER2-SSE: # %bb.0: @@ -12521,17 +12521,17 @@ ; ; BDVER2-SSE-LABEL: test_psllw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psllw %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: psllw (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: psllw $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psllw %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: psllw (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: psllw $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psllw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsllw %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpsllw (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpsllw $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsllw %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpsllw (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpsllw $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psllw: ; BTVER2-SSE: # %bb.0: @@ -12663,17 +12663,17 @@ ; ; BDVER2-SSE-LABEL: test_psrad: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psrad %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: psrad (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: psrad $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psrad %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: psrad (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: psrad $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psrad: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsrad %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpsrad (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpsrad $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsrad %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpsrad (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpsrad $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psrad: ; BTVER2-SSE: # %bb.0: @@ -12805,17 +12805,17 @@ ; ; BDVER2-SSE-LABEL: test_psraw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psraw %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: psraw (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: psraw $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psraw %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: psraw (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: psraw $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psraw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsraw %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpsraw (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpsraw $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsraw %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpsraw (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpsraw $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psraw: ; BTVER2-SSE: # %bb.0: @@ -12947,17 +12947,17 @@ ; ; BDVER2-SSE-LABEL: test_psrld: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psrld %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: psrld (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: psrld $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psrld %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: psrld (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: psrld $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psrld: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsrld %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpsrld (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpsrld $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsrld %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpsrld (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpsrld $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psrld: ; BTVER2-SSE: # %bb.0: @@ -13069,13 +13069,13 @@ ; ; BDVER2-SSE-LABEL: test_psrldq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psrldq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psrldq: ; BTVER2-SSE: # %bb.0: @@ -13194,17 +13194,17 @@ ; ; BDVER2-SSE-LABEL: test_psrlq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psrlq %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: psrlq (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: psrlq $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psrlq %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: psrlq (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: psrlq $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psrlq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpsrlq (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpsrlq $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpsrlq (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpsrlq $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psrlq: ; BTVER2-SSE: # %bb.0: @@ -13336,17 +13336,17 @@ ; ; BDVER2-SSE-LABEL: test_psrlw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psrlw %xmm1, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: psrlw (%rdi), %xmm0 # sched: [8:1.00] -; BDVER2-SSE-NEXT: psrlw $2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: psrlw %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-SSE-NEXT: psrlw (%rdi), %xmm0 # sched: [8:0.50] +; BDVER2-SSE-NEXT: psrlw $2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psrlw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpsrlw (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: vpsrlw $2, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: vpsrlw (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER2-NEXT: vpsrlw $2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psrlw: ; BTVER2-SSE: # %bb.0: @@ -13469,15 +13469,15 @@ ; ; BDVER2-SSE-LABEL: test_psubb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubb: ; BTVER2-SSE: # %bb.0: @@ -13593,15 +13593,15 @@ ; ; BDVER2-SSE-LABEL: test_psubd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubd %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubd: ; BTVER2-SSE: # %bb.0: @@ -13713,15 +13713,15 @@ ; ; BDVER2-SSE-LABEL: test_psubq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubq %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubq %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubq (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubq (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubq: ; BTVER2-SSE: # %bb.0: @@ -13837,15 +13837,15 @@ ; ; BDVER2-SSE-LABEL: test_psubsb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubsb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubsb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubsb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubsb: ; BTVER2-SSE: # %bb.0: @@ -13962,15 +13962,15 @@ ; ; BDVER2-SSE-LABEL: test_psubsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubsw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubsw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubsw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubsw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubsw: ; BTVER2-SSE: # %bb.0: @@ -14087,15 +14087,15 @@ ; ; BDVER2-SSE-LABEL: test_psubusb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubusb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubusb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubusb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubusb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubusb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubusb: ; BTVER2-SSE: # %bb.0: @@ -14212,15 +14212,15 @@ ; ; BDVER2-SSE-LABEL: test_psubusw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubusw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubusw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubusw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubusw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubusw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubusw: ; BTVER2-SSE: # %bb.0: @@ -14337,15 +14337,15 @@ ; ; BDVER2-SSE-LABEL: test_psubw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psubw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psubw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psubw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psubw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsubw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsubw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsubw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psubw: ; BTVER2-SSE: # %bb.0: @@ -14461,15 +14461,15 @@ ; ; BDVER2-SSE-LABEL: test_punpckhbw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],mem[8],xmm0[9],mem[9],xmm0[10],mem[10],xmm0[11],mem[11],xmm0[12],mem[12],xmm0[13],mem[13],xmm0[14],mem[14],xmm0[15],mem[15] sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpckhbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] sched: [1:0.50] +; BDVER2-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] sched: [2:0.50] ; BDVER2-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],mem[8],xmm0[9],mem[9],xmm0[10],mem[10],xmm0[11],mem[11],xmm0[12],mem[12],xmm0[13],mem[13],xmm0[14],mem[14],xmm0[15],mem[15] sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpckhbw: ; BTVER2-SSE: # %bb.0: @@ -14596,17 +14596,17 @@ ; ; BDVER2-SSE-LABEL: test_punpckhdq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],mem[2],xmm1[3],mem[3] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpckhdq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [1:0.50] +; BDVER2-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [2:0.50] ; BDVER2-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm1[2],mem[2],xmm1[3],mem[3] sched: [7:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpckhdq: ; BTVER2-SSE: # %bb.0: @@ -14736,17 +14736,17 @@ ; ; BDVER2-SSE-LABEL: test_punpckhqdq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1],mem[1] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpckhqdq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [1:0.50] +; BDVER2-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [2:0.50] ; BDVER2-NEXT: vpunpckhqdq {{.*#+}} xmm1 = xmm1[1],mem[1] sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpckhqdq: ; BTVER2-SSE: # %bb.0: @@ -14867,15 +14867,15 @@ ; ; BDVER2-SSE-LABEL: test_punpckhwd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7] sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpckhwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [1:0.50] +; BDVER2-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [2:0.50] ; BDVER2-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7] sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpckhwd: ; BTVER2-SSE: # %bb.0: @@ -14991,15 +14991,15 @@ ; ; BDVER2-SSE-LABEL: test_punpcklbw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3],xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7] sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpcklbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [1:0.50] +; BDVER2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] sched: [2:0.50] ; BDVER2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3],xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7] sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpcklbw: ; BTVER2-SSE: # %bb.0: @@ -15126,17 +15126,17 @@ ; ; BDVER2-SSE-LABEL: test_punpckldq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpckldq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [1:0.50] +; BDVER2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] sched: [2:0.50] ; BDVER2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1] sched: [7:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpckldq: ; BTVER2-SSE: # %bb.0: @@ -15266,17 +15266,17 @@ ; ; BDVER2-SSE-LABEL: test_punpcklqdq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpcklqdq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [1:0.50] +; BDVER2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] sched: [2:0.50] ; BDVER2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],mem[0] sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpcklqdq: ; BTVER2-SSE: # %bb.0: @@ -15397,15 +15397,15 @@ ; ; BDVER2-SSE-LABEL: test_punpcklwd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [1:0.50] +; BDVER2-SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [2:0.50] ; BDVER2-SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3] sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_punpcklwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [1:0.50] +; BDVER2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] sched: [2:0.50] ; BDVER2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3] sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_punpcklwd: ; BTVER2-SSE: # %bb.0: @@ -15530,17 +15530,17 @@ ; ; BDVER2-SSE-LABEL: test_pxor: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pxor %xmm1, %xmm0 # sched: [1:0.33] +; BDVER2-SSE-NEXT: pxor %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pxor (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pxor: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpxor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] +; BDVER2-NEXT: vpxor %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpxor (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pxor: ; BTVER2-SSE: # %bb.0: @@ -15670,17 +15670,17 @@ ; ; BDVER2-SSE-LABEL: test_shufpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0] sched: [1:1.00] -; BDVER2-SSE-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],mem[0] sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0] sched: [2:0.50] +; BDVER2-SSE-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],mem[0] sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_shufpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0] sched: [1:1.00] -; BDVER2-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1],mem[0] sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0] sched: [2:0.50] +; BDVER2-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1],mem[0] sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_shufpd: ; BTVER2-SSE: # %bb.0: @@ -15811,17 +15811,17 @@ ; ; BDVER2-SSE-LABEL: test_sqrtpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: sqrtpd %xmm0, %xmm1 # sched: [21:21.00] -; BDVER2-SSE-NEXT: sqrtpd (%rdi), %xmm0 # sched: [27:21.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: sqrtpd %xmm0, %xmm1 # sched: [9:13.50] +; BDVER2-SSE-NEXT: sqrtpd (%rdi), %xmm0 # sched: [14:13.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_sqrtpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsqrtpd %xmm0, %xmm0 # sched: [21:21.00] -; BDVER2-NEXT: vsqrtpd (%rdi), %xmm1 # sched: [27:21.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsqrtpd (%rdi), %xmm1 # sched: [14:13.50] +; BDVER2-NEXT: vsqrtpd %xmm0, %xmm0 # sched: [9:13.50] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_sqrtpd: ; BTVER2-SSE: # %bb.0: @@ -15967,19 +15967,19 @@ ; ; BDVER2-SSE-LABEL: test_sqrtsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: sqrtsd %xmm0, %xmm0 # sched: [21:21.00] -; BDVER2-SSE-NEXT: movapd (%rdi), %xmm1 # sched: [6:0.50] -; BDVER2-SSE-NEXT: sqrtsd %xmm1, %xmm1 # sched: [21:21.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movapd (%rdi), %xmm1 # sched: [5:0.50] +; BDVER2-SSE-NEXT: sqrtsd %xmm0, %xmm0 # sched: [9:13.50] +; BDVER2-SSE-NEXT: sqrtsd %xmm1, %xmm1 # sched: [9:13.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_sqrtsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 # sched: [21:21.00] -; BDVER2-NEXT: vmovapd (%rdi), %xmm1 # sched: [6:0.50] -; BDVER2-NEXT: vsqrtsd %xmm1, %xmm1, %xmm1 # sched: [21:21.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovapd (%rdi), %xmm1 # sched: [5:0.50] +; BDVER2-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 # sched: [9:13.50] +; BDVER2-NEXT: vsqrtsd %xmm1, %xmm1, %xmm1 # sched: [9:13.50] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_sqrtsd: ; BTVER2-SSE: # %bb.0: @@ -16101,15 +16101,15 @@ ; ; BDVER2-SSE-LABEL: test_subpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: subpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: subpd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: subpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: subpd (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_subpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsubpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vsubpd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsubpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vsubpd (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_subpd: ; BTVER2-SSE: # %bb.0: @@ -16221,15 +16221,15 @@ ; ; BDVER2-SSE-LABEL: test_subsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: subsd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: subsd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: subsd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: subsd (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_subsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vsubsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vsubsd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vsubsd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vsubsd (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_subsd: ; BTVER2-SSE: # %bb.0: @@ -16445,31 +16445,31 @@ ; ; BDVER2-SSE-LABEL: test_ucomisd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: ucomisd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: ucomisd %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-SSE-NEXT: ucomisd (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-SSE-NEXT: ucomisd (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-SSE-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-SSE-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-SSE-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_ucomisd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vucomisd %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vucomisd %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %cl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-NEXT: vucomisd (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-NEXT: vucomisd (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-NEXT: setnp %al # sched: [1:0.50] ; BDVER2-NEXT: sete %dl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %dl # sched: [1:0.33] -; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.33] -; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: andb %al, %dl # sched: [1:0.50] +; BDVER2-NEXT: orb %cl, %dl # sched: [1:0.50] +; BDVER2-NEXT: movzbl %dl, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_ucomisd: ; BTVER2-SSE: # %bb.0: @@ -16628,17 +16628,17 @@ ; ; BDVER2-SSE-LABEL: test_unpckhpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [1:1.00] -; BDVER2-SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],mem[1] sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [2:0.50] +; BDVER2-SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],mem[1] sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_unpckhpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [1:1.00] -; BDVER2-NEXT: vunpckhpd {{.*#+}} xmm1 = xmm1[1],mem[1] sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1] sched: [2:0.50] +; BDVER2-NEXT: vunpckhpd {{.*#+}} xmm1 = xmm1[1],mem[1] sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_unpckhpd: ; BTVER2-SSE: # %bb.0: @@ -16776,18 +16776,18 @@ ; ; BDVER2-SSE-LABEL: test_unpcklpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:1.00] -; BDVER2-SSE-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm1[0] sched: [1:1.00] -; BDVER2-SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0] sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.50] +; BDVER2-SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0] sched: [7:0.50] +; BDVER2-SSE-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm1[0] sched: [2:0.50] +; BDVER2-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_unpcklpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm0[0],xmm1[0] sched: [1:1.00] -; BDVER2-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0] sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm0[0],xmm1[0] sched: [2:0.50] +; BDVER2-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0] sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_unpcklpd: ; BTVER2-SSE: # %bb.0: @@ -16919,17 +16919,17 @@ ; ; BDVER2-SSE-LABEL: test_xorpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: xorpd %xmm1, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: xorpd (%rdi), %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: xorpd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: xorpd (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_xorpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vxorpd %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER2-NEXT: vxorpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vxorpd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vxorpd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_xorpd: ; BTVER2-SSE: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/sse3-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/sse3-schedule.ll +++ llvm/trunk/test/CodeGen/X86/sse3-schedule.ll @@ -14,9 +14,9 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-ssse3 | FileCheck %s --check-prefixes=CHECK,SKX-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse3 -mattr=-ssse3 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+sse3 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=+sse3 -mattr=-ssse3 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-ssse3 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-ssse3 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-ssse3 | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,ZNVER1 @@ -102,15 +102,15 @@ ; ; BDVER2-SSE-LABEL: test_addsubpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: addsubpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: addsubpd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addsubpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: addsubpd (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_addsubpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddsubpd (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vaddsubpd (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_addsubpd: ; BTVER2-SSE: # %bb.0: @@ -223,15 +223,15 @@ ; ; BDVER2-SSE-LABEL: test_addsubps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: addsubps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: addsubps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addsubps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: addsubps (%rdi), %xmm0 # sched: [10:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_addsubps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: vaddsubps (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: vaddsubps (%rdi), %xmm0, %xmm0 # sched: [10:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_addsubps: ; BTVER2-SSE: # %bb.0: @@ -344,15 +344,15 @@ ; ; BDVER2-SSE-LABEL: test_haddpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: haddpd %xmm1, %xmm0 # sched: [5:2.00] -; BDVER2-SSE-NEXT: haddpd (%rdi), %xmm0 # sched: [11:2.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: haddpd %xmm1, %xmm0 # sched: [11:1.00] +; BDVER2-SSE-NEXT: haddpd (%rdi), %xmm0 # sched: [16:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_haddpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 # sched: [5:2.00] -; BDVER2-NEXT: vhaddpd (%rdi), %xmm0, %xmm0 # sched: [11:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 # sched: [11:1.00] +; BDVER2-NEXT: vhaddpd (%rdi), %xmm0, %xmm0 # sched: [16:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_haddpd: ; BTVER2-SSE: # %bb.0: @@ -465,15 +465,15 @@ ; ; BDVER2-SSE-LABEL: test_haddps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: haddps %xmm1, %xmm0 # sched: [5:2.00] -; BDVER2-SSE-NEXT: haddps (%rdi), %xmm0 # sched: [11:2.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: haddps %xmm1, %xmm0 # sched: [11:1.00] +; BDVER2-SSE-NEXT: haddps (%rdi), %xmm0 # sched: [16:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_haddps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhaddps %xmm1, %xmm0, %xmm0 # sched: [5:2.00] -; BDVER2-NEXT: vhaddps (%rdi), %xmm0, %xmm0 # sched: [11:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhaddps %xmm1, %xmm0, %xmm0 # sched: [11:1.00] +; BDVER2-NEXT: vhaddps (%rdi), %xmm0, %xmm0 # sched: [16:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_haddps: ; BTVER2-SSE: # %bb.0: @@ -586,15 +586,15 @@ ; ; BDVER2-SSE-LABEL: test_hsubpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: hsubpd %xmm1, %xmm0 # sched: [5:2.00] -; BDVER2-SSE-NEXT: hsubpd (%rdi), %xmm0 # sched: [11:2.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: hsubpd %xmm1, %xmm0 # sched: [11:1.00] +; BDVER2-SSE-NEXT: hsubpd (%rdi), %xmm0 # sched: [16:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_hsubpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 # sched: [5:2.00] -; BDVER2-NEXT: vhsubpd (%rdi), %xmm0, %xmm0 # sched: [11:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 # sched: [11:1.00] +; BDVER2-NEXT: vhsubpd (%rdi), %xmm0, %xmm0 # sched: [16:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_hsubpd: ; BTVER2-SSE: # %bb.0: @@ -707,15 +707,15 @@ ; ; BDVER2-SSE-LABEL: test_hsubps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: hsubps %xmm1, %xmm0 # sched: [5:2.00] -; BDVER2-SSE-NEXT: hsubps (%rdi), %xmm0 # sched: [11:2.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: hsubps %xmm1, %xmm0 # sched: [11:1.00] +; BDVER2-SSE-NEXT: hsubps (%rdi), %xmm0 # sched: [16:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_hsubps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vhsubps %xmm1, %xmm0, %xmm0 # sched: [5:2.00] -; BDVER2-NEXT: vhsubps (%rdi), %xmm0, %xmm0 # sched: [11:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vhsubps %xmm1, %xmm0, %xmm0 # sched: [11:1.00] +; BDVER2-NEXT: vhsubps (%rdi), %xmm0, %xmm0 # sched: [16:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_hsubps: ; BTVER2-SSE: # %bb.0: @@ -817,13 +817,13 @@ ; ; BDVER2-SSE-LABEL: test_lddqu: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: lddqu (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: lddqu (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_lddqu: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vlddqu (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vlddqu (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_lddqu: ; BTVER2-SSE: # %bb.0: @@ -943,17 +943,17 @@ ; ; BDVER2-SSE-LABEL: test_monitor: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl %esi, %ecx # sched: [1:0.33] ; BDVER2-SSE-NEXT: leaq (%rdi), %rax # sched: [1:0.50] -; BDVER2-SSE-NEXT: monitor # sched: [100:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movl %esi, %ecx # sched: [1:0.50] +; BDVER2-SSE-NEXT: monitor # sched: [100:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_monitor: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl %esi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: leaq (%rdi), %rax # sched: [1:0.50] -; BDVER2-NEXT: monitor # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movl %esi, %ecx # sched: [1:0.50] +; BDVER2-NEXT: monitor # sched: [100:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_monitor: ; BTVER2-SSE: # %bb.0: @@ -1082,17 +1082,17 @@ ; ; BDVER2-SSE-LABEL: test_movddup: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movddup {{.*#+}} xmm1 = xmm0[0,0] sched: [1:1.00] -; BDVER2-SSE-NEXT: movddup {{.*#+}} xmm0 = mem[0,0] sched: [6:0.50] -; BDVER2-SSE-NEXT: subpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movddup {{.*#+}} xmm1 = xmm0[0,0] sched: [2:0.50] +; BDVER2-SSE-NEXT: movddup {{.*#+}} xmm0 = mem[0,0] sched: [7:0.50] +; BDVER2-SSE-NEXT: subpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movddup: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] sched: [1:1.00] -; BDVER2-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0] sched: [6:0.50] -; BDVER2-NEXT: vsubpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0] sched: [7:0.50] +; BDVER2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] sched: [2:0.50] +; BDVER2-NEXT: vsubpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movddup: ; BTVER2-SSE: # %bb.0: @@ -1223,17 +1223,17 @@ ; ; BDVER2-SSE-LABEL: test_movshdup: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] sched: [1:1.00] -; BDVER2-SSE-NEXT: movshdup {{.*#+}} xmm0 = mem[1,1,3,3] sched: [6:0.50] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] sched: [2:0.50] +; BDVER2-SSE-NEXT: movshdup {{.*#+}} xmm0 = mem[1,1,3,3] sched: [7:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movshdup: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3] sched: [1:1.00] -; BDVER2-NEXT: vmovshdup {{.*#+}} xmm1 = mem[1,1,3,3] sched: [6:0.50] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovshdup {{.*#+}} xmm1 = mem[1,1,3,3] sched: [7:0.50] +; BDVER2-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3] sched: [2:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movshdup: ; BTVER2-SSE: # %bb.0: @@ -1364,17 +1364,17 @@ ; ; BDVER2-SSE-LABEL: test_movsldup: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movsldup {{.*#+}} xmm1 = xmm0[0,0,2,2] sched: [1:1.00] -; BDVER2-SSE-NEXT: movsldup {{.*#+}} xmm0 = mem[0,0,2,2] sched: [6:0.50] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movsldup {{.*#+}} xmm1 = xmm0[0,0,2,2] sched: [2:0.50] +; BDVER2-SSE-NEXT: movsldup {{.*#+}} xmm0 = mem[0,0,2,2] sched: [7:0.50] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movsldup: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2] sched: [1:1.00] -; BDVER2-NEXT: vmovsldup {{.*#+}} xmm1 = mem[0,0,2,2] sched: [6:0.50] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovsldup {{.*#+}} xmm1 = mem[0,0,2,2] sched: [7:0.50] +; BDVER2-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2] sched: [2:0.50] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movsldup: ; BTVER2-SSE: # %bb.0: @@ -1504,17 +1504,17 @@ ; ; BDVER2-SSE-LABEL: test_mwait: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl %esi, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: movl %edi, %ecx # sched: [1:0.33] -; BDVER2-SSE-NEXT: mwait # sched: [100:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movl %esi, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: movl %edi, %ecx # sched: [1:0.50] +; BDVER2-SSE-NEXT: mwait # sched: [100:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_mwait: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl %esi, %eax # sched: [1:0.33] -; BDVER2-NEXT: movl %edi, %ecx # sched: [1:0.33] -; BDVER2-NEXT: mwait # sched: [100:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movl %esi, %eax # sched: [1:0.50] +; BDVER2-NEXT: movl %edi, %ecx # sched: [1:0.50] +; BDVER2-NEXT: mwait # sched: [100:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_mwait: ; BTVER2-SSE: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/sse41-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/sse41-schedule.ll +++ llvm/trunk/test/CodeGen/X86/sse41-schedule.ll @@ -13,8 +13,8 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,SKX-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4.1 -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx,+xop -mattr=+sse4.1 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-sse4.2 | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE @@ -107,17 +107,17 @@ ; ; BDVER2-SSE-LABEL: test_blendpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50] +; BDVER2-SSE-NEXT: blendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [2:0.50] ; BDVER2-SSE-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_blendpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [1:0.50] +; BDVER2-NEXT: vblendpd {{.*#+}} xmm1 = xmm0[0],xmm1[1] sched: [2:0.50] ; BDVER2-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],mem[1] sched: [7:0.50] -; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_blendpd: ; BTVER2-SSE: # %bb.0: @@ -240,17 +240,17 @@ ; ; BDVER2-SSE-LABEL: test_blendps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50] +; BDVER2-SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [2:0.50] ; BDVER2-SSE-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_blendps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [1:0.50] +; BDVER2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3] sched: [2:0.50] ; BDVER2-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],mem[1],xmm1[2,3] sched: [7:0.50] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_blendps: ; BTVER2-SSE: # %bb.0: @@ -382,18 +382,18 @@ ; ; BDVER2-SSE-LABEL: test_blendvpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:1.00] -; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:1.00] -; BDVER2-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [8:1.00] -; BDVER2-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movapd %xmm0, %xmm3 # sched: [1:0.50] +; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: blendvpd %xmm0, %xmm1, %xmm3 # sched: [2:2.00] +; BDVER2-SSE-NEXT: blendvpd %xmm0, (%rdi), %xmm3 # sched: [7:2.00] +; BDVER2-SSE-NEXT: movapd %xmm3, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_blendvpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00] +; BDVER2-NEXT: vblendvpd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_blendvpd: ; BTVER2-SSE: # %bb.0: @@ -527,18 +527,18 @@ ; ; BDVER2-SSE-LABEL: test_blendvps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:1.00] -; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:1.00] -; BDVER2-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [8:1.00] -; BDVER2-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movaps %xmm0, %xmm3 # sched: [1:0.50] +; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: blendvps %xmm0, %xmm1, %xmm3 # sched: [2:2.00] +; BDVER2-SSE-NEXT: blendvps %xmm0, (%rdi), %xmm3 # sched: [7:2.00] +; BDVER2-SSE-NEXT: movaps %xmm3, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_blendvps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00] +; BDVER2-NEXT: vblendvps %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_blendvps: ; BTVER2-SSE: # %bb.0: @@ -651,15 +651,15 @@ ; ; BDVER2-SSE-LABEL: test_dppd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [15:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: dppd $7, %xmm1, %xmm0 # sched: [15:1.50] +; BDVER2-SSE-NEXT: dppd $7, (%rdi), %xmm0 # sched: [20:1.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_dppd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [15:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 # sched: [15:1.50] +; BDVER2-NEXT: vdppd $7, (%rdi), %xmm0, %xmm0 # sched: [20:1.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_dppd: ; BTVER2-SSE: # %bb.0: @@ -766,15 +766,15 @@ ; ; BDVER2-SSE-LABEL: test_dpps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [12:2.00] -; BDVER2-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [18:2.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [25:1.50] +; BDVER2-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [30:1.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_dpps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [12:2.00] -; BDVER2-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [18:2.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [25:1.50] +; BDVER2-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [30:1.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_dpps: ; BTVER2-SSE: # %bb.0: @@ -881,15 +881,15 @@ ; ; BDVER2-SSE-LABEL: test_extractps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: extractps $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-SSE-NEXT: extractps $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_extractps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vextractps $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vextractps $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-NEXT: vextractps $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_extractps: ; BTVER2-SSE: # %bb.0: @@ -997,15 +997,15 @@ ; ; BDVER2-SSE-LABEL: test_insertps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00] -; BDVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [2:0.50] +; BDVER2-SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_insertps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [1:1.00] -; BDVER2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] sched: [2:0.50] +; BDVER2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] sched: [7:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_insertps: ; BTVER2-SSE: # %bb.0: @@ -1100,13 +1100,13 @@ ; ; BDVER2-SSE-LABEL: test_movntdqa: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movntdqa (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_movntdqa: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [6:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmovntdqa (%rdi), %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_movntdqa: ; BTVER2-SSE: # %bb.0: @@ -1207,15 +1207,15 @@ ; ; BDVER2-SSE-LABEL: test_mpsadbw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [7:1.00] -; BDVER2-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [13:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: mpsadbw $7, %xmm1, %xmm0 # sched: [9:2.00] +; BDVER2-SSE-NEXT: mpsadbw $7, (%rdi), %xmm0 # sched: [14:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_mpsadbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [7:1.00] -; BDVER2-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [13:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 # sched: [9:2.00] +; BDVER2-NEXT: vmpsadbw $7, (%rdi), %xmm0, %xmm0 # sched: [14:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_mpsadbw: ; BTVER2-SSE: # %bb.0: @@ -1323,15 +1323,15 @@ ; ; BDVER2-SSE-LABEL: test_packusdw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: packusdw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: packusdw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_packusdw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpackusdw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_packusdw: ; BTVER2-SSE: # %bb.0: @@ -1460,18 +1460,18 @@ ; ; BDVER2-SSE-LABEL: test_pblendvb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [1:0.33] -; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:1.00] -; BDVER2-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:1.00] -; BDVER2-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [8:1.00] -; BDVER2-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movdqa %xmm0, %xmm3 # sched: [2:0.50] +; BDVER2-SSE-NEXT: movaps %xmm2, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pblendvb %xmm0, %xmm1, %xmm3 # sched: [2:2.00] +; BDVER2-SSE-NEXT: pblendvb %xmm0, (%rdi), %xmm3 # sched: [7:2.00] +; BDVER2-SSE-NEXT: movdqa %xmm3, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pblendvb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:2.00] +; BDVER2-NEXT: vpblendvb %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pblendvb: ; BTVER2-SSE: # %bb.0: @@ -1596,17 +1596,17 @@ ; ; BDVER2-SSE-LABEL: test_pblendw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.50] +; BDVER2-SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [2:0.50] ; BDVER2-SSE-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:0.50] -; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pblendw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [1:0.50] +; BDVER2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] sched: [2:0.50] ; BDVER2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],mem[2,3],xmm1[4,5,6],mem[7] sched: [7:0.50] -; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pblendw: ; BTVER2-SSE: # %bb.0: @@ -1717,15 +1717,15 @@ ; ; BDVER2-SSE-LABEL: test_pcmpeqq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpeqq %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pcmpeqq (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpeqq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpcomeqq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpcomeqq (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpeqq: ; BTVER2-SSE: # %bb.0: @@ -1833,15 +1833,15 @@ ; ; BDVER2-SSE-LABEL: test_pextrb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pextrb $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-SSE-NEXT: pextrb $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pextrb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpextrb $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpextrb $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-NEXT: vpextrb $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pextrb: ; BTVER2-SSE: # %bb.0: @@ -1960,17 +1960,17 @@ ; ; BDVER2-SSE-LABEL: test_pextrd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: pextrd $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-SSE-NEXT: pextrd $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pextrd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: vpextrd $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpaddd %xmm0, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpextrd $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-NEXT: vpextrd $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pextrd: ; BTVER2-SSE: # %bb.0: @@ -2081,15 +2081,15 @@ ; ; BDVER2-SSE-LABEL: test_pextrq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [3:1.00] -; BDVER2-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pextrq $1, %xmm0, %rax # sched: [13:1.00] +; BDVER2-SSE-NEXT: pextrq $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pextrq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpextrq $1, %xmm0, %rax # sched: [3:1.00] -; BDVER2-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpextrq $1, %xmm0, %rax # sched: [13:1.00] +; BDVER2-NEXT: vpextrq $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pextrq: ; BTVER2-SSE: # %bb.0: @@ -2195,15 +2195,15 @@ ; ; BDVER2-SSE-LABEL: test_pextrw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pextrw $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-SSE-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pextrw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpextrw $3, %xmm0, %eax # sched: [3:1.00] -; BDVER2-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpextrw $3, %xmm0, %eax # sched: [13:1.00] +; BDVER2-NEXT: vpextrw $1, %xmm0, (%rdi) # sched: [13:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pextrw: ; BTVER2-SSE: # %bb.0: @@ -2310,15 +2310,15 @@ ; ; BDVER2-SSE-LABEL: test_phminposuw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: phminposuw (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: phminposuw %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_phminposuw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vphminposuw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: vphminposuw %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vphminposuw (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: vphminposuw %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_phminposuw: ; BTVER2-SSE: # %bb.0: @@ -2425,15 +2425,15 @@ ; ; BDVER2-SSE-LABEL: test_pinsrb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pinsrb $1, %edi, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: pinsrb $3, (%rsi), %xmm0 # sched: [6:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pinsrb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [6:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pinsrb: ; BTVER2-SSE: # %bb.0: @@ -2539,15 +2539,15 @@ ; ; BDVER2-SSE-LABEL: test_pinsrd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pinsrd $1, %edi, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: pinsrd $3, (%rsi), %xmm0 # sched: [6:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pinsrd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [6:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pinsrd: ; BTVER2-SSE: # %bb.0: @@ -2665,17 +2665,17 @@ ; ; BDVER2-SSE-LABEL: test_pinsrq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:1.00] -; BDVER2-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pinsrq $1, (%rsi), %xmm1 # sched: [6:0.50] +; BDVER2-SSE-NEXT: pinsrq $1, %rdi, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pinsrq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [2:1.00] -; BDVER2-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [6:0.50] +; BDVER2-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pinsrq: ; BTVER2-SSE: # %bb.0: @@ -2786,15 +2786,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaxsb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmaxsb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmaxsb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaxsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpmaxsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaxsb: ; BTVER2-SSE: # %bb.0: @@ -2901,15 +2901,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaxsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmaxsd %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmaxsd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaxsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaxsd: ; BTVER2-SSE: # %bb.0: @@ -3016,15 +3016,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaxud: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmaxud %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmaxud (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaxud: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpmaxud (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaxud: ; BTVER2-SSE: # %bb.0: @@ -3131,15 +3131,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaxuw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmaxuw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmaxuw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaxuw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpmaxuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaxuw: ; BTVER2-SSE: # %bb.0: @@ -3246,15 +3246,15 @@ ; ; BDVER2-SSE-LABEL: test_pminsb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pminsb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pminsb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pminsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpminsb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpminsb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pminsb: ; BTVER2-SSE: # %bb.0: @@ -3361,15 +3361,15 @@ ; ; BDVER2-SSE-LABEL: test_pminsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pminsd %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pminsd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pminsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpminsd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpminsd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pminsd: ; BTVER2-SSE: # %bb.0: @@ -3476,15 +3476,15 @@ ; ; BDVER2-SSE-LABEL: test_pminud: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pminud %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pminud (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pminud: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpminud %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpminud (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pminud: ; BTVER2-SSE: # %bb.0: @@ -3591,15 +3591,15 @@ ; ; BDVER2-SSE-LABEL: test_pminuw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pminuw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pminuw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pminuw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpminuw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpminuw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pminuw: ; BTVER2-SSE: # %bb.0: @@ -3719,17 +3719,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovsxbw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovsxbw %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovsxbw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovsxbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpmovsxbw (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovsxbw %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovsxbw: ; BTVER2-SSE: # %bb.0: @@ -3854,17 +3854,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovsxbd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovsxbd %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovsxbd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovsxbd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpmovsxbd (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovsxbd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovsxbd: ; BTVER2-SSE: # %bb.0: @@ -3989,17 +3989,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovsxbq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovsxbq %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovsxbq (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovsxbq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpmovsxbq (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovsxbq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovsxbq: ; BTVER2-SSE: # %bb.0: @@ -4124,17 +4124,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovsxdq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovsxdq %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovsxdq (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovsxdq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpmovsxdq (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovsxdq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovsxdq: ; BTVER2-SSE: # %bb.0: @@ -4259,17 +4259,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovsxwd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovsxwd %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovsxwd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovsxwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpmovsxwd (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovsxwd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovsxwd: ; BTVER2-SSE: # %bb.0: @@ -4394,17 +4394,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovsxwq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovsxwq %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovsxwq (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovsxwq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpmovsxwq (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovsxwq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovsxwq: ; BTVER2-SSE: # %bb.0: @@ -4529,17 +4529,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovzxbw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [7:0.50] -; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddw %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovzxbw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [1:0.50] ; BDVER2-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero sched: [7:0.50] -; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero sched: [2:0.50] +; BDVER2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovzxbw: ; BTVER2-SSE: # %bb.0: @@ -4664,17 +4664,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovzxbd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [7:0.50] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovzxbd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [1:0.50] ; BDVER2-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero sched: [7:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero sched: [2:0.50] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovzxbd: ; BTVER2-SSE: # %bb.0: @@ -4799,17 +4799,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovzxbq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovzxbq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [1:0.50] ; BDVER2-NEXT: vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovzxbq: ; BTVER2-SSE: # %bb.0: @@ -4934,17 +4934,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovzxdq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovzxdq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [1:0.50] ; BDVER2-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovzxdq: ; BTVER2-SSE: # %bb.0: @@ -5069,17 +5069,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovzxwd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [7:0.50] -; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddd %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovzxwd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [1:0.50] ; BDVER2-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero sched: [7:0.50] -; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero sched: [2:0.50] +; BDVER2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovzxwd: ; BTVER2-SSE: # %bb.0: @@ -5204,17 +5204,17 @@ ; ; BDVER2-SSE-LABEL: test_pmovzxwq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.50] +; BDVER2-SSE-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [2:0.50] ; BDVER2-SSE-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [7:0.50] -; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: paddq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmovzxwq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [1:0.50] ; BDVER2-NEXT: vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero sched: [7:0.50] -; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero sched: [2:0.50] +; BDVER2-NEXT: vpaddq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmovzxwq: ; BTVER2-SSE: # %bb.0: @@ -5338,17 +5338,17 @@ ; ; BDVER2-SSE-LABEL: test_pmuldq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [11:1.00] -; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmuldq (%rdi), %xmm2 # sched: [9:1.00] +; BDVER2-SSE-NEXT: pmuldq %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: por %xmm2, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmuldq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmuldq (%rdi), %xmm2, %xmm1 # sched: [11:1.00] -; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmuldq (%rdi), %xmm2, %xmm2 # sched: [9:1.00] +; BDVER2-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpor %xmm2, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmuldq: ; BTVER2-SSE: # %bb.0: @@ -5460,15 +5460,15 @@ ; ; BDVER2-SSE-LABEL: test_pmulld: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmulld %xmm1, %xmm0 # sched: [5:2.00] +; BDVER2-SSE-NEXT: pmulld (%rdi), %xmm0 # sched: [10:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmulld: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 # sched: [5:2.00] +; BDVER2-NEXT: vpmulld (%rdi), %xmm0, %xmm0 # sched: [10:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmulld: ; BTVER2-SSE: # %bb.0: @@ -5622,23 +5622,23 @@ ; ; BDVER2-SSE-LABEL: test_ptest: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-SSE-NEXT: ptest %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-SSE-NEXT: setb %al # sched: [1:0.50] -; BDVER2-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-SSE-NEXT: ptest (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-SSE-NEXT: setb %cl # sched: [1:0.50] -; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-SSE-NEXT: movzbl %cl, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_ptest: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vptest %xmm1, %xmm0 # sched: [2:1.00] +; BDVER2-NEXT: vptest %xmm1, %xmm0 # sched: [1:1.00] ; BDVER2-NEXT: setb %al # sched: [1:0.50] -; BDVER2-NEXT: vptest (%rdi), %xmm0 # sched: [8:1.00] +; BDVER2-NEXT: vptest (%rdi), %xmm0 # sched: [6:1.00] ; BDVER2-NEXT: setb %cl # sched: [1:0.50] -; BDVER2-NEXT: andb %al, %cl # sched: [1:0.33] -; BDVER2-NEXT: movzbl %cl, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: andb %al, %cl # sched: [1:0.50] +; BDVER2-NEXT: movzbl %cl, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_ptest: ; BTVER2-SSE: # %bb.0: @@ -5776,17 +5776,17 @@ ; ; BDVER2-SSE-LABEL: test_roundpd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [3:1.00] +; BDVER2-SSE-NEXT: roundpd $7, %xmm0, %xmm1 # sched: [4:1.00] ; BDVER2-SSE-NEXT: roundpd $7, (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addpd %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_roundpd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [3:1.00] ; BDVER2-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_roundpd: ; BTVER2-SSE: # %bb.0: @@ -5912,17 +5912,17 @@ ; ; BDVER2-SSE-LABEL: test_roundps: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [3:1.00] +; BDVER2-SSE-NEXT: roundps $7, %xmm0, %xmm1 # sched: [4:1.00] ; BDVER2-SSE-NEXT: roundps $7, (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: addps %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_roundps: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [3:1.00] ; BDVER2-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [9:1.00] -; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_roundps: ; BTVER2-SSE: # %bb.0: @@ -6053,18 +6053,18 @@ ; ; BDVER2-SSE-LABEL: test_roundsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:1.00] -; BDVER2-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [3:1.00] +; BDVER2-SSE-NEXT: movapd %xmm0, %xmm2 # sched: [1:0.50] ; BDVER2-SSE-NEXT: roundsd $7, (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: roundsd $7, %xmm1, %xmm2 # sched: [4:1.00] +; BDVER2-SSE-NEXT: addpd %xmm2, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_roundsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [3:1.00] +; BDVER2-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [4:1.00] ; BDVER2-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_roundsd: ; BTVER2-SSE: # %bb.0: @@ -6197,18 +6197,18 @@ ; ; BDVER2-SSE-LABEL: test_roundss: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:1.00] -; BDVER2-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [3:1.00] +; BDVER2-SSE-NEXT: movaps %xmm0, %xmm2 # sched: [1:0.50] ; BDVER2-SSE-NEXT: roundss $7, (%rdi), %xmm0 # sched: [9:1.00] -; BDVER2-SSE-NEXT: addps %xmm2, %xmm0 # sched: [3:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: roundss $7, %xmm1, %xmm2 # sched: [4:1.00] +; BDVER2-SSE-NEXT: addps %xmm2, %xmm0 # sched: [5:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_roundss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [3:1.00] +; BDVER2-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [4:1.00] ; BDVER2-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] -; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [5:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_roundss: ; BTVER2-SSE: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/sse42-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/sse42-schedule.ll +++ llvm/trunk/test/CodeGen/X86/sse42-schedule.ll @@ -13,8 +13,8 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx | FileCheck %s --check-prefixes=CHECK,SKX-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4.2,+pclmul -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx,+xop -mattr=+sse4.2,+pclmul -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE @@ -107,17 +107,17 @@ ; ; BDVER2-SSE-LABEL: crc32_32_8: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:2.00] +; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [7:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: crc32_32_8: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.33] -; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:1.00] -; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.50] +; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:2.00] +; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: crc32_32_8: ; BTVER2-SSE: # %bb.0: @@ -240,17 +240,17 @@ ; ; BDVER2-SSE-LABEL: crc32_32_16: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: crc32w %si, %eax # sched: [5:2.00] +; BDVER2-SSE-NEXT: crc32w (%rdx), %eax # sched: [7:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: crc32_32_16: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.33] -; BDVER2-NEXT: crc32w %si, %eax # sched: [3:1.00] -; BDVER2-NEXT: crc32w (%rdx), %eax # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.50] +; BDVER2-NEXT: crc32w %si, %eax # sched: [5:2.00] +; BDVER2-NEXT: crc32w (%rdx), %eax # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: crc32_32_16: ; BTVER2-SSE: # %bb.0: @@ -373,17 +373,17 @@ ; ; BDVER2-SSE-LABEL: crc32_32_32: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: crc32l %esi, %eax # sched: [6:2.00] +; BDVER2-SSE-NEXT: crc32l (%rdx), %eax # sched: [7:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: crc32_32_32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.33] -; BDVER2-NEXT: crc32l %esi, %eax # sched: [3:1.00] -; BDVER2-NEXT: crc32l (%rdx), %eax # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.50] +; BDVER2-NEXT: crc32l %esi, %eax # sched: [6:2.00] +; BDVER2-NEXT: crc32l (%rdx), %eax # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: crc32_32_32: ; BTVER2-SSE: # %bb.0: @@ -506,17 +506,17 @@ ; ; BDVER2-SSE-LABEL: crc32_64_8: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.33] -; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00] -; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50] +; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:2.00] +; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [7:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: crc32_64_8: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.33] -; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:1.00] -; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.50] +; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:2.00] +; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: crc32_64_8: ; BTVER2-SSE: # %bb.0: @@ -639,17 +639,17 @@ ; ; BDVER2-SSE-LABEL: crc32_64_64: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.33] -; BDVER2-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00] -; BDVER2-SSE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50] +; BDVER2-SSE-NEXT: crc32q %rsi, %rax # sched: [10:2.00] +; BDVER2-SSE-NEXT: crc32q (%rdx), %rax # sched: [7:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: crc32_64_64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.33] -; BDVER2-NEXT: crc32q %rsi, %rax # sched: [3:1.00] -; BDVER2-NEXT: crc32q (%rdx), %rax # sched: [8:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.50] +; BDVER2-NEXT: crc32q %rsi, %rax # sched: [10:2.00] +; BDVER2-NEXT: crc32q (%rdx), %rax # sched: [7:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: crc32_64_64: ; BTVER2-SSE: # %bb.0: @@ -844,29 +844,29 @@ ; ; BDVER2-SSE-LABEL: test_pcmpestri: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [4:2.67] -; BDVER2-SSE-NEXT: movl %ecx, %esi # sched: [1:0.33] -; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33] +; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [15:4.00] +; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-SSE-NEXT: movl %ecx, %esi # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [20:4.50] ; BDVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx ; BDVER2-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpestri: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [4:2.67] -; BDVER2-NEXT: movl %ecx, %esi # sched: [1:0.33] -; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33] +; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [15:4.00] +; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-NEXT: movl %ecx, %esi # sched: [1:0.50] +; BDVER2-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [20:4.50] ; BDVER2-NEXT: # kill: def $ecx killed $ecx def $rcx ; BDVER2-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpestri: ; BTVER2-SSE: # %bb.0: @@ -1050,23 +1050,23 @@ ; ; BDVER2-SSE-LABEL: test_pcmpestrm: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [11:2.67] -; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [11:2.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [10:4.00] +; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [15:4.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpestrm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [11:2.67] -; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33] -; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33] -; BDVER2-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [11:2.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [10:4.00] +; BDVER2-NEXT: movl $7, %eax # sched: [1:0.50] +; BDVER2-NEXT: movl $7, %edx # sched: [1:0.50] +; BDVER2-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [15:4.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpestrm: ; BTVER2-SSE: # %bb.0: @@ -1225,21 +1225,21 @@ ; ; BDVER2-SSE-LABEL: test_pcmpistri: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00] -; BDVER2-SSE-NEXT: movl %ecx, %eax # sched: [1:0.33] -; BDVER2-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00] +; BDVER2-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [14:1.00] +; BDVER2-SSE-NEXT: movl %ecx, %eax # sched: [1:0.50] +; BDVER2-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [19:1.00] ; BDVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx ; BDVER2-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpistri: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00] -; BDVER2-NEXT: movl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00] +; BDVER2-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [14:1.00] +; BDVER2-NEXT: movl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [19:1.00] ; BDVER2-NEXT: # kill: def $ecx killed $ecx def $rcx ; BDVER2-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpistri: ; BTVER2-SSE: # %bb.0: @@ -1359,15 +1359,15 @@ ; ; BDVER2-SSE-LABEL: test_pcmpistrm: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00] -; BDVER2-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [6:1.00] +; BDVER2-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [11:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpistrm: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00] -; BDVER2-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [6:1.00] +; BDVER2-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [11:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpistrm: ; BTVER2-SSE: # %bb.0: @@ -1474,15 +1474,15 @@ ; ; BDVER2-SSE-LABEL: test_pcmpgtq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [7:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pcmpgtq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpcomgtq %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpcomgtq %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpcomgtq (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pcmpgtq: ; BTVER2-SSE: # %bb.0: @@ -1590,15 +1590,15 @@ ; ; BDVER2-SSE-LABEL: test_pclmulqdq: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [14:6.00] -; BDVER2-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [14:5.67] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [12:1.00] +; BDVER2-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [17:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pclmulqdq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [14:6.00] -; BDVER2-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [14:5.67] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [13:1.00] +; BDVER2-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [17:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pclmulqdq: ; BTVER2-SSE: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/sse4a-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/sse4a-schedule.ll +++ llvm/trunk/test/CodeGen/X86/sse4a-schedule.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4a | FileCheck %s --check-prefix=GENERIC -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4a | FileCheck %s --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=ZNVER1 @@ -12,8 +12,8 @@ ; ; BDVER2-LABEL: test_extrq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: extrq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: extrq %xmm1, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_extrq: ; BTVER2: # %bb.0: @@ -37,8 +37,8 @@ ; ; BDVER2-LABEL: test_extrqi: ; BDVER2: # %bb.0: -; BDVER2-NEXT: extrq $2, $3, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: extrq $2, $3, %xmm0 # sched: [3:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_extrqi: ; BTVER2: # %bb.0: @@ -62,8 +62,8 @@ ; ; BDVER2-LABEL: test_insertq: ; BDVER2: # %bb.0: -; BDVER2-NEXT: insertq %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: insertq %xmm1, %xmm0 # sched: [3:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_insertq: ; BTVER2: # %bb.0: @@ -87,8 +87,8 @@ ; ; BDVER2-LABEL: test_insertqi: ; BDVER2: # %bb.0: -; BDVER2-NEXT: insertq $6, $5, %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: insertq $6, $5, %xmm1, %xmm0 # sched: [3:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_insertqi: ; BTVER2: # %bb.0: @@ -112,8 +112,8 @@ ; ; BDVER2-LABEL: test_movntsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movntsd %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movntsd %xmm0, (%rdi) # sched: [3:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movntsd: ; BTVER2: # %bb.0: @@ -137,8 +137,8 @@ ; ; BDVER2-LABEL: test_movntss: ; BDVER2: # %bb.0: -; BDVER2-NEXT: movntss %xmm0, (%rdi) # sched: [1:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: movntss %xmm0, (%rdi) # sched: [3:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: test_movntss: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/ssse3-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/ssse3-schedule.ll +++ llvm/trunk/test/CodeGen/X86/ssse3-schedule.ll @@ -14,8 +14,8 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,SKX-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+ssse3 -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+ssse3 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-sse4.1 | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE @@ -117,17 +117,17 @@ ; ; BDVER2-SSE-LABEL: test_pabsb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pabsb %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pabsb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pabsb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpabsb %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpabsb (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpabsb %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pabsb: ; BTVER2-SSE: # %bb.0: @@ -260,17 +260,17 @@ ; ; BDVER2-SSE-LABEL: test_pabsd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pabsd %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pabsd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pabsd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpabsd %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpabsd (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpabsd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pabsd: ; BTVER2-SSE: # %bb.0: @@ -403,17 +403,17 @@ ; ; BDVER2-SSE-LABEL: test_pabsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [1:0.50] +; BDVER2-SSE-NEXT: pabsw %xmm0, %xmm1 # sched: [2:0.50] ; BDVER2-SSE-NEXT: pabsw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: por %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pabsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpabsw %xmm0, %xmm0 # sched: [1:0.50] ; BDVER2-NEXT: vpabsw (%rdi), %xmm1 # sched: [7:0.50] -; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpabsw %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: vpor %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pabsw: ; BTVER2-SSE: # %bb.0: @@ -541,16 +541,16 @@ ; ; BDVER2-SSE-LABEL: test_palignr: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.50] +; BDVER2-SSE-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [2:0.50] ; BDVER2-SSE-NEXT: palignr {{.*#+}} xmm1 = mem[14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:0.50] -; BDVER2-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [1:0.33] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: movdqa %xmm1, %xmm0 # sched: [2:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_palignr: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [1:0.50] +; BDVER2-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5] sched: [2:0.50] ; BDVER2-NEXT: vpalignr {{.*#+}} xmm0 = mem[14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13] sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_palignr: ; BTVER2-SSE: # %bb.0: @@ -664,15 +664,15 @@ ; ; BDVER2-SSE-LABEL: test_phaddd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [3:1.50] -; BDVER2-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [9:1.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: phaddd %xmm1, %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: phaddd (%rdi), %xmm0 # sched: [10:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_phaddd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [3:1.50] -; BDVER2-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [9:1.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vphaddd %xmm1, %xmm0, %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vphaddd (%rdi), %xmm0, %xmm0 # sched: [10:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_phaddd: ; BTVER2-SSE: # %bb.0: @@ -785,15 +785,15 @@ ; ; BDVER2-SSE-LABEL: test_phaddsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [3:1.50] -; BDVER2-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [9:1.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: phaddsw %xmm1, %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: phaddsw (%rdi), %xmm0 # sched: [10:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_phaddsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [3:1.50] -; BDVER2-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [9:1.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vphaddsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_phaddsw: ; BTVER2-SSE: # %bb.0: @@ -906,15 +906,15 @@ ; ; BDVER2-SSE-LABEL: test_phaddw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [3:1.50] -; BDVER2-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [9:1.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: phaddw %xmm1, %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: phaddw (%rdi), %xmm0 # sched: [10:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_phaddw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [3:1.50] -; BDVER2-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [9:1.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vphaddw %xmm1, %xmm0, %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vphaddw (%rdi), %xmm0, %xmm0 # sched: [10:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_phaddw: ; BTVER2-SSE: # %bb.0: @@ -1027,15 +1027,15 @@ ; ; BDVER2-SSE-LABEL: test_phsubd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [3:1.50] -; BDVER2-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [9:1.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: phsubd %xmm1, %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: phsubd (%rdi), %xmm0 # sched: [10:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_phsubd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [3:1.50] -; BDVER2-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [9:1.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vphsubd %xmm1, %xmm0, %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vphsubd (%rdi), %xmm0, %xmm0 # sched: [10:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_phsubd: ; BTVER2-SSE: # %bb.0: @@ -1148,15 +1148,15 @@ ; ; BDVER2-SSE-LABEL: test_phsubsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [3:1.50] -; BDVER2-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [9:1.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: phsubsw %xmm1, %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: phsubsw (%rdi), %xmm0 # sched: [10:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_phsubsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [3:1.50] -; BDVER2-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [9:1.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vphsubsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_phsubsw: ; BTVER2-SSE: # %bb.0: @@ -1269,15 +1269,15 @@ ; ; BDVER2-SSE-LABEL: test_phsubw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [3:1.50] -; BDVER2-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [9:1.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: phsubw %xmm1, %xmm0 # sched: [5:0.50] +; BDVER2-SSE-NEXT: phsubw (%rdi), %xmm0 # sched: [10:0.50] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_phsubw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [3:1.50] -; BDVER2-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [9:1.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vphsubw %xmm1, %xmm0, %xmm0 # sched: [5:0.50] +; BDVER2-NEXT: vphsubw (%rdi), %xmm0, %xmm0 # sched: [10:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_phsubw: ; BTVER2-SSE: # %bb.0: @@ -1390,15 +1390,15 @@ ; ; BDVER2-SSE-LABEL: test_pmaddubsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmaddubsw %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: pmaddubsw (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmaddubsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmaddubsw: ; BTVER2-SSE: # %bb.0: @@ -1512,15 +1512,15 @@ ; ; BDVER2-SSE-LABEL: test_pmulhrsw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [5:1.00] -; BDVER2-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [11:1.00] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pmulhrsw %xmm1, %xmm0 # sched: [4:1.00] +; BDVER2-SSE-NEXT: pmulhrsw (%rdi), %xmm0 # sched: [9:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pmulhrsw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER2-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [11:1.00] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER2-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [9:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pmulhrsw: ; BTVER2-SSE: # %bb.0: @@ -1633,15 +1633,15 @@ ; ; BDVER2-SSE-LABEL: test_pshufb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [1:0.50] -; BDVER2-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: pshufb %xmm1, %xmm0 # sched: [3:2.00] +; BDVER2-SSE-NEXT: pshufb (%rdi), %xmm0 # sched: [8:2.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_pshufb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER2-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: vpshufb %xmm1, %xmm0, %xmm0 # sched: [3:2.00] +; BDVER2-NEXT: vpshufb (%rdi), %xmm0, %xmm0 # sched: [8:2.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_pshufb: ; BTVER2-SSE: # %bb.0: @@ -1758,15 +1758,15 @@ ; ; BDVER2-SSE-LABEL: test_psignb: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psignb %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psignb (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psignb: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsignb %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsignb (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psignb: ; BTVER2-SSE: # %bb.0: @@ -1883,15 +1883,15 @@ ; ; BDVER2-SSE-LABEL: test_psignd: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psignd %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psignd (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psignd: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsignd %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsignd (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psignd: ; BTVER2-SSE: # %bb.0: @@ -2008,15 +2008,15 @@ ; ; BDVER2-SSE-LABEL: test_psignw: ; BDVER2-SSE: # %bb.0: -; BDVER2-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [1:0.50] +; BDVER2-SSE-NEXT: psignw %xmm1, %xmm0 # sched: [2:0.50] ; BDVER2-SSE-NEXT: psignw (%rdi), %xmm0 # sched: [7:0.50] -; BDVER2-SSE-NEXT: retq # sched: [1:1.00] +; BDVER2-SSE-NEXT: retq # sched: [5:1.00] ; ; BDVER2-LABEL: test_psignw: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER2-NEXT: vpsignw %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER2-NEXT: vpsignw (%rdi), %xmm0, %xmm0 # sched: [7:0.50] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-SSE-LABEL: test_psignw: ; BTVER2-SSE: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/tbm-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/tbm-schedule.ll +++ llvm/trunk/test/CodeGen/X86/tbm-schedule.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+tbm | FileCheck %s --check-prefix=GENERIC -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+tbm | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver3 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER4 @@ -16,12 +16,12 @@ ; ; BDVER2-LABEL: test_x86_tbm_bextri_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04 -; BDVER2-NEXT: # sched: [2:1.00] ; BDVER2-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: # sched: [6:0.50] +; BDVER2-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04 +; BDVER2-NEXT: # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_bextri_u32: ; BDVER3: # %bb.0: @@ -57,12 +57,12 @@ ; ; BDVER2-LABEL: test_x86_tbm_bextri_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04 -; BDVER2-NEXT: # sched: [2:1.00] ; BDVER2-NEXT: bextrl $3076, (%rsi), %eax # imm = 0xC04 -; BDVER2-NEXT: # sched: [7:1.00] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: # sched: [6:0.50] +; BDVER2-NEXT: bextrl $3076, %edi, %ecx # imm = 0xC04 +; BDVER2-NEXT: # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_bextri_u64: ; BDVER3: # %bb.0: @@ -96,10 +96,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcfill_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcfilll %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: blcfilll (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcfilll %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcfill_u32: ; BDVER3: # %bb.0: @@ -133,10 +133,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcfill_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcfillq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: blcfillq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcfillq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcfill_u64: ; BDVER3: # %bb.0: @@ -170,10 +170,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blci_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcil %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: blcil (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcil %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blci_u32: ; BDVER3: # %bb.0: @@ -209,10 +209,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blci_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blciq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: blciq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blciq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blci_u64: ; BDVER3: # %bb.0: @@ -248,10 +248,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcic_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcicl %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: blcicl (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcicl %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcic_u32: ; BDVER3: # %bb.0: @@ -287,10 +287,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcic_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcicq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: blcicq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcicq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcic_u64: ; BDVER3: # %bb.0: @@ -326,10 +326,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcmsk_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcmskl %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: blcmskl (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcmskl %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcmsk_u32: ; BDVER3: # %bb.0: @@ -363,10 +363,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcmsk_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcmskq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: blcmskq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcmskq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcmsk_u64: ; BDVER3: # %bb.0: @@ -400,10 +400,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcs_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcsl %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: blcsl (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcsl %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcs_u32: ; BDVER3: # %bb.0: @@ -437,10 +437,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blcs_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blcsq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: blcsq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blcsq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blcs_u64: ; BDVER3: # %bb.0: @@ -474,10 +474,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blsfill_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blsfilll %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: blsfilll (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsfilll %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blsfill_u32: ; BDVER3: # %bb.0: @@ -511,10 +511,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blsfill_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blsfillq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: blsfillq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsfillq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blsfill_u64: ; BDVER3: # %bb.0: @@ -548,10 +548,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blsic_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blsicl %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: blsicl (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsicl %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blsic_u32: ; BDVER3: # %bb.0: @@ -587,10 +587,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_blsic_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: blsicq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: blsicq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: blsicq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_blsic_u64: ; BDVER3: # %bb.0: @@ -626,10 +626,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_t1mskc_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: t1mskcl %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: t1mskcl (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: t1mskcl %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_t1mskc_u32: ; BDVER3: # %bb.0: @@ -665,10 +665,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_t1mskc_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: t1mskcq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: t1mskcq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: t1mskcq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_t1mskc_u64: ; BDVER3: # %bb.0: @@ -704,10 +704,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_tzmsk_u32: ; BDVER2: # %bb.0: -; BDVER2-NEXT: tzmskl %edi, %ecx # sched: [1:0.33] ; BDVER2-NEXT: tzmskl (%rsi), %eax # sched: [6:0.50] -; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: tzmskl %edi, %ecx # sched: [2:0.50] +; BDVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_tzmsk_u32: ; BDVER3: # %bb.0: @@ -743,10 +743,10 @@ ; ; BDVER2-LABEL: test_x86_tbm_tzmsk_u64: ; BDVER2: # %bb.0: -; BDVER2-NEXT: tzmskq %rdi, %rcx # sched: [1:0.33] ; BDVER2-NEXT: tzmskq (%rsi), %rax # sched: [6:0.50] -; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.33] -; BDVER2-NEXT: retq # sched: [1:1.00] +; BDVER2-NEXT: tzmskq %rdi, %rcx # sched: [2:0.50] +; BDVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] +; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_x86_tbm_tzmsk_u64: ; BDVER3: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll +++ llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll @@ -30,8 +30,8 @@ ; CHECK-NOFMA-NEXT: andl $-32, %esp ; CHECK-NOFMA-NEXT: subl $32, %esp ; CHECK-NOFMA-NEXT: vmulps %ymm2, %ymm0, %ymm0 -; CHECK-NOFMA-NEXT: vaddps 8(%ebp), %ymm0, %ymm0 ; CHECK-NOFMA-NEXT: vmulps %ymm3, %ymm1, %ymm1 +; CHECK-NOFMA-NEXT: vaddps 8(%ebp), %ymm0, %ymm0 ; CHECK-NOFMA-NEXT: vaddps 40(%ebp), %ymm1, %ymm1 ; CHECK-NOFMA-NEXT: movl %ebp, %esp ; CHECK-NOFMA-NEXT: popl %ebp Index: llvm/trunk/test/CodeGen/X86/x87-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/x87-schedule.ll +++ llvm/trunk/test/CodeGen/X86/x87-schedule.ll @@ -8,7 +8,7 @@ ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX -; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 @@ -72,9 +72,9 @@ ; BDVER2-LABEL: test_f2xm1: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: f2xm1 # sched: [100:0.33] +; BDVER2-NEXT: f2xm1 # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_f2xm1: ; BTVER2: # %bb.0: @@ -155,7 +155,7 @@ ; BDVER2-NEXT: #APP ; BDVER2-NEXT: fabs # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fabs: ; BTVER2: # %bb.0: @@ -276,12 +276,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fadd %st(0), %st(1) # sched: [3:1.00] -; BDVER2-NEXT: fadd %st(2) # sched: [3:1.00] +; BDVER2-NEXT: fadd %st(0), %st(1) # sched: [5:1.00] +; BDVER2-NEXT: fadd %st(2) # sched: [5:1.00] ; BDVER2-NEXT: fadds (%ecx) # sched: [10:1.00] ; BDVER2-NEXT: faddl (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fadd: ; BTVER2: # %bb.0: @@ -412,12 +412,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: faddp %st(1) # sched: [3:1.00] -; BDVER2-NEXT: faddp %st(2) # sched: [3:1.00] -; BDVER2-NEXT: fiadds (%ecx) # sched: [13:2.00] -; BDVER2-NEXT: fiaddl (%eax) # sched: [13:2.00] +; BDVER2-NEXT: faddp %st(1) # sched: [5:1.00] +; BDVER2-NEXT: faddp %st(2) # sched: [5:1.00] +; BDVER2-NEXT: fiadds (%ecx) # sched: [10:1.00] +; BDVER2-NEXT: fiaddl (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_faddp_fiadd: ; BTVER2: # %bb.0: @@ -523,10 +523,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fbld (%eax) # sched: [100:0.33] -; BDVER2-NEXT: fbstp (%eax) # sched: [100:0.33] +; BDVER2-NEXT: fbld (%eax) # sched: [100:0.50] +; BDVER2-NEXT: fbstp (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fbld_fbstp: ; BTVER2: # %bb.0: @@ -611,7 +611,7 @@ ; BDVER2-NEXT: #APP ; BDVER2-NEXT: fchs # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fchs: ; BTVER2: # %bb.0: @@ -698,10 +698,10 @@ ; BDVER2-LABEL: test_fclex: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: wait # sched: [100:0.33] -; BDVER2-NEXT: fnclex # sched: [100:0.33] +; BDVER2-NEXT: wait # sched: [100:0.50] +; BDVER2-NEXT: fnclex # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fclex: ; BTVER2: # %bb.0: @@ -782,9 +782,9 @@ ; BDVER2-LABEL: test_fnclex: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fnclex # sched: [100:0.33] +; BDVER2-NEXT: fnclex # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fnclex: ; BTVER2: # %bb.0: @@ -919,16 +919,16 @@ ; BDVER2-LABEL: test_fcmov: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fcmovb %st(1), %st(0) # sched: [3:2.00] -; BDVER2-NEXT: fcmovbe %st(1), %st(0) # sched: [3:2.00] -; BDVER2-NEXT: fcmove %st(1), %st(0) # sched: [3:2.00] -; BDVER2-NEXT: fcmovnb %st(1), %st(0) # sched: [3:2.00] -; BDVER2-NEXT: fcmovnbe %st(1), %st(0) # sched: [3:2.00] -; BDVER2-NEXT: fcmovne %st(1), %st(0) # sched: [3:2.00] -; BDVER2-NEXT: fcmovnu %st(1), %st(0) # sched: [3:2.00] -; BDVER2-NEXT: fcmovu %st(1), %st(0) # sched: [3:2.00] +; BDVER2-NEXT: fcmovb %st(1), %st(0) # sched: [1:1.00] +; BDVER2-NEXT: fcmovbe %st(1), %st(0) # sched: [1:1.00] +; BDVER2-NEXT: fcmove %st(1), %st(0) # sched: [1:1.00] +; BDVER2-NEXT: fcmovnb %st(1), %st(0) # sched: [1:1.00] +; BDVER2-NEXT: fcmovnbe %st(1), %st(0) # sched: [1:1.00] +; BDVER2-NEXT: fcmovne %st(1), %st(0) # sched: [1:1.00] +; BDVER2-NEXT: fcmovnu %st(1), %st(0) # sched: [1:1.00] +; BDVER2-NEXT: fcmovu %st(1), %st(0) # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fcmov: ; BTVER2: # %bb.0: @@ -1065,10 +1065,10 @@ ; BDVER2-NEXT: #APP ; BDVER2-NEXT: fcom %st(1) # sched: [1:1.00] ; BDVER2-NEXT: fcom %st(3) # sched: [1:1.00] -; BDVER2-NEXT: fcoms (%ecx) # sched: [8:1.00] -; BDVER2-NEXT: fcoml (%eax) # sched: [8:1.00] +; BDVER2-NEXT: fcoms (%ecx) # sched: [6:1.00] +; BDVER2-NEXT: fcoml (%eax) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fcom: ; BTVER2: # %bb.0: @@ -1209,11 +1209,11 @@ ; BDVER2-NEXT: #APP ; BDVER2-NEXT: fcomp %st(1) # sched: [1:1.00] ; BDVER2-NEXT: fcomp %st(3) # sched: [1:1.00] -; BDVER2-NEXT: fcomps (%ecx) # sched: [8:1.00] -; BDVER2-NEXT: fcompl (%eax) # sched: [8:1.00] -; BDVER2-NEXT: fcompp # sched: [100:0.33] +; BDVER2-NEXT: fcomps (%ecx) # sched: [6:1.00] +; BDVER2-NEXT: fcompl (%eax) # sched: [6:1.00] +; BDVER2-NEXT: fcompp # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fcomp_fcompp: ; BTVER2: # %bb.0: @@ -1312,10 +1312,10 @@ ; BDVER2-LABEL: test_fcomi_fcomip: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fcomi %st(3) # sched: [3:1.00] -; BDVER2-NEXT: fcompi %st(3) # sched: [3:1.00] +; BDVER2-NEXT: fcomi %st(3) # sched: [1:1.00] +; BDVER2-NEXT: fcompi %st(3) # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fcomi_fcomip: ; BTVER2: # %bb.0: @@ -1396,9 +1396,9 @@ ; BDVER2-LABEL: test_fcos: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fcos # sched: [100:0.33] +; BDVER2-NEXT: fcos # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fcos: ; BTVER2: # %bb.0: @@ -1477,9 +1477,9 @@ ; BDVER2-LABEL: test_fdecstp: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fdecstp # sched: [1:1.00] +; BDVER2-NEXT: fdecstp # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fdecstp: ; BTVER2: # %bb.0: @@ -1600,12 +1600,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fdiv %st(0), %st(1) # sched: [14:14.00] -; BDVER2-NEXT: fdiv %st(2) # sched: [14:14.00] -; BDVER2-NEXT: fdivs (%ecx) # sched: [31:1.00] -; BDVER2-NEXT: fdivl (%eax) # sched: [31:1.00] +; BDVER2-NEXT: fdiv %st(0), %st(1) # sched: [9:9.50] +; BDVER2-NEXT: fdiv %st(2) # sched: [9:9.50] +; BDVER2-NEXT: fdivs (%ecx) # sched: [14:9.50] +; BDVER2-NEXT: fdivl (%eax) # sched: [14:9.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fdiv: ; BTVER2: # %bb.0: @@ -1736,12 +1736,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fdivp %st(1) # sched: [14:14.00] -; BDVER2-NEXT: fdivp %st(2) # sched: [14:14.00] -; BDVER2-NEXT: fidivs (%ecx) # sched: [34:1.00] -; BDVER2-NEXT: fidivl (%eax) # sched: [34:1.00] +; BDVER2-NEXT: fdivp %st(1) # sched: [9:9.50] +; BDVER2-NEXT: fdivp %st(2) # sched: [9:9.50] +; BDVER2-NEXT: fidivs (%ecx) # sched: [14:9.50] +; BDVER2-NEXT: fidivl (%eax) # sched: [14:9.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fdivp_fidiv: ; BTVER2: # %bb.0: @@ -1872,12 +1872,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fdivr %st(0), %st(1) # sched: [14:14.00] -; BDVER2-NEXT: fdivr %st(2) # sched: [14:14.00] -; BDVER2-NEXT: fdivrs (%ecx) # sched: [31:1.00] -; BDVER2-NEXT: fdivrl (%eax) # sched: [31:1.00] +; BDVER2-NEXT: fdivr %st(0), %st(1) # sched: [9:9.50] +; BDVER2-NEXT: fdivr %st(2) # sched: [9:9.50] +; BDVER2-NEXT: fdivrs (%ecx) # sched: [14:9.50] +; BDVER2-NEXT: fdivrl (%eax) # sched: [14:9.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fdivr: ; BTVER2: # %bb.0: @@ -2008,12 +2008,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fdivrp %st(1) # sched: [14:14.00] -; BDVER2-NEXT: fdivrp %st(2) # sched: [14:14.00] -; BDVER2-NEXT: fidivrs (%ecx) # sched: [34:1.00] -; BDVER2-NEXT: fidivrl (%eax) # sched: [34:1.00] +; BDVER2-NEXT: fdivrp %st(1) # sched: [9:9.50] +; BDVER2-NEXT: fdivrp %st(2) # sched: [9:9.50] +; BDVER2-NEXT: fidivrs (%ecx) # sched: [14:9.50] +; BDVER2-NEXT: fidivrl (%eax) # sched: [14:9.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fdivrp_fidivr: ; BTVER2: # %bb.0: @@ -2102,9 +2102,9 @@ ; BDVER2-LABEL: test_ffree: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: ffree %st(0) # sched: [1:1.00] +; BDVER2-NEXT: ffree %st(0) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_ffree: ; BTVER2: # %bb.0: @@ -2225,12 +2225,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: ficoms (%ecx) # sched: [11:2.00] -; BDVER2-NEXT: ficoml (%eax) # sched: [11:2.00] -; BDVER2-NEXT: ficomps (%ecx) # sched: [11:2.00] -; BDVER2-NEXT: ficompl (%eax) # sched: [11:2.00] +; BDVER2-NEXT: ficoms (%ecx) # sched: [6:1.00] +; BDVER2-NEXT: ficoml (%eax) # sched: [6:1.00] +; BDVER2-NEXT: ficomps (%ecx) # sched: [6:1.00] +; BDVER2-NEXT: ficompl (%eax) # sched: [6:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_ficom: ; BTVER2: # %bb.0: @@ -2362,11 +2362,11 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: filds (%edx) # sched: [10:1.00] -; BDVER2-NEXT: fildl (%ecx) # sched: [10:1.00] -; BDVER2-NEXT: fildll (%eax) # sched: [10:1.00] +; BDVER2-NEXT: filds (%edx) # sched: [5:0.50] +; BDVER2-NEXT: fildl (%ecx) # sched: [5:0.50] +; BDVER2-NEXT: fildll (%eax) # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fild: ; BTVER2: # %bb.0: @@ -2455,9 +2455,9 @@ ; BDVER2-LABEL: test_fincstp: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fincstp # sched: [1:1.00] +; BDVER2-NEXT: fincstp # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fincstp: ; BTVER2: # %bb.0: @@ -2544,10 +2544,10 @@ ; BDVER2-LABEL: test_finit: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: wait # sched: [100:0.33] -; BDVER2-NEXT: fninit # sched: [5:1.33] +; BDVER2-NEXT: wait # sched: [100:0.50] +; BDVER2-NEXT: fninit # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_finit: ; BTVER2: # %bb.0: @@ -2628,9 +2628,9 @@ ; BDVER2-LABEL: test_fninit: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fninit # sched: [5:1.33] +; BDVER2-NEXT: fninit # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fninit: ; BTVER2: # %bb.0: @@ -2792,16 +2792,16 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fists (%edx) # sched: [9:1.00] -; BDVER2-NEXT: fistl (%ecx) # sched: [9:1.00] -; BDVER2-NEXT: fistps (%edx) # sched: [9:1.00] -; BDVER2-NEXT: fistpl (%ecx) # sched: [9:1.00] -; BDVER2-NEXT: fistpll (%eax) # sched: [9:1.00] -; BDVER2-NEXT: fisttps (%edx) # sched: [5:1.00] -; BDVER2-NEXT: fisttpl (%ecx) # sched: [5:1.00] -; BDVER2-NEXT: fisttpll (%eax) # sched: [5:1.00] +; BDVER2-NEXT: fists (%edx) # sched: [1:0.50] +; BDVER2-NEXT: fistl (%ecx) # sched: [1:0.50] +; BDVER2-NEXT: fistps (%edx) # sched: [1:0.50] +; BDVER2-NEXT: fistpl (%ecx) # sched: [1:0.50] +; BDVER2-NEXT: fistpll (%eax) # sched: [1:0.50] +; BDVER2-NEXT: fisttps (%edx) # sched: [1:0.50] +; BDVER2-NEXT: fisttpl (%ecx) # sched: [1:0.50] +; BDVER2-NEXT: fisttpll (%eax) # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fist_fistp_fisttp: ; BTVER2: # %bb.0: @@ -2951,12 +2951,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fld %st(0) # sched: [1:1.00] -; BDVER2-NEXT: flds (%edx) # sched: [9:1.00] -; BDVER2-NEXT: fldl (%ecx) # sched: [9:1.00] -; BDVER2-NEXT: fldt (%eax) # sched: [9:1.00] +; BDVER2-NEXT: fld %st(0) # sched: [1:0.50] +; BDVER2-NEXT: flds (%edx) # sched: [5:0.50] +; BDVER2-NEXT: fldl (%ecx) # sched: [5:0.50] +; BDVER2-NEXT: fldt (%eax) # sched: [5:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fld: ; BTVER2: # %bb.0: @@ -3064,10 +3064,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fldcw (%eax) # sched: [8:2.00] -; BDVER2-NEXT: fldenv (%eax) # sched: [100:0.33] +; BDVER2-NEXT: fldcw (%eax) # sched: [5:0.50] +; BDVER2-NEXT: fldenv (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fldcw_fldenv: ; BTVER2: # %bb.0: @@ -3198,15 +3198,15 @@ ; BDVER2-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fld1 # sched: [1:1.00] -; BDVER2-NEXT: fldl2e # sched: [1:1.00] -; BDVER2-NEXT: fldl2t # sched: [1:1.00] -; BDVER2-NEXT: fldlg2 # sched: [1:1.00] -; BDVER2-NEXT: fldln2 # sched: [1:1.00] -; BDVER2-NEXT: fldpi # sched: [1:1.00] -; BDVER2-NEXT: fldz # sched: [1:1.00] +; BDVER2-NEXT: fld1 # sched: [3:1.00] +; BDVER2-NEXT: fldl2e # sched: [3:1.00] +; BDVER2-NEXT: fldl2t # sched: [3:1.00] +; BDVER2-NEXT: fldlg2 # sched: [3:1.00] +; BDVER2-NEXT: fldln2 # sched: [3:1.00] +; BDVER2-NEXT: fldpi # sched: [3:1.00] +; BDVER2-NEXT: fldz # sched: [3:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz: ; BTVER2: # %bb.0: @@ -3341,10 +3341,10 @@ ; BDVER2-NEXT: #APP ; BDVER2-NEXT: fmul %st(0), %st(1) # sched: [5:1.00] ; BDVER2-NEXT: fmul %st(2) # sched: [5:1.00] -; BDVER2-NEXT: fmuls (%ecx) # sched: [12:1.00] -; BDVER2-NEXT: fmull (%eax) # sched: [12:1.00] +; BDVER2-NEXT: fmuls (%ecx) # sched: [10:1.00] +; BDVER2-NEXT: fmull (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fmul: ; BTVER2: # %bb.0: @@ -3477,10 +3477,10 @@ ; BDVER2-NEXT: #APP ; BDVER2-NEXT: fmulp %st(1) # sched: [5:1.00] ; BDVER2-NEXT: fmulp %st(2) # sched: [5:1.00] -; BDVER2-NEXT: fimuls (%ecx) # sched: [15:1.00] -; BDVER2-NEXT: fimull (%eax) # sched: [15:1.00] +; BDVER2-NEXT: fimuls (%ecx) # sched: [10:1.00] +; BDVER2-NEXT: fimull (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fmulp_fimul: ; BTVER2: # %bb.0: @@ -3569,9 +3569,9 @@ ; BDVER2-LABEL: test_fnop: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fnop # sched: [1:1.00] +; BDVER2-NEXT: fnop # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fnop: ; BTVER2: # %bb.0: @@ -3650,9 +3650,9 @@ ; BDVER2-LABEL: test_fpatan: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fpatan # sched: [100:0.33] +; BDVER2-NEXT: fpatan # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fpatan: ; BTVER2: # %bb.0: @@ -3739,10 +3739,10 @@ ; BDVER2-LABEL: test_fprem_fprem1: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fprem # sched: [100:0.33] -; BDVER2-NEXT: fprem1 # sched: [100:0.33] +; BDVER2-NEXT: fprem # sched: [100:0.50] +; BDVER2-NEXT: fprem1 # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fprem_fprem1: ; BTVER2: # %bb.0: @@ -3823,9 +3823,9 @@ ; BDVER2-LABEL: test_fptan: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fptan # sched: [100:0.33] +; BDVER2-NEXT: fptan # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fptan: ; BTVER2: # %bb.0: @@ -3904,9 +3904,9 @@ ; BDVER2-LABEL: test_frndint: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: frndint # sched: [100:0.33] +; BDVER2-NEXT: frndint # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_frndint: ; BTVER2: # %bb.0: @@ -3994,9 +3994,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: frstor (%eax) # sched: [100:0.33] +; BDVER2-NEXT: frstor (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_frstor: ; BTVER2: # %bb.0: @@ -4094,10 +4094,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: wait # sched: [100:0.33] -; BDVER2-NEXT: fnsave (%eax) # sched: [100:0.33] +; BDVER2-NEXT: wait # sched: [100:0.50] +; BDVER2-NEXT: fnsave (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsave: ; BTVER2: # %bb.0: @@ -4189,9 +4189,9 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fnsave (%eax) # sched: [100:0.33] +; BDVER2-NEXT: fnsave (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fnsave: ; BTVER2: # %bb.0: @@ -4272,9 +4272,9 @@ ; BDVER2-LABEL: test_fscale: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fscale # sched: [100:0.33] +; BDVER2-NEXT: fscale # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fscale: ; BTVER2: # %bb.0: @@ -4353,9 +4353,9 @@ ; BDVER2-LABEL: test_fsin: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fsin # sched: [100:0.33] +; BDVER2-NEXT: fsin # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsin: ; BTVER2: # %bb.0: @@ -4434,9 +4434,9 @@ ; BDVER2-LABEL: test_fsincos: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fsincos # sched: [100:0.33] +; BDVER2-NEXT: fsincos # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsincos: ; BTVER2: # %bb.0: @@ -4515,9 +4515,9 @@ ; BDVER2-LABEL: test_fsqrt: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fsqrt # sched: [24:24.00] +; BDVER2-NEXT: fsqrt # sched: [1:17.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsqrt: ; BTVER2: # %bb.0: @@ -4671,15 +4671,15 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fst %st(0) # sched: [1:1.00] -; BDVER2-NEXT: fsts (%edx) # sched: [6:1.00] -; BDVER2-NEXT: fstl (%ecx) # sched: [6:1.00] -; BDVER2-NEXT: fstp %st(0) # sched: [1:1.00] -; BDVER2-NEXT: fstpl (%edx) # sched: [6:1.00] -; BDVER2-NEXT: fstpl (%ecx) # sched: [6:1.00] -; BDVER2-NEXT: fstpt (%eax) # sched: [6:1.00] +; BDVER2-NEXT: fst %st(0) # sched: [1:0.50] +; BDVER2-NEXT: fsts (%edx) # sched: [1:0.50] +; BDVER2-NEXT: fstl (%ecx) # sched: [1:0.50] +; BDVER2-NEXT: fstp %st(0) # sched: [1:0.50] +; BDVER2-NEXT: fstpl (%edx) # sched: [1:0.50] +; BDVER2-NEXT: fstpl (%ecx) # sched: [1:0.50] +; BDVER2-NEXT: fstpt (%eax) # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fst_fstp: ; BTVER2: # %bb.0: @@ -4825,14 +4825,14 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: wait # sched: [100:0.33] -; BDVER2-NEXT: fnstcw (%eax) # sched: [7:1.00] -; BDVER2-NEXT: wait # sched: [100:0.33] -; BDVER2-NEXT: fnstenv (%eax) # sched: [100:0.33] -; BDVER2-NEXT: wait # sched: [100:0.33] -; BDVER2-NEXT: fnstsw (%eax) # sched: [7:1.00] +; BDVER2-NEXT: wait # sched: [100:0.50] +; BDVER2-NEXT: fnstcw (%eax) # sched: [1:0.50] +; BDVER2-NEXT: wait # sched: [100:0.50] +; BDVER2-NEXT: fnstenv (%eax) # sched: [100:0.50] +; BDVER2-NEXT: wait # sched: [100:0.50] +; BDVER2-NEXT: fnstsw (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fstcw_fstenv_fstsw: ; BTVER2: # %bb.0: @@ -4948,11 +4948,11 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fnstcw (%eax) # sched: [7:1.00] -; BDVER2-NEXT: fnstenv (%eax) # sched: [100:0.33] -; BDVER2-NEXT: fnstsw (%eax) # sched: [7:1.00] +; BDVER2-NEXT: fnstcw (%eax) # sched: [1:0.50] +; BDVER2-NEXT: fnstenv (%eax) # sched: [100:0.50] +; BDVER2-NEXT: fnstsw (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fnstcw_fnstenv_fnstsw: ; BTVER2: # %bb.0: @@ -5079,12 +5079,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fsub %st(0), %st(1) # sched: [3:1.00] -; BDVER2-NEXT: fsub %st(2) # sched: [3:1.00] +; BDVER2-NEXT: fsub %st(0), %st(1) # sched: [5:1.00] +; BDVER2-NEXT: fsub %st(2) # sched: [5:1.00] ; BDVER2-NEXT: fsubs (%ecx) # sched: [10:1.00] ; BDVER2-NEXT: fsubl (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsub: ; BTVER2: # %bb.0: @@ -5215,12 +5215,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fsubp %st(1) # sched: [3:1.00] -; BDVER2-NEXT: fsubp %st(2) # sched: [3:1.00] -; BDVER2-NEXT: fisubs (%ecx) # sched: [13:2.00] -; BDVER2-NEXT: fisubl (%eax) # sched: [13:2.00] +; BDVER2-NEXT: fsubp %st(1) # sched: [5:1.00] +; BDVER2-NEXT: fsubp %st(2) # sched: [5:1.00] +; BDVER2-NEXT: fisubs (%ecx) # sched: [10:1.00] +; BDVER2-NEXT: fisubl (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsubp_fisub: ; BTVER2: # %bb.0: @@ -5351,12 +5351,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fsubr %st(0), %st(1) # sched: [3:1.00] -; BDVER2-NEXT: fsubr %st(2) # sched: [3:1.00] +; BDVER2-NEXT: fsubr %st(0), %st(1) # sched: [5:1.00] +; BDVER2-NEXT: fsubr %st(2) # sched: [5:1.00] ; BDVER2-NEXT: fsubrs (%ecx) # sched: [10:1.00] ; BDVER2-NEXT: fsubrl (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsubr: ; BTVER2: # %bb.0: @@ -5487,12 +5487,12 @@ ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fsubrp %st(1) # sched: [3:1.00] -; BDVER2-NEXT: fsubrp %st(2) # sched: [3:1.00] -; BDVER2-NEXT: fisubrs (%ecx) # sched: [13:2.00] -; BDVER2-NEXT: fisubrl (%eax) # sched: [13:2.00] +; BDVER2-NEXT: fsubrp %st(1) # sched: [5:1.00] +; BDVER2-NEXT: fsubrp %st(2) # sched: [5:1.00] +; BDVER2-NEXT: fisubrs (%ecx) # sched: [10:1.00] +; BDVER2-NEXT: fisubrl (%eax) # sched: [10:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fsubrp_fisubr: ; BTVER2: # %bb.0: @@ -5581,9 +5581,9 @@ ; BDVER2-LABEL: test_ftst: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: ftst # sched: [3:1.00] +; BDVER2-NEXT: ftst # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_ftst: ; BTVER2: # %bb.0: @@ -5698,9 +5698,9 @@ ; BDVER2-NEXT: fucom %st(3) # sched: [1:1.00] ; BDVER2-NEXT: fucomp %st(1) # sched: [1:1.00] ; BDVER2-NEXT: fucomp %st(3) # sched: [1:1.00] -; BDVER2-NEXT: fucompp # sched: [3:1.00] +; BDVER2-NEXT: fucompp # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fucom_fucomp_fucompp: ; BTVER2: # %bb.0: @@ -5795,10 +5795,10 @@ ; BDVER2-LABEL: test_fucomi_fucomip: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fucomi %st(3) # sched: [3:1.00] -; BDVER2-NEXT: fucompi %st(3) # sched: [3:1.00] +; BDVER2-NEXT: fucomi %st(3) # sched: [1:1.00] +; BDVER2-NEXT: fucompi %st(3) # sched: [1:1.00] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fucomi_fucomip: ; BTVER2: # %bb.0: @@ -5879,9 +5879,9 @@ ; BDVER2-LABEL: test_fwait: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: wait # sched: [100:0.33] +; BDVER2-NEXT: wait # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fwait: ; BTVER2: # %bb.0: @@ -5960,9 +5960,9 @@ ; BDVER2-LABEL: test_fxam: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fxam # sched: [100:0.33] +; BDVER2-NEXT: fxam # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fxam: ; BTVER2: # %bb.0: @@ -6049,10 +6049,10 @@ ; BDVER2-LABEL: test_fxch: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fxch %st(1) # sched: [1:0.33] -; BDVER2-NEXT: fxch %st(3) # sched: [1:0.33] +; BDVER2-NEXT: fxch %st(1) # sched: [1:0.50] +; BDVER2-NEXT: fxch %st(3) # sched: [1:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fxch: ; BTVER2: # %bb.0: @@ -6150,10 +6150,10 @@ ; BDVER2: # %bb.0: ; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50] ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fxrstor (%eax) # sched: [5:2.00] -; BDVER2-NEXT: fxsave (%eax) # sched: [100:0.33] +; BDVER2-NEXT: fxrstor (%eax) # sched: [100:0.50] +; BDVER2-NEXT: fxsave (%eax) # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fxrstor_fxsave: ; BTVER2: # %bb.0: @@ -6236,9 +6236,9 @@ ; BDVER2-LABEL: test_fxtract: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fxtract # sched: [100:0.33] +; BDVER2-NEXT: fxtract # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fxtract: ; BTVER2: # %bb.0: @@ -6317,9 +6317,9 @@ ; BDVER2-LABEL: test_fyl2x: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fyl2x # sched: [100:0.33] +; BDVER2-NEXT: fyl2x # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fyl2x: ; BTVER2: # %bb.0: @@ -6398,9 +6398,9 @@ ; BDVER2-LABEL: test_fyl2xp1: ; BDVER2: # %bb.0: ; BDVER2-NEXT: #APP -; BDVER2-NEXT: fyl2xp1 # sched: [100:0.33] +; BDVER2-NEXT: fyl2xp1 # sched: [100:0.50] ; BDVER2-NEXT: #NO_APP -; BDVER2-NEXT: retl # sched: [6:1.00] +; BDVER2-NEXT: retl # sched: [5:1.00] ; ; BTVER2-LABEL: test_fyl2xp1: ; BTVER2: # %bb.0: Index: llvm/trunk/test/CodeGen/X86/xop-schedule.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/xop-schedule.ll +++ llvm/trunk/test/CodeGen/X86/xop-schedule.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+xop | FileCheck %s --check-prefix=GENERIC -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+xop | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER1 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+xop | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER12 --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver3 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER4 @@ -20,13 +20,13 @@ ; BDVER12-LABEL: test_vfrczpd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vfrczpd %xmm0, %xmm0 # sched: [3:1.00] -; BDVER12-NEXT: vfrczpd %ymm1, %ymm1 # sched: [3:1.00] -; BDVER12-NEXT: vfrczpd (%rdi), %xmm0 # sched: [9:1.00] -; BDVER12-NEXT: vfrczpd (%rsi), %ymm1 # sched: [10:1.00] +; BDVER12-NEXT: vfrczpd %xmm0, %xmm0 # sched: [10:1.00] +; BDVER12-NEXT: vfrczpd %ymm1, %ymm1 # sched: [10:2.00] +; BDVER12-NEXT: vfrczpd (%rdi), %xmm0 # sched: [15:1.00] +; BDVER12-NEXT: vfrczpd (%rsi), %ymm1 # sched: [15:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vfrczpd: ; BDVER3: # %bb.0: @@ -68,13 +68,13 @@ ; BDVER12-LABEL: test_vfrczps: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vfrczps %xmm0, %xmm0 # sched: [3:1.00] -; BDVER12-NEXT: vfrczps %ymm1, %ymm1 # sched: [3:1.00] -; BDVER12-NEXT: vfrczps (%rdi), %xmm0 # sched: [9:1.00] -; BDVER12-NEXT: vfrczps (%rsi), %ymm1 # sched: [10:1.00] +; BDVER12-NEXT: vfrczps %xmm0, %xmm0 # sched: [10:1.00] +; BDVER12-NEXT: vfrczps %ymm1, %ymm1 # sched: [10:2.00] +; BDVER12-NEXT: vfrczps (%rdi), %xmm0 # sched: [15:1.00] +; BDVER12-NEXT: vfrczps (%rsi), %ymm1 # sched: [15:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vfrczps: ; BDVER3: # %bb.0: @@ -113,10 +113,10 @@ ; BDVER12-LABEL: test_vfrczsd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vfrczsd %xmm0, %xmm0 # sched: [3:1.00] -; BDVER12-NEXT: vfrczsd (%rdi), %xmm0 # sched: [9:1.00] +; BDVER12-NEXT: vfrczsd %xmm0, %xmm0 # sched: [10:1.00] +; BDVER12-NEXT: vfrczsd (%rdi), %xmm0 # sched: [15:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vfrczsd: ; BDVER3: # %bb.0: @@ -149,10 +149,10 @@ ; BDVER12-LABEL: test_vfrczss: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vfrczss %xmm0, %xmm0 # sched: [3:1.00] -; BDVER12-NEXT: vfrczss (%rdi), %xmm0 # sched: [9:1.00] +; BDVER12-NEXT: vfrczss %xmm0, %xmm0 # sched: [10:1.00] +; BDVER12-NEXT: vfrczss (%rdi), %xmm0 # sched: [15:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vfrczss: ; BDVER3: # %bb.0: @@ -186,11 +186,11 @@ ; BDVER12-LABEL: test_vpcmov_128: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER12-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER12-NEXT: vpcmov (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: vpcmov %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpcmov_128: ; BDVER3: # %bb.0: @@ -227,12 +227,12 @@ ; BDVER12-LABEL: test_vpcmov_256: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER12-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:1.00] -; BDVER12-NEXT: vpcmov %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:1.00] +; BDVER12-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:0.50] +; BDVER12-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0 # sched: [7:1.00] +; BDVER12-NEXT: vpcmov %ymm2, (%rdi), %ymm0, %ymm0 # sched: [7:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpcmov_256: ; BDVER3: # %bb.0: @@ -275,16 +275,16 @@ ; BDVER12-LABEL: test_vpcom: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpcomb $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER12-NEXT: vpcomd $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER12-NEXT: vpcomq $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER12-NEXT: vpcomw $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER12-NEXT: vpcomb $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vpcomd $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vpcomq $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vpcomw $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER12-NEXT: vpcomb $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: vpcomd $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: vpcomq $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: vpcomw $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpcom: ; BDVER3: # %bb.0: @@ -335,16 +335,16 @@ ; BDVER12-LABEL: test_vpcomu: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpcomub $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER12-NEXT: vpcomud $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER12-NEXT: vpcomuq $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER12-NEXT: vpcomuw $3, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] +; BDVER12-NEXT: vpcomub $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vpcomud $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vpcomuq $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vpcomuw $3, %xmm1, %xmm0, %xmm0 # sched: [2:0.50] ; BDVER12-NEXT: vpcomub $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: vpcomud $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: vpcomuq $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: vpcomuw $3, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpcomu: ; BDVER3: # %bb.0: @@ -390,11 +390,11 @@ ; BDVER12-LABEL: test_vpermil2pd_128: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpermil2pd $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpermil2pd $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpermil2pd $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:1.00] +; BDVER12-NEXT: vpermil2pd $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [3:2.00] +; BDVER12-NEXT: vpermil2pd $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00] +; BDVER12-NEXT: vpermil2pd $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [8:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpermil2pd_128: ; BDVER3: # %bb.0: @@ -431,12 +431,12 @@ ; BDVER12-LABEL: test_vpermil2pd_256: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpermil2pd $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER12-NEXT: vpermil2pd $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER12-NEXT: vpermil2pd $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:1.00] +; BDVER12-NEXT: vpermil2pd $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [3:3.00] +; BDVER12-NEXT: vpermil2pd $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:3.00] +; BDVER12-NEXT: vpermil2pd $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:3.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpermil2pd_256: ; BDVER3: # %bb.0: @@ -474,11 +474,11 @@ ; BDVER12-LABEL: test_vpermil2ps_128: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpermil2ps $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpermil2ps $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:1.00] +; BDVER12-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0 # sched: [3:2.00] +; BDVER12-NEXT: vpermil2ps $3, %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00] +; BDVER12-NEXT: vpermil2ps $3, (%rdi), %xmm1, %xmm0, %xmm0 # sched: [8:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpermil2ps_128: ; BDVER3: # %bb.0: @@ -515,12 +515,12 @@ ; BDVER12-LABEL: test_vpermil2ps_256: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpermil2ps $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [1:1.00] -; BDVER12-NEXT: vpermil2ps $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:1.00] -; BDVER12-NEXT: vpermil2ps $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:1.00] +; BDVER12-NEXT: vpermil2ps $3, %ymm2, %ymm1, %ymm0, %ymm0 # sched: [3:3.00] +; BDVER12-NEXT: vpermil2ps $3, %ymm2, (%rdi), %ymm0, %ymm0 # sched: [8:3.00] +; BDVER12-NEXT: vpermil2ps $3, (%rdi), %ymm1, %ymm0, %ymm0 # sched: [8:3.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: vzeroupper # sched: [100:0.33] -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: vzeroupper # sched: [46:4.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpermil2ps_256: ; BDVER3: # %bb.0: @@ -557,10 +557,10 @@ ; BDVER12-LABEL: test_vphaddbd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddbd %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddbd (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddbd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddbd (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddbd: ; BDVER3: # %bb.0: @@ -593,10 +593,10 @@ ; BDVER12-LABEL: test_vphaddbq: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddbq %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddbq (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddbq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddbq (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddbq: ; BDVER3: # %bb.0: @@ -629,10 +629,10 @@ ; BDVER12-LABEL: test_vphaddbw: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddbw %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddbw (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddbw %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddbw (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddbw: ; BDVER3: # %bb.0: @@ -665,10 +665,10 @@ ; BDVER12-LABEL: test_vphadddq: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphadddq %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphadddq (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphadddq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphadddq (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphadddq: ; BDVER3: # %bb.0: @@ -701,10 +701,10 @@ ; BDVER12-LABEL: test_vphaddubd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddubd %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddubd (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddubd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddubd (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddubd: ; BDVER3: # %bb.0: @@ -737,10 +737,10 @@ ; BDVER12-LABEL: test_vphaddubq: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddubq %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddubq (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddubq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddubq (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddubq: ; BDVER3: # %bb.0: @@ -773,10 +773,10 @@ ; BDVER12-LABEL: test_vphaddubw: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddubw %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddubw (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddubw %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddubw (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddubw: ; BDVER3: # %bb.0: @@ -809,10 +809,10 @@ ; BDVER12-LABEL: test_vphaddudq: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddudq %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddudq (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddudq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddudq (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddudq: ; BDVER3: # %bb.0: @@ -845,10 +845,10 @@ ; BDVER12-LABEL: test_vphadduwd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphadduwd %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphadduwd (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphadduwd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphadduwd (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphadduwd: ; BDVER3: # %bb.0: @@ -881,10 +881,10 @@ ; BDVER12-LABEL: test_vphadduwq: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphadduwq %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphadduwq (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphadduwq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphadduwq (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphadduwq: ; BDVER3: # %bb.0: @@ -917,10 +917,10 @@ ; BDVER12-LABEL: test_vphaddwd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddwd %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddwd (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddwd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddwd (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddwd: ; BDVER3: # %bb.0: @@ -953,10 +953,10 @@ ; BDVER12-LABEL: test_vphaddwq: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphaddwq %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphaddwq (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphaddwq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphaddwq (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphaddwq: ; BDVER3: # %bb.0: @@ -989,10 +989,10 @@ ; BDVER12-LABEL: test_vphsubbw: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphsubbw %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphsubbw (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphsubbw %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphsubbw (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphsubbw: ; BDVER3: # %bb.0: @@ -1025,10 +1025,10 @@ ; BDVER12-LABEL: test_vphsubdq: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphsubdq %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphsubdq (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphsubdq %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphsubdq (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphsubdq: ; BDVER3: # %bb.0: @@ -1061,10 +1061,10 @@ ; BDVER12-LABEL: test_vphsubwd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vphsubwd %xmm0, %xmm0 # sched: [3:1.50] -; BDVER12-NEXT: vphsubwd (%rdi), %xmm0 # sched: [9:1.50] +; BDVER12-NEXT: vphsubwd %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vphsubwd (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vphsubwd: ; BDVER3: # %bb.0: @@ -1097,10 +1097,10 @@ ; BDVER12-LABEL: test_vpmacsdd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacsdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:2.00] +; BDVER12-NEXT: vpmacsdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacsdd: ; BDVER3: # %bb.0: @@ -1133,10 +1133,10 @@ ; BDVER12-LABEL: test_vpmacsdqh: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacsdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00] +; BDVER12-NEXT: vpmacsdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacsdqh: ; BDVER3: # %bb.0: @@ -1169,10 +1169,10 @@ ; BDVER12-LABEL: test_vpmacsdql: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacsdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00] +; BDVER12-NEXT: vpmacsdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacsdql: ; BDVER3: # %bb.0: @@ -1205,10 +1205,10 @@ ; BDVER12-LABEL: test_vpmacssdd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacssdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:2.00] +; BDVER12-NEXT: vpmacssdd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacssdd: ; BDVER3: # %bb.0: @@ -1241,10 +1241,10 @@ ; BDVER12-LABEL: test_vpmacssdqh: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacssdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00] +; BDVER12-NEXT: vpmacssdqh %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacssdqh: ; BDVER3: # %bb.0: @@ -1277,10 +1277,10 @@ ; BDVER12-LABEL: test_vpmacssdql: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacssdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:2.00] +; BDVER12-NEXT: vpmacssdql %xmm2, (%rdi), %xmm0, %xmm0 # sched: [10:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacssdql: ; BDVER3: # %bb.0: @@ -1313,10 +1313,10 @@ ; BDVER12-LABEL: test_vpmacsswd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER12-NEXT: vpmacsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacsswd: ; BDVER3: # %bb.0: @@ -1349,10 +1349,10 @@ ; BDVER12-LABEL: test_vpmacssww: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacssww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER12-NEXT: vpmacssww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacssww: ; BDVER3: # %bb.0: @@ -1385,10 +1385,10 @@ ; BDVER12-LABEL: test_vpmacswd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER12-NEXT: vpmacswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacswd: ; BDVER3: # %bb.0: @@ -1421,10 +1421,10 @@ ; BDVER12-LABEL: test_vpmacsww: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmacsww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER12-NEXT: vpmacsww %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmacsww: ; BDVER3: # %bb.0: @@ -1457,10 +1457,10 @@ ; BDVER12-LABEL: test_vpmadcsswd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmadcsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER12-NEXT: vpmadcsswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmadcsswd: ; BDVER3: # %bb.0: @@ -1493,10 +1493,10 @@ ; BDVER12-LABEL: test_vpmadcswd: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; BDVER12-NEXT: vpmadcswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [11:1.00] +; BDVER12-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0 # sched: [4:1.00] +; BDVER12-NEXT: vpmadcswd %xmm2, (%rdi), %xmm0, %xmm0 # sched: [9:1.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpmadcswd: ; BDVER3: # %bb.0: @@ -1530,11 +1530,11 @@ ; BDVER12-LABEL: test_vpperm: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0 # sched: [1:0.50] -; BDVER12-NEXT: vpperm (%rdi), %xmm1, %xmm0, %xmm0 # sched: [7:0.50] -; BDVER12-NEXT: vpperm %xmm2, (%rdi), %xmm0, %xmm0 # sched: [7:0.50] +; BDVER12-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0 # sched: [3:2.00] +; BDVER12-NEXT: vpperm (%rdi), %xmm1, %xmm0, %xmm0 # sched: [8:2.00] +; BDVER12-NEXT: vpperm %xmm2, (%rdi), %xmm0, %xmm0 # sched: [8:2.00] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpperm: ; BDVER3: # %bb.0: @@ -1587,28 +1587,28 @@ ; BDVER12-LABEL: test_vprot: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vprotb %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotd %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotq %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotw %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotb (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotd (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotq (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotw (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotb %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotd %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotq %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotw %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotb $7, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotd $7, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotq $7, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotw $7, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vprotb $7, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotd $7, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotq $7, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vprotw $7, (%rdi), %xmm0 # sched: [7:1.00] +; BDVER12-NEXT: vprotb %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vprotd %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vprotq %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vprotw %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vprotb (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotd (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotq (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotw (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotb %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotd %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotq %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotw %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vprotb $7, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vprotd $7, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vprotq $7, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vprotw $7, %xmm0, %xmm0 # sched: [2:0.50] +; BDVER12-NEXT: vprotb $7, (%rdi), %xmm0 # sched: [7:0.50] +; BDVER12-NEXT: vprotd $7, (%rdi), %xmm0 # sched: [7:0.50] +; BDVER12-NEXT: vprotq $7, (%rdi), %xmm0 # sched: [7:0.50] +; BDVER12-NEXT: vprotw $7, (%rdi), %xmm0 # sched: [7:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vprot: ; BDVER3: # %bb.0: @@ -1687,20 +1687,20 @@ ; BDVER12-LABEL: test_vpsha: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpshab %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshad %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshaq %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshaw %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshab (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshad (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshaq (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshaw (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshab %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshad %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshaq %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshaw %xmm0, (%rdi), %xmm0 # sched: [7:1.00] +; BDVER12-NEXT: vpshab %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshad %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshaq %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshaw %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshab (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshad (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshaq (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshaw (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshab %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshad %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshaq %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshaw %xmm0, (%rdi), %xmm0 # sched: [8:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpsha: ; BDVER3: # %bb.0: @@ -1763,20 +1763,20 @@ ; BDVER12-LABEL: test_vpshl: ; BDVER12: # %bb.0: ; BDVER12-NEXT: #APP -; BDVER12-NEXT: vpshlb %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshld %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshlq %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshlw %xmm1, %xmm0, %xmm0 # sched: [1:1.00] -; BDVER12-NEXT: vpshlb (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshld (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshlq (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshlw (%rdi), %xmm0, %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshlb %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshld %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshlq %xmm0, (%rdi), %xmm0 # sched: [7:1.00] -; BDVER12-NEXT: vpshlw %xmm0, (%rdi), %xmm0 # sched: [7:1.00] +; BDVER12-NEXT: vpshlb %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshld %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshlq %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshlw %xmm1, %xmm0, %xmm0 # sched: [3:0.50] +; BDVER12-NEXT: vpshlb (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshld (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshlq (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshlw (%rdi), %xmm0, %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshlb %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshld %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshlq %xmm0, (%rdi), %xmm0 # sched: [8:0.50] +; BDVER12-NEXT: vpshlw %xmm0, (%rdi), %xmm0 # sched: [8:0.50] ; BDVER12-NEXT: #NO_APP -; BDVER12-NEXT: retq # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [5:1.00] ; ; BDVER3-LABEL: test_vpshl: ; BDVER3: # %bb.0: Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/add-sequence.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/add-sequence.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/add-sequence.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1000 -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1000 -timeline < %s | FileCheck %s add %eax, %ecx add %esi, %eax @@ -7,13 +7,13 @@ # CHECK: Iterations: 1000 # CHECK-NEXT: Instructions: 3000 -# CHECK-NEXT: Total Cycles: 1004 +# CHECK-NEXT: Total Cycles: 1504 # CHECK-NEXT: Total uOps: 3000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 2.99 -# CHECK-NEXT: IPC: 2.99 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.99 +# CHECK-NEXT: IPC: 1.99 +# CHECK-NEXT: Block RThroughput: 1.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -24,64 +24,76 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 addl %eax, %ecx -# CHECK-NEXT: 1 1 0.33 addl %esi, %eax -# CHECK-NEXT: 1 1 0.33 addl %eax, %edx +# CHECK-NEXT: 1 1 0.50 addl %eax, %ecx +# CHECK-NEXT: 1 1 0.50 addl %esi, %eax +# CHECK-NEXT: 1 1 0.50 addl %eax, %edx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - addl %eax, %ecx -# CHECK-NEXT: - - - - - 1.00 - - addl %esi, %eax -# CHECK-NEXT: - - 1.00 - - - - - addl %eax, %edx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl %esi, %eax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl %eax, %edx # CHECK: Timeline view: -# CHECK-NEXT: 0123 +# CHECK-NEXT: 01234567 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER . . . addl %eax, %ecx -# CHECK-NEXT: [0,1] DeER . . . addl %esi, %eax -# CHECK-NEXT: [0,2] D=eER. . . addl %eax, %edx -# CHECK-NEXT: [1,0] D=eER. . . addl %eax, %ecx -# CHECK-NEXT: [1,1] .DeER. . . addl %esi, %eax -# CHECK-NEXT: [1,2] .D=eER . . addl %eax, %edx -# CHECK-NEXT: [2,0] .D=eER . . addl %eax, %ecx -# CHECK-NEXT: [2,1] .D=eER . . addl %esi, %eax -# CHECK-NEXT: [2,2] . D=eER . . addl %eax, %edx -# CHECK-NEXT: [3,0] . D=eER . . addl %eax, %ecx -# CHECK-NEXT: [3,1] . D=eER . . addl %esi, %eax -# CHECK-NEXT: [3,2] . D==eER . . addl %eax, %edx -# CHECK-NEXT: [4,0] . D=eER . . addl %eax, %ecx -# CHECK-NEXT: [4,1] . D=eER . . addl %esi, %eax -# CHECK-NEXT: [4,2] . D==eER . . addl %eax, %edx -# CHECK-NEXT: [5,0] . D==eER . . addl %eax, %ecx -# CHECK-NEXT: [5,1] . D=eER . . addl %esi, %eax -# CHECK-NEXT: [5,2] . D==eER. . addl %eax, %edx -# CHECK-NEXT: [6,0] . D==eER. . addl %eax, %ecx -# CHECK-NEXT: [6,1] . D==eER. . addl %esi, %eax -# CHECK-NEXT: [6,2] . D==eER . addl %eax, %edx -# CHECK-NEXT: [7,0] . D==eER . addl %eax, %ecx -# CHECK-NEXT: [7,1] . D==eER . addl %esi, %eax -# CHECK-NEXT: [7,2] . D===eER . addl %eax, %edx -# CHECK-NEXT: [8,0] . .D==eER . addl %eax, %ecx -# CHECK-NEXT: [8,1] . .D==eER . addl %esi, %eax -# CHECK-NEXT: [8,2] . .D===eER. addl %eax, %edx -# CHECK-NEXT: [9,0] . .D===eER. addl %eax, %ecx -# CHECK-NEXT: [9,1] . . D==eER. addl %esi, %eax -# CHECK-NEXT: [9,2] . . D===eER addl %eax, %edx +# CHECK: [0,0] DeER . . . . addl %eax, %ecx +# CHECK-NEXT: [0,1] DeER . . . . addl %esi, %eax +# CHECK-NEXT: [0,2] D=eER. . . . addl %eax, %edx +# CHECK-NEXT: [1,0] D==eER . . . addl %eax, %ecx +# CHECK-NEXT: [1,1] .DeE-R . . . addl %esi, %eax +# CHECK-NEXT: [1,2] .D=eER . . . addl %eax, %edx +# CHECK-NEXT: [2,0] .D==eER . . . addl %eax, %ecx +# CHECK-NEXT: [2,1] .D==eER . . . addl %esi, %eax +# CHECK-NEXT: [2,2] . D==eER . . . addl %eax, %edx +# CHECK-NEXT: [3,0] . D===eER . . . addl %eax, %ecx +# CHECK-NEXT: [3,1] . D==eE-R . . . addl %esi, %eax +# CHECK-NEXT: [3,2] . D===eER . . . addl %eax, %edx +# CHECK-NEXT: [4,0] . D===eER. . . addl %eax, %ecx +# CHECK-NEXT: [4,1] . D===eER. . . addl %esi, %eax +# CHECK-NEXT: [4,2] . D====eER . . addl %eax, %edx +# CHECK-NEXT: [5,0] . D=====eER . . addl %eax, %ecx +# CHECK-NEXT: [5,1] . D===eE-R . . addl %esi, %eax +# CHECK-NEXT: [5,2] . D====eER . . addl %eax, %edx +# CHECK-NEXT: [6,0] . D=====eER . . addl %eax, %ecx +# CHECK-NEXT: [6,1] . D=====eER . . addl %esi, %eax +# CHECK-NEXT: [6,2] . D=====eER . . addl %eax, %edx +# CHECK-NEXT: [7,0] . D======eER. . addl %eax, %ecx +# CHECK-NEXT: [7,1] . D=====eE-R. . addl %esi, %eax +# CHECK-NEXT: [7,2] . D======eER. . addl %eax, %edx +# CHECK-NEXT: [8,0] . .D======eER . addl %eax, %ecx +# CHECK-NEXT: [8,1] . .D======eER . addl %esi, %eax +# CHECK-NEXT: [8,2] . .D=======eER. addl %eax, %edx +# CHECK-NEXT: [9,0] . .D========eER addl %eax, %ecx +# CHECK-NEXT: [9,1] . . D======eE-R addl %esi, %eax +# CHECK-NEXT: [9,2] . . D=======eER addl %eax, %edx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -90,6 +102,6 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 10 2.5 0.1 0.0 addl %eax, %ecx -# CHECK-NEXT: 1. 10 2.2 0.1 0.0 addl %esi, %eax -# CHECK-NEXT: 2. 10 3.0 0.0 0.0 addl %eax, %edx +# CHECK-NEXT: 0. 10 5.0 0.6 0.0 addl %eax, %ecx +# CHECK-NEXT: 1. 10 4.2 0.5 0.5 addl %esi, %eax +# CHECK-NEXT: 2. 10 5.0 0.0 0.0 addl %eax, %edx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/clear-super-register-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/clear-super-register-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/clear-super-register-1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=100 -resource-pressure=false -timeline -timeline-max-iterations=2 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=100 -resource-pressure=false -timeline -timeline-max-iterations=2 < %s | FileCheck %s ## Sets register RAX. imulq $5, %rcx, %rax @@ -15,13 +15,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 400 -# CHECK-NEXT: Total Cycles: 803 -# CHECK-NEXT: Total uOps: 400 +# CHECK-NEXT: Total Cycles: 702 +# CHECK-NEXT: Total uOps: 1000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.50 -# CHECK-NEXT: IPC: 0.50 -# CHECK-NEXT: Block RThroughput: 3.0 +# CHECK-NEXT: uOps Per Cycle: 1.42 +# CHECK-NEXT: IPC: 0.57 +# CHECK-NEXT: Block RThroughput: 4.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -32,23 +32,23 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 imulq $5, %rcx, %rax -# CHECK-NEXT: 1 3 1.00 lzcntl %ecx, %eax -# CHECK-NEXT: 1 1 0.33 andq %rcx, %rax -# CHECK-NEXT: 1 3 1.00 bsfq %rax, %rcx +# CHECK-NEXT: 1 6 4.00 imulq $5, %rcx, %rax +# CHECK-NEXT: 2 2 0.50 lzcntl %ecx, %eax +# CHECK-NEXT: 1 1 0.50 andq %rcx, %rax +# CHECK-NEXT: 6 3 2.00 bsfq %rax, %rcx # CHECK: Timeline view: -# CHECK-NEXT: 012345678 +# CHECK-NEXT: 012345 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . . . imulq $5, %rcx, %rax -# CHECK-NEXT: [0,1] D=eeeER . . . lzcntl %ecx, %eax -# CHECK-NEXT: [0,2] D====eER . . . andq %rcx, %rax -# CHECK-NEXT: [0,3] D=====eeeER . . bsfq %rax, %rcx -# CHECK-NEXT: [1,0] .D=======eeeER . . imulq $5, %rcx, %rax -# CHECK-NEXT: [1,1] .D========eeeER. . lzcntl %ecx, %eax -# CHECK-NEXT: [1,2] .D===========eER . andq %rcx, %rax -# CHECK-NEXT: [1,3] .D============eeeER bsfq %rax, %rcx +# CHECK: [0,0] DeeeeeeER . . imulq $5, %rcx, %rax +# CHECK-NEXT: [0,1] DeeE----R . . lzcntl %ecx, %eax +# CHECK-NEXT: [0,2] D==eE---R . . andq %rcx, %rax +# CHECK-NEXT: [0,3] .D==eeeER . . bsfq %rax, %rcx +# CHECK-NEXT: [1,0] . D====eeeeeeER. imulq $5, %rcx, %rax +# CHECK-NEXT: [1,1] . D====eeE---R. lzcntl %ecx, %eax +# CHECK-NEXT: [1,2] . D======eE--R. andq %rcx, %rax +# CHECK-NEXT: [1,3] . D======eeeER bsfq %rax, %rcx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -57,7 +57,7 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 2 4.5 0.5 0.0 imulq $5, %rcx, %rax -# CHECK-NEXT: 1. 2 5.5 1.5 0.0 lzcntl %ecx, %eax -# CHECK-NEXT: 2. 2 8.5 0.0 0.0 andq %rcx, %rax -# CHECK-NEXT: 3. 2 9.5 0.0 0.0 bsfq %rax, %rcx +# CHECK-NEXT: 0. 2 3.0 0.5 0.0 imulq $5, %rcx, %rax +# CHECK-NEXT: 1. 2 3.0 1.0 3.5 lzcntl %ecx, %eax +# CHECK-NEXT: 2. 2 5.0 0.0 2.5 andq %rcx, %rax +# CHECK-NEXT: 3. 2 5.0 0.0 0.0 bsfq %rax, %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/clear-super-register-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/clear-super-register-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/clear-super-register-2.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=100 -resource-pressure=false -timeline -timeline-max-iterations=2 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=100 -resource-pressure=false -timeline -timeline-max-iterations=2 < %s | FileCheck %s # In this test, the VDIVPS takes 38 cycles to write to register YMM3. The first # VADDPS does not depend on the VDIVPS (the WAW dependency is eliminated at @@ -33,13 +33,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 1800 -# CHECK-NEXT: Total Cycles: 2804 -# CHECK-NEXT: Total uOps: 2000 +# CHECK-NEXT: Total Cycles: 4003 +# CHECK-NEXT: Total uOps: 3400 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.71 -# CHECK-NEXT: IPC: 0.64 -# CHECK-NEXT: Block RThroughput: 28.0 +# CHECK-NEXT: uOps Per Cycle: 0.85 +# CHECK-NEXT: IPC: 0.45 +# CHECK-NEXT: Block RThroughput: 31.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -50,65 +50,63 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 3 29 28.00 vdivps %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 1 1 1.00 vandps %xmm4, %xmm1, %xmm0 +# CHECK-NEXT: 2 9 19.00 vdivps %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 1 2 0.50 vandps %xmm4, %xmm1, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0123456789 0123456789 -# CHECK-NEXT: Index 0123456789 0123456789 0123456789 +# CHECK-NEXT: 0123456789 0123456789 0123456789 0123456789 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 -# CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . vdivps %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: [0,1] DeeeE--------------------------R . . . . . . vaddps %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: [0,2] .D==eeeE-----------------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,3] .D===eeeE----------------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,4] .D====eeeE---------------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,5] .D=====eeeE--------------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,6] . D=====eeeE-------------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,7] . D======eeeE------------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,8] . D=======eeeE-----------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,9] . D========eeeE----------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,10] . D========eeeE---------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,11] . D=========eeeE--------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,12] . D==========eeeE-------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,13] . D===========eeeE------------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,14] . D===========eeeE-----------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,15] . D============eeeE----------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,16] . D=============eeeE---------R . . . . . . vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [0,17] . D================eE--------R . . . . . . vandps %xmm4, %xmm1, %xmm0 -# CHECK-NEXT: [1,0] . D=======================eeeeeeeeeeeeeeeeeeeeeeeeeeeeeER vdivps %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: [1,1] . D================eeeE---------------------------------R vaddps %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: [1,2] . .D==================eeeE------------------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,3] . .D===================eeeE-----------------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,4] . .D====================eeeE----------------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,5] . .D=====================eeeE---------------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,6] . . D=====================eeeE--------------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,7] . . D======================eeeE-------------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,8] . . D=======================eeeE------------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,9] . . D========================eeeE-----------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,10] . . D========================eeeE----------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,11] . . D=========================eeeE---------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,12] . . D==========================eeeE--------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,13] . . D===========================eeeE-------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,14] . . D===========================eeeE------------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,15] . . D============================eeeE-----------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,16] . . D=============================eeeE----------------R vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: [1,17] . . D================================eE---------------R vandps %xmm4, %xmm1, %xmm0 +# CHECK: [0,0] DeeeeeeeeeER . . . . . . . . . . . . . . vdivps %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: [0,1] DeeeeeE----R . . . . . . . . . . . . . . vaddps %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: [0,2] .D====eeeeeER . . . . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,3] .D======eeeeeER. . . . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,4] . D=======eeeeeER . . . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,5] . D=========eeeeeER . . . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,6] . D==========eeeeeER . . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,7] . D============eeeeeER . . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,8] . D=============eeeeeER. . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,9] . D===============eeeeeER . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,10] . D================eeeeeER . . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,11] . D==================eeeeeER . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,12] . .D===================eeeeeER . . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,13] . .D=====================eeeeeER. . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,14] . . D======================eeeeeER . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,15] . . D========================eeeeeER . . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,16] . . D=========================eeeeeER . . . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [0,17] . . D==============================eeER . . . . . . . . vandps %xmm4, %xmm1, %xmm0 +# CHECK-NEXT: [1,0] . . D===============================eeeeeeeeeER . . . . . . vdivps %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: [1,1] . . D===============================eeeeeE----R . . . . . . vaddps %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: [1,2] . . D===================================eeeeeER . . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,3] . . D=====================================eeeeeER. . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,4] . . .D======================================eeeeeER . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,5] . . .D========================================eeeeeER . . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,6] . . . D=========================================eeeeeER . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,7] . . . D===========================================eeeeeER . . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,8] . . . D============================================eeeeeER. . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,9] . . . D==============================================eeeeeER . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,10] . . . D===============================================eeeeeER . . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,11] . . . D=================================================eeeeeER . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,12] . . . D==================================================eeeeeER . . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,13] . . . D====================================================eeeeeER. . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,14] . . . .D=====================================================eeeeeER . vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: [1,15] . . . .D=======================================================eeeeeER. vaddps %ymm3, %ymm1, %ymm4 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -117,21 +115,21 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 2 12.5 4.0 0.0 vdivps %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: 1. 2 9.0 0.5 29.5 vaddps %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2. 2 11.0 0.0 26.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 3. 2 12.0 1.0 25.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 4. 2 13.0 2.0 24.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 5. 2 14.0 3.0 23.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 6. 2 14.0 4.0 22.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 7. 2 15.0 5.0 21.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 8. 2 16.0 6.0 20.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 9. 2 17.0 7.0 19.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 10. 2 17.0 8.0 18.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 11. 2 18.0 9.0 17.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 12. 2 19.0 10.0 16.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 13. 2 20.0 11.0 15.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 14. 2 20.0 12.0 14.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 15. 2 21.0 13.0 13.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 16. 2 22.0 14.0 12.5 vaddps %ymm3, %ymm1, %ymm4 -# CHECK-NEXT: 17. 2 25.0 0.0 11.5 vandps %xmm4, %xmm1, %xmm0 +# CHECK-NEXT: 0. 2 16.5 0.5 0.0 vdivps %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 1. 2 16.5 0.5 4.0 vaddps %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2. 2 20.5 0.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 3. 2 22.5 2.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 4. 2 23.5 4.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 5. 2 25.5 6.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 6. 2 26.5 8.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 7. 2 28.5 10.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 8. 2 29.5 12.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 9. 2 31.5 14.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 10. 2 32.5 16.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 11. 2 34.5 18.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 12. 2 35.5 20.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 13. 2 37.5 22.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 14. 2 38.5 23.5 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 15. 2 40.5 25.5 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 16. 2 41.5 27.0 0.0 vaddps %ymm3, %ymm1, %ymm4 +# CHECK-NEXT: 17. 2 46.5 0.0 0.0 vandps %xmm4, %xmm1, %xmm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-cmp.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-cmp.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-cmp.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s # Perf stat reports an IPC of 1.97 for this block of code. @@ -11,13 +11,13 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 3000 -# CHECK-NEXT: Total Cycles: 4503 -# CHECK-NEXT: Total uOps: 4500 +# CHECK-NEXT: Total Cycles: 1504 +# CHECK-NEXT: Total uOps: 3000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.00 -# CHECK-NEXT: IPC: 0.67 -# CHECK-NEXT: Block RThroughput: 0.8 +# CHECK-NEXT: uOps Per Cycle: 1.99 +# CHECK-NEXT: IPC: 1.99 +# CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -28,38 +28,49 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 cmpl %eax, %eax -# CHECK-NEXT: 2 2 0.67 cmovael %ebx, %eax +# CHECK-NEXT: 1 1 0.50 cmpl %eax, %eax +# CHECK-NEXT: 1 1 0.50 cmovael %ebx, %eax # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - 1.00 - - cmpl %eax, %eax -# CHECK-NEXT: - - 1.00 1.00 - - - - cmovael %ebx, %eax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - cmpl %eax, %eax +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - cmovael %ebx, %eax # CHECK: Timeline view: -# CHECK-NEXT: 01 -# CHECK-NEXT: Index 0123456789 +# CHECK-NEXT: Index 0123456 -# CHECK: [0,0] DeER . .. cmpl %eax, %eax -# CHECK-NEXT: [0,1] D=eeER .. cmovael %ebx, %eax -# CHECK-NEXT: [1,0] D===eER .. cmpl %eax, %eax -# CHECK-NEXT: [1,1] .D===eeER .. cmovael %ebx, %eax -# CHECK-NEXT: [2,0] .D=====eER.. cmpl %eax, %eax -# CHECK-NEXT: [2,1] . D=====eeER cmovael %ebx, %eax +# CHECK: [0,0] DeER .. cmpl %eax, %eax +# CHECK-NEXT: [0,1] D=eER.. cmovael %ebx, %eax +# CHECK-NEXT: [1,0] DeE-R.. cmpl %eax, %eax +# CHECK-NEXT: [1,1] D==eER. cmovael %ebx, %eax +# CHECK-NEXT: [2,0] .DeE-R. cmpl %eax, %eax +# CHECK-NEXT: [2,1] .D==eER cmovael %ebx, %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -68,5 +79,5 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 3.7 0.3 0.0 cmpl %eax, %eax -# CHECK-NEXT: 1. 3 4.0 0.0 0.0 cmovael %ebx, %eax +# CHECK-NEXT: 0. 3 1.0 1.0 0.7 cmpl %eax, %eax +# CHECK-NEXT: 1. 3 2.7 0.0 0.0 cmovael %ebx, %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpeq.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpeq.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpeq.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s # perf stat reports an IPC of 2.00 for this block of code. @@ -14,12 +14,12 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 6000 -# CHECK-NEXT: Total Cycles: 6003 +# CHECK-NEXT: Total Cycles: 3005 # CHECK-NEXT: Total uOps: 6000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.00 -# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: uOps Per Cycle: 2.00 +# CHECK-NEXT: IPC: 2.00 # CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: @@ -31,48 +31,60 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.50 vpcmpeqb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: 1 1 0.50 vpcmpeqw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpeqd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcmpeqq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: 1 2 0.50 vpcmpeqb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: 1 2 0.50 vpcmpeqw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpeqd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcmpeqq %xmm3, %xmm3, %xmm0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 2.00 - 2.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 2.00 2.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - 1.00 - - vpcmpeqb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: - - - 1.00 - - - - vpcmpeqw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vpcmpeqd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: - - - 1.00 - - - - vpcmpeqq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 1.00 - - - - - vpcmpeqb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - 1.00 - - - - vpcmpeqw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - vpcmpeqd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - vpcmpeqq %xmm3, %xmm3, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 01234 +# CHECK-NEXT: 0 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER . . . vpcmpeqb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [0,1] D=eER. . . vpcmpeqw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [0,2] D==eER . . vpcmpeqd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [0,3] D===eER . . vpcmpeqq %xmm3, %xmm3, %xmm0 -# CHECK-NEXT: [1,0] .D===eER . . vpcmpeqb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [1,1] .D====eER . . vpcmpeqw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [1,2] .D=====eER. . vpcmpeqd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [1,3] .D======eER . vpcmpeqq %xmm3, %xmm3, %xmm0 -# CHECK-NEXT: [2,0] . D======eER . vpcmpeqb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [2,1] . D=======eER . vpcmpeqw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [2,2] . D========eER. vpcmpeqd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [2,3] . D=========eER vpcmpeqq %xmm3, %xmm3, %xmm0 +# CHECK: [0,0] DeeER. . vpcmpeqb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [0,1] D=eeER . vpcmpeqw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [0,2] DeeE-R . vpcmpeqd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [0,3] D==eeER . vpcmpeqq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: [1,0] .DeeE-R . vpcmpeqb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [1,1] .D==eeER . vpcmpeqw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [1,2] .D=eeE-R . vpcmpeqd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [1,3] .D===eeER . vpcmpeqq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: [2,0] . D=eeE-R . vpcmpeqb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [2,1] . D===eeER. vpcmpeqw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [2,2] . D==eeE-R. vpcmpeqd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [2,3] . D====eeER vpcmpeqq %xmm3, %xmm3, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -81,7 +93,7 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 4.0 0.3 0.0 vpcmpeqb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: 1. 3 5.0 0.0 0.0 vpcmpeqw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: 2. 3 6.0 0.0 0.0 vpcmpeqd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: 3. 3 7.0 0.0 0.0 vpcmpeqq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: 0. 3 1.3 1.3 0.7 vpcmpeqb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: 1. 3 3.0 3.0 0.0 vpcmpeqw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: 2. 3 2.0 2.0 1.0 vpcmpeqd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: 3. 3 4.0 0.0 0.0 vpcmpeqq %xmm3, %xmm3, %xmm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpgt.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpgt.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-pcmpgt.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s # perf stat reports an IPC of 2.00 for this block of code. @@ -15,12 +15,12 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 6000 -# CHECK-NEXT: Total Cycles: 1501 +# CHECK-NEXT: Total Cycles: 1504 # CHECK-NEXT: Total uOps: 6000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 4.00 -# CHECK-NEXT: IPC: 4.00 +# CHECK-NEXT: uOps Per Cycle: 3.99 +# CHECK-NEXT: IPC: 3.99 # CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Instruction Info: @@ -35,44 +35,56 @@ # CHECK-NEXT: 1 0 0.25 vpcmpgtb %xmm0, %xmm0, %xmm1 # CHECK-NEXT: 1 0 0.25 vpcmpgtw %xmm1, %xmm1, %xmm2 # CHECK-NEXT: 1 0 0.25 vpcmpgtd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: 1 0 0.25 vpcmpgtq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: 1 2 0.50 vpcmpgtq %xmm3, %xmm3, %xmm0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - - - - - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 0.50 0.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - - - vpcmpgtb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: - - - - - - - - vpcmpgtw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - - - - vpcmpgtd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: - - - - - - - - vpcmpgtq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 0.50 0.50 - - - - vpcmpgtq %xmm3, %xmm3, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: Index 0123 +# CHECK-NEXT: Index 0123456 -# CHECK: [0,0] DR . vpcmpgtb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [0,1] DR . vpcmpgtw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [0,2] DR . vpcmpgtd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [0,3] DR . vpcmpgtq %xmm3, %xmm3, %xmm0 -# CHECK-NEXT: [1,0] .DR. vpcmpgtb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [1,1] .DR. vpcmpgtw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [1,2] .DR. vpcmpgtd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [1,3] .DR. vpcmpgtq %xmm3, %xmm3, %xmm0 -# CHECK-NEXT: [2,0] . DR vpcmpgtb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [2,1] . DR vpcmpgtw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [2,2] . DR vpcmpgtd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [2,3] . DR vpcmpgtq %xmm3, %xmm3, %xmm0 +# CHECK: [0,0] DR .. vpcmpgtb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [0,1] DR .. vpcmpgtw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [0,2] DR .. vpcmpgtd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [0,3] DeeER.. vpcmpgtq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: [1,0] .D--R.. vpcmpgtb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [1,1] .D--R.. vpcmpgtw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [1,2] .D--R.. vpcmpgtd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [1,3] .DeeER. vpcmpgtq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: [2,0] . D--R. vpcmpgtb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [2,1] . D--R. vpcmpgtw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [2,2] . D--R. vpcmpgtd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [2,3] . DeeER vpcmpgtq %xmm3, %xmm3, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -81,7 +93,7 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 0.0 0.0 0.0 vpcmpgtb %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: 1. 3 0.0 0.0 0.0 vpcmpgtw %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: 2. 3 0.0 0.0 0.0 vpcmpgtd %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: 3. 3 0.0 0.0 0.0 vpcmpgtq %xmm3, %xmm3, %xmm0 +# CHECK-NEXT: 0. 3 0.0 0.0 1.3 vpcmpgtb %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: 1. 3 0.0 0.0 1.3 vpcmpgtw %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: 2. 3 0.0 0.0 1.3 vpcmpgtd %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: 3. 3 1.0 1.0 0.0 vpcmpgtq %xmm3, %xmm3, %xmm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s # perf stat reports an IPC of 1.00 for this code block. @@ -12,13 +12,13 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 3000 -# CHECK-NEXT: Total Cycles: 6003 -# CHECK-NEXT: Total uOps: 6000 +# CHECK-NEXT: Total Cycles: 3003 +# CHECK-NEXT: Total uOps: 3000 # CHECK: Dispatch Width: 4 # CHECK-NEXT: uOps Per Cycle: 1.00 -# CHECK-NEXT: IPC: 0.50 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -29,38 +29,49 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 2 2 0.67 sbbl %edx, %edx -# CHECK-NEXT: 2 2 0.67 sbbl %eax, %eax +# CHECK-NEXT: 1 1 1.00 sbbl %edx, %edx +# CHECK-NEXT: 1 1 1.00 sbbl %eax, %eax # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.33 1.33 - 1.33 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.67 0.67 - 0.67 - - sbbl %edx, %edx -# CHECK-NEXT: - - 0.67 0.67 - 0.67 - - sbbl %eax, %eax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - 2.00 - - - - - - - - - - - - - sbbl %edx, %edx +# CHECK-NEXT: - - - - - 2.00 - - - - - - - - - - - - - - sbbl %eax, %eax # CHECK: Timeline view: -# CHECK-NEXT: 01234 -# CHECK-NEXT: Index 0123456789 +# CHECK-NEXT: Index 012345678 -# CHECK: [0,0] DeeER. . . sbbl %edx, %edx -# CHECK-NEXT: [0,1] D==eeER . . sbbl %eax, %eax -# CHECK-NEXT: [1,0] .D===eeER . . sbbl %edx, %edx -# CHECK-NEXT: [1,1] .D=====eeER . sbbl %eax, %eax -# CHECK-NEXT: [2,0] . D======eeER . sbbl %edx, %edx -# CHECK-NEXT: [2,1] . D========eeER sbbl %eax, %eax +# CHECK: [0,0] DeER . . sbbl %edx, %edx +# CHECK-NEXT: [0,1] D=eER. . sbbl %eax, %eax +# CHECK-NEXT: [1,0] D==eER . sbbl %edx, %edx +# CHECK-NEXT: [1,1] D===eER . sbbl %eax, %eax +# CHECK-NEXT: [2,0] .D===eER. sbbl %edx, %edx +# CHECK-NEXT: [2,1] .D====eER sbbl %eax, %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -69,5 +80,5 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 4.0 0.3 0.0 sbbl %edx, %edx -# CHECK-NEXT: 1. 3 6.0 0.0 0.0 sbbl %eax, %eax +# CHECK-NEXT: 0. 3 2.7 0.3 0.0 sbbl %edx, %edx +# CHECK-NEXT: 1. 3 3.7 0.0 0.0 sbbl %eax, %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependency-breaking-sbb-2.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s # perf stat reports a throughput of 1.51 IPC for this block of code. @@ -13,13 +13,13 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 4500 -# CHECK-NEXT: Total Cycles: 7503 -# CHECK-NEXT: Total uOps: 6000 +# CHECK-NEXT: Total Cycles: 3006 +# CHECK-NEXT: Total uOps: 4500 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.80 -# CHECK-NEXT: IPC: 0.60 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.50 +# CHECK-NEXT: IPC: 1.50 +# CHECK-NEXT: Block RThroughput: 1.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -30,43 +30,55 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 imull %edx, %eax -# CHECK-NEXT: 1 1 0.33 addl %edx, %edx -# CHECK-NEXT: 2 2 0.67 sbbl %eax, %eax +# CHECK-NEXT: 1 4 1.00 imull %edx, %eax +# CHECK-NEXT: 1 1 0.50 addl %edx, %edx +# CHECK-NEXT: 1 1 1.00 sbbl %eax, %eax # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.33 1.33 - 1.33 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - 1.00 # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - imull %edx, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.34 - - addl %edx, %edx -# CHECK-NEXT: - - 1.00 - - 1.00 - - sbbl %eax, %eax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - 1.00 imull %edx, %eax +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - addl %edx, %edx +# CHECK-NEXT: - - - - - 2.00 - - - - - - - - - - - - - - sbbl %eax, %eax # CHECK: Timeline view: -# CHECK-NEXT: 01234567 +# CHECK-NEXT: 01 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . . . imull %edx, %eax -# CHECK-NEXT: [0,1] DeE--R . . . addl %edx, %edx -# CHECK-NEXT: [0,2] D===eeER . . . sbbl %eax, %eax -# CHECK-NEXT: [1,0] .D====eeeER . . imull %edx, %eax -# CHECK-NEXT: [1,1] .DeE------R . . addl %edx, %edx -# CHECK-NEXT: [1,2] .D=======eeER . . sbbl %eax, %eax -# CHECK-NEXT: [2,0] . D========eeeER . imull %edx, %eax -# CHECK-NEXT: [2,1] . DeE----------R . addl %edx, %edx -# CHECK-NEXT: [2,2] . D===========eeER sbbl %eax, %eax +# CHECK: [0,0] D=eeeeER .. imull %edx, %eax +# CHECK-NEXT: [0,1] DeE----R .. addl %edx, %edx +# CHECK-NEXT: [0,2] D==eE--R .. sbbl %eax, %eax +# CHECK-NEXT: [1,0] D===eeeeER.. imull %edx, %eax +# CHECK-NEXT: [1,1] .DeE-----R.. addl %edx, %edx +# CHECK-NEXT: [1,2] .D===eE--R.. sbbl %eax, %eax +# CHECK-NEXT: [2,0] .D====eeeeER imull %edx, %eax +# CHECK-NEXT: [2,1] .D=eE------R addl %edx, %edx +# CHECK-NEXT: [2,2] . D====eE--R sbbl %eax, %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -75,6 +87,6 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 5.0 0.3 0.0 imull %edx, %eax -# CHECK-NEXT: 1. 3 1.0 0.3 6.0 addl %edx, %edx -# CHECK-NEXT: 2. 3 8.0 0.0 0.0 sbbl %eax, %eax +# CHECK-NEXT: 0. 3 3.7 0.7 0.0 imull %edx, %eax +# CHECK-NEXT: 1. 3 1.3 0.3 5.0 addl %edx, %edx +# CHECK-NEXT: 2. 3 4.0 2.0 2.0 sbbl %eax, %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependent-pmuld-paddd.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependent-pmuld-paddd.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dependent-pmuld-paddd.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=500 -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=500 -timeline < %s | FileCheck %s vpmuld %xmm0, %xmm0, %xmm1 vpaddd %xmm1, %xmm1, %xmm0 @@ -7,7 +7,7 @@ # CHECK: Iterations: 500 # CHECK-NEXT: Instructions: 1500 -# CHECK-NEXT: Total Cycles: 3004 +# CHECK-NEXT: Total Cycles: 3005 # CHECK-NEXT: Total uOps: 1500 # CHECK: Dispatch Width: 4 @@ -24,64 +24,76 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 5 1.00 vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: 1 1 0.50 vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: 1 1 0.50 vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: 1 4 1.00 vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: 1 2 0.50 vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: 1 2 0.50 vpaddd %xmm0, %xmm0, %xmm3 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - - - 2.00 1.00 - 1.50 1.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 1.00 - - - - - vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: - - - - - 1.00 - - vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: - - - 1.00 - - - - vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 0.50 0.50 - - - - vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - vpaddd %xmm0, %xmm0, %xmm3 # CHECK: Timeline view: # CHECK-NEXT: 0123456789 0123456789 0123456789 -# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 01234 -# CHECK: [0,0] DeeeeeER . . . . . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [0,1] D=====eER . . . . . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [0,2] D======eER. . . . . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [1,0] D======eeeeeER . . . . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [1,1] .D==========eER. . . . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [1,2] .D===========eER . . . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [2,0] .D===========eeeeeER. . . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [2,1] .D================eER . . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [2,2] . D================eER . . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [3,0] . D================eeeeeER . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [3,1] . D=====================eER . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [3,2] . D======================eER . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [4,0] . D=====================eeeeeER . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [4,1] . D==========================eER . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [4,2] . D===========================eER . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [5,0] . D===========================eeeeeER . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [5,1] . D===============================eER . . . . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [5,2] . D================================eER. . . . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [6,0] . D================================eeeeeER . . . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [6,1] . D=====================================eER. . . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [6,2] . D=====================================eER . . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [7,0] . D=====================================eeeeeER. . . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [7,1] . D==========================================eER . . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [7,2] . D===========================================eER . . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [8,0] . .D==========================================eeeeeER . . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [8,1] . .D===============================================eER . . vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [8,2] . .D================================================eER . . vpaddd %xmm0, %xmm0, %xmm3 -# CHECK-NEXT: [9,0] . .D================================================eeeeeER . vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [9,1] . . D====================================================eER. vpaddd %xmm1, %xmm1, %xmm0 -# CHECK-NEXT: [9,2] . . D=====================================================eER vpaddd %xmm0, %xmm0, %xmm3 +# CHECK: [0,0] DeeeeER . . . . . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [0,1] D====eeER . . . . . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [0,2] D======eeER . . . . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [1,0] D======eeeeER . . . . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [1,1] .D=========eeER. . . . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [1,2] .D===========eeER . . . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [2,0] .D===========eeeeER . . . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [2,1] .D===============eeER . . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [2,2] . D================eeER . . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [3,0] . D================eeeeER. . . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [3,1] . D====================eeER . . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [3,2] . D======================eeER . . . . . . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [4,0] . D=====================eeeeER . . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [4,1] . D=========================eeER . . . . . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [4,2] . D===========================eeER. . . . . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [5,0] . D===========================eeeeER . . . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [5,1] . D==============================eeER . . . . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [5,2] . D================================eeER . . . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [6,0] . D================================eeeeER . . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [6,1] . D====================================eeER. . . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [6,2] . D=====================================eeER . . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [7,0] . D=====================================eeeeER . . . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [7,1] . D=========================================eeER . . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [7,2] . D===========================================eeER . . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [8,0] . .D==========================================eeeeER. . . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [8,1] . .D==============================================eeER . . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [8,2] . .D================================================eeER . . vpaddd %xmm0, %xmm0, %xmm3 +# CHECK-NEXT: [9,0] . .D================================================eeeeER . vpmuldq %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [9,1] . . D===================================================eeER . vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: [9,2] . . D=====================================================eeER vpaddd %xmm0, %xmm0, %xmm3 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -91,5 +103,5 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 10 25.0 0.1 0.0 vpmuldq %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: 1. 10 29.7 0.0 0.0 vpaddd %xmm1, %xmm1, %xmm0 +# CHECK-NEXT: 1. 10 28.7 0.0 0.0 vpaddd %xmm1, %xmm1, %xmm0 # CHECK-NEXT: 2. 10 30.5 0.0 0.0 vpaddd %xmm0, %xmm0, %xmm3 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dot-product.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dot-product.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/dot-product.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=300 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=300 -timeline -timeline-max-iterations=3 < %s | FileCheck %s vmulps %xmm0, %xmm1, %xmm2 vhaddps %xmm2, %xmm2, %xmm3 @@ -7,13 +7,13 @@ # CHECK: Iterations: 300 # CHECK-NEXT: Instructions: 900 -# CHECK-NEXT: Total Cycles: 1211 +# CHECK-NEXT: Total Cycles: 627 # CHECK-NEXT: Total uOps: 2100 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.73 -# CHECK-NEXT: IPC: 0.74 -# CHECK-NEXT: Block RThroughput: 4.0 +# CHECK-NEXT: uOps Per Cycle: 3.35 +# CHECK-NEXT: IPC: 1.44 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -25,42 +25,54 @@ # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 5 1.00 vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 5 2.00 vhaddps %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: 3 5 2.00 vhaddps %xmm3, %xmm3, %xmm4 +# CHECK-NEXT: 3 11 1.00 vhaddps %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: 3 11 1.00 vhaddps %xmm3, %xmm3, %xmm4 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 2.00 - 4.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 1.49 1.51 - - - - 2.00 1.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 1.00 - - - - - vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhaddps %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhaddps %xmm3, %xmm3, %xmm4 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhaddps %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.49 0.51 - - - - 1.00 - - - - - vhaddps %xmm3, %xmm3, %xmm4 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 -# CHECK-NEXT: Index 0123456789 012 +# CHECK-NEXT: 0123456789 012 +# CHECK-NEXT: Index 0123456789 0123456789 -# CHECK: [0,0] DeeeeeER . . . . vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: [0,1] D=====eeeeeER . . . vhaddps %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [0,2] .D==========eeeeeER . . vhaddps %xmm3, %xmm3, %xmm4 -# CHECK-NEXT: [1,0] .DeeeeeE----------R . . vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: [1,1] . D=====eeeeeE----R . . vhaddps %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [1,2] . D==========eeeeeER . vhaddps %xmm3, %xmm3, %xmm4 -# CHECK-NEXT: [2,0] . DeeeeeE----------R . vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: [2,1] . D=====eeeeeE----R . vhaddps %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: [2,2] . D==========eeeeeER vhaddps %xmm3, %xmm3, %xmm4 +# CHECK: [0,0] DeeeeeER . . . . . . vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [0,1] D=====eeeeeeeeeeeER . . . . vhaddps %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [0,2] .D===============eeeeeeeeeeeER. . vhaddps %xmm3, %xmm3, %xmm4 +# CHECK-NEXT: [1,0] .DeeeeeE---------------------R. . vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [1,1] . D====eeeeeeeeeeeE----------R. . vhaddps %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [1,2] . D==============eeeeeeeeeeeER . vhaddps %xmm3, %xmm3, %xmm4 +# CHECK-NEXT: [2,0] . DeeeeeE--------------------R . vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [2,1] . D====eeeeeeeeeeeE---------R . vhaddps %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: [2,2] . D==============eeeeeeeeeeeER vhaddps %xmm3, %xmm3, %xmm4 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -69,6 +81,6 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 1.0 1.0 6.7 vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1. 3 6.0 0.7 2.7 vhaddps %xmm2, %xmm2, %xmm3 -# CHECK-NEXT: 2. 3 11.0 1.0 0.0 vhaddps %xmm3, %xmm3, %xmm4 +# CHECK-NEXT: 0. 3 1.0 1.0 13.7 vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1. 3 5.3 0.0 6.3 vhaddps %xmm2, %xmm2, %xmm3 +# CHECK-NEXT: 2. 3 15.3 0.0 0.0 vhaddps %xmm3, %xmm3, %xmm4 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-1.s @@ -1,18 +1,18 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s vshufps $0, %xmm0, %xmm1, %xmm1 vhaddps (%rdi), %xmm1, %xmm2 # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 2 -# CHECK-NEXT: Total Cycles: 15 +# CHECK-NEXT: Total Cycles: 20 # CHECK-NEXT: Total uOps: 5 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.33 -# CHECK-NEXT: IPC: 0.13 -# CHECK-NEXT: Block RThroughput: 3.0 +# CHECK-NEXT: uOps Per Cycle: 0.25 +# CHECK-NEXT: IPC: 0.10 +# CHECK-NEXT: Block RThroughput: 1.3 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -23,15 +23,15 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 1.00 vshufps $0, %xmm0, %xmm1, %xmm1 -# CHECK-NEXT: 4 11 2.00 * vhaddps (%rdi), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vshufps $0, %xmm0, %xmm1, %xmm1 +# CHECK-NEXT: 4 16 1.00 * vhaddps (%rdi), %xmm1, %xmm2 # CHECK: Timeline view: -# CHECK-NEXT: 01234 +# CHECK-NEXT: 0123456789 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER . . . vshufps $0, %xmm0, %xmm1, %xmm1 -# CHECK-NEXT: [0,1] .DeeeeeeeeeeeER vhaddps (%rdi), %xmm1, %xmm2 +# CHECK: [0,0] DeeER. . . . vshufps $0, %xmm0, %xmm1, %xmm1 +# CHECK-NEXT: [0,1] .DeeeeeeeeeeeeeeeeER vhaddps (%rdi), %xmm1, %xmm2 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/hadd-read-after-ld-2.s @@ -1,18 +1,18 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s vshufps $0, %xmm0, %xmm1, %xmm1 vhaddps (%rdi), %ymm1, %ymm2 # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 2 -# CHECK-NEXT: Total Cycles: 16 -# CHECK-NEXT: Total uOps: 5 +# CHECK-NEXT: Total Cycles: 20 +# CHECK-NEXT: Total uOps: 11 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.31 -# CHECK-NEXT: IPC: 0.13 -# CHECK-NEXT: Block RThroughput: 3.0 +# CHECK-NEXT: uOps Per Cycle: 0.55 +# CHECK-NEXT: IPC: 0.10 +# CHECK-NEXT: Block RThroughput: 2.8 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -23,15 +23,15 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 1.00 vshufps $0, %xmm0, %xmm1, %xmm1 -# CHECK-NEXT: 4 12 2.00 * vhaddps (%rdi), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vshufps $0, %xmm0, %xmm1, %xmm1 +# CHECK-NEXT: 10 16 2.00 * vhaddps (%rdi), %ymm1, %ymm2 # CHECK: Timeline view: -# CHECK-NEXT: 012345 +# CHECK-NEXT: 0123456789 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER . . . vshufps $0, %xmm0, %xmm1, %xmm1 -# CHECK-NEXT: [0,1] .DeeeeeeeeeeeeER vhaddps (%rdi), %ymm1, %ymm2 +# CHECK: [0,0] DeeER. . . . vshufps $0, %xmm0, %xmm1, %xmm1 +# CHECK-NEXT: [0,1] .DeeeeeeeeeeeeeeeeER vhaddps (%rdi), %ymm1, %ymm2 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/instruction-info-view.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/instruction-info-view.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/instruction-info-view.s @@ -1,8 +1,8 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -resource-pressure=false -instruction-info=true < %s | FileCheck %s --check-prefix=ENABLED -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefix=DISABLED -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -resource-pressure=false -instruction-info < %s | FileCheck %s -check-prefix=ENABLED -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -resource-pressure=false < %s | FileCheck %s -check-prefix=ENABLED +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=true < %s | FileCheck %s --check-prefix=ENABLED +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefix=DISABLED +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info < %s | FileCheck %s -check-prefix=ENABLED +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false < %s | FileCheck %s -check-prefix=ENABLED vmulps %xmm0, %xmm1, %xmm2 vhaddps %xmm2, %xmm2, %xmm3 @@ -13,14 +13,14 @@ # ENABLED: Iterations: 100 # ENABLED-NEXT: Instructions: 300 -# ENABLED-NEXT: Total Cycles: 414 +# ENABLED-NEXT: Total Cycles: 228 # ENABLED-NEXT: Total uOps: 700 # ENABLED: Dispatch Width: 4 -# ENABLED-NEXT: uOps Per Cycle: 1.69 -# ENABLED-NEXT: IPC: 0.72 -# ENABLED-NEXT: Block RThroughput: 4.0 +# ENABLED-NEXT: uOps Per Cycle: 3.07 +# ENABLED-NEXT: IPC: 1.32 +# ENABLED-NEXT: Block RThroughput: 2.0 # ENABLED: Instruction Info: # ENABLED-NEXT: [1]: #uOps @@ -32,5 +32,5 @@ # ENABLED: [1] [2] [3] [4] [5] [6] Instructions: # ENABLED-NEXT: 1 5 1.00 vmulps %xmm0, %xmm1, %xmm2 -# ENABLED-NEXT: 3 5 2.00 vhaddps %xmm2, %xmm2, %xmm3 -# ENABLED-NEXT: 3 5 2.00 vhaddps %xmm3, %xmm3, %xmm4 +# ENABLED-NEXT: 3 11 1.00 vhaddps %xmm2, %xmm2, %xmm3 +# ENABLED-NEXT: 3 11 1.00 vhaddps %xmm3, %xmm3, %xmm4 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/load-store-alias.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/load-store-alias.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/load-store-alias.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=100 -timeline -timeline-max-iterations=1 -noalias=false < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=100 -timeline -timeline-max-iterations=1 -noalias=false < %s | FileCheck %s vmovaps (%rsi), %xmm0 vmovaps %xmm0, (%rdi) @@ -12,12 +12,12 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 800 -# CHECK-NEXT: Total Cycles: 2803 +# CHECK-NEXT: Total Cycles: 2403 # CHECK-NEXT: Total uOps: 800 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.29 -# CHECK-NEXT: IPC: 0.29 +# CHECK-NEXT: uOps Per Cycle: 0.33 +# CHECK-NEXT: IPC: 0.33 # CHECK-NEXT: Block RThroughput: 4.0 # CHECK: Instruction Info: @@ -29,52 +29,64 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 6 0.50 * vmovaps (%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps (%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, (%rdi) -# CHECK-NEXT: 1 6 0.50 * vmovaps 16(%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps 16(%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, 16(%rdi) -# CHECK-NEXT: 1 6 0.50 * vmovaps 32(%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps 32(%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, 32(%rdi) -# CHECK-NEXT: 1 6 0.50 * vmovaps 48(%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps 48(%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, 48(%rdi) # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - - 4.00 - - 8.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - 8.00 - - - - - - - 4.00 - - - 4.00 3.99 4.01 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - - 1.00 vmovaps (%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - - 1.00 vmovaps %xmm0, (%rdi) -# CHECK-NEXT: - - - - - - - 1.00 vmovaps 16(%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - - 1.00 vmovaps %xmm0, 16(%rdi) -# CHECK-NEXT: - - - - - - - 1.00 vmovaps 32(%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - - 1.00 vmovaps %xmm0, 32(%rdi) -# CHECK-NEXT: - - - - - - - 1.00 vmovaps 48(%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - - 1.00 vmovaps %xmm0, 48(%rdi) +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - 1.00 - - - - - - - 1.00 - - - - 0.99 0.01 - - - - vmovaps (%rsi), %xmm0 +# CHECK-NEXT: - 1.00 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, (%rdi) +# CHECK-NEXT: - 1.00 - - - - - - - 1.00 - - - - 1.00 - - - - - vmovaps 16(%rsi), %xmm0 +# CHECK-NEXT: - 1.00 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, 16(%rdi) +# CHECK-NEXT: - 1.00 - - - - - - - 1.00 - - - - 1.00 - - - - - vmovaps 32(%rsi), %xmm0 +# CHECK-NEXT: - 1.00 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, 32(%rdi) +# CHECK-NEXT: - 1.00 - - - - - - - 1.00 - - - - 1.00 - - - - - vmovaps 48(%rsi), %xmm0 +# CHECK-NEXT: - 1.00 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, 48(%rdi) # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0 -# CHECK-NEXT: Index 0123456789 0123456789 +# CHECK-NEXT: 0123456789 +# CHECK-NEXT: Index 0123456789 0123456 -# CHECK: [0,0] DeeeeeeER . . . . . vmovaps (%rsi), %xmm0 -# CHECK-NEXT: [0,1] D======eER. . . . . vmovaps %xmm0, (%rdi) -# CHECK-NEXT: [0,2] D=======eeeeeeER . . . vmovaps 16(%rsi), %xmm0 -# CHECK-NEXT: [0,3] D=============eER . . . vmovaps %xmm0, 16(%rdi) -# CHECK-NEXT: [0,4] .D=============eeeeeeER . . vmovaps 32(%rsi), %xmm0 -# CHECK-NEXT: [0,5] .D===================eER . . vmovaps %xmm0, 32(%rdi) -# CHECK-NEXT: [0,6] .D====================eeeeeeER. vmovaps 48(%rsi), %xmm0 -# CHECK-NEXT: [0,7] .D==========================eER vmovaps %xmm0, 48(%rdi) +# CHECK: [0,0] DeeeeeER . . . .. vmovaps (%rsi), %xmm0 +# CHECK-NEXT: [0,1] D=====eER . . . .. vmovaps %xmm0, (%rdi) +# CHECK-NEXT: [0,2] D======eeeeeER . . .. vmovaps 16(%rsi), %xmm0 +# CHECK-NEXT: [0,3] D===========eER. . .. vmovaps %xmm0, 16(%rdi) +# CHECK-NEXT: [0,4] .D===========eeeeeER. .. vmovaps 32(%rsi), %xmm0 +# CHECK-NEXT: [0,5] .D================eER .. vmovaps %xmm0, 32(%rdi) +# CHECK-NEXT: [0,6] .D=================eeeeeER. vmovaps 48(%rsi), %xmm0 +# CHECK-NEXT: [0,7] .D======================eER vmovaps %xmm0, 48(%rdi) # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -84,10 +96,10 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 vmovaps (%rsi), %xmm0 -# CHECK-NEXT: 1. 1 7.0 0.0 0.0 vmovaps %xmm0, (%rdi) -# CHECK-NEXT: 2. 1 8.0 0.0 0.0 vmovaps 16(%rsi), %xmm0 -# CHECK-NEXT: 3. 1 14.0 0.0 0.0 vmovaps %xmm0, 16(%rdi) -# CHECK-NEXT: 4. 1 14.0 0.0 0.0 vmovaps 32(%rsi), %xmm0 -# CHECK-NEXT: 5. 1 20.0 0.0 0.0 vmovaps %xmm0, 32(%rdi) -# CHECK-NEXT: 6. 1 21.0 0.0 0.0 vmovaps 48(%rsi), %xmm0 -# CHECK-NEXT: 7. 1 27.0 0.0 0.0 vmovaps %xmm0, 48(%rdi) +# CHECK-NEXT: 1. 1 6.0 0.0 0.0 vmovaps %xmm0, (%rdi) +# CHECK-NEXT: 2. 1 7.0 0.0 0.0 vmovaps 16(%rsi), %xmm0 +# CHECK-NEXT: 3. 1 12.0 0.0 0.0 vmovaps %xmm0, 16(%rdi) +# CHECK-NEXT: 4. 1 12.0 0.0 0.0 vmovaps 32(%rsi), %xmm0 +# CHECK-NEXT: 5. 1 17.0 0.0 0.0 vmovaps %xmm0, 32(%rdi) +# CHECK-NEXT: 6. 1 18.0 0.0 0.0 vmovaps 48(%rsi), %xmm0 +# CHECK-NEXT: 7. 1 23.0 0.0 0.0 vmovaps %xmm0, 48(%rdi) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/memcpy-like-test.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/memcpy-like-test.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/memcpy-like-test.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=100 -timeline -timeline-max-iterations=1 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=100 -timeline -timeline-max-iterations=1 < %s | FileCheck %s vmovaps (%rsi), %xmm0 vmovaps %xmm0, (%rdi) @@ -12,7 +12,7 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 800 -# CHECK-NEXT: Total Cycles: 409 +# CHECK-NEXT: Total Cycles: 408 # CHECK-NEXT: Total uOps: 800 # CHECK: Dispatch Width: 4 @@ -29,52 +29,64 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 6 0.50 * vmovaps (%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps (%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, (%rdi) -# CHECK-NEXT: 1 6 0.50 * vmovaps 16(%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps 16(%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, 16(%rdi) -# CHECK-NEXT: 1 6 0.50 * vmovaps 32(%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps 32(%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, 32(%rdi) -# CHECK-NEXT: 1 6 0.50 * vmovaps 48(%rsi), %xmm0 +# CHECK-NEXT: 1 5 0.50 * vmovaps 48(%rsi), %xmm0 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, 48(%rdi) # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - - 4.00 - 3.94 4.06 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 4.05 3.95 - - - - - - 3.95 0.05 - - - 4.00 3.95 4.05 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - 0.97 0.03 vmovaps (%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - - 1.00 vmovaps %xmm0, (%rdi) -# CHECK-NEXT: - - - - - - 0.03 0.97 vmovaps 16(%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - 0.97 0.03 vmovaps %xmm0, 16(%rdi) -# CHECK-NEXT: - - - - - - 1.00 - vmovaps 32(%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - - 1.00 vmovaps %xmm0, 32(%rdi) -# CHECK-NEXT: - - - - - - - 1.00 vmovaps 48(%rsi), %xmm0 -# CHECK-NEXT: - - - - 1.00 - 0.97 0.03 vmovaps %xmm0, 48(%rdi) +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - 1.00 - - - - - - 0.97 0.03 - - - - 0.97 0.03 - - - - vmovaps (%rsi), %xmm0 +# CHECK-NEXT: 1.00 - - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, (%rdi) +# CHECK-NEXT: 1.00 - - - - - - - 1.00 - - - - - 1.00 - - - - - vmovaps 16(%rsi), %xmm0 +# CHECK-NEXT: 0.02 0.98 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, 16(%rdi) +# CHECK-NEXT: 0.02 0.98 - - - - - - 1.00 - - - - - 0.98 0.02 - - - - vmovaps 32(%rsi), %xmm0 +# CHECK-NEXT: 1.00 - - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, 32(%rdi) +# CHECK-NEXT: 0.98 0.02 - - - - - - 0.98 0.02 - - - - 1.00 - - - - - vmovaps 48(%rsi), %xmm0 +# CHECK-NEXT: 0.03 0.97 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, 48(%rdi) # CHECK: Timeline view: -# CHECK-NEXT: 012 +# CHECK-NEXT: 01 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeeeeER . . vmovaps (%rsi), %xmm0 -# CHECK-NEXT: [0,1] D======eER. . vmovaps %xmm0, (%rdi) -# CHECK-NEXT: [0,2] DeeeeeeE-R. . vmovaps 16(%rsi), %xmm0 -# CHECK-NEXT: [0,3] D=======eER . vmovaps %xmm0, 16(%rdi) -# CHECK-NEXT: [0,4] .DeeeeeeE-R . vmovaps 32(%rsi), %xmm0 -# CHECK-NEXT: [0,5] .D=======eER. vmovaps %xmm0, 32(%rdi) -# CHECK-NEXT: [0,6] .DeeeeeeE--R. vmovaps 48(%rsi), %xmm0 -# CHECK-NEXT: [0,7] .D========eER vmovaps %xmm0, 48(%rdi) +# CHECK: [0,0] DeeeeeER .. vmovaps (%rsi), %xmm0 +# CHECK-NEXT: [0,1] D=====eER .. vmovaps %xmm0, (%rdi) +# CHECK-NEXT: [0,2] DeeeeeE-R .. vmovaps 16(%rsi), %xmm0 +# CHECK-NEXT: [0,3] D======eER.. vmovaps %xmm0, 16(%rdi) +# CHECK-NEXT: [0,4] .DeeeeeE-R.. vmovaps 32(%rsi), %xmm0 +# CHECK-NEXT: [0,5] .D======eER. vmovaps %xmm0, 32(%rdi) +# CHECK-NEXT: [0,6] .DeeeeeE--R. vmovaps 48(%rsi), %xmm0 +# CHECK-NEXT: [0,7] .D=======eER vmovaps %xmm0, 48(%rdi) # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -84,10 +96,10 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 vmovaps (%rsi), %xmm0 -# CHECK-NEXT: 1. 1 7.0 0.0 0.0 vmovaps %xmm0, (%rdi) +# CHECK-NEXT: 1. 1 6.0 0.0 0.0 vmovaps %xmm0, (%rdi) # CHECK-NEXT: 2. 1 1.0 1.0 1.0 vmovaps 16(%rsi), %xmm0 -# CHECK-NEXT: 3. 1 8.0 0.0 0.0 vmovaps %xmm0, 16(%rdi) +# CHECK-NEXT: 3. 1 7.0 0.0 0.0 vmovaps %xmm0, 16(%rdi) # CHECK-NEXT: 4. 1 1.0 1.0 1.0 vmovaps 32(%rsi), %xmm0 -# CHECK-NEXT: 5. 1 8.0 0.0 0.0 vmovaps %xmm0, 32(%rdi) +# CHECK-NEXT: 5. 1 7.0 0.0 0.0 vmovaps %xmm0, 32(%rdi) # CHECK-NEXT: 6. 1 1.0 1.0 2.0 vmovaps 48(%rsi), %xmm0 -# CHECK-NEXT: 7. 1 9.0 0.0 0.0 vmovaps %xmm0, 48(%rdi) +# CHECK-NEXT: 7. 1 8.0 0.0 0.0 vmovaps %xmm0, 48(%rdi) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/one-idioms.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/one-idioms.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/one-idioms.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=1 -register-file-stats < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=1 -register-file-stats < %s | FileCheck %s # These are dependency-breaking one-idioms. # Much like zero-idioms, but they produce ones, and do consume resources. @@ -29,13 +29,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 1500 -# CHECK-NEXT: Total Cycles: 903 +# CHECK-NEXT: Total Cycles: 754 # CHECK-NEXT: Total uOps: 1500 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.66 -# CHECK-NEXT: IPC: 1.66 -# CHECK-NEXT: Block RThroughput: 6.0 +# CHECK-NEXT: uOps Per Cycle: 1.99 +# CHECK-NEXT: IPC: 1.99 +# CHECK-NEXT: Block RThroughput: 7.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -46,77 +46,99 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 pcmpeqb %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpeqd %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpeqw %mm2, %mm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqb %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqd %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqq %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqw %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpeqb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcmpeqd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcmpeqq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcmpeqw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcmpeqb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 1 0.50 vpcmpeqd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 1 0.50 vpcmpeqq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 1 0.50 vpcmpeqw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 pcmpeqb %mm2, %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqd %mm2, %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqw %mm2, %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqb %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqd %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqq %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqw %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpeqb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcmpeqd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcmpeqq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcmpeqw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcmpeqb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 vpcmpeqd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 vpcmpeqq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 vpcmpeqw %xmm3, %xmm3, %xmm5 # CHECK: Register File statistics: # CHECK-NEXT: Total number of mappings created: 1500 -# CHECK-NEXT: Max number of mappings used: 168 +# CHECK-NEXT: Max number of mappings used: 72 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 1500 +# CHECK-NEXT: Max number of mappings used: 72 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 7.65 - 7.35 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - - 7.50 7.50 - - 7.50 7.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - pcmpeqb %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpeqd %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpeqw %mm2, %mm2 -# CHECK-NEXT: - - - 0.75 - 0.25 - - pcmpeqb %xmm2, %xmm2 -# CHECK-NEXT: - - - 0.49 - 0.51 - - pcmpeqd %xmm2, %xmm2 -# CHECK-NEXT: - - - 0.64 - 0.36 - - pcmpeqq %xmm2, %xmm2 -# CHECK-NEXT: - - - 0.21 - 0.79 - - pcmpeqw %xmm2, %xmm2 -# CHECK-NEXT: - - - 0.44 - 0.56 - - vpcmpeqb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - 0.26 - 0.74 - - vpcmpeqd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - 0.25 - 0.75 - - vpcmpeqq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vpcmpeqw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - 0.25 - 0.75 - - vpcmpeqb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - 0.55 - 0.45 - - vpcmpeqd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - 0.44 - 0.56 - - vpcmpeqq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - 0.37 - 0.63 - - vpcmpeqw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqb %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqd %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqw %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqb %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqd %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - 1.00 - - - - pcmpeqq %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqw %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 1.00 - - - - - vpcmpeqd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqw %xmm3, %xmm3, %xmm5 # CHECK: Timeline view: # CHECK-NEXT: 01 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER .. pcmpeqb %mm2, %mm2 -# CHECK-NEXT: [0,1] D===eeeER .. pcmpeqd %mm2, %mm2 -# CHECK-NEXT: [0,2] D======eeeER pcmpeqw %mm2, %mm2 -# CHECK-NEXT: [0,3] DeE--------R pcmpeqb %xmm2, %xmm2 -# CHECK-NEXT: [0,4] .DeE-------R pcmpeqd %xmm2, %xmm2 -# CHECK-NEXT: [0,5] .D=eE------R pcmpeqq %xmm2, %xmm2 -# CHECK-NEXT: [0,6] .D==eE-----R pcmpeqw %xmm2, %xmm2 -# CHECK-NEXT: [0,7] .DeE-------R vpcmpeqb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,8] . DeE------R vpcmpeqd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,9] . D==eE----R vpcmpeqq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,10] . D===eE---R vpcmpeqw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,11] . D====eE--R vpcmpeqb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,12] . D====eE-R vpcmpeqd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,13] . D====eE-R vpcmpeqq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,14] . D=====eER vpcmpeqw %xmm3, %xmm3, %xmm5 +# CHECK: [0,0] DeeER. .. pcmpeqb %mm2, %mm2 +# CHECK-NEXT: [0,1] DeeER. .. pcmpeqd %mm2, %mm2 +# CHECK-NEXT: [0,2] D=eeER .. pcmpeqw %mm2, %mm2 +# CHECK-NEXT: [0,3] D==eeER .. pcmpeqb %xmm2, %xmm2 +# CHECK-NEXT: [0,4] .DeeE-R .. pcmpeqd %xmm2, %xmm2 +# CHECK-NEXT: [0,5] .D==eeER .. pcmpeqq %xmm2, %xmm2 +# CHECK-NEXT: [0,6] .D=eeE-R .. pcmpeqw %xmm2, %xmm2 +# CHECK-NEXT: [0,7] .D===eeER .. vpcmpeqb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,8] . D=eeE-R .. vpcmpeqd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,9] . D===eeER.. vpcmpeqq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,10] . D==eeE-R.. vpcmpeqw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,11] . D===eeER.. vpcmpeqb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,12] . D===eeER. vpcmpeqd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,13] . D===eeER. vpcmpeqq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,14] . D====eeER vpcmpeqw %xmm3, %xmm3, %xmm5 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -126,17 +148,17 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 pcmpeqb %mm2, %mm2 -# CHECK-NEXT: 1. 1 4.0 0.0 0.0 pcmpeqd %mm2, %mm2 -# CHECK-NEXT: 2. 1 7.0 0.0 0.0 pcmpeqw %mm2, %mm2 -# CHECK-NEXT: 3. 1 1.0 1.0 8.0 pcmpeqb %xmm2, %xmm2 -# CHECK-NEXT: 4. 1 1.0 0.0 7.0 pcmpeqd %xmm2, %xmm2 -# CHECK-NEXT: 5. 1 2.0 0.0 6.0 pcmpeqq %xmm2, %xmm2 -# CHECK-NEXT: 6. 1 3.0 0.0 5.0 pcmpeqw %xmm2, %xmm2 -# CHECK-NEXT: 7. 1 1.0 1.0 7.0 vpcmpeqb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 8. 1 1.0 0.0 6.0 vpcmpeqd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 9. 1 3.0 1.0 4.0 vpcmpeqq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 10. 1 4.0 0.0 3.0 vpcmpeqw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 11. 1 5.0 0.0 2.0 vpcmpeqb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 12. 1 5.0 1.0 1.0 vpcmpeqd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 13. 1 5.0 1.0 1.0 vpcmpeqq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 14. 1 6.0 2.0 0.0 vpcmpeqw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1. 1 1.0 1.0 0.0 pcmpeqd %mm2, %mm2 +# CHECK-NEXT: 2. 1 2.0 2.0 0.0 pcmpeqw %mm2, %mm2 +# CHECK-NEXT: 3. 1 3.0 3.0 0.0 pcmpeqb %xmm2, %xmm2 +# CHECK-NEXT: 4. 1 1.0 1.0 1.0 pcmpeqd %xmm2, %xmm2 +# CHECK-NEXT: 5. 1 3.0 0.0 0.0 pcmpeqq %xmm2, %xmm2 +# CHECK-NEXT: 6. 1 2.0 2.0 1.0 pcmpeqw %xmm2, %xmm2 +# CHECK-NEXT: 7. 1 4.0 4.0 0.0 vpcmpeqb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 8. 1 2.0 2.0 1.0 vpcmpeqd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 9. 1 4.0 0.0 0.0 vpcmpeqq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 10. 1 3.0 3.0 1.0 vpcmpeqw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 11. 1 4.0 4.0 0.0 vpcmpeqb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 12. 1 4.0 4.0 0.0 vpcmpeqd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 13. 1 4.0 0.0 0.0 vpcmpeqq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 14. 1 5.0 5.0 0.0 vpcmpeqw %xmm3, %xmm3, %xmm5 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-2.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s imul %rax, %rbx lzcnt %ax, %bx @@ -7,13 +7,13 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 3 -# CHECK-NEXT: Total Cycles: 8 -# CHECK-NEXT: Total uOps: 3 +# CHECK-NEXT: Total Cycles: 11 +# CHECK-NEXT: Total uOps: 4 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.38 -# CHECK-NEXT: IPC: 0.38 -# CHECK-NEXT: Block RThroughput: 2.0 +# CHECK-NEXT: uOps Per Cycle: 0.36 +# CHECK-NEXT: IPC: 0.27 +# CHECK-NEXT: Block RThroughput: 4.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -24,16 +24,17 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 imulq %rax, %rbx -# CHECK-NEXT: 1 3 1.00 lzcntw %ax, %bx -# CHECK-NEXT: 1 1 0.33 addl %ecx, %ebx +# CHECK-NEXT: 1 6 4.00 imulq %rax, %rbx +# CHECK-NEXT: 2 2 0.50 lzcntw %ax, %bx +# CHECK-NEXT: 1 1 0.50 addl %ecx, %ebx # CHECK: Timeline view: -# CHECK-NEXT: Index 01234567 +# CHECK-NEXT: 0 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . imulq %rax, %rbx -# CHECK-NEXT: [0,1] D=eeeER. lzcntw %ax, %bx -# CHECK-NEXT: [0,2] D====eER addl %ecx, %ebx +# CHECK: [0,0] DeeeeeeER . imulq %rax, %rbx +# CHECK-NEXT: [0,1] D=====eeER. lzcntw %ax, %bx +# CHECK-NEXT: [0,2] D=======eER addl %ecx, %ebx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -43,5 +44,5 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 imulq %rax, %rbx -# CHECK-NEXT: 1. 1 2.0 2.0 0.0 lzcntw %ax, %bx -# CHECK-NEXT: 2. 1 5.0 0.0 0.0 addl %ecx, %ebx +# CHECK-NEXT: 1. 1 6.0 0.0 0.0 lzcntw %ax, %bx +# CHECK-NEXT: 2. 1 8.0 0.0 0.0 addl %ecx, %ebx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-3.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-3.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-3.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s # perf stat reports a throughput of 1.00 IPC for this code snippet. @@ -12,13 +12,13 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 4500 -# CHECK-NEXT: Total Cycles: 1504 +# CHECK-NEXT: Total Cycles: 4503 # CHECK-NEXT: Total uOps: 4500 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 2.99 -# CHECK-NEXT: IPC: 2.99 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.00 +# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: Block RThroughput: 1.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -29,42 +29,55 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 addw %cx, %dx -# CHECK-NEXT: 1 1 0.33 movw %ax, %dx -# CHECK-NEXT: 1 1 0.33 xorw %bx, %dx +# CHECK-NEXT: 1 1 0.50 addw %cx, %dx +# CHECK-NEXT: 1 1 0.50 movw %ax, %dx +# CHECK-NEXT: 1 1 0.50 xorw %bx, %dx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.67 - - 0.33 - - addw %cx, %dx -# CHECK-NEXT: - - - 0.67 - 0.33 - - movw %ax, %dx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorw %bx, %dx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addw %cx, %dx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - movw %ax, %dx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorw %bx, %dx # CHECK: Timeline view: -# CHECK-NEXT: Index 0123456 +# CHECK-NEXT: 01 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER .. addw %cx, %dx -# CHECK-NEXT: [0,1] DeER .. movw %ax, %dx -# CHECK-NEXT: [0,2] D=eER.. xorw %bx, %dx -# CHECK-NEXT: [1,0] D==eER. addw %cx, %dx -# CHECK-NEXT: [1,1] .DeE-R. movw %ax, %dx -# CHECK-NEXT: [1,2] .D=eER. xorw %bx, %dx -# CHECK-NEXT: [2,0] .D==eER addw %cx, %dx -# CHECK-NEXT: [2,1] .DeE--R movw %ax, %dx -# CHECK-NEXT: [2,2] . DeE-R xorw %bx, %dx +# CHECK: [0,0] DeER . .. addw %cx, %dx +# CHECK-NEXT: [0,1] D=eER. .. movw %ax, %dx +# CHECK-NEXT: [0,2] D==eER .. xorw %bx, %dx +# CHECK-NEXT: [1,0] D===eER .. addw %cx, %dx +# CHECK-NEXT: [1,1] .D===eER .. movw %ax, %dx +# CHECK-NEXT: [1,2] .D====eER .. xorw %bx, %dx +# CHECK-NEXT: [2,0] .D=====eER.. addw %cx, %dx +# CHECK-NEXT: [2,1] .D======eER. movw %ax, %dx +# CHECK-NEXT: [2,2] . D======eER xorw %bx, %dx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -73,6 +86,6 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 2.3 0.3 0.0 addw %cx, %dx -# CHECK-NEXT: 1. 3 1.0 1.0 1.0 movw %ax, %dx -# CHECK-NEXT: 2. 3 1.7 0.0 0.3 xorw %bx, %dx +# CHECK-NEXT: 0. 3 3.7 0.3 0.0 addw %cx, %dx +# CHECK-NEXT: 1. 3 4.3 0.0 0.0 movw %ax, %dx +# CHECK-NEXT: 2. 3 5.0 0.0 0.0 xorw %bx, %dx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-4.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-4.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-4.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s # perf stat reports a throughput of 0.60 IPC for this code snippet. @@ -12,13 +12,13 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 4500 -# CHECK-NEXT: Total Cycles: 3005 -# CHECK-NEXT: Total uOps: 4500 +# CHECK-NEXT: Total Cycles: 9003 +# CHECK-NEXT: Total uOps: 6000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.50 -# CHECK-NEXT: IPC: 1.50 -# CHECK-NEXT: Block RThroughput: 2.0 +# CHECK-NEXT: uOps Per Cycle: 0.67 +# CHECK-NEXT: IPC: 0.50 +# CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -29,43 +29,55 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 imulw %ax, %bx -# CHECK-NEXT: 1 3 1.00 lzcntw %ax, %bx -# CHECK-NEXT: 1 1 0.33 addw %cx, %bx +# CHECK-NEXT: 1 4 1.00 imulw %ax, %bx +# CHECK-NEXT: 2 2 0.50 lzcntw %ax, %bx +# CHECK-NEXT: 1 1 0.50 addw %cx, %bx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 0.50 2.00 - 0.50 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - 1.00 # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - imulw %ax, %bx -# CHECK-NEXT: - - - 1.00 - - - - lzcntw %ax, %bx -# CHECK-NEXT: - - 0.50 - - 0.50 - - addw %cx, %bx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - 1.00 imulw %ax, %bx +# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - lzcntw %ax, %bx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addw %cx, %bx # CHECK: Timeline view: -# CHECK-NEXT: 01 -# CHECK-NEXT: Index 0123456789 +# CHECK-NEXT: 0123456789 +# CHECK-NEXT: Index 0123456789 0 -# CHECK: [0,0] DeeeER .. imulw %ax, %bx -# CHECK-NEXT: [0,1] D=eeeER .. lzcntw %ax, %bx -# CHECK-NEXT: [0,2] D====eER .. addw %cx, %bx -# CHECK-NEXT: [1,0] D=====eeeER. imulw %ax, %bx -# CHECK-NEXT: [1,1] .D=eeeE---R. lzcntw %ax, %bx -# CHECK-NEXT: [1,2] .D====eE--R. addw %cx, %bx -# CHECK-NEXT: [2,0] .D=====eeeER imulw %ax, %bx -# CHECK-NEXT: [2,1] .D==eeeE---R lzcntw %ax, %bx -# CHECK-NEXT: [2,2] . D====eE--R addw %cx, %bx +# CHECK: [0,0] DeeeeER . . . imulw %ax, %bx +# CHECK-NEXT: [0,1] D===eeER . . . lzcntw %ax, %bx +# CHECK-NEXT: [0,2] D=====eER . . . addw %cx, %bx +# CHECK-NEXT: [1,0] .D=====eeeeER . . imulw %ax, %bx +# CHECK-NEXT: [1,1] .D========eeER . . lzcntw %ax, %bx +# CHECK-NEXT: [1,2] .D==========eER. . addw %cx, %bx +# CHECK-NEXT: [2,0] . D==========eeeeER . imulw %ax, %bx +# CHECK-NEXT: [2,1] . D=============eeER. lzcntw %ax, %bx +# CHECK-NEXT: [2,2] . D===============eER addw %cx, %bx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -74,6 +86,6 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 4.3 0.3 0.0 imulw %ax, %bx -# CHECK-NEXT: 1. 3 2.3 2.3 2.0 lzcntw %ax, %bx -# CHECK-NEXT: 2. 3 5.0 0.0 1.3 addw %cx, %bx +# CHECK-NEXT: 0. 3 6.0 0.3 0.0 imulw %ax, %bx +# CHECK-NEXT: 1. 3 9.0 0.0 0.0 lzcntw %ax, %bx +# CHECK-NEXT: 2. 3 11.0 0.0 0.0 addw %cx, %bx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-5.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-5.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-5.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s # perf stat reports a throughput of 1.00 IPC for this code snippet. @@ -7,13 +7,13 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 1500 -# CHECK-NEXT: Total Cycles: 1505 -# CHECK-NEXT: Total uOps: 1500 +# CHECK-NEXT: Total Cycles: 1504 +# CHECK-NEXT: Total uOps: 3000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.00 +# CHECK-NEXT: uOps Per Cycle: 1.99 # CHECK-NEXT: IPC: 1.00 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: Block RThroughput: 0.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -24,32 +24,44 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 lzcntw %ax, %bx +# CHECK-NEXT: 2 2 0.50 lzcntw %ax, %bx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 1.00 - - - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - lzcntw %ax, %bx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - lzcntw %ax, %bx # CHECK: Timeline view: -# CHECK-NEXT: Index 01234567 +# CHECK-NEXT: Index 0123456 -# CHECK: [0,0] DeeeER . lzcntw %ax, %bx -# CHECK-NEXT: [1,0] D=eeeER. lzcntw %ax, %bx -# CHECK-NEXT: [2,0] D==eeeER lzcntw %ax, %bx +# CHECK: [0,0] DeeER.. lzcntw %ax, %bx +# CHECK-NEXT: [1,0] D=eeER. lzcntw %ax, %bx +# CHECK-NEXT: [2,0] .D=eeER lzcntw %ax, %bx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -58,4 +70,4 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 2.0 2.0 0.0 lzcntw %ax, %bx +# CHECK-NEXT: 0. 3 1.7 0.3 0.0 lzcntw %ax, %bx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-6.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-6.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update-6.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s # perf stat reports a throughput of 0.60 IPC for this code snippet. # Each lzcnt has a false dependency on %ecx; the first lzcnt has to wait on the @@ -13,13 +13,13 @@ # CHECK: Iterations: 1500 # CHECK-NEXT: Instructions: 4500 -# CHECK-NEXT: Total Cycles: 4510 +# CHECK-NEXT: Total Cycles: 10503 # CHECK-NEXT: Total uOps: 7500 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.66 -# CHECK-NEXT: IPC: 1.00 -# CHECK-NEXT: Block RThroughput: 3.0 +# CHECK-NEXT: uOps Per Cycle: 0.71 +# CHECK-NEXT: IPC: 0.43 +# CHECK-NEXT: Block RThroughput: 1.3 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -30,43 +30,55 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 imull %edx, %ecx -# CHECK-NEXT: 2 8 1.00 * lzcntw (%rsp), %cx -# CHECK-NEXT: 2 8 1.00 * lzcntw 2(%rsp), %cx +# CHECK-NEXT: 1 4 1.00 imull %edx, %ecx +# CHECK-NEXT: 2 6 0.50 * lzcntw (%rsp), %cx +# CHECK-NEXT: 2 6 0.50 * lzcntw 2(%rsp), %cx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 3.00 - - - 2.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - 2.00 - - - 1.50 1.50 - - - - - - - - - - - - 1.00 # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - imull %edx, %ecx -# CHECK-NEXT: - - - 1.00 - - - 1.00 lzcntw (%rsp), %cx -# CHECK-NEXT: - - - 1.00 - - - 1.00 lzcntw 2(%rsp), %cx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - 1.00 imull %edx, %ecx +# CHECK-NEXT: - 1.00 - - - 1.00 - - - - - - - - - - - - - - lzcntw (%rsp), %cx +# CHECK-NEXT: - 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - lzcntw 2(%rsp), %cx # CHECK: Timeline view: -# CHECK-NEXT: 012345678 -# CHECK-NEXT: Index 0123456789 +# CHECK-NEXT: 0123456789 +# CHECK-NEXT: Index 0123456789 0123 -# CHECK: [0,0] DeeeER . . . imull %edx, %ecx -# CHECK-NEXT: [0,1] D=eeeeeeeeER . . lzcntw (%rsp), %cx -# CHECK-NEXT: [0,2] .D=eeeeeeeeER . . lzcntw 2(%rsp), %cx -# CHECK-NEXT: [1,0] .D=========eeeER . imull %edx, %ecx -# CHECK-NEXT: [1,1] . D=eeeeeeeeE--R . lzcntw (%rsp), %cx -# CHECK-NEXT: [1,2] . D==eeeeeeeeE-R . lzcntw 2(%rsp), %cx -# CHECK-NEXT: [2,0] . D==========eeeER imull %edx, %ecx -# CHECK-NEXT: [2,1] . D==eeeeeeeeE---R lzcntw (%rsp), %cx -# CHECK-NEXT: [2,2] . D==eeeeeeeeE--R lzcntw 2(%rsp), %cx +# CHECK: [0,0] DeeeeER . . . . imull %edx, %ecx +# CHECK-NEXT: [0,1] DeeeeeeER . . . . lzcntw (%rsp), %cx +# CHECK-NEXT: [0,2] .DeeeeeeER. . . . lzcntw 2(%rsp), %cx +# CHECK-NEXT: [1,0] .D======eeeeER . . . imull %edx, %ecx +# CHECK-NEXT: [1,1] . D=====eeeeeeER . . lzcntw (%rsp), %cx +# CHECK-NEXT: [1,2] . D======eeeeeeER . . lzcntw 2(%rsp), %cx +# CHECK-NEXT: [2,0] . D===========eeeeER . imull %edx, %ecx +# CHECK-NEXT: [2,1] . D===========eeeeeeER. lzcntw (%rsp), %cx +# CHECK-NEXT: [2,2] . D===========eeeeeeER lzcntw 2(%rsp), %cx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -75,6 +87,6 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 7.3 0.3 0.0 imull %edx, %ecx -# CHECK-NEXT: 1. 3 2.3 2.3 1.7 lzcntw (%rsp), %cx -# CHECK-NEXT: 2. 3 2.7 2.7 1.0 lzcntw 2(%rsp), %cx +# CHECK-NEXT: 0. 3 6.7 0.3 0.0 imull %edx, %ecx +# CHECK-NEXT: 1. 3 6.3 0.0 0.0 lzcntw (%rsp), %cx +# CHECK-NEXT: 2. 3 6.7 0.0 0.0 lzcntw 2(%rsp), %cx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/partial-reg-update.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s imul %ax, %cx add %al, %cl @@ -7,12 +7,12 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 3 -# CHECK-NEXT: Total Cycles: 8 +# CHECK-NEXT: Total Cycles: 9 # CHECK-NEXT: Total uOps: 3 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.38 -# CHECK-NEXT: IPC: 0.38 +# CHECK-NEXT: uOps Per Cycle: 0.33 +# CHECK-NEXT: IPC: 0.33 # CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Instruction Info: @@ -24,16 +24,16 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 imulw %ax, %cx -# CHECK-NEXT: 1 1 0.33 addb %al, %cl -# CHECK-NEXT: 1 1 0.33 addl %ecx, %ebx +# CHECK-NEXT: 1 4 1.00 imulw %ax, %cx +# CHECK-NEXT: 1 1 0.50 addb %al, %cl +# CHECK-NEXT: 1 1 0.50 addl %ecx, %ebx # CHECK: Timeline view: -# CHECK-NEXT: Index 01234567 +# CHECK-NEXT: Index 012345678 -# CHECK: [0,0] DeeeER . imulw %ax, %cx -# CHECK-NEXT: [0,1] D===eER. addb %al, %cl -# CHECK-NEXT: [0,2] D====eER addl %ecx, %ebx +# CHECK: [0,0] DeeeeER . imulw %ax, %cx +# CHECK-NEXT: [0,1] D====eER. addb %al, %cl +# CHECK-NEXT: [0,2] D=====eER addl %ecx, %ebx # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -43,5 +43,5 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 imulw %ax, %cx -# CHECK-NEXT: 1. 1 4.0 0.0 0.0 addb %al, %cl -# CHECK-NEXT: 2. 1 5.0 0.0 0.0 addl %ecx, %ebx +# CHECK-NEXT: 1. 1 5.0 0.0 0.0 addb %al, %cl +# CHECK-NEXT: 2. 1 6.0 0.0 0.0 addl %ecx, %ebx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/pipes-fpu.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/pipes-fpu.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/pipes-fpu.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=2 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=2 < %s | FileCheck %s # VALU0/VALU1 vpmulld %xmm0, %xmm1, %xmm2 @@ -19,13 +19,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 800 -# CHECK-NEXT: Total Cycles: 4256 -# CHECK-NEXT: Total uOps: 1000 +# CHECK-NEXT: Total Cycles: 3244 +# CHECK-NEXT: Total uOps: 1500 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.23 -# CHECK-NEXT: IPC: 0.19 -# CHECK-NEXT: Block RThroughput: 42.0 +# CHECK-NEXT: uOps Per Cycle: 0.46 +# CHECK-NEXT: IPC: 0.25 +# CHECK-NEXT: Block RThroughput: 32.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -36,51 +36,72 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 5 1.00 vpmulld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.33 vpand %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vcvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: 1 14 6.00 vpclmulqdq $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 14 14.00 vsqrtps %xmm0, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 3 29 28.00 vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 1 5 2.00 vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 6 13 1.00 vpclmulqdq $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 10.50 vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 9 21.00 vsqrtps %ymm0, %ymm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - 42.00 6.03 3.96 - 17.01 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 32.71 32.29 - 2.00 3.00 1.00 6.00 6.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 1.00 - - - - - vpmulld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.05 0.06 - 0.89 - - vpand %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: - - 1.98 0.90 - 15.12 - - vpclmulqdq $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - vsqrtps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - 28.00 2.00 - - 1.00 - - vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - 1.00 2.00 - 2.00 1.00 - - - - vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpclmulqdq $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 10.71 10.29 - - - - - 1.00 - - - - vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 21.00 21.00 - - - - - 2.00 - - - - vsqrtps %ymm0, %ymm2 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0123456 -# CHECK-NEXT: Index 0123456789 0123456789 +# CHECK-NEXT: 0123456789 0123456789 012345678 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 -# CHECK: [0,0] DeeeeeER . . . . . .. vpmulld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: [0,1] DeE----R . . . . . .. vpand %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: [0,2] DeeeE--R . . . . . .. vcvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: [0,3] D=eeeeeeeeeeeeeeER . . . .. vpclmulqdq $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: [0,4] .DeeeE-----------R . . . .. vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: [0,5] .DeeeeeeeeeeeeeeER . . . .. vsqrtps %xmm0, %xmm2 -# CHECK-NEXT: [0,6] .D=eeeE----------R . . . .. vaddps %ymm0, %ymm1, %ymm2 +# CHECK: [0,0] DeeeeeER . . . . . . . . . . . vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [0,1] D=eeE--R . . . . . . . . . . . vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [0,2] D==eeeeER . . . . . . . . . . . vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: [0,3] .D=eeeeeeeeeeeeeER . . . . . . . . . vpclmulqdq $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [0,4] . D=eeeeeE-------R . . . . . . . . . vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [0,5] . D=eeeeeeeeeE---R . . . . . . . . . vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: [0,6] . D=eeeeeE------R . . . . . . . . . vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [0,7] . D==eeeeeeeeeE--R . . . . . . . . . vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: [1,0] . D===eeeeeE----R . . . . . . . . . vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [1,1] . DeeE----------R . . . . . . . . . vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [1,2] . D====eeeeE----R . . . . . . . . . vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: [1,3] . D=eeeeeeeeeeeeeER . . . . . . . . vpclmulqdq $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [1,4] . .D==================eeeeeER . . . . . . vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: [1,5] . .D===================eeeeeeeeeER . . . . . vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: [1,6] . . D=======================================eeeeeER . . vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [1,7] . . D========================================eeeeeeeeeER vsqrtps %ymm0, %ymm2 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -89,11 +110,11 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 2 1.0 1.0 79.0 vpmulld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1. 2 1.0 1.0 82.5 vpand %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2. 2 1.5 1.5 80.0 vcvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: 3. 2 1.5 1.5 74.0 vpclmulqdq $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4. 2 2.0 2.0 84.0 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 5. 2 9.5 9.5 65.0 vsqrtps %xmm0, %xmm2 -# CHECK-NEXT: 6. 2 2.5 2.5 83.0 vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 7. 2 147.5 147.5 0.0 vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 0. 2 2.5 2.5 2.0 vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1. 2 1.5 1.5 6.0 vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2. 2 4.0 4.0 2.0 vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 3. 2 2.0 2.0 0.0 vpclmulqdq $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4. 2 10.5 10.5 3.5 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 5. 2 11.0 11.0 1.5 vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 6. 2 21.0 21.0 3.0 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 7. 2 22.0 22.0 1.0 vsqrtps %ymm0, %ymm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/pr37790.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/pr37790.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/pr37790.s @@ -1,18 +1,18 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -lqueue=2 -iterations=2 -resource-pressure=false -timeline -timeline-max-cycles=104 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -lqueue=2 -iterations=2 -resource-pressure=false -timeline -timeline-max-cycles=104 < %s | FileCheck %s int3 stmxcsr (%rsp) # CHECK: Iterations: 2 # CHECK-NEXT: Instructions: 4 -# CHECK-NEXT: Total Cycles: 213 -# CHECK-NEXT: Total uOps: 10 +# CHECK-NEXT: Total Cycles: 205 +# CHECK-NEXT: Total uOps: 6 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.05 +# CHECK-NEXT: uOps Per Cycle: 0.03 # CHECK-NEXT: IPC: 0.02 -# CHECK-NEXT: Block RThroughput: 1.3 +# CHECK-NEXT: Block RThroughput: 0.8 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -23,14 +23,15 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 100 0.33 * * U int3 -# CHECK-NEXT: 4 5 1.00 * * U stmxcsr (%rsp) +# CHECK-NEXT: 1 100 0.50 * * U int3 +# CHECK-NEXT: 2 1 0.50 * * U stmxcsr (%rsp) # CHECK: Timeline view: # CHECK-NEXT: 0123456789 0123456789 0123456789 0123456789 0123456789 -# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 0123456789 012 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 0123456789 0123 -# CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER int3 +# CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER. int3 +# CHECK-NEXT: [0,1] D====================================================================================================eER stmxcsr (%rsp) # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -39,5 +40,5 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 2 3.0 0.5 0.0 int3 -# CHECK-NEXT: 1. 2 100.0 0.0 0.0 stmxcsr (%rsp) +# CHECK-NEXT: 0. 2 1.0 0.5 0.0 int3 +# CHECK-NEXT: 1. 2 100.5 0.0 0.0 stmxcsr (%rsp) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/rank.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/rank.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/rank.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 < %s | FileCheck %s add %eax, %ecx add %eax, %edx @@ -12,13 +12,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 800 -# CHECK-NEXT: Total Cycles: 403 +# CHECK-NEXT: Total Cycles: 503 # CHECK-NEXT: Total uOps: 800 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.99 -# CHECK-NEXT: IPC: 1.99 -# CHECK-NEXT: Block RThroughput: 2.7 +# CHECK-NEXT: uOps Per Cycle: 1.59 +# CHECK-NEXT: IPC: 1.59 +# CHECK-NEXT: Block RThroughput: 4.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -29,68 +29,80 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 addl %eax, %ecx -# CHECK-NEXT: 1 1 0.33 addl %eax, %edx -# CHECK-NEXT: 1 1 0.33 addl %eax, %ebx -# CHECK-NEXT: 1 1 0.33 addl %edx, %esi -# CHECK-NEXT: 1 1 0.33 addl %ebx, %eax -# CHECK-NEXT: 1 1 0.33 addl %edx, %esi -# CHECK-NEXT: 1 1 0.33 addl %ebx, %eax -# CHECK-NEXT: 1 1 0.33 addl %ebx, %eax +# CHECK-NEXT: 1 1 0.50 addl %eax, %ecx +# CHECK-NEXT: 1 1 0.50 addl %eax, %edx +# CHECK-NEXT: 1 1 0.50 addl %eax, %ebx +# CHECK-NEXT: 1 1 0.50 addl %edx, %esi +# CHECK-NEXT: 1 1 0.50 addl %ebx, %eax +# CHECK-NEXT: 1 1 0.50 addl %edx, %esi +# CHECK-NEXT: 1 1 0.50 addl %ebx, %eax +# CHECK-NEXT: 1 1 0.50 addl %ebx, %eax # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 2.66 2.67 - 2.67 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 4.00 4.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 - 0.34 - - addl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.34 - 0.33 - - addl %eax, %edx -# CHECK-NEXT: - - 0.34 0.33 - 0.33 - - addl %eax, %ebx -# CHECK-NEXT: - - 0.33 0.33 - 0.34 - - addl %edx, %esi -# CHECK-NEXT: - - 0.33 0.34 - 0.33 - - addl %ebx, %eax -# CHECK-NEXT: - - 0.34 0.33 - 0.33 - - addl %edx, %esi -# CHECK-NEXT: - - 0.33 0.33 - 0.34 - - addl %ebx, %eax -# CHECK-NEXT: - - 0.33 0.34 - 0.33 - - addl %ebx, %eax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - addl %eax, %ecx +# CHECK-NEXT: - - - - - 0.01 0.99 - - - - - - - - - - - - - addl %eax, %edx +# CHECK-NEXT: - - - - - 0.99 0.01 - - - - - - - - - - - - - addl %eax, %ebx +# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - addl %edx, %esi +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - addl %ebx, %eax +# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - addl %edx, %esi +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - addl %ebx, %eax +# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - addl %ebx, %eax # CHECK: Timeline view: -# CHECK-NEXT: 01234 +# CHECK-NEXT: 01234567 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER . . . addl %eax, %ecx -# CHECK-NEXT: [0,1] DeER . . . addl %eax, %edx -# CHECK-NEXT: [0,2] DeER . . . addl %eax, %ebx -# CHECK-NEXT: [0,3] D=eER. . . addl %edx, %esi -# CHECK-NEXT: [0,4] .DeER. . . addl %ebx, %eax -# CHECK-NEXT: [0,5] .D=eER . . addl %edx, %esi -# CHECK-NEXT: [0,6] .D=eER . . addl %ebx, %eax -# CHECK-NEXT: [0,7] .D==eER . . addl %ebx, %eax -# CHECK-NEXT: [1,0] . D==eER . . addl %eax, %ecx -# CHECK-NEXT: [1,1] . D==eER . . addl %eax, %edx -# CHECK-NEXT: [1,2] . D==eER . . addl %eax, %ebx -# CHECK-NEXT: [1,3] . D===eER . . addl %edx, %esi -# CHECK-NEXT: [1,4] . D==eER . . addl %ebx, %eax -# CHECK-NEXT: [1,5] . D===eER. . addl %edx, %esi -# CHECK-NEXT: [1,6] . D===eER. . addl %ebx, %eax -# CHECK-NEXT: [1,7] . D====eER . addl %ebx, %eax -# CHECK-NEXT: [2,0] . D====eER . addl %eax, %ecx -# CHECK-NEXT: [2,1] . D====eER . addl %eax, %edx -# CHECK-NEXT: [2,2] . D====eER . addl %eax, %ebx -# CHECK-NEXT: [2,3] . D=====eER . addl %edx, %esi -# CHECK-NEXT: [2,4] . D====eER . addl %ebx, %eax -# CHECK-NEXT: [2,5] . D=====eER. addl %edx, %esi -# CHECK-NEXT: [2,6] . D=====eER. addl %ebx, %eax -# CHECK-NEXT: [2,7] . D======eER addl %ebx, %eax +# CHECK: [0,0] DeER . . . . addl %eax, %ecx +# CHECK-NEXT: [0,1] DeER . . . . addl %eax, %edx +# CHECK-NEXT: [0,2] D=eER. . . . addl %eax, %ebx +# CHECK-NEXT: [0,3] D=eER. . . . addl %edx, %esi +# CHECK-NEXT: [0,4] .D=eER . . . addl %ebx, %eax +# CHECK-NEXT: [0,5] .D=eER . . . addl %edx, %esi +# CHECK-NEXT: [0,6] .D==eER . . . addl %ebx, %eax +# CHECK-NEXT: [0,7] .D===eER . . . addl %ebx, %eax +# CHECK-NEXT: [1,0] . D====eER. . . addl %eax, %ecx +# CHECK-NEXT: [1,1] . D===eE-R. . . addl %eax, %edx +# CHECK-NEXT: [1,2] . D===eE-R. . . addl %eax, %ebx +# CHECK-NEXT: [1,3] . D====eER. . . addl %edx, %esi +# CHECK-NEXT: [1,4] . D====eER . . addl %ebx, %eax +# CHECK-NEXT: [1,5] . D====eER . . addl %edx, %esi +# CHECK-NEXT: [1,6] . D=====eER . . addl %ebx, %eax +# CHECK-NEXT: [1,7] . D======eER . . addl %ebx, %eax +# CHECK-NEXT: [2,0] . D=======eER. . addl %eax, %ecx +# CHECK-NEXT: [2,1] . D======eE-R. . addl %eax, %edx +# CHECK-NEXT: [2,2] . D======eE-R. . addl %eax, %ebx +# CHECK-NEXT: [2,3] . D=======eER. . addl %edx, %esi +# CHECK-NEXT: [2,4] . D=======eER . addl %ebx, %eax +# CHECK-NEXT: [2,5] . D=======eER . addl %edx, %esi +# CHECK-NEXT: [2,6] . D========eER. addl %ebx, %eax +# CHECK-NEXT: [2,7] . D=========eER addl %ebx, %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -99,11 +111,11 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 3.0 0.3 0.0 addl %eax, %ecx -# CHECK-NEXT: 1. 3 3.0 0.3 0.0 addl %eax, %edx -# CHECK-NEXT: 2. 3 3.0 0.3 0.0 addl %eax, %ebx -# CHECK-NEXT: 3. 3 4.0 0.0 0.0 addl %edx, %esi -# CHECK-NEXT: 4. 3 3.0 0.0 0.0 addl %ebx, %eax -# CHECK-NEXT: 5. 3 4.0 0.0 0.0 addl %edx, %esi -# CHECK-NEXT: 6. 3 4.0 0.0 0.0 addl %ebx, %eax -# CHECK-NEXT: 7. 3 5.0 0.0 0.0 addl %ebx, %eax +# CHECK-NEXT: 0. 3 4.7 1.0 0.0 addl %eax, %ecx +# CHECK-NEXT: 1. 3 4.0 0.3 0.7 addl %eax, %edx +# CHECK-NEXT: 2. 3 4.3 0.7 0.7 addl %eax, %ebx +# CHECK-NEXT: 3. 3 5.0 0.0 0.0 addl %edx, %esi +# CHECK-NEXT: 4. 3 5.0 0.7 0.0 addl %ebx, %eax +# CHECK-NEXT: 5. 3 5.0 0.0 0.0 addl %edx, %esi +# CHECK-NEXT: 6. 3 6.0 0.0 0.0 addl %ebx, %eax +# CHECK-NEXT: 7. 3 7.0 0.0 0.0 addl %ebx, %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/rcu-statistics.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/rcu-statistics.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/rcu-statistics.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -resource-pressure=false -retire-stats -iterations=1 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -retire-stats -iterations=1 < %s | FileCheck %s vsqrtps %xmm0, %xmm2 vaddps %xmm0, %xmm1, %xmm2 @@ -20,13 +20,13 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 16 -# CHECK-NEXT: Total Cycles: 20 +# CHECK-NEXT: Total Cycles: 22 # CHECK-NEXT: Total uOps: 16 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.80 -# CHECK-NEXT: IPC: 0.80 -# CHECK-NEXT: Block RThroughput: 15.0 +# CHECK-NEXT: uOps Per Cycle: 0.73 +# CHECK-NEXT: IPC: 0.73 +# CHECK-NEXT: Block RThroughput: 18.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -37,25 +37,26 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 14 14.00 vsqrtps %xmm0, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 10.50 vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 # CHECK: Retire Control Unit - number of cycles where we saw N instructions retired: # CHECK-NEXT: [# retired], [# cycles] -# CHECK-NEXT: 0, 16 (80.0%) -# CHECK-NEXT: 1, 3 (15.0%) -# CHECK-NEXT: 13, 1 (5.0%) +# CHECK-NEXT: 0, 11 (50.0%) +# CHECK-NEXT: 1, 9 (40.9%) +# CHECK-NEXT: 3, 1 (4.5%) +# CHECK-NEXT: 4, 1 (4.5%) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s # The vmul can start executing 3cy in advance. That is beause the first use # operand (i.e. %xmm1) is a ReadAfterLd. That means, the memory operand is @@ -10,12 +10,12 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 2 -# CHECK-NEXT: Total Cycles: 14 -# CHECK-NEXT: Total uOps: 3 +# CHECK-NEXT: Total Cycles: 13 +# CHECK-NEXT: Total uOps: 2 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.21 -# CHECK-NEXT: IPC: 0.14 +# CHECK-NEXT: uOps Per Cycle: 0.15 +# CHECK-NEXT: IPC: 0.15 # CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Instruction Info: @@ -27,15 +27,15 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: 2 11 1.00 * vmulps (%rdi), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * vmulps (%rdi), %xmm1, %xmm2 # CHECK: Timeline view: -# CHECK-NEXT: 0123 +# CHECK-NEXT: 012 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . . vaddps %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: [0,1] DeeeeeeeeeeeER vmulps (%rdi), %xmm1, %xmm2 +# CHECK: [0,0] DeeeeeER . . vaddps %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: [0,1] DeeeeeeeeeeER vmulps (%rdi), %xmm1, %xmm2 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-2.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=0 -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=0 -timeline < %s | FileCheck %s imull %esi imull (%rdi) @@ -9,12 +9,12 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 2 -# CHECK-NEXT: Total Cycles: 13 -# CHECK-NEXT: Total uOps: 7 +# CHECK-NEXT: Total Cycles: 12 +# CHECK-NEXT: Total uOps: 2 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.54 -# CHECK-NEXT: IPC: 0.15 +# CHECK-NEXT: uOps Per Cycle: 0.17 +# CHECK-NEXT: IPC: 0.17 # CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: @@ -26,15 +26,15 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 3 4 1.00 imull %esi -# CHECK-NEXT: 4 9 1.00 * imull (%rdi) +# CHECK-NEXT: 1 4 1.00 imull %esi +# CHECK-NEXT: 1 8 1.00 * imull (%rdi) # CHECK: Timeline view: -# CHECK-NEXT: 012 +# CHECK-NEXT: 01 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeeER . . imull %esi -# CHECK-NEXT: [0,1] .DeeeeeeeeeER imull (%rdi) +# CHECK: [0,0] DeeeeER .. imull %esi +# CHECK-NEXT: [0,1] D=eeeeeeeeER imull (%rdi) # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -44,4 +44,4 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 imull %esi -# CHECK-NEXT: 1. 1 1.0 1.0 0.0 imull (%rdi) +# CHECK-NEXT: 1. 1 2.0 1.0 0.0 imull (%rdi) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-3.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-3.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/read-advance-3.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=0 -timeline -dispatch=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=0 -timeline -dispatch=3 < %s | FileCheck %s add %rdi, %rsi add (%rsp), %rsi @@ -7,13 +7,13 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 3 -# CHECK-NEXT: Total Cycles: 9 -# CHECK-NEXT: Total uOps: 4 +# CHECK-NEXT: Total Cycles: 8 +# CHECK-NEXT: Total uOps: 3 # CHECK: Dispatch Width: 3 -# CHECK-NEXT: uOps Per Cycle: 0.44 -# CHECK-NEXT: IPC: 0.33 -# CHECK-NEXT: Block RThroughput: 1.3 +# CHECK-NEXT: uOps Per Cycle: 0.38 +# CHECK-NEXT: IPC: 0.38 +# CHECK-NEXT: Block RThroughput: 1.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -24,16 +24,16 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 addq %rdi, %rsi -# CHECK-NEXT: 2 6 0.50 * addq (%rsp), %rsi -# CHECK-NEXT: 1 1 0.33 addq %rdx, %r8 +# CHECK-NEXT: 1 1 0.50 addq %rdi, %rsi +# CHECK-NEXT: 1 5 0.50 * addq (%rsp), %rsi +# CHECK-NEXT: 1 1 0.50 addq %rdx, %r8 # CHECK: Timeline view: -# CHECK-NEXT: Index 012345678 +# CHECK-NEXT: Index 01234567 -# CHECK: [0,0] DeER . . addq %rdi, %rsi -# CHECK-NEXT: [0,1] DeeeeeeER addq (%rsp), %rsi -# CHECK-NEXT: [0,2] .DeE----R addq %rdx, %r8 +# CHECK: [0,0] DeER . . addq %rdi, %rsi +# CHECK-NEXT: [0,1] DeeeeeER addq (%rsp), %rsi +# CHECK-NEXT: [0,2] D=eE---R addq %rdx, %r8 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -44,4 +44,4 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 addq %rdi, %rsi # CHECK-NEXT: 1. 1 1.0 0.0 0.0 addq (%rsp), %rsi -# CHECK-NEXT: 2. 1 1.0 1.0 4.0 addq %rdx, %r8 +# CHECK-NEXT: 2. 1 2.0 2.0 3.0 addq %rdx, %r8 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s # The register move from XMM0 to XMM1 can be eliminated at register renaming # stage. So, it should not consume pipeline resources. @@ -10,12 +10,12 @@ # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 9 -# CHECK-NEXT: Total Cycles: 9 +# CHECK-NEXT: Total Cycles: 11 # CHECK-NEXT: Total uOps: 9 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.00 -# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: uOps Per Cycle: 0.82 +# CHECK-NEXT: IPC: 0.82 # CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Instruction Info: @@ -28,45 +28,68 @@ # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 0 0.25 vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1 1 1.00 vmovaps %xmm0, %xmm1 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovaps %xmm0, %xmm1 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm1, %xmm1, %xmm2 # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 9 -# CHECK-NEXT: Max number of mappings used: 8 +# CHECK-NEXT: Total number of mappings created: 6 +# CHECK-NEXT: Max number of mappings used: 6 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 6 +# CHECK-NEXT: Max number of mappings used: 6 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 0.67 1.33 - - - - 1.00 1.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - - - vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: - - - - - 1.00 - - vmovaps %xmm0, %xmm1 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - - - 0.33 0.67 - - - - - 1.00 - - - - vmovaps %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - 0.33 0.67 - - - - 1.00 - - - - - vaddps %xmm1, %xmm1, %xmm2 # CHECK: Timeline view: -# CHECK-NEXT: Index 012345678 +# CHECK-NEXT: 0 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DR . . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [0,1] DeER . . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [0,2] D=eeeER . vaddps %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [1,0] D-----R . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,1] .DeE--R . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [1,2] .D=eeeER. vaddps %xmm1, %xmm1, %xmm2 -# CHECK-NEXT: [2,0] .D-----R. vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,1] .D=eE--R. vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [2,2] . D=eeeER vaddps %xmm1, %xmm1, %xmm2 +# CHECK: [0,0] DR . . vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [0,1] DeER . . vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [0,2] D=eeeeeER . vaddps %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [1,0] D-------R . vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [1,1] .DeE----R . vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [1,2] .D=eeeeeER. vaddps %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [2,0] .D-------R. vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [2,1] .D=eE----R. vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [2,2] . D=eeeeeER vaddps %xmm1, %xmm1, %xmm2 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -75,6 +98,6 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 0.0 0.0 3.3 vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1. 3 1.3 1.3 1.3 vmovaps %xmm0, %xmm1 +# CHECK-NEXT: 0. 3 0.0 0.0 4.7 vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: 1. 3 1.3 1.3 2.7 vmovaps %xmm0, %xmm1 # CHECK-NEXT: 2. 3 2.0 0.0 0.0 vaddps %xmm1, %xmm1, %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-2.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s pxor %mm0, %mm0 movq %mm0, %mm1 @@ -14,13 +14,13 @@ # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 27 -# CHECK-NEXT: Total Cycles: 22 +# CHECK-NEXT: Total Cycles: 18 # CHECK-NEXT: Total uOps: 27 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.23 -# CHECK-NEXT: IPC: 1.23 -# CHECK-NEXT: Block RThroughput: 4.0 +# CHECK-NEXT: uOps Per Cycle: 1.50 +# CHECK-NEXT: IPC: 1.50 +# CHECK-NEXT: Block RThroughput: 3.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -31,77 +31,99 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 pxor %mm0, %mm0 -# CHECK-NEXT: 1 1 0.50 movq %mm0, %mm1 +# CHECK-NEXT: 1 0 0.25 pxor %mm0, %mm0 +# CHECK-NEXT: 1 2 0.50 movq %mm0, %mm1 # CHECK-NEXT: 1 0 0.25 xorps %xmm0, %xmm0 -# CHECK-NEXT: 1 1 1.00 movaps %xmm0, %xmm1 -# CHECK-NEXT: 1 1 1.00 movups %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 movapd %xmm2, %xmm3 -# CHECK-NEXT: 1 1 1.00 movupd %xmm3, %xmm4 -# CHECK-NEXT: 1 1 0.33 movdqa %xmm4, %xmm5 -# CHECK-NEXT: 1 1 0.33 movdqu %xmm5, %xmm0 +# CHECK-NEXT: 1 1 0.50 movaps %xmm0, %xmm1 +# CHECK-NEXT: 1 1 0.50 movups %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 movapd %xmm2, %xmm3 +# CHECK-NEXT: 1 1 0.50 movupd %xmm3, %xmm4 +# CHECK-NEXT: 1 2 0.50 movdqa %xmm4, %xmm5 +# CHECK-NEXT: 1 2 0.50 movdqu %xmm5, %xmm0 # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 27 -# CHECK-NEXT: Max number of mappings used: 21 +# CHECK-NEXT: Total number of mappings created: 21 +# CHECK-NEXT: Max number of mappings used: 16 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 21 +# CHECK-NEXT: Max number of mappings used: 16 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.67 1.67 - 4.67 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 2.67 1.33 - 3.00 - - 3.33 3.67 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 0.67 - 0.33 - - pxor %mm0, %mm0 -# CHECK-NEXT: - - 1.00 - - - - - movq %mm0, %mm1 -# CHECK-NEXT: - - - - - - - - xorps %xmm0, %xmm0 -# CHECK-NEXT: - - - - - 1.00 - - movaps %xmm0, %xmm1 -# CHECK-NEXT: - - - - - 1.00 - - movups %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movapd %xmm2, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - movupd %xmm3, %xmm4 -# CHECK-NEXT: - - - 1.00 - - - - movdqa %xmm4, %xmm5 -# CHECK-NEXT: - - 0.67 - - 0.33 - - movdqu %xmm5, %xmm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pxor %mm0, %mm0 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - movq %mm0, %mm1 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - xorps %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - - - 0.67 0.33 - - - - 0.33 0.67 - - - - movaps %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - 0.67 0.33 - - - - 0.33 0.67 - - - - movups %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.67 0.33 - - - - 1.00 - - - - - movapd %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.67 0.33 - - - - 0.33 0.67 - - - - movupd %xmm3, %xmm4 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 1.00 - - - - - movdqa %xmm4, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 0.33 0.67 - - - - movdqu %xmm5, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 -# CHECK-NEXT: Index 0123456789 01 +# CHECK-NEXT: 01234567 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER . . . .. pxor %mm0, %mm0 -# CHECK-NEXT: [0,1] D=eER. . . .. movq %mm0, %mm1 -# CHECK-NEXT: [0,2] D---R. . . .. xorps %xmm0, %xmm0 -# CHECK-NEXT: [0,3] D=eER. . . .. movaps %xmm0, %xmm1 -# CHECK-NEXT: [0,4] .D=eER . . .. movups %xmm1, %xmm2 -# CHECK-NEXT: [0,5] .D==eER . . .. movapd %xmm2, %xmm3 -# CHECK-NEXT: [0,6] .D===eER . . .. movupd %xmm3, %xmm4 -# CHECK-NEXT: [0,7] .D====eER . . .. movdqa %xmm4, %xmm5 -# CHECK-NEXT: [0,8] . D====eER. . .. movdqu %xmm5, %xmm0 -# CHECK-NEXT: [1,0] . DeE----R. . .. pxor %mm0, %mm0 -# CHECK-NEXT: [1,1] . D=eE---R. . .. movq %mm0, %mm1 -# CHECK-NEXT: [1,2] . D=====ER. . .. xorps %xmm0, %xmm0 -# CHECK-NEXT: [1,3] . D====eER . .. movaps %xmm0, %xmm1 -# CHECK-NEXT: [1,4] . D=====eER . .. movups %xmm1, %xmm2 -# CHECK-NEXT: [1,5] . D======eER . .. movapd %xmm2, %xmm3 -# CHECK-NEXT: [1,6] . D=======eER . .. movupd %xmm3, %xmm4 -# CHECK-NEXT: [1,7] . D=======eER. .. movdqa %xmm4, %xmm5 -# CHECK-NEXT: [1,8] . D========eER .. movdqu %xmm5, %xmm0 -# CHECK-NEXT: [2,0] . DeE--------R .. pxor %mm0, %mm0 -# CHECK-NEXT: [2,1] . D=eE-------R .. movq %mm0, %mm1 -# CHECK-NEXT: [2,2] . D========ER .. xorps %xmm0, %xmm0 -# CHECK-NEXT: [2,3] . D========eER .. movaps %xmm0, %xmm1 -# CHECK-NEXT: [2,4] . D=========eER .. movups %xmm1, %xmm2 -# CHECK-NEXT: [2,5] . D==========eER .. movapd %xmm2, %xmm3 -# CHECK-NEXT: [2,6] . .D==========eER.. movupd %xmm3, %xmm4 -# CHECK-NEXT: [2,7] . .D===========eER. movdqa %xmm4, %xmm5 -# CHECK-NEXT: [2,8] . .D============eER movdqu %xmm5, %xmm0 +# CHECK: [0,0] DR . . . . pxor %mm0, %mm0 +# CHECK-NEXT: [0,1] DeeER. . . . movq %mm0, %mm1 +# CHECK-NEXT: [0,2] D---R. . . . xorps %xmm0, %xmm0 +# CHECK-NEXT: [0,3] DeE-R. . . . movaps %xmm0, %xmm1 +# CHECK-NEXT: [0,4] .DeER. . . . movups %xmm1, %xmm2 +# CHECK-NEXT: [0,5] .D=eER . . . movapd %xmm2, %xmm3 +# CHECK-NEXT: [0,6] .D==eER . . . movupd %xmm3, %xmm4 +# CHECK-NEXT: [0,7] .D===eeER . . . movdqa %xmm4, %xmm5 +# CHECK-NEXT: [0,8] . D====eeER . . movdqu %xmm5, %xmm0 +# CHECK-NEXT: [1,0] . D-------R . . pxor %mm0, %mm0 +# CHECK-NEXT: [1,1] . DeeE----R . . movq %mm0, %mm1 +# CHECK-NEXT: [1,2] . D-------R . . xorps %xmm0, %xmm0 +# CHECK-NEXT: [1,3] . DeE-----R . . movaps %xmm0, %xmm1 +# CHECK-NEXT: [1,4] . D=eE----R . . movups %xmm1, %xmm2 +# CHECK-NEXT: [1,5] . D==eE---R . . movapd %xmm2, %xmm3 +# CHECK-NEXT: [1,6] . D===eE--R . . movupd %xmm3, %xmm4 +# CHECK-NEXT: [1,7] . D===eeE-R . . movdqa %xmm4, %xmm5 +# CHECK-NEXT: [1,8] . D=====eeER . . movdqu %xmm5, %xmm0 +# CHECK-NEXT: [2,0] . D--------R . . pxor %mm0, %mm0 +# CHECK-NEXT: [2,1] . D=eeE----R . . movq %mm0, %mm1 +# CHECK-NEXT: [2,2] . D-------R . . xorps %xmm0, %xmm0 +# CHECK-NEXT: [2,3] . D==eE----R. . movaps %xmm0, %xmm1 +# CHECK-NEXT: [2,4] . D===eE---R. . movups %xmm1, %xmm2 +# CHECK-NEXT: [2,5] . D====eE--R. . movapd %xmm2, %xmm3 +# CHECK-NEXT: [2,6] . .D====eE-R. . movupd %xmm3, %xmm4 +# CHECK-NEXT: [2,7] . .D=====eeER . movdqa %xmm4, %xmm5 +# CHECK-NEXT: [2,8] . .D=======eeER movdqu %xmm5, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -110,12 +132,12 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 1.0 1.0 4.0 pxor %mm0, %mm0 -# CHECK-NEXT: 1. 3 2.0 0.0 3.3 movq %mm0, %mm1 -# CHECK-NEXT: 2. 3 5.0 0.0 1.0 xorps %xmm0, %xmm0 -# CHECK-NEXT: 3. 3 5.3 0.7 0.0 movaps %xmm0, %xmm1 -# CHECK-NEXT: 4. 3 6.0 0.0 0.0 movups %xmm1, %xmm2 -# CHECK-NEXT: 5. 3 7.0 0.0 0.0 movapd %xmm2, %xmm3 -# CHECK-NEXT: 6. 3 7.7 0.0 0.0 movupd %xmm3, %xmm4 -# CHECK-NEXT: 7. 3 8.3 0.0 0.0 movdqa %xmm4, %xmm5 -# CHECK-NEXT: 8. 3 9.0 0.0 0.0 movdqu %xmm5, %xmm0 +# CHECK-NEXT: 0. 3 0.0 0.0 5.0 pxor %mm0, %mm0 +# CHECK-NEXT: 1. 3 1.3 1.3 2.7 movq %mm0, %mm1 +# CHECK-NEXT: 2. 3 0.0 0.0 5.7 xorps %xmm0, %xmm0 +# CHECK-NEXT: 3. 3 1.7 1.7 3.3 movaps %xmm0, %xmm1 +# CHECK-NEXT: 4. 3 2.3 0.0 2.3 movups %xmm1, %xmm2 +# CHECK-NEXT: 5. 3 3.3 0.0 1.7 movapd %xmm2, %xmm3 +# CHECK-NEXT: 6. 3 4.0 0.0 1.0 movupd %xmm3, %xmm4 +# CHECK-NEXT: 7. 3 4.7 0.0 0.3 movdqa %xmm4, %xmm5 +# CHECK-NEXT: 8. 3 6.3 0.0 0.0 movdqu %xmm5, %xmm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-3.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-3.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-3.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s vxorps %xmm0, %xmm0, %xmm0 vmovaps %xmm0, %xmm1 @@ -11,13 +11,13 @@ # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 21 -# CHECK-NEXT: Total Cycles: 21 +# CHECK-NEXT: Total Cycles: 17 # CHECK-NEXT: Total uOps: 21 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.00 -# CHECK-NEXT: IPC: 1.00 -# CHECK-NEXT: Block RThroughput: 4.0 +# CHECK-NEXT: uOps Per Cycle: 1.24 +# CHECK-NEXT: IPC: 1.24 +# CHECK-NEXT: Block RThroughput: 3.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -29,66 +29,88 @@ # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 0 0.25 vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1 1 1.00 vmovaps %xmm0, %xmm1 -# CHECK-NEXT: 1 1 1.00 vmovups %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovapd %xmm2, %xmm3 -# CHECK-NEXT: 1 1 1.00 vmovupd %xmm3, %xmm4 -# CHECK-NEXT: 1 1 0.33 vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: 1 1 0.33 vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: 1 1 0.50 vmovaps %xmm0, %xmm1 +# CHECK-NEXT: 1 1 0.50 vmovups %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovapd %xmm2, %xmm3 +# CHECK-NEXT: 1 1 0.50 vmovupd %xmm3, %xmm4 +# CHECK-NEXT: 1 2 0.50 vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: 1 2 0.50 vmovdqu %xmm5, %xmm0 # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 21 -# CHECK-NEXT: Max number of mappings used: 17 +# CHECK-NEXT: Total number of mappings created: 18 +# CHECK-NEXT: Max number of mappings used: 15 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 18 +# CHECK-NEXT: Max number of mappings used: 15 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - 4.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 2.00 2.00 1.33 0.67 - - 3.00 3.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - - - vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: - - - - - 1.00 - - vmovaps %xmm0, %xmm1 -# CHECK-NEXT: - - - - - 1.00 - - vmovups %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovapd %xmm2, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vmovupd %xmm3, %xmm4 -# CHECK-NEXT: - - - 1.00 - - - - vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: - - 1.00 - - - - - vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - - - 0.67 0.33 - - - - 0.67 0.33 - - - - vmovaps %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - 0.33 0.67 - - - - 0.67 0.33 - - - - vmovups %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.67 - - - - 0.33 0.67 - - - - vmovapd %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.67 0.33 - - - - 0.33 0.67 - - - - vmovupd %xmm3, %xmm4 +# CHECK-NEXT: - - - - - - - - - - 0.67 0.33 - - 0.33 0.67 - - - - vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: - - - - - - - - - - 0.67 0.33 - - 0.67 0.33 - - - - vmovdqu %xmm5, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 -# CHECK-NEXT: Index 0123456789 0 +# CHECK-NEXT: 0123456 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DR . . . . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [0,1] DeER . . . . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [0,2] D=eER. . . . vmovups %xmm1, %xmm2 -# CHECK-NEXT: [0,3] D==eER . . . vmovapd %xmm2, %xmm3 -# CHECK-NEXT: [0,4] .D==eER . . . vmovupd %xmm3, %xmm4 -# CHECK-NEXT: [0,5] .D===eER . . . vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: [0,6] .D====eER . . . vmovdqu %xmm5, %xmm0 -# CHECK-NEXT: [1,0] .D=====ER . . . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,1] . D====eER. . . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [1,2] . D=====eER . . vmovups %xmm1, %xmm2 -# CHECK-NEXT: [1,3] . D======eER . . vmovapd %xmm2, %xmm3 -# CHECK-NEXT: [1,4] . D=======eER . . vmovupd %xmm3, %xmm4 -# CHECK-NEXT: [1,5] . D=======eER . . vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: [1,6] . D========eER. . vmovdqu %xmm5, %xmm0 -# CHECK-NEXT: [2,0] . D=========ER. . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,1] . D=========eER . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [2,2] . D=========eER . vmovups %xmm1, %xmm2 -# CHECK-NEXT: [2,3] . D==========eER . vmovapd %xmm2, %xmm3 -# CHECK-NEXT: [2,4] . D===========eER . vmovupd %xmm3, %xmm4 -# CHECK-NEXT: [2,5] . D============eER. vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: [2,6] . D============eER vmovdqu %xmm5, %xmm0 +# CHECK: [0,0] DR . . .. vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [0,1] DeER . . .. vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [0,2] D=eER. . .. vmovups %xmm1, %xmm2 +# CHECK-NEXT: [0,3] D==eER . .. vmovapd %xmm2, %xmm3 +# CHECK-NEXT: [0,4] .D==eER . .. vmovupd %xmm3, %xmm4 +# CHECK-NEXT: [0,5] .D===eeER . .. vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: [0,6] .D=====eeER .. vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: [1,0] .D--------R .. vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [1,1] . DeE-----R .. vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [1,2] . D=eE----R .. vmovups %xmm1, %xmm2 +# CHECK-NEXT: [1,3] . D==eE----R .. vmovapd %xmm2, %xmm3 +# CHECK-NEXT: [1,4] . D===eE---R .. vmovupd %xmm3, %xmm4 +# CHECK-NEXT: [1,5] . D===eeE-R .. vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: [1,6] . D=====eeER .. vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: [2,0] . D--------R .. vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [2,1] . D==eE----R .. vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [2,2] . D===eE--R .. vmovups %xmm1, %xmm2 +# CHECK-NEXT: [2,3] . D====eE--R .. vmovapd %xmm2, %xmm3 +# CHECK-NEXT: [2,4] . D=====eE-R .. vmovupd %xmm3, %xmm4 +# CHECK-NEXT: [2,5] . D======eeER.. vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: [2,6] . D=======eeER vmovdqu %xmm5, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -97,10 +119,10 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 5.3 0.0 0.0 vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1. 3 5.3 0.3 0.0 vmovaps %xmm0, %xmm1 -# CHECK-NEXT: 2. 3 6.0 0.0 0.0 vmovups %xmm1, %xmm2 -# CHECK-NEXT: 3. 3 7.0 0.0 0.0 vmovapd %xmm2, %xmm3 -# CHECK-NEXT: 4. 3 7.7 0.0 0.0 vmovupd %xmm3, %xmm4 -# CHECK-NEXT: 5. 3 8.3 0.0 0.0 vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: 6. 3 9.0 0.0 0.0 vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: 0. 3 0.0 0.0 5.3 vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: 1. 3 1.7 1.7 3.0 vmovaps %xmm0, %xmm1 +# CHECK-NEXT: 2. 3 2.7 0.3 2.0 vmovups %xmm1, %xmm2 +# CHECK-NEXT: 3. 3 3.7 0.0 2.0 vmovapd %xmm2, %xmm3 +# CHECK-NEXT: 4. 3 4.3 0.0 1.3 vmovupd %xmm3, %xmm4 +# CHECK-NEXT: 5. 3 5.0 0.0 0.3 vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: 6. 3 6.7 0.0 0.0 vmovdqu %xmm5, %xmm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-4.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-4.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-4.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s xor %eax, %eax mov %eax, %ebx @@ -9,13 +9,13 @@ # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 15 -# CHECK-NEXT: Total Cycles: 15 +# CHECK-NEXT: Total Cycles: 11 # CHECK-NEXT: Total uOps: 15 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.00 -# CHECK-NEXT: IPC: 1.00 -# CHECK-NEXT: Block RThroughput: 1.3 +# CHECK-NEXT: uOps Per Cycle: 1.36 +# CHECK-NEXT: IPC: 1.36 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -27,56 +27,78 @@ # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 0 0.25 xorl %eax, %eax -# CHECK-NEXT: 1 1 0.33 movl %eax, %ebx -# CHECK-NEXT: 1 1 0.33 movl %ebx, %ecx -# CHECK-NEXT: 1 1 0.33 movl %ecx, %edx -# CHECK-NEXT: 1 1 0.33 movl %edx, %eax +# CHECK-NEXT: 1 1 0.50 movl %eax, %ebx +# CHECK-NEXT: 1 1 0.50 movl %ebx, %ecx +# CHECK-NEXT: 1 1 0.50 movl %ecx, %edx +# CHECK-NEXT: 1 1 0.50 movl %edx, %eax # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 18 -# CHECK-NEXT: Max number of mappings used: 15 +# CHECK-NEXT: Total number of mappings created: 12 +# CHECK-NEXT: Max number of mappings used: 11 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 12 +# CHECK-NEXT: Max number of mappings used: 11 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.33 1.33 - 1.33 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - - - xorl %eax, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movl %eax, %ebx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movl %ebx, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movl %ecx, %edx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movl %edx, %eax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - xorl %eax, %eax +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - movl %eax, %ebx +# CHECK-NEXT: - - - - - 0.67 0.33 - - - - - - - - - - - - - movl %ebx, %ecx +# CHECK-NEXT: - - - - - 0.33 0.67 - - - - - - - - - - - - - movl %ecx, %edx +# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - movl %edx, %eax # CHECK: Timeline view: -# CHECK-NEXT: 01234 +# CHECK-NEXT: 0 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DR . . . xorl %eax, %eax -# CHECK-NEXT: [0,1] DeER . . . movl %eax, %ebx -# CHECK-NEXT: [0,2] D=eER. . . movl %ebx, %ecx -# CHECK-NEXT: [0,3] D==eER . . movl %ecx, %edx -# CHECK-NEXT: [0,4] .D==eER . . movl %edx, %eax -# CHECK-NEXT: [1,0] .D===ER . . xorl %eax, %eax -# CHECK-NEXT: [1,1] .D===eER . . movl %eax, %ebx -# CHECK-NEXT: [1,2] .D====eER . . movl %ebx, %ecx -# CHECK-NEXT: [1,3] . D====eER. . movl %ecx, %edx -# CHECK-NEXT: [1,4] . D=====eER . movl %edx, %eax -# CHECK-NEXT: [2,0] . D======ER . xorl %eax, %eax -# CHECK-NEXT: [2,1] . D======eER . movl %eax, %ebx -# CHECK-NEXT: [2,2] . D======eER . movl %ebx, %ecx -# CHECK-NEXT: [2,3] . D=======eER. movl %ecx, %edx -# CHECK-NEXT: [2,4] . D========eER movl %edx, %eax +# CHECK: [0,0] DR . . xorl %eax, %eax +# CHECK-NEXT: [0,1] DeER . . movl %eax, %ebx +# CHECK-NEXT: [0,2] D=eER. . movl %ebx, %ecx +# CHECK-NEXT: [0,3] D==eER . movl %ecx, %edx +# CHECK-NEXT: [0,4] .D==eER . movl %edx, %eax +# CHECK-NEXT: [1,0] .D----R . xorl %eax, %eax +# CHECK-NEXT: [1,1] .DeE--R . movl %eax, %ebx +# CHECK-NEXT: [1,2] .D=eE-R . movl %ebx, %ecx +# CHECK-NEXT: [1,3] . D=eE-R . movl %ecx, %edx +# CHECK-NEXT: [1,4] . D==eER . movl %edx, %eax +# CHECK-NEXT: [2,0] . D----R . xorl %eax, %eax +# CHECK-NEXT: [2,1] . D==eER . movl %eax, %ebx +# CHECK-NEXT: [2,2] . D==eER . movl %ebx, %ecx +# CHECK-NEXT: [2,3] . D===eER. movl %ecx, %edx +# CHECK-NEXT: [2,4] . D====eER movl %edx, %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -85,8 +107,8 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 3.7 0.0 0.0 xorl %eax, %eax -# CHECK-NEXT: 1. 3 4.0 0.3 0.0 movl %eax, %ebx -# CHECK-NEXT: 2. 3 4.7 0.0 0.0 movl %ebx, %ecx -# CHECK-NEXT: 3. 3 5.3 0.0 0.0 movl %ecx, %edx -# CHECK-NEXT: 4. 3 6.0 0.0 0.0 movl %edx, %eax +# CHECK-NEXT: 0. 3 0.0 0.0 2.7 xorl %eax, %eax +# CHECK-NEXT: 1. 3 1.7 1.7 0.7 movl %eax, %ebx +# CHECK-NEXT: 2. 3 2.3 0.0 0.3 movl %ebx, %ecx +# CHECK-NEXT: 3. 3 3.0 0.0 0.3 movl %ecx, %edx +# CHECK-NEXT: 4. 3 3.7 0.0 0.0 movl %edx, %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-5.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-5.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/reg-move-elimination-5.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=3 -timeline -register-file-stats < %s | FileCheck %s xor %rax, %rax mov %rax, %rbx @@ -9,13 +9,13 @@ # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 15 -# CHECK-NEXT: Total Cycles: 15 +# CHECK-NEXT: Total Cycles: 11 # CHECK-NEXT: Total uOps: 15 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.00 -# CHECK-NEXT: IPC: 1.00 -# CHECK-NEXT: Block RThroughput: 1.3 +# CHECK-NEXT: uOps Per Cycle: 1.36 +# CHECK-NEXT: IPC: 1.36 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -27,56 +27,78 @@ # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 0 0.25 xorq %rax, %rax -# CHECK-NEXT: 1 1 0.33 movq %rax, %rbx -# CHECK-NEXT: 1 1 0.33 movq %rbx, %rcx -# CHECK-NEXT: 1 1 0.33 movq %rcx, %rdx -# CHECK-NEXT: 1 1 0.33 movq %rdx, %rax +# CHECK-NEXT: 1 1 0.50 movq %rax, %rbx +# CHECK-NEXT: 1 1 0.50 movq %rbx, %rcx +# CHECK-NEXT: 1 1 0.50 movq %rcx, %rdx +# CHECK-NEXT: 1 1 0.50 movq %rdx, %rax # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 18 -# CHECK-NEXT: Max number of mappings used: 15 +# CHECK-NEXT: Total number of mappings created: 12 +# CHECK-NEXT: Max number of mappings used: 11 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 12 +# CHECK-NEXT: Max number of mappings used: 11 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.33 1.33 - 1.33 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - - - xorq %rax, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movq %rax, %rbx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movq %rbx, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movq %rcx, %rdx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movq %rdx, %rax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - xorq %rax, %rax +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - movq %rax, %rbx +# CHECK-NEXT: - - - - - 0.67 0.33 - - - - - - - - - - - - - movq %rbx, %rcx +# CHECK-NEXT: - - - - - 0.33 0.67 - - - - - - - - - - - - - movq %rcx, %rdx +# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - movq %rdx, %rax # CHECK: Timeline view: -# CHECK-NEXT: 01234 +# CHECK-NEXT: 0 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DR . . . xorq %rax, %rax -# CHECK-NEXT: [0,1] DeER . . . movq %rax, %rbx -# CHECK-NEXT: [0,2] D=eER. . . movq %rbx, %rcx -# CHECK-NEXT: [0,3] D==eER . . movq %rcx, %rdx -# CHECK-NEXT: [0,4] .D==eER . . movq %rdx, %rax -# CHECK-NEXT: [1,0] .D===ER . . xorq %rax, %rax -# CHECK-NEXT: [1,1] .D===eER . . movq %rax, %rbx -# CHECK-NEXT: [1,2] .D====eER . . movq %rbx, %rcx -# CHECK-NEXT: [1,3] . D====eER. . movq %rcx, %rdx -# CHECK-NEXT: [1,4] . D=====eER . movq %rdx, %rax -# CHECK-NEXT: [2,0] . D======ER . xorq %rax, %rax -# CHECK-NEXT: [2,1] . D======eER . movq %rax, %rbx -# CHECK-NEXT: [2,2] . D======eER . movq %rbx, %rcx -# CHECK-NEXT: [2,3] . D=======eER. movq %rcx, %rdx -# CHECK-NEXT: [2,4] . D========eER movq %rdx, %rax +# CHECK: [0,0] DR . . xorq %rax, %rax +# CHECK-NEXT: [0,1] DeER . . movq %rax, %rbx +# CHECK-NEXT: [0,2] D=eER. . movq %rbx, %rcx +# CHECK-NEXT: [0,3] D==eER . movq %rcx, %rdx +# CHECK-NEXT: [0,4] .D==eER . movq %rdx, %rax +# CHECK-NEXT: [1,0] .D----R . xorq %rax, %rax +# CHECK-NEXT: [1,1] .DeE--R . movq %rax, %rbx +# CHECK-NEXT: [1,2] .D=eE-R . movq %rbx, %rcx +# CHECK-NEXT: [1,3] . D=eE-R . movq %rcx, %rdx +# CHECK-NEXT: [1,4] . D==eER . movq %rdx, %rax +# CHECK-NEXT: [2,0] . D----R . xorq %rax, %rax +# CHECK-NEXT: [2,1] . D==eER . movq %rax, %rbx +# CHECK-NEXT: [2,2] . D==eER . movq %rbx, %rcx +# CHECK-NEXT: [2,3] . D===eER. movq %rcx, %rdx +# CHECK-NEXT: [2,4] . D====eER movq %rdx, %rax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -85,8 +107,8 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 3.7 0.0 0.0 xorq %rax, %rax -# CHECK-NEXT: 1. 3 4.0 0.3 0.0 movq %rax, %rbx -# CHECK-NEXT: 2. 3 4.7 0.0 0.0 movq %rbx, %rcx -# CHECK-NEXT: 3. 3 5.3 0.0 0.0 movq %rcx, %rdx -# CHECK-NEXT: 4. 3 6.0 0.0 0.0 movq %rdx, %rax +# CHECK-NEXT: 0. 3 0.0 0.0 2.7 xorq %rax, %rax +# CHECK-NEXT: 1. 3 1.7 1.7 0.7 movq %rax, %rbx +# CHECK-NEXT: 2. 3 2.3 0.0 0.3 movq %rbx, %rcx +# CHECK-NEXT: 3. 3 3.0 0.0 0.3 movq %rcx, %rdx +# CHECK-NEXT: 4. 3 3.7 0.0 0.0 movq %rdx, %rax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-1.s @@ -1,17 +1,17 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=5 -instruction-info=false -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=5 -instruction-info=false -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s vaddps %xmm0, %xmm0, %xmm0 vmulps %xmm0, %xmm0, %xmm0 # CHECK: Iterations: 5 # CHECK-NEXT: Instructions: 10 -# CHECK-NEXT: Total Cycles: 43 +# CHECK-NEXT: Total Cycles: 53 # CHECK-NEXT: Total uOps: 10 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.23 -# CHECK-NEXT: IPC: 0.23 +# CHECK-NEXT: uOps Per Cycle: 0.19 +# CHECK-NEXT: IPC: 0.19 # CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Dynamic Dispatch Stall Cycles: @@ -24,47 +24,69 @@ # CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched: # CHECK-NEXT: [# dispatched], [# cycles] -# CHECK-NEXT: 0, 40 (93.0%) -# CHECK-NEXT: 2, 1 (2.3%) -# CHECK-NEXT: 4, 2 (4.7%) +# CHECK-NEXT: 0, 50 (94.3%) +# CHECK-NEXT: 2, 1 (1.9%) +# CHECK-NEXT: 4, 2 (3.8%) # CHECK: Register File statistics: # CHECK-NEXT: Total number of mappings created: 10 # CHECK-NEXT: Max number of mappings used: 10 +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 10 +# CHECK-NEXT: Max number of mappings used: 10 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - - - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - 2.00 - - - - 1.00 1.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - 1.00 - - - - - vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - 1.00 - - - - vmulps %xmm0, %xmm0, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0123456789 -# CHECK-NEXT: Index 0123456789 0123456789 012 +# CHECK-NEXT: 0123456789 0123456789 012 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 -# CHECK: [0,0] DeeeER . . . . . . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [0,1] D===eeeeeER . . . . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,0] D========eeeER . . . . . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,1] D===========eeeeeER . . . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,0] .D===============eeeER . . . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,1] .D==================eeeeeER . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [3,0] .D=======================eeeER. . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [3,1] .D==========================eeeeeER. . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [4,0] . D==============================eeeER . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [4,1] . D=================================eeeeeER vmulps %xmm0, %xmm0, %xmm0 +# CHECK: [0,0] DeeeeeER . . . . . . . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [1,0] D==========eeeeeER . . . . . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [1,1] D===============eeeeeER . . . . . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [2,0] .D===================eeeeeER . . . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [2,1] .D========================eeeeeER . . . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [3,0] .D=============================eeeeeER . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [3,1] .D==================================eeeeeER . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [4,0] . D======================================eeeeeER . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [4,1] . D===========================================eeeeeER vmulps %xmm0, %xmm0, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -73,5 +95,5 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 5 16.2 0.2 0.0 vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1. 5 19.2 0.0 0.0 vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: 0. 5 20.2 0.2 0.0 vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: 1. 5 25.2 0.0 0.0 vmulps %xmm0, %xmm0, %xmm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-2.s @@ -1,21 +1,21 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -register-file-size=5 -iterations=5 -instruction-info=false -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -register-file-size=5 -iterations=5 -instruction-info=false -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s vaddps %xmm0, %xmm0, %xmm0 vmulps %xmm0, %xmm0, %xmm0 # CHECK: Iterations: 5 # CHECK-NEXT: Instructions: 10 -# CHECK-NEXT: Total Cycles: 43 +# CHECK-NEXT: Total Cycles: 53 # CHECK-NEXT: Total uOps: 10 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.23 -# CHECK-NEXT: IPC: 0.23 +# CHECK-NEXT: uOps Per Cycle: 0.19 +# CHECK-NEXT: IPC: 0.19 # CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Dynamic Dispatch Stall Cycles: -# CHECK-NEXT: RAT - Register unavailable: 20 (46.5%) +# CHECK-NEXT: RAT - Register unavailable: 26 (49.1%) # CHECK-NEXT: RCU - Retire tokens unavailable: 0 # CHECK-NEXT: SCHEDQ - Scheduler full: 0 # CHECK-NEXT: LQ - Load queue full: 0 @@ -24,47 +24,69 @@ # CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched: # CHECK-NEXT: [# dispatched], [# cycles] -# CHECK-NEXT: 0, 36 (83.7%) -# CHECK-NEXT: 1, 6 (14.0%) -# CHECK-NEXT: 4, 1 (2.3%) +# CHECK-NEXT: 0, 46 (86.8%) +# CHECK-NEXT: 1, 6 (11.3%) +# CHECK-NEXT: 4, 1 (1.9%) # CHECK: Register File statistics: # CHECK-NEXT: Total number of mappings created: 10 # CHECK-NEXT: Max number of mappings used: 5 +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 10 +# CHECK-NEXT: Max number of mappings used: 5 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - - - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - 2.00 - - - - 1.00 1.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - 1.00 - - - - - vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - 1.00 - - - - vmulps %xmm0, %xmm0, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0123456789 -# CHECK-NEXT: Index 0123456789 0123456789 012 +# CHECK-NEXT: 0123456789 0123456789 012 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 -# CHECK: [0,0] DeeeER . . . . . . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [0,1] D===eeeeeER . . . . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,0] D========eeeER . . . . . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,1] D===========eeeeeER . . . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,0] .D===============eeeER . . . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,1] . D==============eeeeeER . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [3,0] . . D==============eeeER. . . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [3,1] . . . D==============eeeeeER. . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [4,0] . . . . D==============eeeER . . vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [4,1] . . . . .D==============eeeeeER vmulps %xmm0, %xmm0, %xmm0 +# CHECK: [0,0] DeeeeeER . . . . . . . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [1,0] D==========eeeeeER . . . . . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [1,1] D===============eeeeeER . . . . . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [2,0] .D===================eeeeeER . . . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [2,1] . . D==================eeeeeER . . . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [3,0] . . . D==================eeeeeER . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [3,1] . . . . D==================eeeeeER . . . vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [4,0] . . . . . D==================eeeeeER . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [4,1] . . . . . . D==================eeeeeER vmulps %xmm0, %xmm0, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -73,5 +95,5 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 5 11.2 0.2 0.0 vaddps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1. 5 12.2 0.0 0.0 vmulps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: 0. 5 14.0 0.2 0.0 vaddps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: 1. 5 15.8 0.0 0.0 vmulps %xmm0, %xmm0, %xmm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-3.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-3.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-3.s @@ -1,17 +1,17 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -register-file-size=5 -iterations=2 -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -register-file-size=5 -iterations=2 -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s idiv %eax # CHECK: Iterations: 2 # CHECK-NEXT: Instructions: 2 -# CHECK-NEXT: Total Cycles: 55 -# CHECK-NEXT: Total uOps: 2 +# CHECK-NEXT: Total Cycles: 42 +# CHECK-NEXT: Total uOps: 4 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.04 -# CHECK-NEXT: IPC: 0.04 -# CHECK-NEXT: Block RThroughput: 10.0 +# CHECK-NEXT: uOps Per Cycle: 0.10 +# CHECK-NEXT: IPC: 0.05 +# CHECK-NEXT: Block RThroughput: 25.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -22,10 +22,10 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 25 10.00 U idivl %eax +# CHECK-NEXT: 2 14 25.00 U idivl %eax # CHECK: Dynamic Dispatch Stall Cycles: -# CHECK-NEXT: RAT - Register unavailable: 27 (49.1%) +# CHECK-NEXT: RAT - Register unavailable: 16 (38.1%) # CHECK-NEXT: RCU - Retire tokens unavailable: 0 # CHECK-NEXT: SCHEDQ - Scheduler full: 0 # CHECK-NEXT: LQ - Load queue full: 0 @@ -34,37 +34,59 @@ # CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched: # CHECK-NEXT: [# dispatched], [# cycles] -# CHECK-NEXT: 0, 53 (96.4%) -# CHECK-NEXT: 1, 2 (3.6%) +# CHECK-NEXT: 0, 40 (95.2%) +# CHECK-NEXT: 2, 2 (4.8%) # CHECK: Register File statistics: # CHECK-NEXT: Total number of mappings created: 6 # CHECK-NEXT: Max number of mappings used: 3 +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 6 +# CHECK-NEXT: Max number of mappings used: 3 + # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: 10.00 - 1.00 - - - - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - 25.00 - 1.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: 10.00 - 1.00 - - - - - idivl %eax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - 25.00 - 1.00 - - - - - - - - - - - - - idivl %eax # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0123456789 01234 -# CHECK-NEXT: Index 0123456789 0123456789 0123456789 +# CHECK-NEXT: 0123456789 0123456789 +# CHECK-NEXT: Index 0123456789 0123456789 01 -# CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . idivl %eax -# CHECK-NEXT: [1,0] . . . . . . DeeeeeeeeeeeeeeeeeeeeeeeeeER idivl %eax +# CHECK: [0,0] DeeeeeeeeeeeeeeER . . . . .. idivl %eax +# CHECK-NEXT: [1,0] . . . .D=========eeeeeeeeeeeeeeER idivl %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -73,4 +95,4 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 2 1.0 1.0 0.0 idivl %eax +# CHECK-NEXT: 0. 2 5.5 5.5 0.0 idivl %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-4.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-4.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-4.s @@ -1,17 +1,17 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=22 -dispatch-stats -register-file-stats -resource-pressure=false -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=22 -dispatch-stats -register-file-stats -resource-pressure=false -timeline -timeline-max-iterations=3 < %s | FileCheck %s idiv %eax # CHECK: Iterations: 22 # CHECK-NEXT: Instructions: 22 -# CHECK-NEXT: Total Cycles: 553 -# CHECK-NEXT: Total uOps: 22 +# CHECK-NEXT: Total Cycles: 542 +# CHECK-NEXT: Total uOps: 44 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.04 +# CHECK-NEXT: uOps Per Cycle: 0.08 # CHECK-NEXT: IPC: 0.04 -# CHECK-NEXT: Block RThroughput: 10.0 +# CHECK-NEXT: Block RThroughput: 25.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -22,7 +22,7 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 25 10.00 U idivl %eax +# CHECK-NEXT: 2 14 25.00 U idivl %eax # CHECK: Dynamic Dispatch Stall Cycles: # CHECK-NEXT: RAT - Register unavailable: 0 @@ -34,21 +34,30 @@ # CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched: # CHECK-NEXT: [# dispatched], [# cycles] -# CHECK-NEXT: 0, 547 (98.9%) -# CHECK-NEXT: 2, 1 (0.2%) -# CHECK-NEXT: 4, 5 (0.9%) +# CHECK-NEXT: 0, 531 (98.0%) +# CHECK-NEXT: 4, 11 (2.0%) # CHECK: Register File statistics: # CHECK-NEXT: Total number of mappings created: 66 # CHECK-NEXT: Max number of mappings used: 66 +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 66 +# CHECK-NEXT: Max number of mappings used: 66 + # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0123456789 0123456789 01234567 -# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 +# CHECK-NEXT: 0123456789 0123456789 0123456789 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456 -# CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . . . . . . idivl %eax -# CHECK-NEXT: [1,0] D=========================eeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . idivl %eax -# CHECK-NEXT: [2,0] D==================================================eeeeeeeeeeeeeeeeeeeeeeeeeER idivl %eax +# CHECK: [0,0] DeeeeeeeeeeeeeeER . . . . . . . . . .. idivl %eax +# CHECK-NEXT: [1,0] D=========================eeeeeeeeeeeeeeER . . . . .. idivl %eax +# CHECK-NEXT: [2,0] .D=================================================eeeeeeeeeeeeeeER idivl %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -57,4 +66,4 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 26.0 0.3 0.0 idivl %eax +# CHECK-NEXT: 0. 3 25.7 7.7 0.0 idivl %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-5.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-5.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/register-files-5.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=false -instruction-info=false -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=false -instruction-info=false -dispatch-stats -register-file-stats -timeline < %s | FileCheck %s vdivps %ymm0, %ymm0, %ymm1 vaddps %ymm0, %ymm0, %ymm2 @@ -37,13 +37,13 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 33 -# CHECK-NEXT: Total Cycles: 37 -# CHECK-NEXT: Total uOps: 35 +# CHECK-NEXT: Total Cycles: 70 +# CHECK-NEXT: Total uOps: 66 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.95 -# CHECK-NEXT: IPC: 0.89 -# CHECK-NEXT: Block RThroughput: 32.0 +# CHECK-NEXT: uOps Per Cycle: 0.94 +# CHECK-NEXT: IPC: 0.47 +# CHECK-NEXT: Block RThroughput: 64.0 # CHECK: Dynamic Dispatch Stall Cycles: # CHECK-NEXT: RAT - Register unavailable: 0 @@ -55,51 +55,61 @@ # CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched: # CHECK-NEXT: [# dispatched], [# cycles] -# CHECK-NEXT: 0, 28 (75.7%) -# CHECK-NEXT: 3, 1 (2.7%) -# CHECK-NEXT: 4, 8 (21.6%) +# CHECK-NEXT: 0, 53 (75.7%) +# CHECK-NEXT: 2, 1 (1.4%) +# CHECK-NEXT: 4, 16 (22.9%) # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 33 -# CHECK-NEXT: Max number of mappings used: 33 +# CHECK-NEXT: Total number of mappings created: 66 +# CHECK-NEXT: Max number of mappings used: 54 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 66 +# CHECK-NEXT: Max number of mappings used: 54 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 0123456 -# CHECK-NEXT: Index 0123456789 0123456789 +# CHECK-NEXT: 0123456789 0123456789 0123456789 +# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 -# CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER .. vdivps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [0,1] DeeeE--------------------------R .. vaddps %ymm0, %ymm0, %ymm2 -# CHECK-NEXT: [0,2] .DeeeE-------------------------R .. vaddps %ymm0, %ymm0, %ymm3 -# CHECK-NEXT: [0,3] .D=eeeE------------------------R .. vaddps %ymm0, %ymm0, %ymm4 -# CHECK-NEXT: [0,4] .D==eeeE-----------------------R .. vaddps %ymm0, %ymm0, %ymm5 -# CHECK-NEXT: [0,5] .D===eeeE----------------------R .. vaddps %ymm0, %ymm0, %ymm6 -# CHECK-NEXT: [0,6] . D===eeeE---------------------R .. vaddps %ymm0, %ymm0, %ymm7 -# CHECK-NEXT: [0,7] . D=====eeeE-------------------R .. vaddps %ymm0, %ymm0, %ymm8 -# CHECK-NEXT: [0,8] . D======eeeE------------------R .. vaddps %ymm0, %ymm0, %ymm9 -# CHECK-NEXT: [0,9] . D=======eeeE-----------------R .. vaddps %ymm0, %ymm0, %ymm10 -# CHECK-NEXT: [0,10] . D=======eeeE----------------R .. vaddps %ymm0, %ymm0, %ymm11 -# CHECK-NEXT: [0,11] . D========eeeE---------------R .. vaddps %ymm0, %ymm0, %ymm12 -# CHECK-NEXT: [0,12] . D=========eeeE--------------R .. vaddps %ymm0, %ymm0, %ymm13 -# CHECK-NEXT: [0,13] . D===========eeeE------------R .. vaddps %ymm0, %ymm0, %ymm14 -# CHECK-NEXT: [0,14] . D===========eeeE-----------R .. vaddps %ymm0, %ymm0, %ymm15 -# CHECK-NEXT: [0,15] . D==eeeE--------------------R .. vaddps %ymm2, %ymm0, %ymm0 -# CHECK-NEXT: [0,16] . D=========eeeE-------------R .. vaddps %ymm2, %ymm0, %ymm3 -# CHECK-NEXT: [0,17] . D============eeeE----------R .. vaddps %ymm2, %ymm0, %ymm4 -# CHECK-NEXT: [0,18] . D============eeeE---------R .. vaddps %ymm2, %ymm0, %ymm5 -# CHECK-NEXT: [0,19] . D=============eeeE--------R .. vaddps %ymm2, %ymm0, %ymm6 -# CHECK-NEXT: [0,20] . D==============eeeE-------R .. vaddps %ymm2, %ymm0, %ymm7 -# CHECK-NEXT: [0,21] . D===============eeeE------R .. vaddps %ymm2, %ymm0, %ymm8 -# CHECK-NEXT: [0,22] . .D===============eeeE-----R .. vaddps %ymm2, %ymm0, %ymm9 -# CHECK-NEXT: [0,23] . .D================eeeE----R .. vaddps %ymm2, %ymm0, %ymm10 -# CHECK-NEXT: [0,24] . .D=================eeeE---R .. vaddps %ymm2, %ymm0, %ymm11 -# CHECK-NEXT: [0,25] . .D==================eeeE--R .. vaddps %ymm2, %ymm0, %ymm12 -# CHECK-NEXT: [0,26] . . D==================eeeE-R .. vaddps %ymm2, %ymm0, %ymm13 -# CHECK-NEXT: [0,27] . . D===================eeeER .. vaddps %ymm2, %ymm0, %ymm14 -# CHECK-NEXT: [0,28] . . D====================eeeER .. vaddps %ymm2, %ymm0, %ymm15 -# CHECK-NEXT: [0,29] . . D=====================eeeER .. vaddps %ymm3, %ymm0, %ymm2 -# CHECK-NEXT: [0,30] . . D=====================eeeER.. vaddps %ymm3, %ymm0, %ymm4 -# CHECK-NEXT: [0,31] . . D======================eeeER. vaddps %ymm3, %ymm0, %ymm5 -# CHECK-NEXT: [0,32] . . D=======================eeeER vaddps %ymm3, %ymm0, %ymm6 +# CHECK: [0,0] DeeeeeeeeeER . . . . . . . . . . . . vdivps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [0,1] DeeeeeE----R . . . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm2 +# CHECK-NEXT: [0,2] .D=eeeeeE--R . . . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm3 +# CHECK-NEXT: [0,3] .D===eeeeeER . . . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm4 +# CHECK-NEXT: [0,4] . D====eeeeeER . . . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm5 +# CHECK-NEXT: [0,5] . D======eeeeeER . . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm6 +# CHECK-NEXT: [0,6] . D=======eeeeeER . . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm7 +# CHECK-NEXT: [0,7] . D===========eeeeeER . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm8 +# CHECK-NEXT: [0,8] . D============eeeeeER . . . . . . . . . . vaddps %ymm0, %ymm0, %ymm9 +# CHECK-NEXT: [0,9] . D==============eeeeeER . . . . . . . . . vaddps %ymm0, %ymm0, %ymm10 +# CHECK-NEXT: [0,10] . D===============eeeeeER . . . . . . . . . vaddps %ymm0, %ymm0, %ymm11 +# CHECK-NEXT: [0,11] . D=================eeeeeER. . . . . . . . . vaddps %ymm0, %ymm0, %ymm12 +# CHECK-NEXT: [0,12] . .D==================eeeeeER . . . . . . . . vaddps %ymm0, %ymm0, %ymm13 +# CHECK-NEXT: [0,13] . .D======================eeeeeER . . . . . . . vaddps %ymm0, %ymm0, %ymm14 +# CHECK-NEXT: [0,14] . . D=======================eeeeeER . . . . . . . vaddps %ymm0, %ymm0, %ymm15 +# CHECK-NEXT: [0,15] . . D=====eeeeeE------------------R . . . . . . . vaddps %ymm2, %ymm0, %ymm0 +# CHECK-NEXT: [0,16] . . D==================eeeeeE----R . . . . . . . vaddps %ymm2, %ymm0, %ymm3 +# CHECK-NEXT: [0,17] . . D========================eeeeeER. . . . . . . vaddps %ymm2, %ymm0, %ymm4 +# CHECK-NEXT: [0,18] . . D=========================eeeeeER . . . . . . vaddps %ymm2, %ymm0, %ymm5 +# CHECK-NEXT: [0,19] . . D===========================eeeeeER . . . . . . vaddps %ymm2, %ymm0, %ymm6 +# CHECK-NEXT: [0,20] . . D============================eeeeeER . . . . . vaddps %ymm2, %ymm0, %ymm7 +# CHECK-NEXT: [0,21] . . D==============================eeeeeER . . . . . vaddps %ymm2, %ymm0, %ymm8 +# CHECK-NEXT: [0,22] . . .D===============================eeeeeER. . . . . vaddps %ymm2, %ymm0, %ymm9 +# CHECK-NEXT: [0,23] . . .D=================================eeeeeER . . . . vaddps %ymm2, %ymm0, %ymm10 +# CHECK-NEXT: [0,24] . . . D==================================eeeeeER . . . . vaddps %ymm2, %ymm0, %ymm11 +# CHECK-NEXT: [0,25] . . . D====================================eeeeeER . . . vaddps %ymm2, %ymm0, %ymm12 +# CHECK-NEXT: [0,26] . . . D=====================================eeeeeER . . . vaddps %ymm2, %ymm0, %ymm13 +# CHECK-NEXT: [0,27] . . . D=======================================eeeeeER. . . vaddps %ymm2, %ymm0, %ymm14 +# CHECK-NEXT: [0,28] . . . D========================================eeeeeER . . vaddps %ymm2, %ymm0, %ymm15 +# CHECK-NEXT: [0,29] . . . D==========================================eeeeeER . . vaddps %ymm3, %ymm0, %ymm2 +# CHECK-NEXT: [0,30] . . . D===========================================eeeeeER . vaddps %ymm3, %ymm0, %ymm4 +# CHECK-NEXT: [0,31] . . . D=============================================eeeeeER . vaddps %ymm3, %ymm0, %ymm5 +# CHECK-NEXT: [0,32] . . . .D==============================================eeeeeER vaddps %ymm3, %ymm0, %ymm6 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -109,35 +119,35 @@ # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 1 1.0 1.0 0.0 vdivps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 1. 1 1.0 1.0 26.0 vaddps %ymm0, %ymm0, %ymm2 -# CHECK-NEXT: 2. 1 1.0 1.0 25.0 vaddps %ymm0, %ymm0, %ymm3 -# CHECK-NEXT: 3. 1 2.0 2.0 24.0 vaddps %ymm0, %ymm0, %ymm4 -# CHECK-NEXT: 4. 1 3.0 3.0 23.0 vaddps %ymm0, %ymm0, %ymm5 -# CHECK-NEXT: 5. 1 4.0 4.0 22.0 vaddps %ymm0, %ymm0, %ymm6 -# CHECK-NEXT: 6. 1 4.0 4.0 21.0 vaddps %ymm0, %ymm0, %ymm7 -# CHECK-NEXT: 7. 1 6.0 6.0 19.0 vaddps %ymm0, %ymm0, %ymm8 -# CHECK-NEXT: 8. 1 7.0 7.0 18.0 vaddps %ymm0, %ymm0, %ymm9 -# CHECK-NEXT: 9. 1 8.0 8.0 17.0 vaddps %ymm0, %ymm0, %ymm10 -# CHECK-NEXT: 10. 1 8.0 8.0 16.0 vaddps %ymm0, %ymm0, %ymm11 -# CHECK-NEXT: 11. 1 9.0 9.0 15.0 vaddps %ymm0, %ymm0, %ymm12 -# CHECK-NEXT: 12. 1 10.0 10.0 14.0 vaddps %ymm0, %ymm0, %ymm13 -# CHECK-NEXT: 13. 1 12.0 12.0 12.0 vaddps %ymm0, %ymm0, %ymm14 -# CHECK-NEXT: 14. 1 12.0 12.0 11.0 vaddps %ymm0, %ymm0, %ymm15 -# CHECK-NEXT: 15. 1 3.0 3.0 20.0 vaddps %ymm2, %ymm0, %ymm0 -# CHECK-NEXT: 16. 1 10.0 4.0 13.0 vaddps %ymm2, %ymm0, %ymm3 -# CHECK-NEXT: 17. 1 13.0 7.0 10.0 vaddps %ymm2, %ymm0, %ymm4 -# CHECK-NEXT: 18. 1 13.0 8.0 9.0 vaddps %ymm2, %ymm0, %ymm5 -# CHECK-NEXT: 19. 1 14.0 9.0 8.0 vaddps %ymm2, %ymm0, %ymm6 -# CHECK-NEXT: 20. 1 15.0 10.0 7.0 vaddps %ymm2, %ymm0, %ymm7 -# CHECK-NEXT: 21. 1 16.0 11.0 6.0 vaddps %ymm2, %ymm0, %ymm8 -# CHECK-NEXT: 22. 1 16.0 12.0 5.0 vaddps %ymm2, %ymm0, %ymm9 -# CHECK-NEXT: 23. 1 17.0 13.0 4.0 vaddps %ymm2, %ymm0, %ymm10 -# CHECK-NEXT: 24. 1 18.0 14.0 3.0 vaddps %ymm2, %ymm0, %ymm11 -# CHECK-NEXT: 25. 1 19.0 15.0 2.0 vaddps %ymm2, %ymm0, %ymm12 -# CHECK-NEXT: 26. 1 19.0 16.0 1.0 vaddps %ymm2, %ymm0, %ymm13 -# CHECK-NEXT: 27. 1 20.0 17.0 0.0 vaddps %ymm2, %ymm0, %ymm14 -# CHECK-NEXT: 28. 1 21.0 18.0 0.0 vaddps %ymm2, %ymm0, %ymm15 -# CHECK-NEXT: 29. 1 22.0 12.0 0.0 vaddps %ymm3, %ymm0, %ymm2 -# CHECK-NEXT: 30. 1 22.0 13.0 0.0 vaddps %ymm3, %ymm0, %ymm4 -# CHECK-NEXT: 31. 1 23.0 14.0 0.0 vaddps %ymm3, %ymm0, %ymm5 -# CHECK-NEXT: 32. 1 24.0 15.0 0.0 vaddps %ymm3, %ymm0, %ymm6 +# CHECK-NEXT: 1. 1 1.0 1.0 4.0 vaddps %ymm0, %ymm0, %ymm2 +# CHECK-NEXT: 2. 1 2.0 2.0 2.0 vaddps %ymm0, %ymm0, %ymm3 +# CHECK-NEXT: 3. 1 4.0 4.0 0.0 vaddps %ymm0, %ymm0, %ymm4 +# CHECK-NEXT: 4. 1 5.0 5.0 0.0 vaddps %ymm0, %ymm0, %ymm5 +# CHECK-NEXT: 5. 1 7.0 7.0 0.0 vaddps %ymm0, %ymm0, %ymm6 +# CHECK-NEXT: 6. 1 8.0 8.0 0.0 vaddps %ymm0, %ymm0, %ymm7 +# CHECK-NEXT: 7. 1 12.0 12.0 0.0 vaddps %ymm0, %ymm0, %ymm8 +# CHECK-NEXT: 8. 1 13.0 13.0 0.0 vaddps %ymm0, %ymm0, %ymm9 +# CHECK-NEXT: 9. 1 15.0 15.0 0.0 vaddps %ymm0, %ymm0, %ymm10 +# CHECK-NEXT: 10. 1 16.0 16.0 0.0 vaddps %ymm0, %ymm0, %ymm11 +# CHECK-NEXT: 11. 1 18.0 18.0 0.0 vaddps %ymm0, %ymm0, %ymm12 +# CHECK-NEXT: 12. 1 19.0 19.0 0.0 vaddps %ymm0, %ymm0, %ymm13 +# CHECK-NEXT: 13. 1 23.0 23.0 0.0 vaddps %ymm0, %ymm0, %ymm14 +# CHECK-NEXT: 14. 1 24.0 24.0 0.0 vaddps %ymm0, %ymm0, %ymm15 +# CHECK-NEXT: 15. 1 6.0 6.0 18.0 vaddps %ymm2, %ymm0, %ymm0 +# CHECK-NEXT: 16. 1 19.0 9.0 4.0 vaddps %ymm2, %ymm0, %ymm3 +# CHECK-NEXT: 17. 1 25.0 15.0 0.0 vaddps %ymm2, %ymm0, %ymm4 +# CHECK-NEXT: 18. 1 26.0 17.0 0.0 vaddps %ymm2, %ymm0, %ymm5 +# CHECK-NEXT: 19. 1 28.0 19.0 0.0 vaddps %ymm2, %ymm0, %ymm6 +# CHECK-NEXT: 20. 1 29.0 21.0 0.0 vaddps %ymm2, %ymm0, %ymm7 +# CHECK-NEXT: 21. 1 31.0 23.0 0.0 vaddps %ymm2, %ymm0, %ymm8 +# CHECK-NEXT: 22. 1 32.0 25.0 0.0 vaddps %ymm2, %ymm0, %ymm9 +# CHECK-NEXT: 23. 1 34.0 27.0 0.0 vaddps %ymm2, %ymm0, %ymm10 +# CHECK-NEXT: 24. 1 35.0 29.0 0.0 vaddps %ymm2, %ymm0, %ymm11 +# CHECK-NEXT: 25. 1 37.0 31.0 0.0 vaddps %ymm2, %ymm0, %ymm12 +# CHECK-NEXT: 26. 1 38.0 33.0 0.0 vaddps %ymm2, %ymm0, %ymm13 +# CHECK-NEXT: 27. 1 40.0 35.0 0.0 vaddps %ymm2, %ymm0, %ymm14 +# CHECK-NEXT: 28. 1 41.0 37.0 0.0 vaddps %ymm2, %ymm0, %ymm15 +# CHECK-NEXT: 29. 1 43.0 25.0 0.0 vaddps %ymm3, %ymm0, %ymm2 +# CHECK-NEXT: 30. 1 44.0 27.0 0.0 vaddps %ymm3, %ymm0, %ymm4 +# CHECK-NEXT: 31. 1 46.0 29.0 0.0 vaddps %ymm3, %ymm0, %ymm5 +# CHECK-NEXT: 32. 1 47.0 31.0 0.0 vaddps %ymm3, %ymm0, %ymm6 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-3dnow.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-3dnow.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-3dnow.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s femms @@ -87,122 +87,134 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 31 31 10.33 * * U femms -# CHECK-NEXT: 1 3 1.00 pavgusb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pavgusb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pf2id %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pf2id (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pf2iw %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pf2iw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfacc %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfacc (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfadd %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfadd (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfcmpeq %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfcmpeq (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfcmpge %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfcmpge (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfcmpgt %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfcmpgt (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfmax %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfmax (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfmin %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfmin (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfmul %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfmul (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfnacc %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfnacc (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfpnacc %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfpnacc (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfrcp %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfrcp (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfrcpit1 %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfrcpit1 (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfrcpit2 %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfrcpit2 (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfrsqit1 %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfrsqit1 (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfrsqrt %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfrsqrt (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfsub %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfsub (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pfsubr %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pfsubr (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pi2fd %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pi2fd (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pi2fw %mm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * pi2fw (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 pmulhrw %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmulhrw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 * * U femms +# CHECK-NEXT: 1 2 0.50 pavgusb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pavgusb (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pf2id %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pf2id (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pf2iw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pf2iw (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfacc %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfacc (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfadd %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfadd (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfcmpeq %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfcmpeq (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfcmpge %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfcmpge (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfcmpgt %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfcmpgt (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfmax %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfmax (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfmin %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfmin (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfmul %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfmul (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfnacc %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfnacc (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfpnacc %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfpnacc (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfrcp %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfrcp (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfrcpit1 %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfrcpit1 (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfrcpit2 %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfrcpit2 (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfrsqit1 %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfrsqit1 (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfrsqrt %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfrsqrt (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfsub %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfsub (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 pfsubr %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * pfsubr (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pi2fd %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pi2fd (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pi2fw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pi2fw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmulhrw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmulhrw (%rax), %mm2 # CHECK-NEXT: 1 5 0.50 * * prefetch (%rax) # CHECK-NEXT: 1 5 0.50 * * prefetchw (%rax) -# CHECK-NEXT: 1 1 1.00 pswapd %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * pswapd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pswapd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pswapd (%rax), %mm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 12.33 54.33 - 12.33 13.00 13.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 13.00 13.00 - - - - - - 17.50 17.50 2.00 2.00 2.00 8.00 38.50 10.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 10.33 10.33 - 10.33 - - femms -# CHECK-NEXT: - - - 1.00 - - - - pavgusb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pavgusb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pf2id %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pf2id (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pf2iw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pf2iw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfacc %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfacc (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfadd %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfadd (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfcmpeq %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfcmpeq (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfcmpge %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfcmpge (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfcmpgt %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfcmpgt (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfmax %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfmax (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfmin %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfmin (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfmul %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfmul (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfnacc %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfnacc (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfpnacc %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfpnacc (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfrcp %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfrcp (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfrcpit1 %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfrcpit1 (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfrcpit2 %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfrcpit2 (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfrsqit1 %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfrsqit1 (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfrsqrt %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfrsqrt (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfsub %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfsub (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pfsubr %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfsubr (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pi2fd %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pi2fd (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pi2fw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pi2fw (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmulhrw %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhrw (%rax), %mm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetch (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetchw (%rax) -# CHECK-NEXT: - - - - - 1.00 - - pswapd %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 pswapd (%rax), %mm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - femms +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgusb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgusb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - pf2id %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pf2id (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - pf2iw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pf2iw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfacc %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfacc (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfadd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfadd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfcmpeq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfcmpeq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfcmpge %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfcmpge (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfcmpgt %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfcmpgt (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfmax %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfmax (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfmin %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfmin (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfmul %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfmul (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfnacc %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfnacc (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfpnacc %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfpnacc (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrcp %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrcp (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrcpit1 %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrcpit1 (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrcpit2 %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrcpit2 (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrsqit1 %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrsqit1 (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrsqrt %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfrsqrt (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfsub %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfsub (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfsubr %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - pfsubr (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - pi2fd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pi2fd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - pi2fw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pi2fw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhrw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhrw (%rax), %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetch (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetchw (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pswapd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pswapd (%rax), %mm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-adx.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-adx.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-adx.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s adcx %ebx, %ecx adcx (%rbx), %ecx @@ -20,36 +20,48 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 2 2 0.67 adcxl %ebx, %ecx -# CHECK-NEXT: 3 7 0.67 * adcxl (%rbx), %ecx -# CHECK-NEXT: 2 2 0.67 adcxq %rbx, %rcx -# CHECK-NEXT: 3 7 0.67 * adcxq (%rbx), %rcx -# CHECK-NEXT: 2 2 0.67 adoxl %ebx, %ecx -# CHECK-NEXT: 3 7 0.67 * adoxl (%rbx), %ecx -# CHECK-NEXT: 2 2 0.67 adoxq %rbx, %rcx -# CHECK-NEXT: 3 7 0.67 * adoxq (%rbx), %rcx +# CHECK-NEXT: 1 1 1.00 adcxl %ebx, %ecx +# CHECK-NEXT: 1 5 1.00 * adcxl (%rbx), %ecx +# CHECK-NEXT: 1 1 1.00 adcxq %rbx, %rcx +# CHECK-NEXT: 1 5 1.00 * adcxq (%rbx), %rcx +# CHECK-NEXT: 1 1 1.00 adoxl %ebx, %ecx +# CHECK-NEXT: 1 5 1.00 * adoxl (%rbx), %ecx +# CHECK-NEXT: 1 1 1.00 adoxq %rbx, %rcx +# CHECK-NEXT: 1 5 1.00 * adoxq (%rbx), %rcx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 6.67 2.67 - 6.67 2.00 2.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 2.00 2.00 - - - 8.00 8.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcxl %ebx, %ecx -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcxl (%rbx), %ecx -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcxq %rbx, %rcx -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcxq (%rbx), %rcx -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adoxl %ebx, %ecx -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adoxl (%rbx), %ecx -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adoxq %rbx, %rcx -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adoxq (%rbx), %rcx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcxl %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adcxl (%rbx), %ecx +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcxq %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adcxq (%rbx), %rcx +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adoxl %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adoxl (%rbx), %ecx +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adoxq %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adoxq (%rbx), %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-aes.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-aes.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-aes.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s aesdec %xmm0, %xmm2 aesdec (%rax), %xmm2 @@ -28,44 +28,56 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 2 7 1.00 aesdec %xmm0, %xmm2 -# CHECK-NEXT: 3 13 1.00 * aesdec (%rax), %xmm2 -# CHECK-NEXT: 2 7 1.00 aesdeclast %xmm0, %xmm2 -# CHECK-NEXT: 3 13 1.00 * aesdeclast (%rax), %xmm2 -# CHECK-NEXT: 2 7 1.00 aesenc %xmm0, %xmm2 -# CHECK-NEXT: 3 13 1.00 * aesenc (%rax), %xmm2 -# CHECK-NEXT: 2 7 1.00 aesenclast %xmm0, %xmm2 -# CHECK-NEXT: 3 13 1.00 * aesenclast (%rax), %xmm2 -# CHECK-NEXT: 2 12 2.00 aesimc %xmm0, %xmm2 -# CHECK-NEXT: 3 18 2.00 * aesimc (%rax), %xmm2 -# CHECK-NEXT: 1 8 3.67 aeskeygenassist $22, %xmm0, %xmm2 -# CHECK-NEXT: 1 8 3.33 * aeskeygenassist $22, (%rax), %xmm2 +# CHECK-NEXT: 2 9 1.00 aesdec %xmm0, %xmm2 +# CHECK-NEXT: 2 14 1.00 * aesdec (%rax), %xmm2 +# CHECK-NEXT: 2 9 1.00 aesdeclast %xmm0, %xmm2 +# CHECK-NEXT: 2 14 1.00 * aesdeclast (%rax), %xmm2 +# CHECK-NEXT: 2 9 1.00 aesenc %xmm0, %xmm2 +# CHECK-NEXT: 2 14 1.00 * aesenc (%rax), %xmm2 +# CHECK-NEXT: 2 9 1.00 aesenclast %xmm0, %xmm2 +# CHECK-NEXT: 2 14 1.00 * aesenclast (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 aesimc %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * aesimc (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 aeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * aeskeygenassist $22, (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 9.67 9.67 - 21.67 3.00 3.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - 12.00 - 12.00 - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesdec %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesdec (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesdeclast %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesdeclast (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesenc %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesenc (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - aesenclast %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 aesenclast (%rax), %xmm2 -# CHECK-NEXT: - - - - - 2.00 - - aesimc %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 2.00 0.50 0.50 aesimc (%rax), %xmm2 -# CHECK-NEXT: - - 3.67 3.67 - 3.67 - - aeskeygenassist $22, %xmm0, %xmm2 -# CHECK-NEXT: - - 3.33 3.33 - 3.33 0.50 0.50 aeskeygenassist $22, (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - aesdec %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - aesdec (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - aesdeclast %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - aesdeclast (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - aesenc %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - aesenc (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - aesenclast %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - aesenclast (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - aesimc %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - aesimc (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - aeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - aeskeygenassist $22, (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-avx1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-avx1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-avx1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s vaddpd %xmm0, %xmm1, %xmm2 vaddpd (%rax), %xmm1, %xmm2 @@ -1030,1402 +1030,1414 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vaddpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vaddpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vaddps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vaddps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vaddsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vaddsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vaddss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddsubpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vaddsubpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddsubpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vaddsubpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vaddsubps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vaddsubps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vaddsubps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vaddsubps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 2 7 1.00 vaesdec %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 13 1.00 * vaesdec (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 vaesdeclast %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 13 1.00 * vaesdeclast (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 vaesenc %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 13 1.00 * vaesenc (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 vaesenclast %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 13 1.00 * vaesenclast (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 12 2.00 vaesimc %xmm0, %xmm2 -# CHECK-NEXT: 3 18 2.00 * vaesimc (%rax), %xmm2 -# CHECK-NEXT: 1 8 3.67 vaeskeygenassist $22, %xmm0, %xmm2 -# CHECK-NEXT: 1 8 3.33 * vaeskeygenassist $22, (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vandnpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vandnpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vandnpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vandnpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vandnps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vandnps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vandnps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vandnps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vandpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vandpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vandpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vandpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vandps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vandps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vandps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vandps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 0.50 vblendpd $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vblendpd $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vblendpd $11, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 0.50 * vblendpd $11, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 0.50 vblendps $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vblendps $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vblendps $11, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 0.50 * vblendps $11, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 2 2 1.00 vblendvpd %xmm3, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vblendvpd %xmm3, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vblendvpd %ymm3, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 3 9 1.00 * vblendvpd %ymm3, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 2 2 1.00 vblendvps %xmm3, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vblendvps %xmm3, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vblendvps %ymm3, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 3 9 1.00 * vblendvps %ymm3, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 2 7 1.00 * vbroadcastf128 (%rax), %ymm2 -# CHECK-NEXT: 1 7 0.50 * vbroadcastsd (%rax), %ymm2 -# CHECK-NEXT: 1 6 0.50 * vbroadcastss (%rax), %xmm2 -# CHECK-NEXT: 1 7 0.50 * vbroadcastss (%rax), %ymm2 -# CHECK-NEXT: 1 3 1.00 vcmppd $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vcmppd $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vcmppd $0, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vcmppd $0, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vcmpps $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vcmpps $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vcmpps $0, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vcmpps $0, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vcmpsd $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vcmpsd $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vcmpss $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vcmpss $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vcomisd %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * vcomisd (%rax), %xmm1 -# CHECK-NEXT: 2 2 1.00 vcomiss %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * vcomiss (%rax), %xmm1 -# CHECK-NEXT: 2 4 1.00 vcvtdq2pd %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * vcvtdq2pd (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 vcvtdq2pd %xmm0, %ymm2 -# CHECK-NEXT: 3 10 1.00 * vcvtdq2pd (%rax), %ymm2 -# CHECK-NEXT: 1 3 1.00 vcvtdq2ps %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vcvtdq2ps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vcvtdq2ps %ymm0, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vcvtdq2ps (%rax), %ymm2 -# CHECK-NEXT: 2 4 1.00 vcvtpd2dq %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * vcvtpd2dqx (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 vcvtpd2dq %ymm0, %xmm2 -# CHECK-NEXT: 3 11 1.00 * vcvtpd2dqy (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 vcvtpd2ps %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * vcvtpd2psx (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 vcvtpd2ps %ymm0, %xmm2 -# CHECK-NEXT: 3 11 1.00 * vcvtpd2psy (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vcvtps2dq %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vcvtps2dq (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vcvtps2dq %ymm0, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vcvtps2dq (%rax), %ymm2 -# CHECK-NEXT: 2 2 1.00 vcvtps2pd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vcvtps2pd (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 vcvtps2pd %xmm0, %ymm2 -# CHECK-NEXT: 2 7 1.00 * vcvtps2pd (%rax), %ymm2 -# CHECK-NEXT: 2 5 1.00 vcvtsd2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 vcvtsd2si %xmm0, %rcx -# CHECK-NEXT: 3 10 1.00 * vcvtsd2si (%rax), %ecx -# CHECK-NEXT: 3 10 1.00 * vcvtsd2si (%rax), %rcx -# CHECK-NEXT: 2 4 1.00 vcvtsd2ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 10 1.00 * vcvtsd2ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 1.00 vaddsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vaddsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vaddsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 1.00 vaddsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vaddsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vaddsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 2 9 1.00 vaesdec %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 14 1.00 * vaesdec (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 9 1.00 vaesdeclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 14 1.00 * vaesdeclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 9 1.00 vaesenc %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 14 1.00 * vaesenc (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 9 1.00 vaesenclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 14 1.00 * vaesenclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaesimc %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaesimc (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 vaeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaeskeygenassist $22, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vandnpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vandnpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vandnpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vandnpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vandnps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vandnps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vandnps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vandnps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vandpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vandpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vandpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vandpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vandps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vandps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vandps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vandps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vblendpd $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vblendpd $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vblendpd $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vblendpd $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vblendps $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vblendps $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vblendps $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vblendps $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 2.00 vblendvpd %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 2.00 * vblendvpd %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 3.00 vblendvpd %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 3.00 * vblendvpd %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 2.00 vblendvps %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 2.00 * vblendvps %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 3.00 vblendvps %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 3.00 * vblendvps %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 2 7 0.50 * vbroadcastf128 (%rax), %ymm2 +# CHECK-NEXT: 2 6 2.00 * vbroadcastsd (%rax), %ymm2 +# CHECK-NEXT: 1 7 0.50 * vbroadcastss (%rax), %xmm2 +# CHECK-NEXT: 2 6 2.00 * vbroadcastss (%rax), %ymm2 +# CHECK-NEXT: 1 2 1.00 vcmppd $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vcmppd $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 2.00 vcmppd $0, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 2.00 * vcmppd $0, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 1.00 vcmpps $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vcmpps $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 2.00 vcmpps $0, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 2.00 * vcmpps $0, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 1.00 vcmpsd $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vcmpsd $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 vcmpss $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vcmpss $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 1 1.00 vcomisd %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * vcomisd (%rax), %xmm1 +# CHECK-NEXT: 2 1 1.00 vcomiss %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * vcomiss (%rax), %xmm1 +# CHECK-NEXT: 2 8 1.00 vcvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * vcvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: 4 8 2.00 vcvtdq2pd %xmm0, %ymm2 +# CHECK-NEXT: 5 13 2.00 * vcvtdq2pd (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vcvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vcvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: 2 4 2.00 vcvtdq2ps %ymm0, %ymm2 +# CHECK-NEXT: 2 9 2.00 * vcvtdq2ps (%rax), %ymm2 +# CHECK-NEXT: 2 8 1.00 vcvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * vcvtpd2dqx (%rax), %xmm2 +# CHECK-NEXT: 4 8 2.00 vcvtpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 4 13 2.00 * vcvtpd2dqy (%rax), %xmm2 +# CHECK-NEXT: 2 8 1.00 vcvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * vcvtpd2psx (%rax), %xmm2 +# CHECK-NEXT: 4 8 2.00 vcvtpd2ps %ymm0, %xmm2 +# CHECK-NEXT: 4 13 2.00 * vcvtpd2psy (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 vcvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vcvtps2dq (%rax), %xmm2 +# CHECK-NEXT: 2 4 2.00 vcvtps2dq %ymm0, %ymm2 +# CHECK-NEXT: 2 9 2.00 * vcvtps2dq (%rax), %ymm2 +# CHECK-NEXT: 2 8 1.00 vcvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * vcvtps2pd (%rax), %xmm2 +# CHECK-NEXT: 4 8 2.00 vcvtps2pd %xmm0, %ymm2 +# CHECK-NEXT: 5 13 2.00 * vcvtps2pd (%rax), %ymm2 +# CHECK-NEXT: 2 13 1.00 vcvtsd2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 vcvtsd2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * vcvtsd2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * vcvtsd2si (%rax), %rcx +# CHECK-NEXT: 1 4 1.00 vcvtsd2ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vcvtsd2ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 2 4 1.00 vcvtsi2sdl %ecx, %xmm0, %xmm2 # CHECK-NEXT: 2 4 1.00 vcvtsi2sdq %rcx, %xmm0, %xmm2 # CHECK-NEXT: 2 9 1.00 * vcvtsi2sdl (%rax), %xmm0, %xmm2 # CHECK-NEXT: 2 9 1.00 * vcvtsi2sdq (%rax), %xmm0, %xmm2 -# CHECK-NEXT: 3 5 2.00 vcvtsi2ssl %ecx, %xmm0, %xmm2 -# CHECK-NEXT: 3 5 2.00 vcvtsi2ssq %rcx, %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * vcvtsi2ssl (%rax), %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * vcvtsi2ssq (%rax), %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 vcvtss2sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vcvtss2sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 5 1.00 vcvtss2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 vcvtss2si %xmm0, %rcx -# CHECK-NEXT: 3 10 1.00 * vcvtss2si (%rax), %ecx -# CHECK-NEXT: 3 10 1.00 * vcvtss2si (%rax), %rcx -# CHECK-NEXT: 2 4 1.00 vcvttpd2dq %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * vcvttpd2dqx (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 vcvttpd2dq %ymm0, %xmm2 -# CHECK-NEXT: 3 11 1.00 * vcvttpd2dqy (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vcvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vcvttps2dq (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vcvttps2dq %ymm0, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vcvttps2dq (%rax), %ymm2 -# CHECK-NEXT: 2 5 1.00 vcvttsd2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 vcvttsd2si %xmm0, %rcx -# CHECK-NEXT: 3 10 1.00 * vcvttsd2si (%rax), %ecx -# CHECK-NEXT: 3 10 1.00 * vcvttsd2si (%rax), %rcx -# CHECK-NEXT: 2 5 1.00 vcvttss2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 vcvttss2si %xmm0, %rcx -# CHECK-NEXT: 3 10 1.00 * vcvttss2si (%rax), %ecx -# CHECK-NEXT: 3 10 1.00 * vcvttss2si (%rax), %rcx -# CHECK-NEXT: 1 22 22.00 vdivpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 28 22.00 * vdivpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 45 44.00 vdivpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 4 52 44.00 * vdivpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 14 14.00 vdivps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 20 14.00 * vdivps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 29 28.00 vdivps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 4 36 28.00 * vdivps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 22 22.00 vdivsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 28 22.00 * vdivsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 14 14.00 vdivss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 20 14.00 * vdivss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 9 1.00 vdppd $22, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 15 1.00 * vdppd $22, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 4 12 2.00 vdpps $22, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 5 18 2.00 * vdpps $22, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 4 12 2.00 vdpps $22, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 5 19 2.00 * vdpps $22, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vextractf128 $1, %ymm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 * vextractf128 $1, %ymm0, (%rax) -# CHECK-NEXT: 2 3 1.00 vextractps $1, %xmm0, %ecx -# CHECK-NEXT: 3 5 1.00 * vextractps $1, %xmm0, (%rax) -# CHECK-NEXT: 3 5 2.00 vhaddpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 11 2.00 * vhaddpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 5 2.00 vhaddpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 4 12 2.00 * vhaddpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 3 5 2.00 vhaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 11 2.00 * vhaddps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 5 2.00 vhaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 4 12 2.00 * vhaddps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 3 5 2.00 vhsubpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 11 2.00 * vhsubpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 5 2.00 vhsubpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 4 12 2.00 * vhsubpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 3 5 2.00 vhsubps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 11 2.00 * vhsubps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 5 2.00 vhsubps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 4 12 2.00 * vhsubps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vinsertf128 $1, %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 4 1.00 vcvtsi2ssl %ecx, %xmm0, %xmm2 +# CHECK-NEXT: 2 4 1.00 vcvtsi2ssq %rcx, %xmm0, %xmm2 +# CHECK-NEXT: 2 9 1.00 * vcvtsi2ssl (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 2 9 1.00 * vcvtsi2ssq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1 4 1.00 vcvtss2sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vcvtss2sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 13 1.00 vcvtss2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 vcvtss2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * vcvtss2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * vcvtss2si (%rax), %rcx +# CHECK-NEXT: 2 8 1.00 vcvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * vcvttpd2dqx (%rax), %xmm2 +# CHECK-NEXT: 4 8 2.00 vcvttpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 4 13 2.00 * vcvttpd2dqy (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vcvttps2dq (%rax), %xmm2 +# CHECK-NEXT: 2 4 2.00 vcvttps2dq %ymm0, %ymm2 +# CHECK-NEXT: 2 9 2.00 * vcvttps2dq (%rax), %ymm2 +# CHECK-NEXT: 2 13 1.00 vcvttsd2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 vcvttsd2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * vcvttsd2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * vcvttsd2si (%rax), %rcx +# CHECK-NEXT: 2 13 1.00 vcvttss2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 vcvttss2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * vcvttss2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * vcvttss2si (%rax), %rcx +# CHECK-NEXT: 1 9 9.50 vdivpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 14 9.50 * vdivpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 9 19.00 vdivpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 14 19.00 * vdivpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 9 9.50 vdivps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 14 9.50 * vdivps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 9 19.00 vdivps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 14 19.00 * vdivps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 9 9.50 vdivsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 14 9.50 * vdivsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 9 9.50 vdivss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 14 9.50 * vdivss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 15 15 1.50 vdppd $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 17 20 1.50 * vdppd $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 17 25 1.50 vdpps $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 18 30 1.50 * vdpps $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 25 27 3.00 vdpps $22, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 29 32 3.00 * vdpps $22, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vextractf128 $1, %ymm0, %xmm2 +# CHECK-NEXT: 2 7 0.50 * vextractf128 $1, %ymm0, (%rax) +# CHECK-NEXT: 2 13 1.00 vextractps $1, %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 * vextractps $1, %xmm0, (%rax) +# CHECK-NEXT: 3 11 1.00 vhaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 16 1.00 * vhaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 8 11 2.00 vhaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 10 16 2.00 * vhaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 3 11 1.00 vhaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 16 1.00 * vhaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 8 11 2.00 vhaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 10 16 2.00 * vhaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 3 11 1.00 vhsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 16 1.00 * vhsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 8 11 2.00 vhsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 10 16 2.00 * vhsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 3 11 1.00 vhsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 16 1.00 * vhsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 8 11 2.00 vhsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 10 16 2.00 * vhsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 2 2 0.50 vinsertf128 $1, %xmm0, %ymm1, %ymm2 # CHECK-NEXT: 2 7 0.50 * vinsertf128 $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vinsertps $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vinsertps $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 6 0.50 * vlddqu (%rax), %xmm2 -# CHECK-NEXT: 1 7 0.50 * vlddqu (%rax), %ymm2 -# CHECK-NEXT: 4 5 1.00 * * U vldmxcsr (%rax) +# CHECK-NEXT: 1 2 0.50 vinsertps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vinsertps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vlddqu (%rax), %xmm2 +# CHECK-NEXT: 2 5 0.50 * vlddqu (%rax), %ymm2 +# CHECK-NEXT: 1 5 0.50 * * U vldmxcsr (%rax) # CHECK-NEXT: 1 1 1.00 * * U vmaskmovdqu %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * vmaskmovpd (%rax), %xmm0, %xmm2 -# CHECK-NEXT: 3 9 1.00 * vmaskmovpd (%rax), %ymm0, %ymm2 -# CHECK-NEXT: 3 5 1.00 * * vmaskmovpd %xmm0, %xmm1, (%rax) -# CHECK-NEXT: 3 5 1.00 * * vmaskmovpd %ymm0, %ymm1, (%rax) -# CHECK-NEXT: 3 8 1.00 * vmaskmovps (%rax), %xmm0, %xmm2 -# CHECK-NEXT: 3 9 1.00 * vmaskmovps (%rax), %ymm0, %ymm2 -# CHECK-NEXT: 3 5 1.00 * * vmaskmovps %xmm0, %xmm1, (%rax) -# CHECK-NEXT: 3 5 1.00 * * vmaskmovps %ymm0, %ymm1, (%rax) -# CHECK-NEXT: 1 3 1.00 vmaxpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vmaxpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vmaxpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vmaxpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vmaxps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vmaxps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vmaxps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vmaxps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vmaxsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vmaxsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vmaxss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vmaxss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vminpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vminpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vminpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vminpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vminps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vminps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vminps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vminps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vminsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vminsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vminss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vminss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovapd %xmm0, %xmm2 +# CHECK-NEXT: 1 6 1.00 * vmaskmovpd (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 2 6 2.00 * vmaskmovpd (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 18 6 2.00 * * vmaskmovpd %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 34 6 2.00 * * vmaskmovpd %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 1 6 1.00 * vmaskmovps (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 2 6 2.00 * vmaskmovps (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 18 6 2.00 * * vmaskmovps %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 34 6 2.00 * * vmaskmovps %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 1 2 1.00 vmaxpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vmaxpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 2.00 vmaxpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 2.00 * vmaxpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 1.00 vmaxps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vmaxps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 2.00 vmaxps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 2.00 * vmaxps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 1.00 vmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 vmaxss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vmaxss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 vminpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vminpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 2.00 vminpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 2.00 * vminpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 1.00 vminps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vminps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 2.00 vminps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 2.00 * vminps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 1.00 vminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 vminss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 1.00 * vminss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovapd %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * vmovapd %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovapd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovapd %ymm0, %ymm2 -# CHECK-NEXT: 1 1 1.00 * vmovapd %ymm0, (%rax) -# CHECK-NEXT: 1 7 0.50 * vmovapd (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vmovaps %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovapd (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovapd %ymm0, %ymm2 +# CHECK-NEXT: 4 1 1.00 * vmovapd %ymm0, (%rax) +# CHECK-NEXT: 2 5 0.50 * vmovapd (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.50 vmovaps %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * vmovaps %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovaps (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovaps %ymm0, %ymm2 -# CHECK-NEXT: 1 1 1.00 * vmovaps %ymm0, (%rax) -# CHECK-NEXT: 1 7 0.50 * vmovaps (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vmovd %eax, %xmm2 -# CHECK-NEXT: 1 6 0.50 * vmovd (%rax), %xmm2 -# CHECK-NEXT: 1 2 1.00 vmovd %xmm0, %ecx -# CHECK-NEXT: 1 1 1.00 * vmovd %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 vmovddup %xmm0, %xmm2 -# CHECK-NEXT: 1 6 0.50 * vmovddup (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovddup %ymm0, %ymm2 -# CHECK-NEXT: 1 7 0.50 * vmovddup (%rax), %ymm2 -# CHECK-NEXT: 1 1 0.33 vmovdqa %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovaps (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovaps %ymm0, %ymm2 +# CHECK-NEXT: 4 1 1.00 * vmovaps %ymm0, (%rax) +# CHECK-NEXT: 2 5 0.50 * vmovaps (%rax), %ymm2 +# CHECK-NEXT: 2 10 0.50 vmovd %eax, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovd (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 vmovd %xmm0, %ecx +# CHECK-NEXT: 1 2 1.00 * vmovd %xmm0, (%rax) +# CHECK-NEXT: 1 2 0.50 vmovddup %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vmovddup (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovddup %ymm0, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vmovddup (%rax), %ymm2 +# CHECK-NEXT: 1 2 0.50 vmovdqa %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * vmovdqa %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovdqa (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vmovdqa %ymm0, %ymm2 -# CHECK-NEXT: 1 1 1.00 * vmovdqa %ymm0, (%rax) -# CHECK-NEXT: 1 7 0.50 * vmovdqa (%rax), %ymm2 -# CHECK-NEXT: 1 1 0.33 vmovdqu %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovdqa (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovdqa %ymm0, %ymm2 +# CHECK-NEXT: 4 1 1.00 * vmovdqa %ymm0, (%rax) +# CHECK-NEXT: 2 5 0.50 * vmovdqa (%rax), %ymm2 +# CHECK-NEXT: 1 2 0.50 vmovdqu %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * vmovdqu %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovdqu (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vmovdqu %ymm0, %ymm2 -# CHECK-NEXT: 1 1 1.00 * vmovdqu %ymm0, (%rax) -# CHECK-NEXT: 1 7 0.50 * vmovdqu (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vmovhlps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovlhps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 * vmovhpd %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * vmovhpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 * vmovhps %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * vmovhps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 * vmovlpd %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * vmovlpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 * vmovlps %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * vmovlps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 2 1.00 vmovmskpd %xmm0, %ecx -# CHECK-NEXT: 1 2 1.00 vmovmskpd %ymm0, %ecx -# CHECK-NEXT: 1 2 1.00 vmovmskps %xmm0, %ecx -# CHECK-NEXT: 1 2 1.00 vmovmskps %ymm0, %ecx -# CHECK-NEXT: 1 1 1.00 * vmovntdq %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * vmovntdq %ymm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovntdqa (%rax), %xmm2 -# CHECK-NEXT: 1 7 0.50 * vmovntdqa (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 * vmovntpd %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * vmovntpd %ymm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * vmovntps %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * vmovntps %ymm0, (%rax) -# CHECK-NEXT: 1 1 0.33 vmovq %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovq %rax, %xmm2 -# CHECK-NEXT: 1 6 0.50 * vmovq (%rax), %xmm2 -# CHECK-NEXT: 1 2 1.00 vmovq %xmm0, %rcx -# CHECK-NEXT: 1 1 1.00 * vmovq %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 vmovsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 * vmovsd %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovshdup %xmm0, %xmm2 -# CHECK-NEXT: 1 6 0.50 * vmovshdup (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovshdup %ymm0, %ymm2 -# CHECK-NEXT: 1 7 0.50 * vmovshdup (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vmovsldup %xmm0, %xmm2 -# CHECK-NEXT: 1 6 0.50 * vmovsldup (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovsldup %ymm0, %ymm2 -# CHECK-NEXT: 1 7 0.50 * vmovsldup (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vmovss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 * vmovss %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovss (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovupd %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovdqu (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovdqu %ymm0, %ymm2 +# CHECK-NEXT: 8 1 1.00 * vmovdqu %ymm0, (%rax) +# CHECK-NEXT: 2 5 0.50 * vmovdqu (%rax), %ymm2 +# CHECK-NEXT: 1 2 0.50 vmovhlps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vmovlhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 * vmovhpd %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * vmovhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 * vmovhps %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * vmovhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 * vmovlpd %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * vmovlpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 * vmovlps %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * vmovlps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 10 1.00 vmovmskpd %xmm0, %ecx +# CHECK-NEXT: 2 10 1.00 vmovmskpd %ymm0, %ecx +# CHECK-NEXT: 2 10 1.00 vmovmskps %xmm0, %ecx +# CHECK-NEXT: 2 10 1.00 vmovmskps %ymm0, %ecx +# CHECK-NEXT: 1 2 1.00 * vmovntdq %xmm0, (%rax) +# CHECK-NEXT: 4 2 2.00 * vmovntdq %ymm0, (%rax) +# CHECK-NEXT: 1 5 0.50 * vmovntdqa (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovntdqa (%rax), %ymm2 +# CHECK-NEXT: 1 3 1.00 * vmovntpd %xmm0, (%rax) +# CHECK-NEXT: 4 3 2.00 * vmovntpd %ymm0, (%rax) +# CHECK-NEXT: 1 3 1.00 * vmovntps %xmm0, (%rax) +# CHECK-NEXT: 4 3 2.00 * vmovntps %ymm0, (%rax) +# CHECK-NEXT: 1 2 0.50 vmovq %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 vmovq %rax, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovq (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 vmovq %xmm0, %rcx +# CHECK-NEXT: 1 2 1.00 * vmovq %xmm0, (%rax) +# CHECK-NEXT: 1 2 0.50 vmovsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 * vmovsd %xmm0, (%rax) +# CHECK-NEXT: 1 5 0.50 * vmovsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vmovshdup %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vmovshdup (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovshdup %ymm0, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vmovshdup (%rax), %ymm2 +# CHECK-NEXT: 1 2 0.50 vmovsldup %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vmovsldup (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovsldup %ymm0, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vmovsldup (%rax), %ymm2 +# CHECK-NEXT: 1 2 0.50 vmovss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 2 1.00 * vmovss %xmm0, (%rax) +# CHECK-NEXT: 1 5 0.50 * vmovss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovupd %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * vmovupd %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovupd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovupd %ymm0, %ymm2 -# CHECK-NEXT: 1 1 1.00 * vmovupd %ymm0, (%rax) -# CHECK-NEXT: 1 7 0.50 * vmovupd (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vmovups %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovupd (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovupd %ymm0, %ymm2 +# CHECK-NEXT: 8 1 1.00 * vmovupd %ymm0, (%rax) +# CHECK-NEXT: 2 5 0.50 * vmovupd (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.50 vmovups %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * vmovups %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * vmovups (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vmovups %ymm0, %ymm2 -# CHECK-NEXT: 1 1 1.00 * vmovups %ymm0, (%rax) -# CHECK-NEXT: 1 7 0.50 * vmovups (%rax), %ymm2 -# CHECK-NEXT: 3 7 1.00 vmpsadbw $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 13 1.00 * vmpsadbw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 * vmovups (%rax), %xmm2 +# CHECK-NEXT: 2 2 1.00 vmovups %ymm0, %ymm2 +# CHECK-NEXT: 8 1 1.00 * vmovups %ymm0, (%rax) +# CHECK-NEXT: 2 5 0.50 * vmovups (%rax), %ymm2 +# CHECK-NEXT: 9 9 2.00 vmpsadbw $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 9 14 2.00 * vmpsadbw $1, (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 1.00 vmulpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vmulpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vmulpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 12 1.00 * vmulpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vmulpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vmulpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vmulpd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 1.00 vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vmulps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 12 1.00 * vmulps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vmulps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vmulps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 1.00 vmulsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vmulsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vmulsd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 1.00 vmulss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vmulss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vorpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vorpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vorpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vorpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vorps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vorps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vorps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vorps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 0.50 vpabsb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpabsb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpabsd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpabsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpabsw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpabsw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpackssdw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpackssdw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpacksswb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpacksswb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpackusdw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpackusdw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpackuswb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpackuswb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddusb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddusb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddusw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddusw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpaddw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpaddw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpalignr $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpalignr $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.33 vpand %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpand (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.33 vpandn %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpandn (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpavgb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpavgb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpavgw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpavgw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpblendvb %xmm3, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpblendvb %xmm3, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpblendw $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpblendw $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 14 6.00 vpclmulqdq $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 1 14 5.67 * vpclmulqdq $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpeqb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpcmpeqb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpeqd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpcmpeqd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpeqq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpcmpeqq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpeqw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpcmpeqw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 4 2.67 vpcmpestri $1, %xmm0, %xmm2 -# CHECK-NEXT: 1 4 2.33 * vpcmpestri $1, (%rax), %xmm2 -# CHECK-NEXT: 1 11 2.67 vpcmpestrm $1, %xmm0, %xmm2 -# CHECK-NEXT: 1 11 2.33 * vpcmpestrm $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpgtb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpcmpgtb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpgtd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpcmpgtd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpcmpgtq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpcmpgtq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpcmpgtw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpcmpgtw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 11 3.00 vpcmpistri $1, %xmm0, %xmm2 -# CHECK-NEXT: 4 17 3.00 * vpcmpistri $1, (%rax), %xmm2 -# CHECK-NEXT: 3 11 3.00 vpcmpistrm $1, %xmm0, %xmm2 -# CHECK-NEXT: 4 17 3.00 * vpcmpistrm $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vperm2f128 $1, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vperm2f128 $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vpermilpd $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vpermilpd $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vpermilpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vpermilpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpermilpd $1, %ymm0, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vpermilpd $1, (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vpermilpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vpermilpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vpermilps $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vpermilps $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 vpermilps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vpermilps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpermilps $1, %ymm0, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vpermilps $1, (%rax), %ymm2 -# CHECK-NEXT: 1 1 1.00 vpermilps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vpermilps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 2 3 1.00 vpextrb $1, %xmm0, %ecx -# CHECK-NEXT: 3 5 1.00 * vpextrb $1, %xmm0, (%rax) -# CHECK-NEXT: 2 3 1.00 vpextrd $1, %xmm0, %ecx -# CHECK-NEXT: 4 5 1.00 * vpextrd $1, %xmm0, (%rax) -# CHECK-NEXT: 2 3 1.00 vpextrq $1, %xmm0, %rcx -# CHECK-NEXT: 4 5 1.00 * vpextrq $1, %xmm0, (%rax) -# CHECK-NEXT: 2 3 1.00 vpextrw $1, %xmm0, %ecx -# CHECK-NEXT: 3 5 1.00 * vpextrw $1, %xmm0, (%rax) -# CHECK-NEXT: 3 3 1.50 vphaddd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 9 1.50 * vphaddd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 3 1.50 vphaddsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 9 1.50 * vphaddsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 3 1.50 vphaddw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 9 1.50 * vphaddw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vphminposuw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vphminposuw (%rax), %xmm2 -# CHECK-NEXT: 3 3 1.50 vphsubd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 9 1.50 * vphsubd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 3 1.50 vphsubsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 9 1.50 * vphsubsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 3 3 1.50 vphsubw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 4 9 1.50 * vphsubw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpinsrb $1, %eax, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpinsrb $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpinsrd $1, %eax, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpinsrd $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpinsrq $1, %rax, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpinsrq $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpinsrw $1, %eax, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpinsrw $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmaddubsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmaddubsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmaddwd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmaddwd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmaxsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmaxsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmaxsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmaxsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmaxsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmaxsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmaxub %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmaxub (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmaxud %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmaxud (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmaxuw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmaxuw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpminsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpminsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpminsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpminsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpminsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpminsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpminub %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpminub (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpminud %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpminud (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpminuw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpminuw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 2 1.00 vpmovmskb %xmm0, %ecx -# CHECK-NEXT: 1 1 0.50 vpmovsxbd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovsxbd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovsxbq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovsxbq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovsxbw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovsxbw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovsxdq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovsxdq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovsxwd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovsxwd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovsxwq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovsxwq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovzxbd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovzxbd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovzxbq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovzxbq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovzxbw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovzxbw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovzxdq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovzxdq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovzxwd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovzxwd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpmovzxwq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpmovzxwq (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmuldq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmuldq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmulhrsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmulhrsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmulhuw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmulhuw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmulhw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmulhw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmulld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmulld (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmullw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmullw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpmuludq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpmuludq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.33 vpor %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpor (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vpsadbw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vpsadbw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpshufb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpshufb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpshufd $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpshufd $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpshufhw $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpshufhw $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpshuflw $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpshuflw $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsignb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsignb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsignd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsignd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsignw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsignw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpslld $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpslld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpslld (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpslldq $1, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpsllq $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpsllq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpsllq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpsllw $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpsllw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpsllw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpsrad $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpsrad %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpsrad (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpsraw $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpsraw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpsraw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpsrld $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpsrld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpsrld (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsrldq $1, %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpsrlq $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpsrlq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpsrlq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vpsrlw $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 2 1.00 vpsrlw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 3 8 1.00 * vpsrlw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubusb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubusb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubusw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubusw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpsubw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 2 2 1.00 vptest %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * vptest (%rax), %xmm1 -# CHECK-NEXT: 2 2 1.00 vptest %ymm0, %ymm1 -# CHECK-NEXT: 3 9 1.00 * vptest (%rax), %ymm1 -# CHECK-NEXT: 1 1 0.50 vpunpckhbw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpckhbw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpunpckhdq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpckhdq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpunpckhqdq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpckhqdq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpunpckhwd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpckhwd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpunpcklbw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpcklbw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpunpckldq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpckldq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpunpcklqdq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpcklqdq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpunpcklwd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpunpcklwd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 0.33 vpxor %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 0.50 * vpxor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vmulss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vpabsb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpabsb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpabsd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpabsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpabsw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpabsw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpackssdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpackssdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpacksswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpacksswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpackusdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpackusdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpackuswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpackuswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpalignr $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpalignr $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpand (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpandn %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpandn (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpavgb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpavgb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpavgw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpavgw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 2.00 vpblendvb %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 2.00 * vpblendvb %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpblendw $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpblendw $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 6 13 1.00 vpclmulqdq $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 6 17 1.00 * vpclmulqdq $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpeqb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpeqb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpeqd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpeqd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpeqq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpeqq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpeqw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpeqw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 27 15 4.00 vpcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: 28 20 4.50 * vpcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: 27 10 4.00 vpcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 28 15 4.50 * vpcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpgtb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpgtb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpgtd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpgtd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpgtq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpgtq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpcmpgtw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpcmpgtw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 7 14 1.00 vpcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: 8 19 1.00 * vpcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: 7 6 1.00 vpcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 9 11 1.00 * vpcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: 8 4 0.50 vperm2f128 $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 10 8 0.50 * vperm2f128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vpermilpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpermilpd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 3 2.00 vpermilpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 2.00 * vpermilpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vpermilpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vpermilpd $1, (%rax), %ymm2 +# CHECK-NEXT: 2 3 3.00 vpermilpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 8 3.00 * vpermilpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vpermilps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpermilps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 3 2.00 vpermilps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 2.00 * vpermilps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vpermilps $1, %ymm0, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vpermilps $1, (%rax), %ymm2 +# CHECK-NEXT: 2 3 3.00 vpermilps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 8 3.00 * vpermilps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 2 13 1.00 vpextrb $1, %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 * vpextrb $1, %xmm0, (%rax) +# CHECK-NEXT: 2 13 1.00 vpextrd $1, %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 * vpextrd $1, %xmm0, (%rax) +# CHECK-NEXT: 2 13 1.00 vpextrq $1, %xmm0, %rcx +# CHECK-NEXT: 2 13 1.00 * vpextrq $1, %xmm0, (%rax) +# CHECK-NEXT: 2 13 1.00 vpextrw $1, %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 * vpextrw $1, %xmm0, (%rax) +# CHECK-NEXT: 3 5 0.50 vphaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 10 0.50 * vphaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 3 5 0.50 vphaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 10 0.50 * vphaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 3 5 0.50 vphaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 10 0.50 * vphaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 4 1.00 vphminposuw %xmm0, %xmm2 +# CHECK-NEXT: 2 9 1.00 * vphminposuw (%rax), %xmm2 +# CHECK-NEXT: 3 5 0.50 vphsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 10 0.50 * vphsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 3 5 0.50 vphsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 10 0.50 * vphsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 3 5 0.50 vphsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 4 10 0.50 * vphsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 0.50 vpinsrb $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 2 6 0.50 * vpinsrb $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 0.50 vpinsrd $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 2 6 0.50 * vpinsrd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 0.50 vpinsrq $1, %rax, %xmm1, %xmm2 +# CHECK-NEXT: 2 6 0.50 * vpinsrq $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 0.50 vpinsrw $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 2 6 0.50 * vpinsrw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmaddubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmaddubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmaddwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmaddwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmaxsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmaxsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmaxsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmaxsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmaxub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmaxub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmaxud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmaxud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmaxuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmaxuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpminsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpminsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpminsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpminsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpminub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpminub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpminud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpminud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpminuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpminuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 13 1.00 vpmovmskb %xmm0, %ecx +# CHECK-NEXT: 1 2 0.50 vpmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovsxbd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovsxbq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovsxbw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovsxdq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovsxwd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovsxwq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovzxbd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovzxbq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovzxbw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovzxdq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovzxwd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpmovzxwq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmuldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmuldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmulhrsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmulhrsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmulhuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmulhuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmulhw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmulhw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 2.00 vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 2.00 * vpmulld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmullw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmullw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmuludq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vpmuludq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 4 0.50 vpsadbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 9 0.50 * vpsadbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 2.00 vpshufb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 2.00 * vpshufb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpshufd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsignb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsignb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsignd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsignd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsignw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsignw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpslld $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpslld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpslld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpslldq $1, %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsllq $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpsllq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsllq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsllw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpsllw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsllw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsrad $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpsrad %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsrad (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsraw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpsraw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsraw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsrld $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpsrld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsrld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsrldq $1, %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsrlq $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpsrlq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsrlq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsrlw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 vpsrlw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsrlw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 1 1.00 vptest %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * vptest (%rax), %xmm1 +# CHECK-NEXT: 4 1 1.00 vptest %ymm0, %ymm1 +# CHECK-NEXT: 6 6 1.00 * vptest (%rax), %ymm1 +# CHECK-NEXT: 1 2 0.50 vpunpckhbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpckhbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpunpckhdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpckhdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpunpckhqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpckhqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpunpckhwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpckhwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpunpcklbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpcklbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpunpckldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpckldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpunpcklqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpcklqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpunpcklwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpunpcklwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpxor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vpxor (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 1.00 vrcpps %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vrcpps (%rax), %xmm2 -# CHECK-NEXT: 3 7 2.00 vrcpps %ymm0, %ymm2 -# CHECK-NEXT: 4 14 2.00 * vrcpps (%rax), %ymm2 +# CHECK-NEXT: 1 10 1.00 * vrcpps (%rax), %xmm2 +# CHECK-NEXT: 2 5 2.00 vrcpps %ymm0, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vrcpps (%rax), %ymm2 # CHECK-NEXT: 1 5 1.00 vrcpss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vrcpss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vroundpd $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vroundpd $1, (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vroundpd $1, %ymm0, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vroundpd $1, (%rax), %ymm2 -# CHECK-NEXT: 1 3 1.00 vroundps $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vroundps $1, (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vroundps $1, %ymm0, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vroundps $1, (%rax), %ymm2 -# CHECK-NEXT: 1 3 1.00 vroundsd $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vroundsd $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vroundss $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vroundss $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vrcpss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vroundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vroundpd $1, (%rax), %xmm2 +# CHECK-NEXT: 2 4 2.00 vroundpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 2 9 2.00 * vroundpd $1, (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vroundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vroundps $1, (%rax), %xmm2 +# CHECK-NEXT: 2 4 2.00 vroundps $1, %ymm0, %ymm2 +# CHECK-NEXT: 2 9 2.00 * vroundps $1, (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vroundsd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vroundsd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vroundss $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 9 1.00 * vroundss $1, (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 1.00 vrsqrtps %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vrsqrtps (%rax), %xmm2 -# CHECK-NEXT: 3 7 2.00 vrsqrtps %ymm0, %ymm2 -# CHECK-NEXT: 4 14 2.00 * vrsqrtps (%rax), %ymm2 +# CHECK-NEXT: 1 10 1.00 * vrsqrtps (%rax), %xmm2 +# CHECK-NEXT: 2 5 2.00 vrsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vrsqrtps (%rax), %ymm2 # CHECK-NEXT: 1 5 1.00 vrsqrtss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 11 1.00 * vrsqrtss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vshufpd $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vshufpd $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vshufpd $1, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vshufpd $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vshufps $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vshufps $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vshufps $1, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vshufps $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 21 21.00 vsqrtpd %xmm0, %xmm2 -# CHECK-NEXT: 2 27 21.00 * vsqrtpd (%rax), %xmm2 -# CHECK-NEXT: 3 45 44.00 vsqrtpd %ymm0, %ymm2 -# CHECK-NEXT: 4 52 44.00 * vsqrtpd (%rax), %ymm2 -# CHECK-NEXT: 1 14 14.00 vsqrtps %xmm0, %xmm2 -# CHECK-NEXT: 2 20 14.00 * vsqrtps (%rax), %xmm2 -# CHECK-NEXT: 3 29 28.00 vsqrtps %ymm0, %ymm2 -# CHECK-NEXT: 4 36 28.00 * vsqrtps (%rax), %ymm2 -# CHECK-NEXT: 1 21 21.00 vsqrtsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 27 21.00 * vsqrtsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 14 14.00 vsqrtss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 20 14.00 * vsqrtss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 4 5 1.00 * * U vstmxcsr (%rax) -# CHECK-NEXT: 1 3 1.00 vsubpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vsubpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vsubpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vsubpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vsubps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vsubps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vsubps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 1.00 * vsubps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vsubsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vsubsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 3 1.00 vsubss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 9 1.00 * vsubss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vtestpd %xmm0, %xmm1 -# CHECK-NEXT: 2 7 1.00 * vtestpd (%rax), %xmm1 -# CHECK-NEXT: 1 1 1.00 vtestpd %ymm0, %ymm1 -# CHECK-NEXT: 2 8 1.00 * vtestpd (%rax), %ymm1 -# CHECK-NEXT: 1 1 1.00 vtestps %xmm0, %xmm1 -# CHECK-NEXT: 2 7 1.00 * vtestps (%rax), %xmm1 -# CHECK-NEXT: 1 1 1.00 vtestps %ymm0, %ymm1 -# CHECK-NEXT: 2 8 1.00 * vtestps (%rax), %ymm1 -# CHECK-NEXT: 2 2 1.00 vucomisd %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * vucomisd (%rax), %xmm1 -# CHECK-NEXT: 2 2 1.00 vucomiss %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * vucomiss (%rax), %xmm1 -# CHECK-NEXT: 1 1 1.00 vunpckhpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vunpckhpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vunpckhpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vunpckhpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vunpckhps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vunpckhps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vunpckhps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vunpckhps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vunpcklpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vunpcklpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vunpcklpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vunpcklpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vunpcklps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vunpcklps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vunpcklps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vunpcklps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vxorpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vxorpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vxorpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vxorpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vxorps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 7 1.00 * vxorps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 1 1.00 vxorps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vxorps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: 20 9 2.00 * * U vzeroall -# CHECK-NEXT: 1 100 0.33 * * U vzeroupper +# CHECK-NEXT: 1 10 1.00 * vrsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 2 0.50 vshufpd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vshufpd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vshufpd $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vshufpd $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vshufps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vshufps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vshufps $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vshufps $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 9 13.50 vsqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 1 14 13.50 * vsqrtpd (%rax), %xmm2 +# CHECK-NEXT: 2 9 27.00 vsqrtpd %ymm0, %ymm2 +# CHECK-NEXT: 2 14 27.00 * vsqrtpd (%rax), %ymm2 +# CHECK-NEXT: 1 9 10.50 vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 1 14 10.50 * vsqrtps (%rax), %xmm2 +# CHECK-NEXT: 2 9 21.00 vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 2 14 21.00 * vsqrtps (%rax), %ymm2 +# CHECK-NEXT: 1 9 13.50 vsqrtsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 14 13.50 * vsqrtsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 9 10.50 vsqrtss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 14 10.50 * vsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 1 0.50 * * U vstmxcsr (%rax) +# CHECK-NEXT: 1 5 1.00 vsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 1.00 vsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 2.00 * vsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 1.00 vsubsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vsubss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 1 1.00 vtestpd %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * vtestpd (%rax), %xmm1 +# CHECK-NEXT: 4 1 1.00 vtestpd %ymm0, %ymm1 +# CHECK-NEXT: 6 6 1.00 * vtestpd (%rax), %ymm1 +# CHECK-NEXT: 2 1 1.00 vtestps %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * vtestps (%rax), %xmm1 +# CHECK-NEXT: 4 1 1.00 vtestps %ymm0, %ymm1 +# CHECK-NEXT: 6 6 1.00 * vtestps (%rax), %ymm1 +# CHECK-NEXT: 2 1 1.00 vucomisd %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * vucomisd (%rax), %xmm1 +# CHECK-NEXT: 2 1 1.00 vucomiss %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * vucomiss (%rax), %xmm1 +# CHECK-NEXT: 1 2 0.50 vunpckhpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vunpckhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vunpckhpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vunpckhpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vunpckhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vunpckhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vunpckhps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vunpckhps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vunpcklpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vunpcklpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vunpcklpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vunpcklpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vunpcklps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vunpcklps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vunpcklps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vunpcklps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vxorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vxorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vxorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vxorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.50 vxorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 7 0.50 * vxorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 2 1.00 vxorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 7 1.00 * vxorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 32 90 8.00 * * U vzeroall +# CHECK-NEXT: 16 46 4.00 * * U vzeroupper # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - 572.00 246.83 317.33 39.00 365.83 179.50 179.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 229.00 229.00 - - - 56.00 - - 588.00 588.00 127.50 127.50 38.00 107.00 402.50 429.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vaddpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddsubpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddsubpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddsubpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddsubpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddsubps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddsubps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vaddsubps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vaddsubps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - vaesdec %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 vaesdec (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - vaesdeclast %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 vaesdeclast (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - vaesenc %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 vaesenc (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - vaesenclast %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 0.50 0.50 vaesenclast (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 2.00 - - vaesimc %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 2.00 0.50 0.50 vaesimc (%rax), %xmm2 -# CHECK-NEXT: - - 3.67 3.67 - 3.67 - - vaeskeygenassist $22, %xmm0, %xmm2 -# CHECK-NEXT: - - 3.33 3.33 - 3.33 0.50 0.50 vaeskeygenassist $22, (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vandnpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandnpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vandnpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandnpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vandnps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandnps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vandnps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandnps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vandpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vandpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vandps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vandps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vandps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 - - 0.50 - - vblendpd $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 vblendpd $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 - - vblendpd $11, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 vblendpd $11, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 - - 0.50 - - vblendps $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 vblendps $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 - - vblendps $11, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 vblendps $11, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vblendvpd %xmm3, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vblendvpd %xmm3, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vblendvpd %ymm3, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vblendvpd %ymm3, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vblendvps %xmm3, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vblendvps %xmm3, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vblendvps %ymm3, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vblendvps %ymm3, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vbroadcastf128 (%rax), %ymm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vbroadcastsd (%rax), %ymm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vbroadcastss (%rax), %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vbroadcastss (%rax), %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vcmppd $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcmppd $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcmppd $0, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcmppd $0, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vcmpps $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcmpps $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcmpps $0, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcmpps $0, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vcmpsd $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcmpsd $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcmpss $0, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcmpss $0, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - vcomisd %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcomisd (%rax), %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - - - vcomiss %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcomiss (%rax), %xmm1 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtdq2pd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtdq2pd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtdq2pd %xmm0, %ymm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtdq2pd (%rax), %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvtdq2ps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtdq2ps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvtdq2ps %ymm0, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtdq2ps (%rax), %ymm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtpd2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtpd2dqx (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtpd2dq %ymm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtpd2dqy (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtpd2ps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtpd2psx (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtpd2ps %ymm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtpd2psy (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvtps2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtps2dq (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvtps2dq %ymm0, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtps2dq (%rax), %ymm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vcvtps2pd %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vcvtps2pd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vcvtps2pd %xmm0, %ymm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vcvtps2pd (%rax), %ymm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvtsd2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvtsd2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvtsd2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvtsd2si (%rax), %rcx -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtsd2ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtsd2ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtsi2sdl %ecx, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvtsi2sdq %rcx, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtsi2sdl (%rax), %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtsi2sdq (%rax), %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vcvtsi2ssl %ecx, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vcvtsi2ssq %rcx, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtsi2ssl (%rax), %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvtsi2ssq (%rax), %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vcvtss2sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vcvtss2sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvtss2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvtss2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvtss2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvtss2si (%rax), %rcx -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvttpd2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvttpd2dqx (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vcvttpd2dq %ymm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vcvttpd2dqy (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvttps2dq (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvttps2dq %ymm0, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvttps2dq (%rax), %ymm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvttsd2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvttsd2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvttsd2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvttsd2si (%rax), %rcx -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvttss2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - vcvttss2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvttss2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vcvttss2si (%rax), %rcx -# CHECK-NEXT: - 22.00 1.00 - - - - - vdivpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - 22.00 1.00 - - - 0.50 0.50 vdivpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - 44.00 2.50 - - 0.50 - - vdivpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - 44.00 2.50 - - 0.50 0.50 0.50 vdivpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - vdivps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 vdivps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - 28.00 2.50 - - 0.50 - - vdivps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - 28.00 2.50 - - 0.50 0.50 0.50 vdivps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - 22.00 1.00 - - - - - vdivsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - 22.00 1.00 - - - 0.50 0.50 vdivsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - vdivss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 vdivss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - vdppd $22, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 0.50 0.50 vdppd $22, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 2.00 - 1.00 - - vdpps $22, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 2.00 - 1.00 0.50 0.50 vdpps $22, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 2.00 - 1.00 - - vdpps $22, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 2.00 - 1.00 0.50 0.50 vdpps $22, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vextractf128 $1, %ymm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vextractf128 $1, %ymm0, (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - vextractps $1, %xmm0, %ecx -# CHECK-NEXT: - - - - 1.00 1.00 0.50 0.50 vextractps $1, %xmm0, (%rax) -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhaddpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhaddpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhaddpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhaddpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhaddps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhaddps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhaddps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhsubpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhsubpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhsubpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhsubpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhsubps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhsubps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - vhsubps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 vhsubps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vinsertf128 $1, %xmm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 vinsertf128 $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vinsertps $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vinsertps $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vlddqu (%rax), %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vlddqu (%rax), %ymm2 -# CHECK-NEXT: - - 1.00 - 1.00 1.00 0.50 0.50 vldmxcsr (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmaskmovdqu %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vmaskmovpd (%rax), %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vmaskmovpd (%rax), %ymm0, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 1.00 - 0.50 0.50 vmaskmovpd %xmm0, %xmm1, (%rax) -# CHECK-NEXT: - - 0.50 0.50 1.00 - 0.50 0.50 vmaskmovpd %ymm0, %ymm1, (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vmaskmovps (%rax), %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vmaskmovps (%rax), %ymm0, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 1.00 - 0.50 0.50 vmaskmovps %xmm0, %xmm1, (%rax) -# CHECK-NEXT: - - 0.50 0.50 1.00 - 0.50 0.50 vmaskmovps %ymm0, %ymm1, (%rax) -# CHECK-NEXT: - - - 1.00 - - - - vmaxpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmaxpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vmaxpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmaxpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vmaxps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmaxps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vmaxps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmaxps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vmaxsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmaxsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vmaxss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmaxss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vminpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vminpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vminpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vminpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vminps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vminps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vminps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vminps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vminsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vminsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vminss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vminss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovapd %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovapd %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovapd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovapd %ymm0, %ymm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovapd %ymm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovapd (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovaps %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovaps %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovaps (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovaps %ymm0, %ymm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovaps %ymm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovaps (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovd %eax, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmovd %xmm0, %ecx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovd %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 - - vmovddup %xmm0, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovddup (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovddup %ymm0, %ymm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovddup (%rax), %ymm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vmovdqa %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovdqa %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovdqa (%rax), %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 - - vmovdqa %ymm0, %ymm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovdqa %ymm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovdqa (%rax), %ymm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vmovdqu %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovdqu %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovdqu (%rax), %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 - - vmovdqu %ymm0, %ymm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovdqu %ymm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovdqu (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovhlps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovlhps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovhpd %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vmovhpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovhps %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vmovhps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovlpd %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vmovlpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovlps %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vmovlps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmovmskpd %xmm0, %ecx -# CHECK-NEXT: - - 1.00 - - - - - vmovmskpd %ymm0, %ecx -# CHECK-NEXT: - - 1.00 - - - - - vmovmskps %xmm0, %ecx -# CHECK-NEXT: - - 1.00 - - - - - vmovmskps %ymm0, %ecx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovntdq %xmm0, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovntdq %ymm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovntdqa (%rax), %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovntdqa (%rax), %ymm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovntpd %xmm0, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovntpd %ymm0, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovntps %xmm0, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovntps %ymm0, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vmovq %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovq %rax, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmovq %xmm0, %rcx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovq %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 - - vmovsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovsd %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovsd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovshdup %xmm0, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovshdup (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovshdup %ymm0, %ymm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovshdup (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovsldup %xmm0, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovsldup (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovsldup %ymm0, %ymm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovsldup (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovss %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovss (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovupd %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovupd %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovupd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovupd %ymm0, %ymm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovupd %ymm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovupd (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovups %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovups %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovups (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vmovups %ymm0, %ymm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 vmovups %ymm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 vmovups (%rax), %ymm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - vmpsadbw $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 0.50 0.50 vmpsadbw $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vmulpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vmulpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vmulps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vmulps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vmulsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vmulss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vorpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vorpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vorpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vorpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vorps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vorps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vorps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vorps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpabsb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpabsb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpabsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpabsd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpabsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpabsw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpackssdw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpackssdw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpacksswb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpacksswb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpackusdw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpackusdw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpackuswb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpackuswb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddusb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddusb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddusw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddusw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpaddw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpaddw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpalignr $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpalignr $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vpand %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 vpand (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vpandn %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 vpandn (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpavgb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpavgb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpavgw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpavgw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - vpblendvb %xmm3, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 vpblendvb %xmm3, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpblendw $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpblendw $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 6.00 6.00 - 6.00 - - vpclmulqdq $11, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 5.67 5.67 - 5.67 0.50 0.50 vpclmulqdq $11, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmpeqb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmpeqb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmpeqd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmpeqd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmpeqq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmpeqq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmpeqw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmpeqw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 2.67 2.67 - 2.67 - - vpcmpestri $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 2.33 2.33 - 2.33 0.50 0.50 vpcmpestri $1, (%rax), %xmm2 -# CHECK-NEXT: - - 2.67 2.67 - 2.67 - - vpcmpestrm $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 2.33 2.33 - 2.33 0.50 0.50 vpcmpestrm $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmpgtb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmpgtb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmpgtd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmpgtd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpcmpgtq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpcmpgtq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmpgtw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmpgtw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 3.00 - - - - - vpcmpistri $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 3.00 - - - 0.50 0.50 vpcmpistri $1, (%rax), %xmm2 -# CHECK-NEXT: - - 3.00 - - - - - vpcmpistrm $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 3.00 - - - 0.50 0.50 vpcmpistrm $1, (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vperm2f128 $1, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vperm2f128 $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilpd $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilpd $1, (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilpd $1, %ymm0, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilpd $1, (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilps $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilps $1, (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilps $1, %ymm0, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilps $1, (%rax), %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermilps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermilps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpextrb $1, %xmm0, %ecx -# CHECK-NEXT: - - - 0.50 1.00 0.50 0.50 0.50 vpextrb $1, %xmm0, (%rax) -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpextrd $1, %xmm0, %ecx -# CHECK-NEXT: - - 1.00 0.50 1.00 0.50 0.50 0.50 vpextrd $1, %xmm0, (%rax) -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpextrq $1, %xmm0, %rcx -# CHECK-NEXT: - - 1.00 0.50 1.00 0.50 0.50 0.50 vpextrq $1, %xmm0, (%rax) -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpextrw $1, %xmm0, %ecx -# CHECK-NEXT: - - - 0.50 1.00 0.50 0.50 0.50 vpextrw $1, %xmm0, (%rax) -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vphminposuw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vphminposuw (%rax), %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphsubd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphsubd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphsubsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphsubsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphsubw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphsubw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 1.50 - - vpinsrb $1, %eax, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpinsrb $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 1.50 - - vpinsrd $1, %eax, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpinsrd $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 1.50 - - vpinsrq $1, %rax, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpinsrq $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 1.50 - - vpinsrw $1, %eax, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpinsrw $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmaddubsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmaddubsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmaddwd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmaddwd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmaxsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmaxsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmaxsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmaxsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmaxsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmaxsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmaxub %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmaxub (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmaxud %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmaxud (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmaxuw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmaxuw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpminsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpminsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpminsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpminsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpminsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpminsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpminub %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpminub (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpminud %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpminud (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpminuw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpminuw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmovmskb %xmm0, %ecx -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovsxbd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovsxbd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovsxbq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovsxbq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovsxbw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovsxbw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovsxdq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovsxdq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovsxwd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovsxwd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovsxwq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovsxwq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovzxbd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovzxbd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovzxbq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovzxbq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovzxbw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovzxbw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovzxdq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovzxdq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovzxwd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovzxwd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpmovzxwq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpmovzxwq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmuldq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmuldq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmulhrsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmulhrsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmulhuw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmulhuw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmulhw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmulhw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmulld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmulld (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmullw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmullw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpmuludq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmuludq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vpor %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 vpor (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsadbw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpsadbw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpshufb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpshufb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpshufd $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpshufd $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpshufhw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpshufhw $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpshuflw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpshuflw $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsignb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsignb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsignd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsignd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsignw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsignw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpslld $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpslld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpslld (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpslldq $1, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsllq $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpsllq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpsllq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsllw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpsllw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpsllw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsrad $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpsrad %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpsrad (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsraw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpsraw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpsraw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsrld $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpsrld %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpsrld (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsrldq $1, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsrlq $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpsrlq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpsrlq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpsrlw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - vpsrlw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 vpsrlw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubsb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubsb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubsw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubsw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubusb %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubusb (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubusw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubusw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpsubw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpsubw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vptest %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vptest (%rax), %xmm1 -# CHECK-NEXT: - - 1.00 - - 1.00 - - vptest %ymm0, %ymm1 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 vptest (%rax), %ymm1 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpckhbw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpckhbw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpckhdq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpckhdq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpckhqdq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpckhqdq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpckhwd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpckhwd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpcklbw %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpcklbw (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpckldq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpckldq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpcklqdq %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpcklqdq (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpunpcklwd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpunpcklwd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vpxor %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 vpxor (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vrcpps %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vrcpps (%rax), %xmm2 -# CHECK-NEXT: - - 2.50 - - 0.50 - - vrcpps %ymm0, %ymm2 -# CHECK-NEXT: - - 2.50 - - 0.50 0.50 0.50 vrcpps (%rax), %ymm2 -# CHECK-NEXT: - - 1.00 - - - - - vrcpss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vrcpss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vroundpd $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vroundpd $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vroundpd $1, %ymm0, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vroundpd $1, (%rax), %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vroundps $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vroundps $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vroundps $1, %ymm0, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vroundps $1, (%rax), %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vroundsd $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vroundsd $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vroundss $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vroundss $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vrsqrtps %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vrsqrtps (%rax), %xmm2 -# CHECK-NEXT: - - 2.50 - - 0.50 - - vrsqrtps %ymm0, %ymm2 -# CHECK-NEXT: - - 2.50 - - 0.50 0.50 0.50 vrsqrtps (%rax), %ymm2 -# CHECK-NEXT: - - 1.00 - - - - - vrsqrtss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vrsqrtss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vshufpd $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vshufpd $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vshufpd $1, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vshufpd $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vshufps $1, %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vshufps $1, (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vshufps $1, %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vshufps $1, (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - 21.00 1.00 - - - - - vsqrtpd %xmm0, %xmm2 -# CHECK-NEXT: - 21.00 1.00 - - - 0.50 0.50 vsqrtpd (%rax), %xmm2 -# CHECK-NEXT: - 44.00 2.50 - - 0.50 - - vsqrtpd %ymm0, %ymm2 -# CHECK-NEXT: - 44.00 2.50 - - 0.50 0.50 0.50 vsqrtpd (%rax), %ymm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - vsqrtps %xmm0, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 vsqrtps (%rax), %xmm2 -# CHECK-NEXT: - 28.00 2.50 - - 0.50 - - vsqrtps %ymm0, %ymm2 -# CHECK-NEXT: - 28.00 2.50 - - 0.50 0.50 0.50 vsqrtps (%rax), %ymm2 -# CHECK-NEXT: - 21.00 1.00 - - - - - vsqrtsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - 21.00 1.00 - - - 0.50 0.50 vsqrtsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - vsqrtss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 vsqrtss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - 1.00 1.00 0.50 0.50 vstmxcsr (%rax) -# CHECK-NEXT: - - - 1.00 - - - - vsubpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vsubpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vsubpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vsubpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vsubps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vsubps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vsubps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vsubps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vsubsd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vsubsd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vsubss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vsubss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vtestpd %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vtestpd (%rax), %xmm1 -# CHECK-NEXT: - - 1.00 - - - - - vtestpd %ymm0, %ymm1 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vtestpd (%rax), %ymm1 -# CHECK-NEXT: - - 1.00 - - - - - vtestps %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vtestps (%rax), %xmm1 -# CHECK-NEXT: - - 1.00 - - - - - vtestps %ymm0, %ymm1 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vtestps (%rax), %ymm1 -# CHECK-NEXT: - - 1.00 1.00 - - - - vucomisd %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vucomisd (%rax), %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - - - vucomiss %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 vucomiss (%rax), %xmm1 -# CHECK-NEXT: - - - - - 1.00 - - vunpckhpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpckhpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vunpckhpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpckhpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vunpckhps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpckhps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vunpckhps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpckhps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vunpcklpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpcklpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vunpcklpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpcklpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vunpcklps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpcklps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vunpcklps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vunpcklps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vxorpd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vxorpd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vxorpd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vxorpd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vxorps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vxorps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vxorps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vxorps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 2.00 - - vzeroall -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - vzeroupper +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vaddsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vaesdec %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vaesdec (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vaesdeclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vaesdeclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vaesenc %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vaesenc (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vaesenclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vaesenclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vaesimc %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vaesimc (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vaeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vaeskeygenassist $22, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandnpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandnpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandnpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandnpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandnps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandnps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandnps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandnps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vandps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vandps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vblendpd $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vblendpd $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vblendpd $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vblendpd $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vblendps $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vblendps $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vblendps $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vblendps $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vblendvpd %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vblendvpd %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vblendvpd %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vblendvpd %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vblendvps %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vblendvps %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vblendvps %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vblendvps %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vbroadcastf128 (%rax), %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 1.00 1.00 - - - - vbroadcastsd (%rax), %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vbroadcastss (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 1.00 1.00 - - - - vbroadcastss (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmppd $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmppd $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vcmppd $0, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vcmppd $0, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmpps $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmpps $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vcmpps $0, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vcmpps $0, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmpsd $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmpsd $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmpss $0, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vcmpss $0, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vcomisd %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vcomisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vcomiss %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vcomiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtdq2pd %xmm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtdq2pd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtdq2ps %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtdq2ps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtpd2dqx (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvtpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvtpd2dqy (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtpd2psx (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvtpd2ps %ymm0, %xmm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvtpd2psy (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtps2dq %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtps2dq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtps2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtps2pd %xmm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtps2pd (%rax), %ymm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtsd2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtsd2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsd2ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsd2ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2sdl %ecx, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2sdq %rcx, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2sdl (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2sdq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2ssl %ecx, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2ssq %rcx, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2ssl (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtsi2ssq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtss2sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtss2sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtss2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtss2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvtss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvttpd2dqx (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvttpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvttpd2dqy (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvttps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vcvttps2dq %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vcvttps2dq (%rax), %ymm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttsd2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttsd2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttss2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttss2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - vcvttss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 19.00 19.00 - - - - - 2.00 - - - - vdivpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 19.00 19.00 - - - - - 2.00 - - - - vdivpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 19.00 19.00 - - - - - 2.00 - - - - vdivps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 19.00 19.00 - - - - - 2.00 - - - - vdivps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - vdivss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.50 1.50 - - - - - 1.00 - - - - vdppd $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.50 1.50 - - - - - 1.00 - - - - vdppd $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.50 1.50 - - - - - 1.00 - - - - vdpps $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.50 1.50 - - - - - 1.00 - - - - vdpps $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - - - 2.00 - - - - vdpps $22, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - - 2.00 - - - - vdpps $22, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vextractf128 $1, %ymm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vextractf128 $1, %ymm0, (%rax) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vextractps $1, %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vextractps $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vhsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vhsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vinsertf128 $1, %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vinsertf128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vinsertps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vinsertps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vlddqu (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vlddqu (%rax), %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - vldmxcsr (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmaskmovdqu %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.00 1.00 - - - - 0.50 0.50 - - - - vmaskmovpd (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 2.00 2.00 - - - - 1.00 1.00 - - - - vmaskmovpd (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vmaskmovpd %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 1.00 1.00 - - - - - - 2.00 2.00 - - - - 1.00 1.00 - - - - vmaskmovpd %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.00 1.00 - - - - 0.50 0.50 - - - - vmaskmovps (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 2.00 2.00 - - - - 1.00 1.00 - - - - vmaskmovps (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vmaskmovps %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 1.00 1.00 - - - - - - 2.00 2.00 - - - - 1.00 1.00 - - - - vmaskmovps %ymm0, %ymm1, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vmaxpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vmaxpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vmaxps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vmaxps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vmaxss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vminpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vminpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vminps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vminps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vminss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovapd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovapd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovapd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovapd %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovapd %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovapd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovaps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovaps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovaps %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovaps %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovaps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovd %eax, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovd (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vmovd %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovd %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovddup %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovddup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovddup %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovddup (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovdqa %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovdqa %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovdqa (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - - 1.00 1.00 - - - - vmovdqa %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovdqa %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovdqa (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovdqu %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovdqu %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovdqu (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - - 1.00 1.00 - - - - vmovdqu %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovdqu %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovdqu (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovhlps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovlhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovhpd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovhps %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovlpd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovlpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovlps %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovlps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vmovmskpd %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vmovmskpd %ymm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vmovmskps %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vmovmskps %ymm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovntdq %xmm0, (%rax) +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 2.00 - 2.00 - - - - vmovntdq %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovntdqa (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovntdqa (%rax), %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovntpd %xmm0, (%rax) +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 2.00 - 2.00 - - - - vmovntpd %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovntps %xmm0, (%rax) +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 2.00 - 2.00 - - - - vmovntps %ymm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovq %rax, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vmovq (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vmovq %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovq %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovsd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovshdup %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovshdup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovshdup %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovshdup (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovsldup %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovsldup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovsldup %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovsldup (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovss %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovupd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovupd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovupd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovupd %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovupd %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovupd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovups %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovups %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovups (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vmovups %ymm0, %ymm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vmovups %ymm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vmovups (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - 2.00 - 1.00 - - - - - vmpsadbw $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 2.00 - 1.00 - - - - - vmpsadbw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vmulpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vmulpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vmulps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vmulss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpabsb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpabsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpabsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpabsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpabsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpabsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpackssdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpackssdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpacksswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpacksswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpackusdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpackusdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpackuswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpackuswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpalignr $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpalignr $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpand (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpandn %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpandn (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpavgb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpavgb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpavgw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpavgw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - vpblendvb %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - vpblendvb %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpblendw $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpblendw $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpclmulqdq $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpclmulqdq $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpeqw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 4.00 4.00 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - vpcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: 4.50 4.50 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - vpcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: 4.00 4.00 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - vpcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 4.50 4.50 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - vpcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmpgtw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - vpcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - vpcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - vpcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - vpcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vperm2f128 $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vperm2f128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vpermilpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vpermilpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermilpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermilpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vpermilpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vpermilpd $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermilpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermilpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vpermilps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vpermilps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermilps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermilps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vpermilps $1, %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vpermilps $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermilps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermilps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vpextrb $1, %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vpextrb $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vpextrd $1, %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vpextrd $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vpextrq $1, %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vpextrq $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vpextrw $1, %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vpextrw $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 1.00 - - - - - vphminposuw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 1.00 - - - - - vphminposuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrb $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrb $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrd $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrq $1, %rax, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrq $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrw $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpinsrw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmaddubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmaddubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmaddwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmaddwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmaxuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpminuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vpmovmskb %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovsxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpmovzxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmuldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmuldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmulhrsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmulhrsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmulhuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmulhuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmulhw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmulhw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmulld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmullw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmullw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmuludq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmuludq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsadbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsadbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - vpshufb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - vpshufb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshufd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsignb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsignb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsignd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsignd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsignw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsignw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpslld $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpslld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpslld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpslldq $1, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsllq $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsllq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsllq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsllw $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsllw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsllw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrad $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrad %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrad (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsraw $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsraw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsraw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrld $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrldq $1, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrlq $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrlq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrlq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrlw $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrlw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsrlw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vptest %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vptest (%rax), %xmm1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 1.00 - - - - 1.00 1.00 - - - - vptest %ymm0, %ymm1 +# CHECK-NEXT: 1.00 1.00 - - - 1.00 - - 1.00 1.00 - - - - 1.00 1.00 - - - - vptest (%rax), %ymm1 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckhwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpcklbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpcklbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpckldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpcklqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpcklqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpcklwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpunpcklwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpxor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpxor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrcpps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrcpps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vrcpps %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vrcpps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrcpss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrcpss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vroundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vroundpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vroundpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vroundpd $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vroundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vroundps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vroundps $1, %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vroundps $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vroundsd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vroundsd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vroundss $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vroundss $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrsqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vrsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vrsqrtps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrsqrtss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - vrsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vshufpd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vshufpd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vshufpd $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vshufpd $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vshufps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vshufps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vshufps $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vshufps $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 13.50 13.50 - - - - - 1.00 - - - - vsqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 13.50 13.50 - - - - - 1.00 - - - - vsqrtpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 27.00 27.00 - - - - - 2.00 - - - - vsqrtpd %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 27.00 27.00 - - - - - 2.00 - - - - vsqrtpd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 10.50 10.50 - - - - - 1.00 - - - - vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 10.50 10.50 - - - - - 1.00 - - - - vsqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 21.00 21.00 - - - - - 2.00 - - - - vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 21.00 21.00 - - - - - 2.00 - - - - vsqrtps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 13.50 13.50 - - - - - 1.00 - - - - vsqrtsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 13.50 13.50 - - - - - 1.00 - - - - vsqrtsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 10.50 10.50 - - - - - 1.00 - - - - vsqrtss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 10.50 10.50 - - - - - 1.00 - - - - vsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - vstmxcsr (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - vsubss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vtestpd %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vtestpd (%rax), %xmm1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 1.00 - - - - 1.00 1.00 - - - - vtestpd %ymm0, %ymm1 +# CHECK-NEXT: 1.00 1.00 - - - 1.00 - - 1.00 1.00 - - - - 1.00 1.00 - - - - vtestpd (%rax), %ymm1 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vtestps %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vtestps (%rax), %xmm1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 1.00 - - - - 1.00 1.00 - - - - vtestps %ymm0, %ymm1 +# CHECK-NEXT: 1.00 1.00 - - - 1.00 - - 1.00 1.00 - - - - 1.00 1.00 - - - - vtestps (%rax), %ymm1 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vucomisd %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vucomisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vucomiss %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - vucomiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpckhpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpckhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpckhpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpckhpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpckhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpckhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpckhps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpckhps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpcklpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpcklpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpcklpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpcklpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpcklps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vunpcklps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpcklps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vunpcklps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vxorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vxorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vxorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vxorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vxorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - vxorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vxorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 1.00 1.00 - - - - 1.00 1.00 - - - - vxorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vzeroall +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vzeroupper Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-bmi1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-bmi1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-bmi1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s andn %eax, %ebx, %ecx andn (%rax), %ebx, %ecx @@ -46,68 +46,80 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 andnl %eax, %ebx, %ecx -# CHECK-NEXT: 2 6 0.50 * andnl (%rax), %ebx, %ecx -# CHECK-NEXT: 1 1 0.33 andnq %rax, %rbx, %rcx -# CHECK-NEXT: 2 6 0.50 * andnq (%rax), %rbx, %rcx -# CHECK-NEXT: 2 2 1.00 bextrl %eax, %ebx, %ecx -# CHECK-NEXT: 3 7 1.00 * bextrl %eax, (%rbx), %ecx -# CHECK-NEXT: 2 2 1.00 bextrq %rax, %rbx, %rcx -# CHECK-NEXT: 3 7 1.00 * bextrq %rax, (%rbx), %rcx -# CHECK-NEXT: 1 1 0.33 blsil %eax, %ecx +# CHECK-NEXT: 1 1 0.50 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 1 5 0.50 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.50 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 1 5 0.50 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 2 2 0.50 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 2 2 0.50 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 2 2 0.50 blsil %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blsil (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blsiq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blsiq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blsiq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blsmskl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blsmskl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blsmskl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blsmskq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blsmskq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blsmskq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blsrl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blsrl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blsrl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blsrq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blsrq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blsrq (%rax), %rcx -# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx -# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx -# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx -# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx +# CHECK-NEXT: 2 2 1.00 tzcntl %eax, %ecx +# CHECK-NEXT: 2 6 1.00 * tzcntl (%rax), %ecx +# CHECK-NEXT: 2 2 1.00 tzcntq %rax, %rcx +# CHECK-NEXT: 2 6 1.00 * tzcntq (%rax), %rcx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 7.33 13.33 - 7.33 6.00 6.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 6.00 6.00 - - - 14.00 14.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andnl %eax, %ebx, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andnl (%rax), %ebx, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andnq %rax, %rbx, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andnq (%rax), %rbx, %rcx -# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrl %eax, %ebx, %ecx -# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrl %eax, (%rbx), %ecx -# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrq %rax, %rbx, %rcx -# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrq %rax, (%rbx), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsil %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsil (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsiq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsiq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsmskl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsmskl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsmskq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsmskq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsrl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsrl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsrq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsrq (%rax), %rcx -# CHECK-NEXT: - - - 1.00 - - - - tzcntl %eax, %ecx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 tzcntl (%rax), %ecx -# CHECK-NEXT: - - - 1.00 - - - - tzcntq %rax, %rcx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 tzcntq (%rax), %rcx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsil %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - blsil (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsiq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - blsiq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsmskl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - blsmskl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsmskq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - blsmskq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsrl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - blsrl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsrq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - blsrq (%rax), %rcx +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - tzcntq (%rax), %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-clflushopt.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-clflushopt.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-clflushopt.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s clflushopt (%rax) @@ -12,22 +12,34 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 4 5 1.00 * * U clflushopt (%rax) +# CHECK-NEXT: 1 5 0.50 * * U clflushopt (%rax) # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 0.50 0.50 1.00 1.00 0.50 0.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.50 0.50 1.00 1.00 0.50 0.50 clflushopt (%rax) +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - clflushopt (%rax) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-cmov.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-cmov.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-cmov.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s cmovow %si, %di cmovnow %si, %di @@ -112,212 +112,224 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 2 2 0.67 cmovow %si, %di -# CHECK-NEXT: 2 2 0.67 cmovnow %si, %di -# CHECK-NEXT: 2 2 0.67 cmovbw %si, %di -# CHECK-NEXT: 2 2 0.67 cmovaew %si, %di -# CHECK-NEXT: 2 2 0.67 cmovew %si, %di -# CHECK-NEXT: 2 2 0.67 cmovnew %si, %di -# CHECK-NEXT: 3 3 1.00 cmovbew %si, %di -# CHECK-NEXT: 3 3 1.00 cmovaw %si, %di -# CHECK-NEXT: 2 2 0.67 cmovsw %si, %di -# CHECK-NEXT: 2 2 0.67 cmovnsw %si, %di -# CHECK-NEXT: 2 2 0.67 cmovpw %si, %di -# CHECK-NEXT: 2 2 0.67 cmovnpw %si, %di -# CHECK-NEXT: 2 2 0.67 cmovlw %si, %di -# CHECK-NEXT: 2 2 0.67 cmovgew %si, %di -# CHECK-NEXT: 2 2 0.67 cmovlew %si, %di -# CHECK-NEXT: 2 2 0.67 cmovgw %si, %di -# CHECK-NEXT: 3 7 0.67 * cmovow (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovnow (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovbw (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovaew (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovew (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovnew (%rax), %di -# CHECK-NEXT: 4 8 1.00 * cmovbew (%rax), %di -# CHECK-NEXT: 4 8 1.00 * cmovaw (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovsw (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovnsw (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovpw (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovnpw (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovlw (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovgew (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovlew (%rax), %di -# CHECK-NEXT: 3 7 0.67 * cmovgw (%rax), %di -# CHECK-NEXT: 2 2 0.67 cmovol %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovnol %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovbl %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovael %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovel %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovnel %esi, %edi -# CHECK-NEXT: 3 3 1.00 cmovbel %esi, %edi -# CHECK-NEXT: 3 3 1.00 cmoval %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovsl %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovnsl %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovpl %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovnpl %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovll %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovgel %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovlel %esi, %edi -# CHECK-NEXT: 2 2 0.67 cmovgl %esi, %edi -# CHECK-NEXT: 3 7 0.67 * cmovol (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovnol (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovbl (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovael (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovel (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovnel (%rax), %edi -# CHECK-NEXT: 4 8 1.00 * cmovbel (%rax), %edi -# CHECK-NEXT: 4 8 1.00 * cmoval (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovsl (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovnsl (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovpl (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovnpl (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovll (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovgel (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovlel (%rax), %edi -# CHECK-NEXT: 3 7 0.67 * cmovgl (%rax), %edi -# CHECK-NEXT: 2 2 0.67 cmovoq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovnoq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovbq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovaeq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmoveq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovneq %rsi, %rdi -# CHECK-NEXT: 3 3 1.00 cmovbeq %rsi, %rdi -# CHECK-NEXT: 3 3 1.00 cmovaq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovsq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovnsq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovpq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovnpq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovlq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovgeq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovleq %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 cmovgq %rsi, %rdi -# CHECK-NEXT: 3 7 0.67 * cmovoq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovnoq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovbq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovaeq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmoveq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovneq (%rax), %rdi -# CHECK-NEXT: 4 8 1.00 * cmovbeq (%rax), %rdi -# CHECK-NEXT: 4 8 1.00 * cmovaq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovsq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovnsq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovpq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovnpq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovlq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovgeq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovleq (%rax), %rdi -# CHECK-NEXT: 3 7 0.67 * cmovgq (%rax), %rdi +# CHECK-NEXT: 1 1 0.50 cmovow %si, %di +# CHECK-NEXT: 1 1 0.50 cmovnow %si, %di +# CHECK-NEXT: 1 1 0.50 cmovbw %si, %di +# CHECK-NEXT: 1 1 0.50 cmovaew %si, %di +# CHECK-NEXT: 1 1 0.50 cmovew %si, %di +# CHECK-NEXT: 1 1 0.50 cmovnew %si, %di +# CHECK-NEXT: 1 1 0.50 cmovbew %si, %di +# CHECK-NEXT: 1 1 0.50 cmovaw %si, %di +# CHECK-NEXT: 1 1 0.50 cmovsw %si, %di +# CHECK-NEXT: 1 1 0.50 cmovnsw %si, %di +# CHECK-NEXT: 1 1 0.50 cmovpw %si, %di +# CHECK-NEXT: 1 1 0.50 cmovnpw %si, %di +# CHECK-NEXT: 1 1 0.50 cmovlw %si, %di +# CHECK-NEXT: 1 1 0.50 cmovgew %si, %di +# CHECK-NEXT: 1 1 0.50 cmovlew %si, %di +# CHECK-NEXT: 1 1 0.50 cmovgw %si, %di +# CHECK-NEXT: 1 5 0.50 * cmovow (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovnow (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovbw (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovaew (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovew (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovnew (%rax), %di +# CHECK-NEXT: 2 5 0.50 * cmovbew (%rax), %di +# CHECK-NEXT: 2 5 0.50 * cmovaw (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovsw (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovnsw (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovpw (%rax), %di +# CHECK-NEXT: 1 5 0.50 * cmovnpw (%rax), %di +# CHECK-NEXT: 2 5 0.50 * cmovlw (%rax), %di +# CHECK-NEXT: 2 5 0.50 * cmovgew (%rax), %di +# CHECK-NEXT: 2 5 0.50 * cmovlew (%rax), %di +# CHECK-NEXT: 2 5 0.50 * cmovgw (%rax), %di +# CHECK-NEXT: 1 1 0.50 cmovol %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovnol %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovbl %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovael %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovel %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovnel %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovbel %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmoval %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovsl %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovnsl %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovpl %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovnpl %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovll %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovgel %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovlel %esi, %edi +# CHECK-NEXT: 1 1 0.50 cmovgl %esi, %edi +# CHECK-NEXT: 1 5 0.50 * cmovol (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovnol (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovbl (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovael (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovel (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovnel (%rax), %edi +# CHECK-NEXT: 2 5 0.50 * cmovbel (%rax), %edi +# CHECK-NEXT: 2 5 0.50 * cmoval (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovsl (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovnsl (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovpl (%rax), %edi +# CHECK-NEXT: 1 5 0.50 * cmovnpl (%rax), %edi +# CHECK-NEXT: 2 5 0.50 * cmovll (%rax), %edi +# CHECK-NEXT: 2 5 0.50 * cmovgel (%rax), %edi +# CHECK-NEXT: 2 5 0.50 * cmovlel (%rax), %edi +# CHECK-NEXT: 2 5 0.50 * cmovgl (%rax), %edi +# CHECK-NEXT: 1 1 0.50 cmovoq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovnoq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovbq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovaeq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmoveq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovneq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovbeq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovaq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovsq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovnsq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovpq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovnpq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovlq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovgeq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovleq %rsi, %rdi +# CHECK-NEXT: 1 1 0.50 cmovgq %rsi, %rdi +# CHECK-NEXT: 1 5 0.50 * cmovoq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovnoq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovbq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovaeq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmoveq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovneq (%rax), %rdi +# CHECK-NEXT: 2 5 0.50 * cmovbeq (%rax), %rdi +# CHECK-NEXT: 2 5 0.50 * cmovaq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovsq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovnsq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovpq (%rax), %rdi +# CHECK-NEXT: 1 5 0.50 * cmovnpq (%rax), %rdi +# CHECK-NEXT: 2 5 0.50 * cmovlq (%rax), %rdi +# CHECK-NEXT: 2 5 0.50 * cmovgeq (%rax), %rdi +# CHECK-NEXT: 2 5 0.50 * cmovleq (%rax), %rdi +# CHECK-NEXT: 2 5 0.50 * cmovgq (%rax), %rdi # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 86.00 32.00 - 86.00 24.00 24.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 24.00 24.00 - - - 48.00 48.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovow %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnow %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovbw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovaew %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovew %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnew %si, %di -# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovbew %si, %di -# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovaw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovsw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnsw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovpw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnpw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgew %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlew %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgw %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovow (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnow (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovbw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovaew (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovew (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnew (%rax), %di -# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovbew (%rax), %di -# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovaw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovsw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnsw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovpw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnpw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgew (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlew (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovol %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnol %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovbl %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovael %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovel %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnel %esi, %edi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovbel %esi, %edi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmoval %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovsl %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnsl %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovpl %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnpl %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovll %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgel %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlel %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgl %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovol (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnol (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovbl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovael (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovel (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnel (%rax), %edi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovbel (%rax), %edi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmoval (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovsl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnsl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovpl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnpl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovll (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgel (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlel (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovoq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnoq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovbq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovaeq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmoveq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovneq %rsi, %rdi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovbeq %rsi, %rdi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 - - cmovaq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovsq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnsq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovpq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovnpq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovlq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgeq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovleq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - cmovgq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovoq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnoq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovbq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovaeq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmoveq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovneq (%rax), %rdi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovbeq (%rax), %rdi -# CHECK-NEXT: - - 1.33 0.33 - 1.33 0.50 0.50 cmovaq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovsq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnsq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovpq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovnpq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovlq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgeq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovleq (%rax), %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 cmovgq (%rax), %rdi +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovow %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnow %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovbw %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovaew %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovew %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnew %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovbew %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovaw %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovsw %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnsw %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovpw %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnpw %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovlw %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovgew %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovlew %si, %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovgw %si, %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovow (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnow (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovbw (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovaew (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovew (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnew (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovbew (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovaw (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovsw (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnsw (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovpw (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnpw (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovlw (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovgew (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovlew (%rax), %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovgw (%rax), %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovol %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnol %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovbl %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovael %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovel %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnel %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovbel %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmoval %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovsl %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnsl %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovpl %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnpl %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovll %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovgel %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovlel %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovgl %esi, %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovol (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnol (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovbl (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovael (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovel (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnel (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovbel (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmoval (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovsl (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnsl (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovpl (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnpl (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovll (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovgel (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovlel (%rax), %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovgl (%rax), %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovoq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnoq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovbq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovaeq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmoveq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovneq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovbeq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovaq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovsq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnsq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovpq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovnpq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovlq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovgeq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovleq %rsi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - cmovgq %rsi, %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovoq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnoq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovbq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovaeq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmoveq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovneq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovbeq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovaq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovsq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnsq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovpq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovnpq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovlq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovgeq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovleq (%rax), %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - cmovgq (%rax), %rdi Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-cmpxchg.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-cmpxchg.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-cmpxchg.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s cmpxchg8b (%rax) cmpxchg16b (%rax) @@ -13,24 +13,36 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 3 6 1.00 * * cmpxchg8b (%rax) -# CHECK-NEXT: 3 6 1.00 * * cmpxchg16b (%rax) +# CHECK-NEXT: 18 3 1.00 * * cmpxchg8b (%rax) +# CHECK-NEXT: 22 3 1.00 * * cmpxchg16b (%rax) # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 0.67 0.67 2.00 0.67 2.00 2.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - 2.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 cmpxchg8b (%rax) -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 cmpxchg16b (%rax) +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - cmpxchg8b (%rax) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - cmpxchg16b (%rax) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-f16c.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-f16c.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-f16c.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s vcvtph2ps %xmm0, %xmm2 vcvtph2ps (%rax), %xmm2 @@ -22,36 +22,48 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vcvtph2ps %xmm0, %xmm2 -# CHECK-NEXT: 2 8 1.00 * vcvtph2ps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 vcvtph2ps %xmm0, %ymm2 -# CHECK-NEXT: 2 8 1.00 * vcvtph2ps (%rax), %ymm2 -# CHECK-NEXT: 1 3 1.00 vcvtps2ph $0, %xmm0, %xmm2 -# CHECK-NEXT: 1 4 1.00 * vcvtps2ph $0, %xmm0, (%rax) -# CHECK-NEXT: 1 3 1.00 vcvtps2ph $0, %ymm0, %xmm2 -# CHECK-NEXT: 1 4 1.00 * vcvtps2ph $0, %ymm0, (%rax) +# CHECK-NEXT: 2 8 1.00 vcvtph2ps %xmm0, %xmm2 +# CHECK-NEXT: 3 13 1.00 * vcvtph2ps (%rax), %xmm2 +# CHECK-NEXT: 4 8 2.00 vcvtph2ps %xmm0, %ymm2 +# CHECK-NEXT: 7 13 2.00 * vcvtph2ps (%rax), %ymm2 +# CHECK-NEXT: 2 8 1.00 vcvtps2ph $0, %xmm0, %xmm2 +# CHECK-NEXT: 3 4 1.00 * vcvtps2ph $0, %xmm0, (%rax) +# CHECK-NEXT: 4 8 2.00 vcvtps2ph $0, %ymm0, %xmm2 +# CHECK-NEXT: 4 4 2.00 * vcvtps2ph $0, %ymm0, (%rax) # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 8.00 2.00 - 2.00 2.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 2.50 2.50 - - - - - - 1.00 1.00 - - - 8.00 - 12.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vcvtph2ps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtph2ps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvtph2ps %xmm0, %ymm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vcvtph2ps (%rax), %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vcvtps2ph $0, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 1.00 - 0.50 0.50 vcvtps2ph $0, %xmm0, (%rax) -# CHECK-NEXT: - - - 1.00 - - - - vcvtps2ph $0, %ymm0, %xmm2 -# CHECK-NEXT: - - - 1.00 1.00 - 0.50 0.50 vcvtps2ph $0, %ymm0, (%rax) +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtph2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtph2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtph2ps %xmm0, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - 1.00 - 2.00 - - - - vcvtph2ps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtps2ph $0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - vcvtps2ph $0, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvtps2ph $0, %ymm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - 1.00 - 2.00 - - - - vcvtps2ph $0, %ymm0, (%rax) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-fma.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-fma.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-fma.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s vfmadd132pd %xmm0, %xmm1, %xmm2 vfmadd132pd (%rax), %xmm1, %xmm2 @@ -299,403 +299,415 @@ # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 5 0.50 vfmadd132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmadd132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmadd132pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmadd213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmadd213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmadd213pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmadd231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmadd231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmadd231pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmadd132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmadd132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmadd132ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmadd213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmadd213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmadd213ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmadd231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmadd231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmadd231ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmadd132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd132sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmadd213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd213sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmadd231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd231sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmadd132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd132ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmadd213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd213ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmadd231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmadd231ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmaddsub132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmaddsub132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmaddsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmaddsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmaddsub132pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmaddsub213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmaddsub213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmaddsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmaddsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmaddsub213pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmaddsub231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmaddsub231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmaddsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmaddsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmaddsub231pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmaddsub132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmaddsub132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmaddsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmaddsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmaddsub132ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmaddsub213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmaddsub213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmaddsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmaddsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmaddsub213ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmaddsub231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmaddsub231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmaddsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmaddsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmaddsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmaddsub231ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsub132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsub132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsub132pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsub213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsub213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsub213pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsub231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsub231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsub231pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsub132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsub132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsub132ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsub213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsub213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsub213ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsub231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsub231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsub231ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsub132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub132sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmsub213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub213sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmsub231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub231sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmsub132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub132ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmsub213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub213ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmsub231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsub231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfmsub231ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfmsubadd132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsubadd132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsubadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsubadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsubadd132pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsubadd213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsubadd213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsubadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsubadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsubadd213pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsubadd231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsubadd231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsubadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsubadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsubadd231pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsubadd132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsubadd132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsubadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsubadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsubadd132ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsubadd213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsubadd213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsubadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsubadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsubadd213ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfmsubadd231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfmsubadd231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfmsubadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfmsubadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfmsubadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfmsubadd231ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmadd132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmadd132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmadd132pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmadd213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmadd213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmadd213pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmadd231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmadd231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmadd231pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmadd132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmadd132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmadd132ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmadd213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmadd213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmadd213ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmadd231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmadd231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmadd231ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmadd132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd132sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmadd213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd213sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmadd231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd231sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmadd132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd132ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmadd213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd213ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmadd231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmadd231ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmsub132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmsub132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmsub132pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmsub213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmsub213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmsub213pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmsub231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmsub231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmsub231pd (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmsub132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmsub132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmsub132ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmsub213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmsub213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmsub213ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmsub231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: 1 5 0.50 vfnmsub231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 5 0.50 vfnmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vfnmsub231ps (%rax), %ymm1, %ymm2 # CHECK-NEXT: 1 5 0.50 vfnmsub132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub132sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmsub213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub213sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmsub231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub231sd (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmsub132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub132ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmsub213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub213ss (%rax), %xmm1, %xmm2 # CHECK-NEXT: 1 5 0.50 vfnmsub231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: 2 10 0.50 * vfnmsub231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 0.50 * vfnmsub231ss (%rax), %xmm1, %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 96.00 96.00 - - 48.00 48.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 66.00 66.00 - - - - - - 96.00 96.00 - - - - 48.00 48.00 48.00 48.00 - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd132pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd213pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd231pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd132ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd213ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd231ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd132sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd213sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd231sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd132ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd213ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmadd231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmadd231ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub132pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub213pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub231pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub132ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub213ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsub231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsub231ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub132pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub213pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub231pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub132ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub213ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub231ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub132sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub213sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub231sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub132ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub213ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsub231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsub231ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd132pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd213pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd231pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd132ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd213ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubadd231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubadd231ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd132pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd213pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd231pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd132ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd213ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd231ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd132sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd213sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd231sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd132ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd213ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmadd231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmadd231ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub132pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub132pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub132pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub132pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub213pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub213pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub213pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub213pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub231pd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub231pd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub231pd %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub231pd (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub132ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub132ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub132ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub132ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub213ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub213ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub213ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub213ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub231ps %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub231ps (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub231ps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub231ps (%rax), %ymm1, %ymm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub132sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub132sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub213sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub213sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub231sd %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub231sd (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub132ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub132ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub213ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub213ss (%rax), %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsub231ss %xmm0, %xmm1, %xmm2 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsub231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsub231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsub231ss (%rax), %xmm1, %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-fma4.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-fma4.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-fma4.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s vfmaddpd %xmm0, %xmm1, %xmm2, %xmm3 vfmaddpd (%rax), %xmm1, %xmm2, %xmm3 @@ -139,211 +139,223 @@ # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 5 0.50 vfmaddpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmaddpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmaddpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddpd %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmaddps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmaddps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmaddps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddps %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmaddsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddsd %xmm0, (%rax), %xmm2, %xmm3 # CHECK-NEXT: 1 5 0.50 vfmaddss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddss %xmm0, (%rax), %xmm2, %xmm3 # CHECK-NEXT: 1 5 0.50 vfmaddsubpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmaddsubpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddsubpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddsubpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmaddsubpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddsubpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddsubpd %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmaddsubps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmaddsubps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmaddsubps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddsubps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmaddsubps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmaddsubps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddsubps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmaddsubps %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmsubaddpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmsubaddpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubaddpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubaddpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmsubaddpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubaddpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubaddpd %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmsubaddps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmsubaddps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubaddps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubaddps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubaddps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmsubaddps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubaddps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubaddps %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmsubpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmsubpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmsubpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubpd %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmsubps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfmsubps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfmsubps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfmsubps %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfmsubsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubsd %xmm0, (%rax), %xmm2, %xmm3 # CHECK-NEXT: 1 5 0.50 vfmsubss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfmsubss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfmsubss %xmm0, (%rax), %xmm2, %xmm3 # CHECK-NEXT: 1 5 0.50 vfnmaddpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfnmaddpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfnmaddpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmaddpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmaddpd %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfnmaddps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfnmaddps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfnmaddps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmaddps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmaddps %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfnmaddsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddsd %xmm0, (%rax), %xmm2, %xmm3 # CHECK-NEXT: 1 5 0.50 vfnmaddss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmaddss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmaddss %xmm0, (%rax), %xmm2, %xmm3 # CHECK-NEXT: 1 5 0.50 vfnmsubpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfnmsubpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfnmsubpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmsubpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmsubpd %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfnmsubps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: 1 5 0.50 vfnmsubps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 2 5 0.50 vfnmsubps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmsubps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 10 1.00 * vfnmsubps %ymm0, (%rax), %ymm2, %ymm3 # CHECK-NEXT: 1 5 0.50 vfnmsubsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubsd %xmm0, (%rax), %xmm2, %xmm3 # CHECK-NEXT: 1 5 0.50 vfnmsubss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 10 0.50 * vfnmsubss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 0.50 * vfnmsubss %xmm0, (%rax), %xmm2, %xmm3 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 48.00 48.00 - - 32.00 32.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 44.00 44.00 - - - - - - 48.00 48.00 - - - - 24.00 24.00 24.00 24.00 - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddpd %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddps %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddss %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsubpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsubpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubpd %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsubps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmaddsubps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmaddsubps %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubaddpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubaddpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddpd %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubaddps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubaddps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubaddps %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubpd %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubps %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubsd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfmsubss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfmsubss %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmaddpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmaddpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddpd %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmaddps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmaddps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddps %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmaddsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddsd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmaddss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmaddss %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsubpd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubpd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubpd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsubpd %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubpd (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubpd %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsubps %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubps (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubps %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsubps %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubps (%rax), %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubps %ymm0, (%rax), %ymm2, %ymm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsubsd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubsd (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubsd %xmm0, (%rax), %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - - - vfnmsubss %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubss (%rax), %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 vfnmsubss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddpd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddps %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddss %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubpd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubps %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmaddsubps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddpd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddps %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubaddps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubpd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubps %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubsd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubss %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfmsubss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddpd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddps %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddsd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddss %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmaddss %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubpd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubpd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubpd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubpd %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubpd (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubpd %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubps %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubps (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubps %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubps %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubps (%rax), %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubps %ymm0, (%rax), %ymm2, %ymm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubsd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubsd (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubsd %xmm0, (%rax), %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubss %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubss (%rax), %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.25 0.25 0.25 0.25 - - vfnmsubss %xmm0, (%rax), %xmm2, %xmm3 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-lea.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-lea.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-lea.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s lea 0(), %cx lea 0(), %ecx @@ -148,290 +148,302 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.50 leaw 0, %cx -# CHECK-NEXT: 1 1 0.50 leal 0, %ecx -# CHECK-NEXT: 1 1 0.50 leaq 0, %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%eax), %cx -# CHECK-NEXT: 1 1 0.50 leal (%eax), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%eax), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%rax), %cx -# CHECK-NEXT: 1 1 0.50 leal (%rax), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%rax), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal (,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal (,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal (,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal (,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (,%ebx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal (,%ebx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (,%ebx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (,%rbx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal (,%rbx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (,%rbx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%eax,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal (%eax,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%eax,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%rax,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal (%rax,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%rax,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%eax,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal (%eax,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%eax,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%rax,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal (%rax,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%rax,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%eax,%ebx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal (%eax,%ebx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%eax,%ebx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw (%rax,%rbx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal (%rax,%rbx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq (%rax,%rbx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16, %cx -# CHECK-NEXT: 1 1 0.50 leal -16, %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16, %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%eax), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%eax), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%eax), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%rax), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%rax), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%rax), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(,%ebx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(,%ebx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(,%ebx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(,%rbx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(,%rbx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(,%rbx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%eax,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%eax,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%eax,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%rax,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%rax,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%rax,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%eax,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%eax,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%eax,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%rax,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%rax,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%rax,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%eax,%ebx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%eax,%ebx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%eax,%ebx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw -16(%rax,%rbx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal -16(%rax,%rbx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq -16(%rax,%rbx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024, %cx -# CHECK-NEXT: 1 1 0.50 leal 1024, %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024, %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%eax), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%eax), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%eax), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%rax), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%rax), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%rax), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(,%ebx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(,%ebx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(,%ebx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(,%rbx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(,%rbx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(,%rbx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%eax,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%eax,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%eax,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%rax,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%rax,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%rax,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%eax,%ebx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%eax,%ebx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%eax,%ebx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%rax,%rbx), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%rax,%rbx), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%rax,%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%eax,%ebx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%eax,%ebx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%eax,%ebx,2), %rcx -# CHECK-NEXT: 1 1 0.50 leaw 1024(%rax,%rbx,2), %cx -# CHECK-NEXT: 1 1 0.50 leal 1024(%rax,%rbx,2), %ecx -# CHECK-NEXT: 1 1 0.50 leaq 1024(%rax,%rbx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 0, %cx +# CHECK-NEXT: 2 1 0.50 leal 0, %ecx +# CHECK-NEXT: 2 1 0.50 leaq 0, %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%eax), %cx +# CHECK-NEXT: 2 1 0.50 leal (%eax), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%eax), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%rax), %cx +# CHECK-NEXT: 2 1 0.50 leal (%rax), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%rax), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal (,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal (,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal (,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal (,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (,%ebx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal (,%ebx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (,%ebx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (,%rbx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal (,%rbx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (,%rbx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%eax,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal (%eax,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%eax,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%rax,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal (%rax,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%rax,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%eax,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal (%eax,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%eax,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%rax,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal (%rax,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%rax,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%eax,%ebx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal (%eax,%ebx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%eax,%ebx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw (%rax,%rbx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal (%rax,%rbx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq (%rax,%rbx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16, %cx +# CHECK-NEXT: 2 1 0.50 leal -16, %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16, %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%eax), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%eax), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%eax), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%rax), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%rax), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%rax), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(,%ebx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(,%ebx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(,%ebx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(,%rbx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(,%rbx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(,%rbx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%eax,%ebx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%eax,%ebx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%eax,%ebx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw -16(%rax,%rbx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal -16(%rax,%rbx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq -16(%rax,%rbx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024, %cx +# CHECK-NEXT: 2 1 0.50 leal 1024, %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024, %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%eax), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%eax), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%eax), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%rax), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%rax), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%rax), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(,%ebx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(,%ebx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(,%ebx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(,%rbx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(,%rbx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(,%rbx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%eax,%ebx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%eax,%ebx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%eax,%ebx,2), %rcx +# CHECK-NEXT: 2 1 0.50 leaw 1024(%rax,%rbx,2), %cx +# CHECK-NEXT: 2 1 0.50 leal 1024(%rax,%rbx,2), %ecx +# CHECK-NEXT: 2 1 0.50 leaq 1024(%rax,%rbx,2), %rcx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 67.50 67.50 - - - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 67.50 67.50 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 0, %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 0, %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 0, %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%eax), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%eax), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%eax), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%rax), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%rax), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%rax), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (,%ebx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (,%ebx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (,%ebx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (,%rbx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (,%rbx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (,%rbx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%eax,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%eax,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%eax,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%rax,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%rax,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%rax,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%eax,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%eax,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%eax,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%rax,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%rax,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%rax,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%eax,%ebx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%eax,%ebx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%eax,%ebx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw (%rax,%rbx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal (%rax,%rbx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq (%rax,%rbx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16, %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16, %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16, %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%eax), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%eax), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%eax), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%rax), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%rax), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%rax), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(,%ebx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(,%ebx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(,%ebx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(,%rbx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(,%rbx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(,%rbx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%eax,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%eax,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%eax,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%rax,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%rax,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%rax,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%eax,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%eax,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%eax,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%rax,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%rax,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%rax,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%eax,%ebx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%eax,%ebx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%eax,%ebx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw -16(%rax,%rbx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal -16(%rax,%rbx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq -16(%rax,%rbx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024, %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024, %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024, %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%eax), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%eax), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%eax), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%rax), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%rax), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%rax), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(,%ebx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(,%ebx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(,%ebx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(,%rbx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(,%rbx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(,%rbx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%eax,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%eax,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%eax,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%rax,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%rax,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%rax,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%eax,%ebx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%eax,%ebx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%eax,%ebx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%rax,%rbx), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%rax,%rbx), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%rax,%rbx), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%eax,%ebx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%eax,%ebx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%eax,%ebx,2), %rcx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaw 1024(%rax,%rbx,2), %cx -# CHECK-NEXT: - - 0.50 0.50 - - - - leal 1024(%rax,%rbx,2), %ecx -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 1024(%rax,%rbx,2), %rcx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 0, %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 0, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 0, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%eax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%eax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%eax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%rax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (,%ebx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (,%ebx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (,%ebx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (,%rbx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (,%rbx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (,%rbx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%eax,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%eax,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%eax,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%rax,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%rax,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%rax,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%eax,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%eax,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%eax,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%rax,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%rax,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%rax,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%eax,%ebx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%eax,%ebx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%eax,%ebx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw (%rax,%rbx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal (%rax,%rbx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq (%rax,%rbx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16, %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%eax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%eax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%eax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%rax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(,%ebx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(,%ebx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(,%ebx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(,%rbx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(,%rbx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(,%rbx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%eax,%ebx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%eax,%ebx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%eax,%ebx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw -16(%rax,%rbx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal -16(%rax,%rbx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq -16(%rax,%rbx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024, %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%eax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%eax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%eax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%rax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(,%ebx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(,%ebx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(,%ebx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(,%rbx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(,%rbx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(,%rbx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%eax,%ebx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%eax,%ebx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%eax,%ebx,2), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaw 1024(%rax,%rbx,2), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leal 1024(%rax,%rbx,2), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 1024(%rax,%rbx,2), %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-lzcnt.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-lzcnt.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-lzcnt.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s lzcntw %cx, %cx lzcntw (%rax), %cx @@ -19,32 +19,44 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx -# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx -# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx -# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx -# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx -# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx +# CHECK-NEXT: 2 2 0.50 lzcntw %cx, %cx +# CHECK-NEXT: 2 6 0.50 * lzcntw (%rax), %cx +# CHECK-NEXT: 2 2 0.50 lzcntl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * lzcntl (%rax), %ecx +# CHECK-NEXT: 2 2 0.50 lzcntq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * lzcntq (%rax), %rcx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 6.00 - - 1.50 1.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 1.50 1.50 - - - 3.00 3.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - lzcntw %cx, %cx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntw (%rax), %cx -# CHECK-NEXT: - - - 1.00 - - - - lzcntl %eax, %ecx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntl (%rax), %ecx -# CHECK-NEXT: - - - 1.00 - - - - lzcntq %rax, %rcx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntq (%rax), %rcx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - lzcntw (%rax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - lzcntq (%rax), %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-mmx.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-mmx.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-mmx.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s emms @@ -164,230 +164,242 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 31 31 10.33 * * U emms -# CHECK-NEXT: 1 1 1.00 movd %eax, %mm2 +# CHECK-NEXT: 1 2 0.50 * * U emms +# CHECK-NEXT: 2 10 0.50 movd %eax, %mm2 # CHECK-NEXT: 1 5 0.50 * movd (%rax), %mm2 -# CHECK-NEXT: 1 2 1.00 movd %mm0, %ecx -# CHECK-NEXT: 1 1 1.00 * U movd %mm0, (%rax) -# CHECK-NEXT: 1 1 1.00 movq %rax, %mm2 +# CHECK-NEXT: 1 10 1.00 movd %mm0, %ecx +# CHECK-NEXT: 1 2 1.00 * U movd %mm0, (%rax) +# CHECK-NEXT: 2 10 0.50 movq %rax, %mm2 # CHECK-NEXT: 1 5 0.50 * movq (%rax), %mm2 -# CHECK-NEXT: 1 2 1.00 movq %mm0, %rcx -# CHECK-NEXT: 1 1 1.00 * movq %mm0, (%rax) -# CHECK-NEXT: 1 1 1.00 packsswb %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * packsswb (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 packssdw %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * packssdw (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 packuswb %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * packuswb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 paddb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * paddb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 paddd %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * paddd (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 paddsb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * paddsb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 paddsw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * paddsw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 paddusb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * paddusb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 paddusw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * paddusw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 paddw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * paddw (%rax), %mm2 -# CHECK-NEXT: 1 1 0.33 pand %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * pand (%rax), %mm2 -# CHECK-NEXT: 1 1 0.33 pandn %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * pandn (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpeqb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pcmpeqb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpeqd %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pcmpeqd (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpeqw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pcmpeqw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpgtb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pcmpgtb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpgtd %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pcmpgtd (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpgtw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pcmpgtw (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 pmaddwd %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmaddwd (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 pmulhw %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmulhw (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 pmullw %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmullw (%rax), %mm2 -# CHECK-NEXT: 1 1 0.33 por %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * por (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 pslld $1, %mm2 -# CHECK-NEXT: 1 1 1.00 pslld %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * pslld (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 psllq $1, %mm2 -# CHECK-NEXT: 1 1 1.00 psllq %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * psllq (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 psllw $1, %mm2 -# CHECK-NEXT: 1 1 1.00 psllw %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * psllw (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 psrad $1, %mm2 -# CHECK-NEXT: 1 1 1.00 psrad %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * psrad (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 psraw $1, %mm2 -# CHECK-NEXT: 1 1 1.00 psraw %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * psraw (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 psrld $1, %mm2 -# CHECK-NEXT: 1 1 1.00 psrld %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * psrld (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 psrlq $1, %mm2 -# CHECK-NEXT: 1 1 1.00 psrlq %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * psrlq (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 psrlw $1, %mm2 -# CHECK-NEXT: 1 1 1.00 psrlw %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * psrlw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 psubb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 psubd %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubd (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 psubsb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubsb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 psubsw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubsw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 psubusb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubusb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 psubusw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubusw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 psubw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubw (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 punpckhbw %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * punpckhbw (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 punpckhdq %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * punpckhdq (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 punpckhwd %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * punpckhwd (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 punpcklbw %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * punpcklbw (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 punpckldq %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * punpckldq (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 punpcklwd %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * punpcklwd (%rax), %mm2 -# CHECK-NEXT: 1 1 0.33 pxor %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * pxor (%rax), %mm2 +# CHECK-NEXT: 1 10 1.00 movq %mm0, %rcx +# CHECK-NEXT: 1 2 1.00 * movq %mm0, (%rax) +# CHECK-NEXT: 1 2 0.50 packsswb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * packsswb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 packssdw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * packssdw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 packuswb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * packuswb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddsb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddsb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddsw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddsw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddusb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddusb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddusw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddusw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pand %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pand (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pandn %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pandn (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pcmpeqb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pcmpeqd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pcmpeqw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pcmpgtb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pcmpgtd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pcmpgtw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmaddwd %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmaddwd (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmulhw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmulhw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmullw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmullw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 por %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * por (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pslld $1, %mm2 +# CHECK-NEXT: 1 3 0.50 pslld %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * pslld (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psllq $1, %mm2 +# CHECK-NEXT: 1 3 0.50 psllq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * psllq (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psllw $1, %mm2 +# CHECK-NEXT: 1 3 0.50 psllw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * psllw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psrad $1, %mm2 +# CHECK-NEXT: 1 3 0.50 psrad %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * psrad (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psraw $1, %mm2 +# CHECK-NEXT: 1 3 0.50 psraw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * psraw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psrld $1, %mm2 +# CHECK-NEXT: 1 3 0.50 psrld %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * psrld (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psrlq $1, %mm2 +# CHECK-NEXT: 1 3 0.50 psrlq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * psrlq (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psrlw $1, %mm2 +# CHECK-NEXT: 1 3 0.50 psrlw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.50 * psrlw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubsb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubsb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubsw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubsw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubusb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubusb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubusw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubusw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 punpckhbw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * punpckhbw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 punpckhdq %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * punpckhdq (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 punpckhwd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * punpckhwd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 punpcklbw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * punpcklbw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 punpckldq %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * punpckldq (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 punpcklwd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * punpcklwd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pxor %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pxor (%rax), %mm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 21.00 53.00 2.00 57.00 24.00 24.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 24.00 24.00 - - - 2.00 - - 2.50 2.50 46.00 46.00 6.00 2.00 55.50 49.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 10.33 10.33 - 10.33 - - emms -# CHECK-NEXT: - - - - - 1.00 - - movd %eax, %mm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movd (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - movd %mm0, %ecx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movd %mm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 - - movq %rax, %mm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movq (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - movq %mm0, %rcx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movq %mm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 - - packsswb %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 packsswb (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - packssdw %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 packssdw (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - packuswb %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 packuswb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - paddb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 paddb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - paddd %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 paddd (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - paddsb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 paddsb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - paddsw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 paddsw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - paddusb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 paddusb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - paddusw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 paddusw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - paddw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 paddw (%rax), %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pand %mm0, %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pand (%rax), %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pandn %mm0, %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pandn (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpeqb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pcmpeqb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpeqd %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pcmpeqd (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpeqw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pcmpeqw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpgtb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pcmpgtb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpgtd %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pcmpgtd (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpgtw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pcmpgtw (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmaddwd %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmaddwd (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmulhw %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhw (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmullw %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmullw (%rax), %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - por %mm0, %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 por (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - pslld $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - pslld %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 pslld (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psllq $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psllq %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 psllq (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psllw $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psllw %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 psllw (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrad $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrad %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 psrad (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psraw $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psraw %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 psraw (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrld $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrld %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 psrld (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrlq $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrlq %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 psrlq (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrlw $1, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psrlw %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 psrlw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubd %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubd (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubsb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubsb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubsw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubsw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubusb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubusb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubusw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubusw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubw (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - punpckhbw %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 punpckhbw (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - punpckhdq %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 punpckhdq (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - punpckhwd %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 punpckhwd (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - punpcklbw %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 punpcklbw (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - punpckldq %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 punpckldq (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - punpcklwd %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 punpcklwd (%rax), %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pxor %mm0, %mm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pxor (%rax), %mm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - emms +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movd %eax, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movd (%rax), %mm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - movd %mm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movd %mm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movq %rax, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movq (%rax), %mm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - movq %mm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movq %mm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packsswb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packsswb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packssdw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packssdw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packuswb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packuswb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pand %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pand (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pandn %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pandn (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddwd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddwd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmullw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmullw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - por %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - por (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pslld $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pslld %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pslld (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllq $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllw $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrad $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrad %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrad (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psraw $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psraw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psraw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrld $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrld %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrld (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlq $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlw $1, %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhbw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhbw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhdq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhdq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhwd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhwd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklbw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklbw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckldq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckldq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklwd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklwd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pxor %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pxor (%rax), %mm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-movbe.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-movbe.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-movbe.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s movbe %cx, (%rax) movbe (%rax), %cx @@ -19,32 +19,44 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 1.00 * movbew %cx, (%rax) -# CHECK-NEXT: 2 6 0.50 * movbew (%rax), %cx -# CHECK-NEXT: 1 1 1.00 * movbel %ecx, (%rax) -# CHECK-NEXT: 2 6 0.50 * movbel (%rax), %ecx -# CHECK-NEXT: 1 1 1.00 * movbeq %rcx, (%rax) -# CHECK-NEXT: 2 6 0.50 * movbeq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 * movbew %cx, (%rax) +# CHECK-NEXT: 1 5 0.50 * movbew (%rax), %cx +# CHECK-NEXT: 1 1 0.50 * movbel %ecx, (%rax) +# CHECK-NEXT: 1 5 0.50 * movbel (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 * movbeq %rcx, (%rax) +# CHECK-NEXT: 1 5 0.50 * movbeq (%rax), %rcx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 3.00 1.00 3.00 3.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 3.00 3.00 - - - 1.50 1.50 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movbew %cx, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 movbew (%rax), %cx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movbel %ecx, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 movbel (%rax), %ecx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movbeq %rcx, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 movbeq (%rax), %rcx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - movbew %cx, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - movbew (%rax), %cx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - movbel %ecx, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - movbel (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - movbeq %rcx, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - movbeq (%rax), %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-pclmul.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-pclmul.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-pclmul.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s pclmulqdq $11, %xmm0, %xmm2 pclmulqdq $11, (%rax), %xmm2 @@ -13,24 +13,36 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 14 6.00 pclmulqdq $11, %xmm0, %xmm2 -# CHECK-NEXT: 1 14 5.67 * pclmulqdq $11, (%rax), %xmm2 +# CHECK-NEXT: 5 12 1.00 pclmulqdq $11, %xmm0, %xmm2 +# CHECK-NEXT: 6 17 1.00 * pclmulqdq $11, (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 11.67 11.67 - 11.67 0.50 0.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 2.00 - 2.00 - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 6.00 6.00 - 6.00 - - pclmulqdq $11, %xmm0, %xmm2 -# CHECK-NEXT: - - 5.67 5.67 - 5.67 0.50 0.50 pclmulqdq $11, (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pclmulqdq $11, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pclmulqdq $11, (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-popcnt.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-popcnt.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-popcnt.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s popcntw %cx, %cx popcntw (%rax), %cx @@ -19,32 +19,44 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 popcntw %cx, %cx -# CHECK-NEXT: 2 9 1.00 * popcntw (%rax), %cx -# CHECK-NEXT: 1 3 1.00 popcntl %eax, %ecx -# CHECK-NEXT: 2 9 1.00 * popcntl (%rax), %ecx -# CHECK-NEXT: 1 3 1.00 popcntq %rax, %rcx -# CHECK-NEXT: 2 9 1.00 * popcntq (%rax), %rcx +# CHECK-NEXT: 1 4 0.50 popcntw %cx, %cx +# CHECK-NEXT: 1 8 0.50 * popcntw (%rax), %cx +# CHECK-NEXT: 1 4 0.50 popcntl %eax, %ecx +# CHECK-NEXT: 1 8 0.50 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 4 0.50 popcntq %rax, %rcx +# CHECK-NEXT: 1 8 0.50 * popcntq (%rax), %rcx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 6.00 - - 1.50 1.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 1.50 1.50 - - - 3.00 3.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - popcntw %cx, %cx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 popcntw (%rax), %cx -# CHECK-NEXT: - - - 1.00 - - - - popcntl %eax, %ecx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 popcntl (%rax), %ecx -# CHECK-NEXT: - - - 1.00 - - - - popcntq %rax, %rcx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 popcntq (%rax), %rcx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - popcntw %cx, %cx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - popcntw (%rax), %cx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - popcntl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - popcntl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - popcntq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - popcntq (%rax), %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-prefetchw.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-prefetchw.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-prefetchw.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s prefetch (%rax) prefetchw (%rax) @@ -17,20 +17,32 @@ # CHECK-NEXT: 1 5 0.50 * * prefetchw (%rax) # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - - - - 1.00 1.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetch (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetchw (%rax) +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetch (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetchw (%rax) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s addps %xmm0, %xmm2 addps (%rax), %xmm2 @@ -194,268 +194,280 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * addps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 addss %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * addss (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 andnps %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * andnps (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 andps %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * andps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 cmpps $0, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cmpps $0, (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 cmpss $0, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cmpss $0, (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 comiss %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * comiss (%rax), %xmm1 -# CHECK-NEXT: 1 3 1.00 cvtpi2ps %mm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cvtpi2ps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 cvtps2pi %xmm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * cvtps2pi (%rax), %mm2 -# CHECK-NEXT: 3 5 2.00 cvtsi2ssl %ecx, %xmm2 -# CHECK-NEXT: 3 5 2.00 cvtsi2ssq %rcx, %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvtsi2ssl (%rax), %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvtsi2ssl (%rax), %xmm2 -# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %rcx -# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %ecx -# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %rcx -# CHECK-NEXT: 1 3 1.00 cvttps2pi %xmm0, %mm2 -# CHECK-NEXT: 2 9 1.00 * cvttps2pi (%rax), %mm2 -# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %rcx -# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %ecx -# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %rcx -# CHECK-NEXT: 1 14 14.00 divps %xmm0, %xmm2 -# CHECK-NEXT: 2 20 14.00 * divps (%rax), %xmm2 -# CHECK-NEXT: 1 14 14.00 divss %xmm0, %xmm2 -# CHECK-NEXT: 2 20 14.00 * divss (%rax), %xmm2 -# CHECK-NEXT: 4 5 1.00 * * U ldmxcsr (%rax) -# CHECK-NEXT: 1 1 1.00 * * U maskmovq %mm0, %mm1 -# CHECK-NEXT: 1 3 1.00 maxps %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * maxps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 maxss %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * maxss (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 minps %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * minps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 minss %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * minss (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movaps %xmm0, %xmm2 +# CHECK-NEXT: 1 5 1.00 addps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addps (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 addss %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addss (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 andnps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * andnps (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 andps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * andps (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 cmpps $0, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * cmpps $0, (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 cmpss $0, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * cmpss $0, (%rax), %xmm2 +# CHECK-NEXT: 2 1 1.00 comiss %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * comiss (%rax), %xmm1 +# CHECK-NEXT: 2 4 1.00 cvtpi2ps %mm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * cvtpi2ps (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtps2pi %xmm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * cvtps2pi (%rax), %mm2 +# CHECK-NEXT: 2 4 1.00 cvtsi2ssl %ecx, %xmm2 +# CHECK-NEXT: 2 13 1.00 cvtsi2ssq %rcx, %xmm2 +# CHECK-NEXT: 2 9 1.00 * cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: 2 9 1.00 * cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: 2 13 1.00 cvtss2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 cvtss2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * cvtss2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * cvtss2si (%rax), %rcx +# CHECK-NEXT: 1 4 1.00 cvttps2pi %xmm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * cvttps2pi (%rax), %mm2 +# CHECK-NEXT: 2 13 1.00 cvttss2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 cvttss2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * cvttss2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * cvttss2si (%rax), %rcx +# CHECK-NEXT: 1 9 9.50 divps %xmm0, %xmm2 +# CHECK-NEXT: 1 14 9.50 * divps (%rax), %xmm2 +# CHECK-NEXT: 1 9 9.50 divss %xmm0, %xmm2 +# CHECK-NEXT: 1 14 9.50 * divss (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 * * U ldmxcsr (%rax) +# CHECK-NEXT: 1 2 0.50 * * U maskmovq %mm0, %mm1 +# CHECK-NEXT: 1 2 1.00 maxps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * maxps (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 maxss %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * maxss (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 minps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * minps (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 minss %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * minss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 movaps %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * movaps %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movaps (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movhlps %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 movlhps %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 * movhps %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * movhps (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 * movlps %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * movlps (%rax), %xmm2 -# CHECK-NEXT: 1 2 1.00 movmskps %xmm0, %ecx -# CHECK-NEXT: 1 1 1.00 * movntps %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * * U movntq %mm0, (%rax) -# CHECK-NEXT: 1 1 1.00 movss %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 * movss %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movss (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movups %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * movaps (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 movhlps %xmm0, %xmm2 +# CHECK-NEXT: 1 2 0.50 movlhps %xmm0, %xmm2 +# CHECK-NEXT: 2 2 1.00 * movhps %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * movhps (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 * movlps %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * movlps (%rax), %xmm2 +# CHECK-NEXT: 2 10 1.00 movmskps %xmm0, %ecx +# CHECK-NEXT: 1 3 1.00 * movntps %xmm0, (%rax) +# CHECK-NEXT: 1 2 1.00 * * U movntq %mm0, (%rax) +# CHECK-NEXT: 1 2 0.50 movss %xmm0, %xmm2 +# CHECK-NEXT: 1 2 1.00 * movss %xmm0, (%rax) +# CHECK-NEXT: 1 5 0.50 * movss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 movups %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * movups %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movups (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 * movups (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 mulps %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * mulps (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 * mulps (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 mulss %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * mulss (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 orps %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * orps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 pavgb %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pavgb (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pavgw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pavgw (%rax), %mm2 -# CHECK-NEXT: 2 3 1.00 pextrw $1, %mm0, %ecx -# CHECK-NEXT: 2 2 1.00 pinsrw $1, %eax, %mm2 -# CHECK-NEXT: 2 7 0.50 * pinsrw $1, (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pmaxsw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pmaxsw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pmaxub %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pmaxub (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pminsw %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pminsw (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 pminub %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * pminub (%rax), %mm2 -# CHECK-NEXT: 1 2 1.00 pmovmskb %xmm0, %ecx -# CHECK-NEXT: 1 5 1.00 pmulhuw %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmulhuw (%rax), %mm2 +# CHECK-NEXT: 1 10 1.00 * mulss (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 orps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * orps (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pavgb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pavgb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pavgw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pavgw (%rax), %mm2 +# CHECK-NEXT: 2 13 1.00 pextrw $1, %mm0, %ecx +# CHECK-NEXT: 2 2 0.50 pinsrw $1, %eax, %mm2 +# CHECK-NEXT: 2 6 0.50 * pinsrw $1, (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pmaxsw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pmaxsw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pmaxub %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pmaxub (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pminsw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pminsw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pminub %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pminub (%rax), %mm2 +# CHECK-NEXT: 2 13 1.00 pmovmskb %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 pmulhuw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmulhuw (%rax), %mm2 # CHECK-NEXT: 1 5 0.50 * * prefetcht0 (%rax) # CHECK-NEXT: 1 5 0.50 * * prefetcht1 (%rax) # CHECK-NEXT: 1 5 0.50 * * prefetcht2 (%rax) # CHECK-NEXT: 1 5 0.50 * * prefetchnta (%rax) -# CHECK-NEXT: 1 5 1.00 psadbw %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * psadbw (%rax), %mm2 -# CHECK-NEXT: 1 1 1.00 pshufw $1, %mm0, %mm2 -# CHECK-NEXT: 2 6 1.00 * pshufw $1, (%rax), %mm2 +# CHECK-NEXT: 2 4 0.50 psadbw %mm0, %mm2 +# CHECK-NEXT: 2 9 0.50 * psadbw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pshufw $1, %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pshufw $1, (%rax), %mm2 # CHECK-NEXT: 1 5 1.00 rcpps %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * rcpps (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 * rcpps (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 rcpss %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * rcpss (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 * rcpss (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 rsqrtps %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * rsqrtps (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 * rsqrtps (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 rsqrtss %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * rsqrtss (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 * * U sfence -# CHECK-NEXT: 1 1 1.00 shufps $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * shufps $1, (%rax), %xmm2 -# CHECK-NEXT: 1 14 14.00 sqrtps %xmm0, %xmm2 -# CHECK-NEXT: 2 20 14.00 * sqrtps (%rax), %xmm2 -# CHECK-NEXT: 1 14 14.00 sqrtss %xmm0, %xmm2 -# CHECK-NEXT: 2 20 14.00 * sqrtss (%rax), %xmm2 -# CHECK-NEXT: 4 5 1.00 * * U stmxcsr (%rax) -# CHECK-NEXT: 1 3 1.00 subps %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * subps (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 subss %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * subss (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 ucomiss %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * ucomiss (%rax), %xmm1 -# CHECK-NEXT: 1 1 1.00 unpckhps %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * unpckhps (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 unpcklps %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * unpcklps (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 xorps %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * xorps (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 * rsqrtss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 * * U sfence +# CHECK-NEXT: 1 2 0.50 shufps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * shufps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 9 10.50 sqrtps %xmm0, %xmm2 +# CHECK-NEXT: 1 14 10.50 * sqrtps (%rax), %xmm2 +# CHECK-NEXT: 1 9 10.50 sqrtss %xmm0, %xmm2 +# CHECK-NEXT: 1 14 10.50 * sqrtss (%rax), %xmm2 +# CHECK-NEXT: 2 1 0.50 * * U stmxcsr (%rax) +# CHECK-NEXT: 1 5 1.00 subps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subps (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 subss %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subss (%rax), %xmm2 +# CHECK-NEXT: 2 1 1.00 ucomiss %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * ucomiss (%rax), %xmm1 +# CHECK-NEXT: 1 2 0.50 unpckhps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * unpckhps (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 unpcklps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * unpcklps (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 xorps %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * xorps (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - 112.00 41.00 55.50 10.00 34.50 33.50 33.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 33.50 33.50 - - - 15.00 - - 115.50 115.50 9.50 9.50 2.00 25.00 50.50 66.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - addps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 addps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - addss %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 addss (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - andnps %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 andnps (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - andps %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 andps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - cmpps $0, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cmpps $0, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - cmpss $0, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cmpss $0, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - comiss %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 comiss (%rax), %xmm1 -# CHECK-NEXT: - - - 1.00 - - - - cvtpi2ps %mm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvtpi2ps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - cvtps2pi %xmm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvtps2pi (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - cvtsi2ssl %ecx, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - cvtsi2ssq %rcx, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtsi2ssl (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtsi2ssl (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - cvtss2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - cvtss2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvtss2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvtss2si (%rax), %rcx -# CHECK-NEXT: - - - 1.00 - - - - cvttps2pi %xmm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvttps2pi (%rax), %mm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - cvttss2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - cvttss2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvttss2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvttss2si (%rax), %rcx -# CHECK-NEXT: - 14.00 1.00 - - - - - divps %xmm0, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 divps (%rax), %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - divss %xmm0, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 divss (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - 1.00 1.00 0.50 0.50 ldmxcsr (%rax) -# CHECK-NEXT: - - - - - 1.00 - - maskmovq %mm0, %mm1 -# CHECK-NEXT: - - - 1.00 - - - - maxps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 maxps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - maxss %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 maxss (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - minps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 minps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - minss %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 minss (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movaps %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movaps %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movaps (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movhlps %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movlhps %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movhps %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 movhps (%rax), %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movlps %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 movlps (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - movmskps %xmm0, %ecx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntps %xmm0, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntq %mm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 - - movss %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movss %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movss (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movups %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movups %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movups (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - mulps %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 mulps (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - mulss %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 mulss (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - orps %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 orps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - pavgb %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pavgb (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pavgw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pavgw (%rax), %mm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - pextrw $1, %mm0, %ecx -# CHECK-NEXT: - - - 0.50 - 1.50 - - pinsrw $1, %eax, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pinsrw $1, (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pmaxsw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pmaxsw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pmaxub %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pmaxub (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pminsw %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pminsw (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pminub %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pminub (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmovmskb %xmm0, %ecx -# CHECK-NEXT: - - 1.00 - - - - - pmulhuw %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhuw (%rax), %mm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetcht0 (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetcht1 (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetcht2 (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 prefetchnta (%rax) -# CHECK-NEXT: - - 1.00 - - - - - psadbw %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 psadbw (%rax), %mm2 -# CHECK-NEXT: - - - - - 1.00 - - pshufw $1, %mm0, %mm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 pshufw $1, (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - rcpps %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 rcpps (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - rcpss %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 rcpss (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - rsqrtps %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 rsqrtps (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - rsqrtss %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 rsqrtss (%rax), %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 sfence -# CHECK-NEXT: - - - - - 1.00 - - shufps $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 shufps $1, (%rax), %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - sqrtps %xmm0, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 sqrtps (%rax), %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - - - sqrtss %xmm0, %xmm2 -# CHECK-NEXT: - 14.00 1.00 - - - 0.50 0.50 sqrtss (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - 1.00 1.00 0.50 0.50 stmxcsr (%rax) -# CHECK-NEXT: - - - 1.00 - - - - subps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 subps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - subss %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 subss (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - ucomiss %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 ucomiss (%rax), %xmm1 -# CHECK-NEXT: - - - - - 1.00 - - unpckhps %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 unpckhps (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - unpcklps %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 unpcklps (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - xorps %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 xorps (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andnps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andnps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmpps $0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmpps $0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmpss $0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmpss $0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - comiss %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - comiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpi2ps %mm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpi2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtps2pi %xmm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtps2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2ssl %ecx, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2ssq %rcx, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtss2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtss2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvttps2pi %xmm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvttps2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttss2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttss2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divss (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - ldmxcsr (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - maskmovq %mm0, %mm1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movaps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movaps %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movaps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movhlps %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movlhps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movhps %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movhps (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movlps %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movlps (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - movmskps %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movntps %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movntq %mm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movss %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movups %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movups %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movups (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - orps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - orps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgw (%rax), %mm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - pextrw $1, %mm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrw $1, %eax, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrw $1, (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxub %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxub (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminub %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminub (%rax), %mm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - pmovmskb %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhuw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhuw (%rax), %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetcht0 (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetcht1 (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetcht2 (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - prefetchnta (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psadbw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psadbw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshufw $1, %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshufw $1, (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rcpps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rcpps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rcpss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rcpss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rsqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rsqrtss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - rsqrtss (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - sfence +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - shufps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - shufps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 10.50 10.50 - - - - - 1.00 - - - - sqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 10.50 10.50 - - - - - 1.00 - - - - sqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 10.50 10.50 - - - - - 1.00 - - - - sqrtss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 10.50 10.50 - - - - - 1.00 - - - - sqrtss (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - stmxcsr (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subss (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ucomiss %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ucomiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpckhps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpckhps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpcklps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpcklps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - xorps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - xorps (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse2.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s addpd %xmm0, %xmm2 addpd (%rax), %xmm2 @@ -402,548 +402,560 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 addpd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * addpd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 addsd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * addsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 andnpd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * andnpd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 andpd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * andpd (%rax), %xmm2 -# CHECK-NEXT: 4 5 1.00 * * U clflush (%rax) -# CHECK-NEXT: 1 3 1.00 cmppd $0, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cmppd $0, (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 cmpsd $0, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cmpsd $0, (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 comisd %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * comisd (%rax), %xmm1 -# CHECK-NEXT: 2 4 1.00 cvtdq2pd %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvtdq2pd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 cvtdq2ps %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cvtdq2ps (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 cvtpd2dq %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvtpd2dq (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 cvtpd2pi %xmm0, %mm2 -# CHECK-NEXT: 3 10 1.00 * cvtpd2pi (%rax), %mm2 -# CHECK-NEXT: 2 4 1.00 cvtpd2ps %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvtpd2ps (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 cvtpi2pd %mm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvtpi2pd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 cvtps2dq %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cvtps2dq (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 cvtps2pd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * cvtps2pd (%rax), %xmm2 -# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %rcx -# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %ecx -# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %rcx -# CHECK-NEXT: 2 4 1.00 cvtsd2ss %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvtsd2ss (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 addpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addpd (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 addsd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 andnpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * andnpd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 andpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * andpd (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 * * U clflush (%rax) +# CHECK-NEXT: 1 2 1.00 cmppd $0, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * cmppd $0, (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 cmpsd $0, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * cmpsd $0, (%rax), %xmm2 +# CHECK-NEXT: 2 1 1.00 comisd %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * comisd (%rax), %xmm1 +# CHECK-NEXT: 2 8 1.00 cvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * cvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * cvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: 2 8 1.00 cvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * cvtpd2dq (%rax), %xmm2 +# CHECK-NEXT: 2 6 1.00 cvtpd2pi %xmm0, %mm2 +# CHECK-NEXT: 2 13 1.00 * cvtpd2pi (%rax), %mm2 +# CHECK-NEXT: 2 8 1.00 cvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * cvtpd2ps (%rax), %xmm2 +# CHECK-NEXT: 2 6 1.00 cvtpi2pd %mm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * cvtpi2pd (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * cvtps2dq (%rax), %xmm2 +# CHECK-NEXT: 2 8 1.00 cvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * cvtps2pd (%rax), %xmm2 +# CHECK-NEXT: 2 13 1.00 cvtsd2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 cvtsd2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * cvtsd2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * cvtsd2si (%rax), %rcx +# CHECK-NEXT: 1 4 1.00 cvtsd2ss %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * cvtsd2ss (%rax), %xmm2 # CHECK-NEXT: 2 4 1.00 cvtsi2sdl %ecx, %xmm2 -# CHECK-NEXT: 2 4 1.00 cvtsi2sdq %rcx, %xmm2 +# CHECK-NEXT: 2 13 1.00 cvtsi2sdq %rcx, %xmm2 # CHECK-NEXT: 2 9 1.00 * cvtsi2sdl (%rax), %xmm2 # CHECK-NEXT: 2 9 1.00 * cvtsi2sdl (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 cvtss2sd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * cvtss2sd (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 cvttpd2dq %xmm0, %xmm2 -# CHECK-NEXT: 3 10 1.00 * cvttpd2dq (%rax), %xmm2 -# CHECK-NEXT: 2 4 1.00 cvttpd2pi %xmm0, %mm2 -# CHECK-NEXT: 3 10 1.00 * cvttpd2pi (%rax), %mm2 -# CHECK-NEXT: 1 3 1.00 cvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * cvttps2dq (%rax), %xmm2 -# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %ecx -# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %rcx -# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %ecx -# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %rcx -# CHECK-NEXT: 1 22 22.00 divpd %xmm0, %xmm2 -# CHECK-NEXT: 2 28 22.00 * divpd (%rax), %xmm2 -# CHECK-NEXT: 1 22 22.00 divsd %xmm0, %xmm2 -# CHECK-NEXT: 2 28 22.00 * divsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 * * U lfence +# CHECK-NEXT: 1 4 1.00 cvtss2sd %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * cvtss2sd (%rax), %xmm2 +# CHECK-NEXT: 2 8 1.00 cvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 13 1.00 * cvttpd2dq (%rax), %xmm2 +# CHECK-NEXT: 2 6 1.00 cvttpd2pi %xmm0, %mm2 +# CHECK-NEXT: 2 13 1.00 * cvttpd2pi (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 cvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * cvttps2dq (%rax), %xmm2 +# CHECK-NEXT: 2 13 1.00 cvttsd2si %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 cvttsd2si %xmm0, %rcx +# CHECK-NEXT: 2 18 1.00 * cvttsd2si (%rax), %ecx +# CHECK-NEXT: 2 18 1.00 * cvttsd2si (%rax), %rcx +# CHECK-NEXT: 1 9 9.50 divpd %xmm0, %xmm2 +# CHECK-NEXT: 1 14 9.50 * divpd (%rax), %xmm2 +# CHECK-NEXT: 1 9 9.50 divsd %xmm0, %xmm2 +# CHECK-NEXT: 1 14 9.50 * divsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 * * U lfence # CHECK-NEXT: 1 1 1.00 * * U maskmovdqu %xmm0, %xmm1 -# CHECK-NEXT: 1 3 1.00 maxpd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * maxpd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 maxsd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * maxsd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 minpd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * minpd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 minsd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * minsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movapd %xmm0, %xmm2 +# CHECK-NEXT: 1 2 1.00 maxpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * maxpd (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 maxsd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * maxsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 minpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * minpd (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 minsd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 1.00 * minsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 movapd %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * movapd %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movapd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movd %eax, %xmm2 -# CHECK-NEXT: 1 6 0.50 * movd (%rax), %xmm2 -# CHECK-NEXT: 1 2 1.00 movd %xmm0, %ecx -# CHECK-NEXT: 1 1 1.00 * movd %xmm0, (%rax) -# CHECK-NEXT: 1 1 0.33 movdqa %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * movapd (%rax), %xmm2 +# CHECK-NEXT: 2 10 0.50 movd %eax, %xmm2 +# CHECK-NEXT: 1 5 0.50 * movd (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 movd %xmm0, %ecx +# CHECK-NEXT: 1 2 1.00 * movd %xmm0, (%rax) +# CHECK-NEXT: 1 2 0.50 movdqa %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * movdqa %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movdqa (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.33 movdqu %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * movdqa (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 movdqu %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * movdqu %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movdqu (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 movdq2q %xmm0, %mm2 -# CHECK-NEXT: 1 1 1.00 * movhpd %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * movhpd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 * movlpd %xmm0, (%rax) -# CHECK-NEXT: 2 7 1.00 * movlpd (%rax), %xmm2 -# CHECK-NEXT: 1 2 1.00 movmskpd %xmm0, %ecx -# CHECK-NEXT: 1 1 1.00 * movntil %eax, (%rax) -# CHECK-NEXT: 1 1 1.00 * movntiq %rax, (%rax) -# CHECK-NEXT: 1 1 1.00 * movntdq %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * movntpd %xmm0, (%rax) -# CHECK-NEXT: 1 1 0.33 movq %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 movq %rax, %xmm2 -# CHECK-NEXT: 1 6 0.50 * movq (%rax), %xmm2 -# CHECK-NEXT: 1 2 1.00 movq %xmm0, %rcx -# CHECK-NEXT: 1 1 1.00 * movq %xmm0, (%rax) -# CHECK-NEXT: 1 1 0.33 movq2dq %mm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 movsd %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 * movsd %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movupd %xmm0, %xmm2 +# CHECK-NEXT: 1 5 0.50 * movdqu (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 movdq2q %xmm0, %mm2 +# CHECK-NEXT: 2 2 1.00 * movhpd %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * movhpd (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 * movlpd %xmm0, (%rax) +# CHECK-NEXT: 1 7 0.50 * movlpd (%rax), %xmm2 +# CHECK-NEXT: 2 10 1.00 movmskpd %xmm0, %ecx +# CHECK-NEXT: 1 1 0.50 * movntil %eax, (%rax) +# CHECK-NEXT: 1 1 0.50 * movntiq %rax, (%rax) +# CHECK-NEXT: 1 2 1.00 * movntdq %xmm0, (%rax) +# CHECK-NEXT: 1 3 1.00 * movntpd %xmm0, (%rax) +# CHECK-NEXT: 1 2 0.50 movq %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 movq %rax, %xmm2 +# CHECK-NEXT: 1 5 0.50 * movq (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 movq %xmm0, %rcx +# CHECK-NEXT: 1 2 1.00 * movq %xmm0, (%rax) +# CHECK-NEXT: 1 2 0.50 movq2dq %mm0, %xmm2 +# CHECK-NEXT: 1 2 0.50 movsd %xmm0, %xmm2 +# CHECK-NEXT: 1 2 1.00 * movsd %xmm0, (%rax) +# CHECK-NEXT: 1 5 0.50 * movsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 movupd %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * movupd %xmm0, (%rax) -# CHECK-NEXT: 1 6 0.50 * movupd (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 * movupd (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 mulpd %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * mulpd (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 * mulpd (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 mulsd %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * mulsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 orpd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * orpd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 packssdw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * packssdw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 packsswb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * packsswb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 packuswb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * packuswb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddq %mm0, %mm2 -# CHECK-NEXT: 2 7 0.50 * paddq (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 paddq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddsb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddsb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddsw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddsw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddusb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddusb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddusw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddusw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 paddw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * paddw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.33 pand %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pand (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.33 pandn %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pandn (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pavgb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pavgb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pavgw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pavgw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pcmpeqb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pcmpeqd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pcmpeqw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpgtb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pcmpgtb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpgtd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pcmpgtd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpgtw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pcmpgtw (%rax), %xmm2 -# CHECK-NEXT: 2 3 1.00 pextrw $1, %xmm0, %ecx -# CHECK-NEXT: 1 5 1.00 pmaddwd %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmaddwd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmaxsw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmaxsw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmaxub %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmaxub (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pminsw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pminsw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pminub %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pminub (%rax), %xmm2 -# CHECK-NEXT: 1 2 1.00 pmovmskb %xmm0, %ecx -# CHECK-NEXT: 1 5 1.00 pmulhuw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmulhuw (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pmulhw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmulhw (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pmullw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmullw (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pmuludq %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmuludq (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 pmuludq %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmuludq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.33 por %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * por (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 psadbw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * psadbw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pshufd $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pshufd $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pshufhw $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pshufhw $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pshuflw $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pshuflw $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 pslld $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 pslld %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * pslld (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pslldq $1, %xmm2 -# CHECK-NEXT: 1 1 1.00 psllq $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 psllq %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * psllq (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 psllw $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 psllw %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * psllw (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 psrad $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 psrad %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * psrad (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 psraw $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 psraw %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * psraw (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 psrld $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 psrld %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * psrld (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psrldq $1, %xmm2 -# CHECK-NEXT: 1 1 1.00 psrlq $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 psrlq %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * psrlq (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 psrlw $1, %xmm2 -# CHECK-NEXT: 2 2 1.00 psrlw %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * psrlw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psubb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psubd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 psubq %mm0, %mm2 -# CHECK-NEXT: 2 8 1.00 * psubq (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 psubq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psubsb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubsb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psubsw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubsw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psubusb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubusb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psubusw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubusw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psubw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psubw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpckhbw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpckhbw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpckhdq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpckhdq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpckhqdq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpckhqdq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpckhwd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpckhwd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpcklbw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpcklbw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpckldq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpckldq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpcklqdq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpcklqdq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 punpcklwd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * punpcklwd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.33 pxor %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pxor (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 shufpd $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * shufpd $1, (%rax), %xmm2 -# CHECK-NEXT: 1 21 21.00 sqrtpd %xmm0, %xmm2 -# CHECK-NEXT: 2 27 21.00 * sqrtpd (%rax), %xmm2 -# CHECK-NEXT: 1 21 21.00 sqrtsd %xmm0, %xmm2 -# CHECK-NEXT: 2 27 21.00 * sqrtsd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 subpd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * subpd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 subsd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * subsd (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 ucomisd %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * ucomisd (%rax), %xmm1 -# CHECK-NEXT: 1 1 1.00 unpckhpd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * unpckhpd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 unpcklpd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * unpcklpd (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 xorpd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * xorpd (%rax), %xmm2 +# CHECK-NEXT: 1 10 1.00 * mulsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 orpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * orpd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 packssdw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * packssdw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 packsswb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * packsswb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 packuswb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * packuswb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddq %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * paddq (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 paddq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddsb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddsb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddsw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddsw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddusb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddusb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddusw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddusw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 paddw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * paddw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pand %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pand (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pandn %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pandn (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pavgb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pavgb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pavgw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pavgw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpeqb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpeqd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpeqw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpgtb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpgtd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpgtw (%rax), %xmm2 +# CHECK-NEXT: 2 13 1.00 pextrw $1, %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 pmaddwd %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmaddwd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmaxsw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmaxsw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmaxub %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmaxub (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pminsw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pminsw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pminub %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pminub (%rax), %xmm2 +# CHECK-NEXT: 2 13 1.00 pmovmskb %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 pmulhuw %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmulhuw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmulhw %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmulhw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmullw %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmullw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmuludq %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmuludq (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmuludq %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmuludq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 por %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * por (%rax), %xmm2 +# CHECK-NEXT: 2 4 0.50 psadbw %xmm0, %xmm2 +# CHECK-NEXT: 2 9 0.50 * psadbw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pshufd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pslld $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 pslld %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * pslld (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pslldq $1, %xmm2 +# CHECK-NEXT: 1 2 0.50 psllq $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 psllq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * psllq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psllw $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 psllw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * psllw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psrad $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 psrad %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * psrad (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psraw $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 psraw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * psraw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psrld $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 psrld %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * psrld (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psrldq $1, %xmm2 +# CHECK-NEXT: 1 2 0.50 psrlq $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 psrlq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * psrlq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psrlw $1, %xmm2 +# CHECK-NEXT: 1 3 0.50 psrlw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * psrlw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubq %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psubq (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psubq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubsb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubsb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubsw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubsw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubusb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubusb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubusw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubusw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psubw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psubw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpckhbw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpckhbw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpckhdq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpckhdq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpckhqdq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpckhqdq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpckhwd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpckhwd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpcklbw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpcklbw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpckldq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpckldq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpcklqdq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpcklqdq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 punpcklwd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * punpcklwd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pxor %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pxor (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 shufpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * shufpd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 9 13.50 sqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 1 14 13.50 * sqrtpd (%rax), %xmm2 +# CHECK-NEXT: 1 9 13.50 sqrtsd %xmm0, %xmm2 +# CHECK-NEXT: 1 14 13.50 * sqrtsd (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 subpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subpd (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 subsd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subsd (%rax), %xmm2 +# CHECK-NEXT: 2 1 1.00 ucomisd %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * ucomisd (%rax), %xmm1 +# CHECK-NEXT: 1 2 0.50 unpckhpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * unpckhpd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 unpcklpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * unpcklpd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 xorpd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * xorpd (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - 172.00 75.83 117.33 16.00 98.83 66.00 66.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 66.00 66.00 - - - 17.00 - - 124.50 124.50 66.50 66.50 12.00 50.00 119.50 140.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - addpd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 addpd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - addsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 addsd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - andnpd %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 andnpd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - andpd %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 andpd (%rax), %xmm2 -# CHECK-NEXT: - - 0.50 0.50 1.00 1.00 0.50 0.50 clflush (%rax) -# CHECK-NEXT: - - - 1.00 - - - - cmppd $0, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cmppd $0, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - cmpsd $0, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cmpsd $0, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - comisd %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 comisd (%rax), %xmm1 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtdq2pd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtdq2pd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - cvtdq2ps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvtdq2ps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtpd2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtpd2dq (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtpd2pi %xmm0, %mm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtpd2pi (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtpd2ps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtpd2ps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtpi2pd %mm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtpi2pd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - cvtps2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvtps2dq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - cvtps2pd %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 cvtps2pd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - cvtsd2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - cvtsd2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvtsd2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvtsd2si (%rax), %rcx -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtsd2ss %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvtsd2ss (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtsi2sdl %ecx, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvtsi2sdq %rcx, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvtsi2sdl (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvtsi2sdl (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - cvtss2sd %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 cvtss2sd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvttpd2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvttpd2dq (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - cvttpd2pi %xmm0, %mm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 cvttpd2pi (%rax), %mm2 -# CHECK-NEXT: - - - 1.00 - - - - cvttps2dq %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 cvttps2dq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - cvttsd2si %xmm0, %ecx -# CHECK-NEXT: - - 1.00 1.00 - - - - cvttsd2si %xmm0, %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvttsd2si (%rax), %ecx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 cvttsd2si (%rax), %rcx -# CHECK-NEXT: - 22.00 1.00 - - - - - divpd %xmm0, %xmm2 -# CHECK-NEXT: - 22.00 1.00 - - - 0.50 0.50 divpd (%rax), %xmm2 -# CHECK-NEXT: - 22.00 1.00 - - - - - divsd %xmm0, %xmm2 -# CHECK-NEXT: - 22.00 1.00 - - - 0.50 0.50 divsd (%rax), %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 lfence -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 maskmovdqu %xmm0, %xmm1 -# CHECK-NEXT: - - - 1.00 - - - - maxpd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 maxpd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - maxsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 maxsd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - minpd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 minpd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - minsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 minsd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movapd %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movapd %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movapd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movd %eax, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - movd %xmm0, %ecx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movd %xmm0, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movdqa %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movdqa %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movdqa (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movdqu %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movdqu %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movdqu (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 1.33 - - movdq2q %xmm0, %mm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movhpd %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 movhpd (%rax), %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movlpd %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 movlpd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - movmskpd %xmm0, %ecx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntil %eax, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntiq %rax, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntdq %xmm0, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntpd %xmm0, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movq %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movq %rax, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - movq %xmm0, %rcx -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movq %xmm0, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movq2dq %mm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movsd %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movsd %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movsd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movupd %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movupd %xmm0, (%rax) -# CHECK-NEXT: - - - - - - 0.50 0.50 movupd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - mulpd %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 mulpd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - mulsd %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 mulsd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - orpd %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 orpd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - packssdw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 packssdw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - packsswb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 packsswb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - packuswb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 packuswb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddq %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddq (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddsb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddsb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddsw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddusb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddusb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddusw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddusw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - paddw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 paddw (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pand %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pand (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pandn %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pandn (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pavgb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pavgb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pavgw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pavgw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pcmpeqb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pcmpeqb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pcmpeqd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pcmpeqd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pcmpeqw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pcmpeqw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pcmpgtb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pcmpgtb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pcmpgtd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pcmpgtd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pcmpgtw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pcmpgtw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - pextrw $1, %xmm0, %ecx -# CHECK-NEXT: - - 1.00 - - - - - pmaddwd %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmaddwd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmaxsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmaxsw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmaxub %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmaxub (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pminsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pminsw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pminub %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pminub (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmovmskb %xmm0, %ecx -# CHECK-NEXT: - - 1.00 - - - - - pmulhuw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhuw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmulhw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmullw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmullw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmuludq %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmuludq (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmuludq %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmuludq (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - por %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 por (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psadbw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 psadbw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pshufd $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pshufd $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pshufhw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pshufhw $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pshuflw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pshuflw $1, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pslld $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - pslld %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 pslld (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pslldq $1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psllq $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - psllq %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 psllq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psllw $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - psllw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 psllw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psrad $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - psrad %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 psrad (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psraw $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - psraw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 psraw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psrld $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - psrld %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 psrld (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psrldq $1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psrlq $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - psrlq %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 psrlq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - psrlw $1, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - psrlw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 0.50 0.50 psrlw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - psubq %mm0, %mm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 psubq (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubsb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubsb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubsw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubusb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubusb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubusw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubusw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psubw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psubw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpckhbw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpckhbw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpckhdq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpckhdq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpckhqdq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpckhqdq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpckhwd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpckhwd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpcklbw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpcklbw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpckldq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpckldq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpcklqdq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpcklqdq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - punpcklwd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 punpcklwd (%rax), %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pxor %xmm0, %xmm2 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pxor (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - shufpd $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 shufpd $1, (%rax), %xmm2 -# CHECK-NEXT: - 21.00 1.00 - - - - - sqrtpd %xmm0, %xmm2 -# CHECK-NEXT: - 21.00 1.00 - - - 0.50 0.50 sqrtpd (%rax), %xmm2 -# CHECK-NEXT: - 21.00 1.00 - - - - - sqrtsd %xmm0, %xmm2 -# CHECK-NEXT: - 21.00 1.00 - - - 0.50 0.50 sqrtsd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - subpd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 subpd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - subsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 subsd (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - - - - ucomisd %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 ucomisd (%rax), %xmm1 -# CHECK-NEXT: - - - - - 1.00 - - unpckhpd %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 unpckhpd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - unpcklpd %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 unpcklpd (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - xorpd %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 xorpd (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andnpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andnpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - andpd (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - clflush (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmppd $0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmppd $0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmpsd $0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - cmpsd $0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - comisd %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - comisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpd2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpd2pi %xmm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpd2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpd2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpi2pd %mm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtpi2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtps2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtsd2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtsd2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvtsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsd2ss %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsd2ss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2sdl %ecx, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2sdq %rcx, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2sdl (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtsi2sdl (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvtss2sd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvtss2sd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvttpd2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvttpd2pi %xmm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvttpd2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - cvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - cvttps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttsd2si %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttsd2si (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - 1.00 - 1.00 - - - - cvttsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - divsd (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - lfence +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - maskmovdqu %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - maxsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - minsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movapd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movapd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movapd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movd %eax, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movd (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - movd %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movd %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movdqa %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movdqa %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movdqa (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movdqu %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movdqu %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movdqu (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movdq2q %xmm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movhpd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movhpd (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movlpd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movlpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - movmskpd %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - movntil %eax, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - movntiq %rax, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movntdq %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movntpd %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movq %rax, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movq (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - movq %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movq %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movq2dq %mm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movsd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movupd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movupd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movupd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - mulsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - orpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - orpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packssdw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packssdw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packsswb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packsswb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packuswb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packuswb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddusw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - paddw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pand %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pand (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pandn %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pandn (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pavgw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtw (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - pextrw $1, %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddwd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxub %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxub (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminub %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminub (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - pmovmskb %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhuw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmullw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmullw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmuludq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmuludq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmuludq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmuludq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - por %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - por (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psadbw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psadbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshufd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pslld $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pslld %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pslld (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pslldq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllw $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psllw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrad $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrad %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrad (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psraw $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psraw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psraw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrld $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrld %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrld (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrldq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlw $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psrlw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubq %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubusw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psubw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhbw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhdq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhqdq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhqdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhwd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckhwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklbw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckldq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpckldq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklqdq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklqdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklwd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - punpcklwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pxor %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pxor (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - shufpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - shufpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 13.50 13.50 - - - - - 1.00 - - - - sqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 13.50 13.50 - - - - - 1.00 - - - - sqrtpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 13.50 13.50 - - - - - 1.00 - - - - sqrtsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 13.50 13.50 - - - - - 1.00 - - - - sqrtsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - subsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ucomisd %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ucomisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpckhpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpckhpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpcklpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - unpcklpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - xorpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - xorpd (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse3.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse3.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse3.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s addsubpd %xmm0, %xmm2 addsubpd (%rax), %xmm2 @@ -39,58 +39,70 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 addsubpd %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * addsubpd (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 addsubps %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * addsubps (%rax), %xmm2 -# CHECK-NEXT: 3 5 2.00 haddpd %xmm0, %xmm2 -# CHECK-NEXT: 4 11 2.00 * haddpd (%rax), %xmm2 -# CHECK-NEXT: 3 5 2.00 haddps %xmm0, %xmm2 -# CHECK-NEXT: 4 11 2.00 * haddps (%rax), %xmm2 -# CHECK-NEXT: 3 5 2.00 hsubpd %xmm0, %xmm2 -# CHECK-NEXT: 4 11 2.00 * hsubpd (%rax), %xmm2 -# CHECK-NEXT: 3 5 2.00 hsubps %xmm0, %xmm2 -# CHECK-NEXT: 4 11 2.00 * hsubps (%rax), %xmm2 -# CHECK-NEXT: 1 6 0.50 * lddqu (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movddup %xmm0, %xmm2 -# CHECK-NEXT: 1 6 0.50 * movddup (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movshdup %xmm0, %xmm2 -# CHECK-NEXT: 1 6 0.50 * movshdup (%rax), %xmm2 -# CHECK-NEXT: 1 1 1.00 movsldup %xmm0, %xmm2 -# CHECK-NEXT: 1 6 0.50 * movsldup (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 addsubpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addsubpd (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 addsubps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addsubps (%rax), %xmm2 +# CHECK-NEXT: 3 11 1.00 haddpd %xmm0, %xmm2 +# CHECK-NEXT: 4 16 1.00 * haddpd (%rax), %xmm2 +# CHECK-NEXT: 3 11 1.00 haddps %xmm0, %xmm2 +# CHECK-NEXT: 4 16 1.00 * haddps (%rax), %xmm2 +# CHECK-NEXT: 3 11 1.00 hsubpd %xmm0, %xmm2 +# CHECK-NEXT: 4 16 1.00 * hsubpd (%rax), %xmm2 +# CHECK-NEXT: 3 11 1.00 hsubps %xmm0, %xmm2 +# CHECK-NEXT: 4 16 1.00 * hsubps (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 * lddqu (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 movddup %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * movddup (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 movshdup %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * movshdup (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 movsldup %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * movsldup (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 12.00 - 19.00 5.00 5.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 5.00 5.00 - - - - - - 9.00 9.00 0.50 0.50 - - 15.50 3.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - addsubpd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 addsubpd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - addsubps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 addsubps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - haddpd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 haddpd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - haddps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 haddps (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - hsubpd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 hsubpd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 - - hsubps %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 2.00 0.50 0.50 hsubps (%rax), %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 lddqu (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movddup %xmm0, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movddup (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movshdup %xmm0, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movshdup (%rax), %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - movsldup %xmm0, %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movsldup (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addsubpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addsubpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addsubps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - addsubps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - haddpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - haddpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - haddps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - haddps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - hsubpd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - hsubpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - hsubps %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - hsubps (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - lddqu (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movddup %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movddup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movshdup %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movshdup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movsldup %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - movsldup (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse41.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse41.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse41.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s blendpd $11, %xmm0, %xmm2 blendpd $11, (%rax), %xmm2 @@ -155,212 +155,224 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.50 blendpd $11, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * blendpd $11, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 blendps $11, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * blendps $11, (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 blendvpd %xmm0, %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * blendvpd %xmm0, (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 blendvps %xmm0, %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * blendvps %xmm0, (%rax), %xmm2 -# CHECK-NEXT: 3 9 1.00 dppd $22, %xmm0, %xmm2 -# CHECK-NEXT: 4 15 1.00 * dppd $22, (%rax), %xmm2 -# CHECK-NEXT: 4 12 2.00 dpps $22, %xmm0, %xmm2 -# CHECK-NEXT: 5 18 2.00 * dpps $22, (%rax), %xmm2 -# CHECK-NEXT: 2 3 1.00 extractps $1, %xmm0, %ecx -# CHECK-NEXT: 3 5 1.00 * extractps $1, %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 insertps $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 1.00 * insertps $1, (%rax), %xmm2 -# CHECK-NEXT: 1 6 0.50 * movntdqa (%rax), %xmm2 -# CHECK-NEXT: 3 7 1.00 mpsadbw $1, %xmm0, %xmm2 -# CHECK-NEXT: 4 13 1.00 * mpsadbw $1, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 packusdw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * packusdw (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 pblendvb %xmm0, %xmm0, %xmm2 -# CHECK-NEXT: 3 8 1.00 * pblendvb %xmm0, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pblendw $11, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pblendw $11, (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pcmpeqq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pcmpeqq (%rax), %xmm2 -# CHECK-NEXT: 2 3 1.00 pextrb $1, %xmm0, %ecx -# CHECK-NEXT: 3 5 1.00 * pextrb $1, %xmm0, (%rax) -# CHECK-NEXT: 2 3 1.00 pextrd $1, %xmm0, %ecx -# CHECK-NEXT: 4 5 1.00 * pextrd $1, %xmm0, (%rax) -# CHECK-NEXT: 2 3 1.00 pextrq $1, %xmm0, %rcx -# CHECK-NEXT: 4 5 1.00 * pextrq $1, %xmm0, (%rax) -# CHECK-NEXT: 3 5 1.00 * pextrw $1, %xmm0, (%rax) -# CHECK-NEXT: 1 5 1.00 phminposuw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * phminposuw (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 pinsrb $1, %eax, %xmm1 -# CHECK-NEXT: 2 7 0.50 * pinsrb $1, (%rax), %xmm1 -# CHECK-NEXT: 2 2 1.00 pinsrd $1, %eax, %xmm1 -# CHECK-NEXT: 2 7 0.50 * pinsrd $1, (%rax), %xmm1 -# CHECK-NEXT: 2 2 1.00 pinsrq $1, %rax, %xmm1 -# CHECK-NEXT: 2 7 0.50 * pinsrq $1, (%rax), %xmm1 -# CHECK-NEXT: 1 1 0.50 pmaxsb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmaxsb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmaxsd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmaxsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmaxud %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmaxud (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmaxuw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmaxuw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pminsb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pminsb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pminsd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pminsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pminud %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pminud (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pminuw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pminuw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovsxbd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovsxbd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovsxbq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovsxbq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovsxbw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovsxbw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovsxdq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovsxdq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovsxwd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovsxwd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovsxwq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovsxwq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovzxbd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovzxbd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovzxbq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovzxbq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovzxbw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovzxbw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovzxdq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovzxdq (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovzxwd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovzxwd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pmovzxwq %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pmovzxwq (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pmuldq %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmuldq (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pmulld %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmulld (%rax), %xmm2 -# CHECK-NEXT: 2 2 1.00 ptest %xmm0, %xmm1 -# CHECK-NEXT: 3 8 1.00 * ptest (%rax), %xmm1 -# CHECK-NEXT: 1 3 1.00 roundpd $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * roundpd $1, (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 roundps $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * roundps $1, (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 roundsd $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * roundsd $1, (%rax), %xmm2 -# CHECK-NEXT: 1 3 1.00 roundss $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 9 1.00 * roundss $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 blendpd $11, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * blendpd $11, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 blendps $11, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * blendps $11, (%rax), %xmm2 +# CHECK-NEXT: 1 2 2.00 blendvpd %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 2.00 * blendvpd %xmm0, (%rax), %xmm2 +# CHECK-NEXT: 1 2 2.00 blendvps %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 2.00 * blendvps %xmm0, (%rax), %xmm2 +# CHECK-NEXT: 15 15 1.50 dppd $22, %xmm0, %xmm2 +# CHECK-NEXT: 17 20 1.50 * dppd $22, (%rax), %xmm2 +# CHECK-NEXT: 16 25 1.50 dpps $22, %xmm0, %xmm2 +# CHECK-NEXT: 18 30 1.50 * dpps $22, (%rax), %xmm2 +# CHECK-NEXT: 2 13 1.00 extractps $1, %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 * extractps $1, %xmm0, (%rax) +# CHECK-NEXT: 1 2 0.50 insertps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * insertps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 * movntdqa (%rax), %xmm2 +# CHECK-NEXT: 9 9 2.00 mpsadbw $1, %xmm0, %xmm2 +# CHECK-NEXT: 9 14 2.00 * mpsadbw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 packusdw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * packusdw (%rax), %xmm2 +# CHECK-NEXT: 1 2 2.00 pblendvb %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 2.00 * pblendvb %xmm0, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pblendw $11, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pblendw $11, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpeqq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpeqq (%rax), %xmm2 +# CHECK-NEXT: 2 13 1.00 pextrb $1, %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 * pextrb $1, %xmm0, (%rax) +# CHECK-NEXT: 2 13 1.00 pextrd $1, %xmm0, %ecx +# CHECK-NEXT: 2 13 1.00 * pextrd $1, %xmm0, (%rax) +# CHECK-NEXT: 2 13 1.00 pextrq $1, %xmm0, %rcx +# CHECK-NEXT: 2 13 1.00 * pextrq $1, %xmm0, (%rax) +# CHECK-NEXT: 2 13 1.00 * pextrw $1, %xmm0, (%rax) +# CHECK-NEXT: 2 4 1.00 phminposuw %xmm0, %xmm2 +# CHECK-NEXT: 2 9 1.00 * phminposuw (%rax), %xmm2 +# CHECK-NEXT: 2 2 0.50 pinsrb $1, %eax, %xmm1 +# CHECK-NEXT: 2 6 0.50 * pinsrb $1, (%rax), %xmm1 +# CHECK-NEXT: 2 2 0.50 pinsrd $1, %eax, %xmm1 +# CHECK-NEXT: 2 6 0.50 * pinsrd $1, (%rax), %xmm1 +# CHECK-NEXT: 2 2 0.50 pinsrq $1, %rax, %xmm1 +# CHECK-NEXT: 2 6 0.50 * pinsrq $1, (%rax), %xmm1 +# CHECK-NEXT: 1 2 0.50 pmaxsb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmaxsb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmaxsd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmaxsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmaxud %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmaxud (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmaxuw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmaxuw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pminsb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pminsb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pminsd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pminsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pminud %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pminud (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pminuw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pminuw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovsxbd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovsxbq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovsxbw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovsxdq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovsxwd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovsxwq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovzxbd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovzxbq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovzxbw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovzxdq (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovzxwd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pmovzxwq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmuldq %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmuldq (%rax), %xmm2 +# CHECK-NEXT: 1 5 2.00 pmulld %xmm0, %xmm2 +# CHECK-NEXT: 1 10 2.00 * pmulld (%rax), %xmm2 +# CHECK-NEXT: 2 1 1.00 ptest %xmm0, %xmm1 +# CHECK-NEXT: 2 6 1.00 * ptest (%rax), %xmm1 +# CHECK-NEXT: 1 4 1.00 roundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * roundpd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 roundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * roundps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 roundsd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * roundsd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 roundss $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * roundss $1, (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 26.00 47.50 5.00 52.50 24.50 24.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 24.50 24.50 - - - 6.00 - - 20.00 20.00 32.50 32.50 10.00 13.00 49.50 50.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.50 - - 0.50 - - blendpd $11, %xmm0, %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 blendpd $11, (%rax), %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 - - blendps $11, %xmm0, %xmm2 -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 blendps $11, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - blendvpd %xmm0, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 blendvpd %xmm0, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - blendvps %xmm0, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 blendvps %xmm0, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - dppd $22, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 0.50 0.50 dppd $22, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 2.00 - 1.00 - - dpps $22, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 2.00 - 1.00 0.50 0.50 dpps $22, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - extractps $1, %xmm0, %ecx -# CHECK-NEXT: - - - - 1.00 1.00 0.50 0.50 extractps $1, %xmm0, (%rax) -# CHECK-NEXT: - - - - - 1.00 - - insertps $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 insertps $1, (%rax), %xmm2 -# CHECK-NEXT: - - - - - - 0.50 0.50 movntdqa (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - mpsadbw $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 0.50 0.50 mpsadbw $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - packusdw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 packusdw (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 - - pblendvb %xmm0, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - 1.00 0.50 0.50 pblendvb %xmm0, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pblendw $11, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pblendw $11, (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pcmpeqq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pcmpeqq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - pextrb $1, %xmm0, %ecx -# CHECK-NEXT: - - - 0.50 1.00 0.50 0.50 0.50 pextrb $1, %xmm0, (%rax) -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - pextrd $1, %xmm0, %ecx -# CHECK-NEXT: - - 1.00 0.50 1.00 0.50 0.50 0.50 pextrd $1, %xmm0, (%rax) -# CHECK-NEXT: - - 1.00 0.50 - 0.50 - - pextrq $1, %xmm0, %rcx -# CHECK-NEXT: - - 1.00 0.50 1.00 0.50 0.50 0.50 pextrq $1, %xmm0, (%rax) -# CHECK-NEXT: - - - 0.50 1.00 0.50 0.50 0.50 pextrw $1, %xmm0, (%rax) -# CHECK-NEXT: - - 1.00 - - - - - phminposuw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 phminposuw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 1.50 - - pinsrb $1, %eax, %xmm1 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pinsrb $1, (%rax), %xmm1 -# CHECK-NEXT: - - - 0.50 - 1.50 - - pinsrd $1, %eax, %xmm1 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pinsrd $1, (%rax), %xmm1 -# CHECK-NEXT: - - - 0.50 - 1.50 - - pinsrq $1, %rax, %xmm1 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pinsrq $1, (%rax), %xmm1 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmaxsb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmaxsb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmaxsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmaxsd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmaxud %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmaxud (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmaxuw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmaxuw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pminsb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pminsb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pminsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pminsd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pminud %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pminud (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pminuw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pminuw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovsxbd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovsxbd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovsxbq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovsxbq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovsxbw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovsxbw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovsxdq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovsxdq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovsxwd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovsxwd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovsxwq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovsxwq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovzxbd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovzxbd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovzxbq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovzxbq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovzxbw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovzxbw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovzxdq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovzxdq (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovzxwd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovzxwd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pmovzxwq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pmovzxwq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmuldq %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmuldq (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmulld %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulld (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - 1.00 - - ptest %xmm0, %xmm1 -# CHECK-NEXT: - - 1.00 - - 1.00 0.50 0.50 ptest (%rax), %xmm1 -# CHECK-NEXT: - - - 1.00 - - - - roundpd $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 roundpd $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - roundps $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 roundps $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - roundsd $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 roundsd $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - roundss $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 roundss $1, (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - blendpd $11, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - blendpd $11, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - blendps $11, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - blendps $11, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - blendvpd %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - blendvpd %xmm0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - blendvps %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - blendvps %xmm0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.50 1.50 - - - - - 1.00 - - - - dppd $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.50 1.50 - - - - - 1.00 - - - - dppd $22, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.50 1.50 - - - - - 1.00 - - - - dpps $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.50 1.50 - - - - - 1.00 - - - - dpps $22, (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - extractps $1, %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - extractps $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - insertps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 0.50 0.50 - - - - insertps $1, (%rax), %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - movntdqa (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 2.00 - 1.00 - - - - - mpsadbw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 2.00 - 1.00 - - - - - mpsadbw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packusdw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - packusdw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - pblendvb %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - pblendvb %xmm0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pblendw $11, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pblendw $11, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpeqq (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - pextrb $1, %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pextrb $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - pextrd $1, %xmm0, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pextrd $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - pextrq $1, %xmm0, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pextrq $1, %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - pextrw $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 1.00 - - - - - phminposuw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 1.00 - - - - - phminposuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrb $1, %eax, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrb $1, (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrd $1, %eax, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrd $1, (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrq $1, %rax, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pinsrq $1, (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxud %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxud (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxuw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmaxuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminud %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminud (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminuw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pminuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovsxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pmovzxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmuldq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmuldq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - pmulld %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - pmulld (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ptest %xmm0, %xmm1 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ptest (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - roundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - roundpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - roundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - roundps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - roundsd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - roundsd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - roundss $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - roundss $1, (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse42.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse42.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse42.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s crc32b %al, %ecx crc32b (%rax), %ecx @@ -40,60 +40,72 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 crc32b %al, %ecx -# CHECK-NEXT: 2 8 1.00 * crc32b (%rax), %ecx -# CHECK-NEXT: 1 3 1.00 crc32l %eax, %ecx -# CHECK-NEXT: 2 8 1.00 * crc32l (%rax), %ecx -# CHECK-NEXT: 1 3 1.00 crc32w %ax, %ecx -# CHECK-NEXT: 2 8 1.00 * crc32w (%rax), %ecx -# CHECK-NEXT: 1 3 1.00 crc32b %al, %rcx -# CHECK-NEXT: 2 8 1.00 * crc32b (%rax), %rcx -# CHECK-NEXT: 1 3 1.00 crc32q %rax, %rcx -# CHECK-NEXT: 2 8 1.00 * crc32q (%rax), %rcx -# CHECK-NEXT: 1 4 2.67 pcmpestri $1, %xmm0, %xmm2 -# CHECK-NEXT: 1 4 2.33 * pcmpestri $1, (%rax), %xmm2 -# CHECK-NEXT: 1 11 2.67 pcmpestrm $1, %xmm0, %xmm2 -# CHECK-NEXT: 1 11 2.33 * pcmpestrm $1, (%rax), %xmm2 -# CHECK-NEXT: 3 11 3.00 pcmpistri $1, %xmm0, %xmm2 -# CHECK-NEXT: 4 17 3.00 * pcmpistri $1, (%rax), %xmm2 -# CHECK-NEXT: 3 11 3.00 pcmpistrm $1, %xmm0, %xmm2 -# CHECK-NEXT: 4 17 3.00 * pcmpistrm $1, (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pcmpgtq %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pcmpgtq (%rax), %xmm2 +# CHECK-NEXT: 3 3 2.00 crc32b %al, %ecx +# CHECK-NEXT: 3 7 2.00 * crc32b (%rax), %ecx +# CHECK-NEXT: 7 6 2.00 crc32l %eax, %ecx +# CHECK-NEXT: 3 7 2.00 * crc32l (%rax), %ecx +# CHECK-NEXT: 5 5 2.00 crc32w %ax, %ecx +# CHECK-NEXT: 3 7 2.00 * crc32w (%rax), %ecx +# CHECK-NEXT: 3 3 2.00 crc32b %al, %rcx +# CHECK-NEXT: 3 7 2.00 * crc32b (%rax), %rcx +# CHECK-NEXT: 11 10 2.00 crc32q %rax, %rcx +# CHECK-NEXT: 3 7 2.00 * crc32q (%rax), %rcx +# CHECK-NEXT: 27 15 4.00 pcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: 28 20 4.50 * pcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: 27 10 4.00 pcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 28 15 4.50 * pcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: 7 14 1.00 pcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: 8 19 1.00 * pcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: 7 6 1.00 pcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 9 11 1.00 * pcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtq %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pcmpgtq (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 24.00 20.00 - 10.00 5.00 5.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 21.00 21.00 - - - 28.00 20.00 - 6.00 6.00 9.00 9.00 - - 1.00 9.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - crc32b %al, %ecx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 crc32b (%rax), %ecx -# CHECK-NEXT: - - - 1.00 - - - - crc32l %eax, %ecx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 crc32l (%rax), %ecx -# CHECK-NEXT: - - - 1.00 - - - - crc32w %ax, %ecx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 crc32w (%rax), %ecx -# CHECK-NEXT: - - - 1.00 - - - - crc32b %al, %rcx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 crc32b (%rax), %rcx -# CHECK-NEXT: - - - 1.00 - - - - crc32q %rax, %rcx -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 crc32q (%rax), %rcx -# CHECK-NEXT: - - 2.67 2.67 - 2.67 - - pcmpestri $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 2.33 2.33 - 2.33 0.50 0.50 pcmpestri $1, (%rax), %xmm2 -# CHECK-NEXT: - - 2.67 2.67 - 2.67 - - pcmpestrm $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 2.33 2.33 - 2.33 0.50 0.50 pcmpestrm $1, (%rax), %xmm2 -# CHECK-NEXT: - - 3.00 - - - - - pcmpistri $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 3.00 - - - 0.50 0.50 pcmpistri $1, (%rax), %xmm2 -# CHECK-NEXT: - - 3.00 - - - - - pcmpistrm $1, %xmm0, %xmm2 -# CHECK-NEXT: - - 3.00 - - - 0.50 0.50 pcmpistrm $1, (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pcmpgtq %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pcmpgtq (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - crc32b %al, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 2.00 2.00 - - - - - - - - - - - - - crc32b (%rax), %ecx +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - crc32l %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 2.00 2.00 - - - - - - - - - - - - - crc32l (%rax), %ecx +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - crc32w %ax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 2.00 2.00 - - - - - - - - - - - - - crc32w (%rax), %ecx +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - crc32b %al, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 2.00 2.00 - - - - - - - - - - - - - crc32b (%rax), %rcx +# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - crc32q %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 2.00 2.00 - - - - - - - - - - - - - crc32q (%rax), %rcx +# CHECK-NEXT: 4.00 4.00 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - pcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: 4.50 4.50 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - pcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: 4.00 4.00 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - pcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 4.50 4.50 - - - 1.00 - - 0.50 0.50 2.00 2.00 - - - 1.00 - - - - pcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - pcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - pcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - pcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 1.00 1.00 - - - - - 1.00 - - - - pcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtq %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pcmpgtq (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse4a.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse4a.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-sse4a.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s extrq %xmm0, %xmm2 extrq $22, $2, %xmm2 @@ -19,32 +19,44 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.50 extrq %xmm0, %xmm2 -# CHECK-NEXT: 1 1 0.50 extrq $22, $2, %xmm2 -# CHECK-NEXT: 1 1 0.50 insertq %xmm0, %xmm2 -# CHECK-NEXT: 1 1 0.50 insertq $22, $22, %xmm0, %xmm2 -# CHECK-NEXT: 1 1 1.00 * movntsd %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * movntss %xmm0, (%rax) +# CHECK-NEXT: 1 3 0.50 extrq %xmm0, %xmm2 +# CHECK-NEXT: 1 3 0.50 extrq $22, $2, %xmm2 +# CHECK-NEXT: 1 3 2.00 insertq %xmm0, %xmm2 +# CHECK-NEXT: 1 3 2.00 insertq $22, $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 3 1.00 * movntsd %xmm0, (%rax) +# CHECK-NEXT: 1 3 1.00 * movntss %xmm0, (%rax) # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 2.00 2.00 2.00 1.00 1.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 1.00 1.00 - - - - - - - - 5.00 5.00 - 2.00 2.00 4.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 0.50 - 0.50 - - extrq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - extrq $22, $2, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - insertq %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - insertq $22, $22, %xmm0, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntsd %xmm0, (%rax) -# CHECK-NEXT: - - - - 1.00 - 0.50 0.50 movntss %xmm0, (%rax) +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - extrq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - extrq $22, $2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - insertq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - insertq $22, $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movntsd %xmm0, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - 1.00 - 1.00 - - - - movntss %xmm0, (%rax) Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-ssse3.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-ssse3.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-ssse3.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s pabsb %mm0, %mm2 pabsb (%rax), %mm2 @@ -106,148 +106,160 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.50 pabsb %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * pabsb (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 pabsb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pabsb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pabsd %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * pabsd (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 pabsd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pabsd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pabsw %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * pabsw (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 pabsw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pabsw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 palignr $1, %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * palignr $1, (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 palignr $1, %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * palignr $1, (%rax), %xmm2 -# CHECK-NEXT: 3 3 1.50 phaddd %mm0, %mm2 -# CHECK-NEXT: 4 8 1.50 * phaddd (%rax), %mm2 -# CHECK-NEXT: 3 3 1.50 phaddd %xmm0, %xmm2 -# CHECK-NEXT: 4 9 1.50 * phaddd (%rax), %xmm2 -# CHECK-NEXT: 3 3 1.50 phaddsw %mm0, %mm2 -# CHECK-NEXT: 4 8 1.50 * phaddsw (%rax), %mm2 -# CHECK-NEXT: 3 3 1.50 phaddsw %xmm0, %xmm2 -# CHECK-NEXT: 4 9 1.50 * phaddsw (%rax), %xmm2 -# CHECK-NEXT: 3 3 1.50 phaddw %mm0, %mm2 -# CHECK-NEXT: 4 8 1.50 * phaddw (%rax), %mm2 -# CHECK-NEXT: 3 3 1.50 phaddw %xmm0, %xmm2 -# CHECK-NEXT: 4 9 1.50 * phaddw (%rax), %xmm2 -# CHECK-NEXT: 3 3 1.50 phsubd %mm0, %mm2 -# CHECK-NEXT: 4 8 1.50 * phsubd (%rax), %mm2 -# CHECK-NEXT: 3 3 1.50 phsubd %xmm0, %xmm2 -# CHECK-NEXT: 4 9 1.50 * phsubd (%rax), %xmm2 -# CHECK-NEXT: 3 3 1.50 phsubsw %mm0, %mm2 -# CHECK-NEXT: 4 8 1.50 * phsubsw (%rax), %mm2 -# CHECK-NEXT: 3 3 1.50 phsubsw %xmm0, %xmm2 -# CHECK-NEXT: 4 9 1.50 * phsubsw (%rax), %xmm2 -# CHECK-NEXT: 3 3 1.50 phsubw %mm0, %mm2 -# CHECK-NEXT: 4 8 1.50 * phsubw (%rax), %mm2 -# CHECK-NEXT: 3 3 1.50 phsubw %xmm0, %xmm2 -# CHECK-NEXT: 4 9 1.50 * phsubw (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pmaddubsw %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmaddubsw (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 pmaddubsw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmaddubsw (%rax), %xmm2 -# CHECK-NEXT: 1 5 1.00 pmulhrsw %mm0, %mm2 -# CHECK-NEXT: 2 10 1.00 * pmulhrsw (%rax), %mm2 -# CHECK-NEXT: 1 5 1.00 pmulhrsw %xmm0, %xmm2 -# CHECK-NEXT: 2 11 1.00 * pmulhrsw (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 pshufb %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * pshufb (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 pshufb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * pshufb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psignb %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * psignb (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 psignb %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psignb (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psignd %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * psignd (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 psignd %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psignd (%rax), %xmm2 -# CHECK-NEXT: 1 1 0.50 psignw %mm0, %mm2 -# CHECK-NEXT: 2 6 0.50 * psignw (%rax), %mm2 -# CHECK-NEXT: 1 1 0.50 psignw %xmm0, %xmm2 -# CHECK-NEXT: 2 7 0.50 * psignw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pabsb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pabsb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pabsb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pabsb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pabsd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pabsd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pabsd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pabsd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 pabsw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * pabsw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 pabsw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * pabsw (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 palignr $1, %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * palignr $1, (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 palignr $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * palignr $1, (%rax), %xmm2 +# CHECK-NEXT: 3 5 0.50 phaddd %mm0, %mm2 +# CHECK-NEXT: 4 10 0.50 * phaddd (%rax), %mm2 +# CHECK-NEXT: 3 5 0.50 phaddd %xmm0, %xmm2 +# CHECK-NEXT: 4 10 0.50 * phaddd (%rax), %xmm2 +# CHECK-NEXT: 3 5 0.50 phaddsw %mm0, %mm2 +# CHECK-NEXT: 4 10 0.50 * phaddsw (%rax), %mm2 +# CHECK-NEXT: 3 5 0.50 phaddsw %xmm0, %xmm2 +# CHECK-NEXT: 4 10 0.50 * phaddsw (%rax), %xmm2 +# CHECK-NEXT: 3 5 0.50 phaddw %mm0, %mm2 +# CHECK-NEXT: 4 10 0.50 * phaddw (%rax), %mm2 +# CHECK-NEXT: 3 5 0.50 phaddw %xmm0, %xmm2 +# CHECK-NEXT: 4 10 0.50 * phaddw (%rax), %xmm2 +# CHECK-NEXT: 3 5 0.50 phsubd %mm0, %mm2 +# CHECK-NEXT: 4 10 0.50 * phsubd (%rax), %mm2 +# CHECK-NEXT: 3 5 0.50 phsubd %xmm0, %xmm2 +# CHECK-NEXT: 4 10 0.50 * phsubd (%rax), %xmm2 +# CHECK-NEXT: 3 5 0.50 phsubsw %mm0, %mm2 +# CHECK-NEXT: 4 10 0.50 * phsubsw (%rax), %mm2 +# CHECK-NEXT: 3 5 0.50 phsubsw %xmm0, %xmm2 +# CHECK-NEXT: 4 10 0.50 * phsubsw (%rax), %xmm2 +# CHECK-NEXT: 3 5 0.50 phsubw %mm0, %mm2 +# CHECK-NEXT: 4 10 0.50 * phsubw (%rax), %mm2 +# CHECK-NEXT: 3 5 0.50 phsubw %xmm0, %xmm2 +# CHECK-NEXT: 4 10 0.50 * phsubw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmaddubsw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmaddubsw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmaddubsw %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmaddubsw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmulhrsw %mm0, %mm2 +# CHECK-NEXT: 1 9 1.00 * pmulhrsw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmulhrsw %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * pmulhrsw (%rax), %xmm2 +# CHECK-NEXT: 1 3 2.00 pshufb %mm0, %mm2 +# CHECK-NEXT: 1 8 2.00 * pshufb (%rax), %mm2 +# CHECK-NEXT: 1 3 2.00 pshufb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 2.00 * pshufb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psignb %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psignb (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psignb %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psignb (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psignd %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psignd (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psignd %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psignd (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 psignw %mm0, %mm2 +# CHECK-NEXT: 1 7 0.50 * psignw (%rax), %mm2 +# CHECK-NEXT: 1 2 0.50 psignw %xmm0, %xmm2 +# CHECK-NEXT: 1 7 0.50 * psignw (%rax), %xmm2 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 8.00 52.00 - 52.00 16.00 16.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 16.00 16.00 - - - - - - - - 34.00 34.00 8.00 - 36.00 28.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 0.50 - 0.50 - - pabsb %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pabsb (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pabsb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pabsb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pabsd %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pabsd (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pabsd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pabsd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pabsw %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pabsw (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pabsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pabsw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - palignr $1, %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 palignr $1, (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - palignr $1, %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 palignr $1, (%rax), %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phaddd %mm0, %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phaddd (%rax), %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phaddd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phaddd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phaddsw %mm0, %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phaddsw (%rax), %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phaddsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phaddsw (%rax), %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phaddw %mm0, %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phaddw (%rax), %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phaddw %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phaddw (%rax), %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phsubd %mm0, %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phsubd (%rax), %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phsubd %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phsubd (%rax), %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phsubsw %mm0, %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phsubsw (%rax), %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phsubsw %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phsubsw (%rax), %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phsubw %mm0, %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phsubw (%rax), %mm2 -# CHECK-NEXT: - - - 1.50 - 1.50 - - phsubw %xmm0, %xmm2 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 phsubw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmaddubsw %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmaddubsw (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmaddubsw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmaddubsw (%rax), %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - pmulhrsw %mm0, %mm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhrsw (%rax), %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pmulhrsw %xmm0, %xmm2 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 pmulhrsw (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pshufb %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pshufb (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - pshufb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 pshufb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psignb %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psignb (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psignb %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psignb (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psignd %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psignd (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psignd %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psignd (%rax), %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psignw %mm0, %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psignw (%rax), %mm2 -# CHECK-NEXT: - - - 0.50 - 0.50 - - psignw %xmm0, %xmm2 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 psignw (%rax), %xmm2 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - pabsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - palignr $1, %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - palignr $1, (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - palignr $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - palignr $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phaddw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - phsubw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddubsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddubsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddubsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmaddubsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhrsw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhrsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhrsw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - pmulhrsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - pshufb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - pshufb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - pshufb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - pshufb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignb %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignb %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignd %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignd %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignw %mm0, %mm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignw %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - psignw (%rax), %xmm2 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-tbm.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-tbm.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-tbm.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s bextr $8192, %ebx, %ecx bextr $8192, (%rbx), %ecx @@ -70,100 +70,112 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 2 2 1.00 bextrl $8192, %ebx, %ecx -# CHECK-NEXT: 3 7 1.00 * bextrl $8192, (%rbx), %ecx -# CHECK-NEXT: 2 2 1.00 bextrq $16384, %rbx, %rcx -# CHECK-NEXT: 3 7 1.00 * bextrq $16384, (%rbx), %rcx -# CHECK-NEXT: 1 1 0.33 blcfilll %eax, %ecx +# CHECK-NEXT: 2 2 0.50 bextrl $8192, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * bextrl $8192, (%rbx), %ecx +# CHECK-NEXT: 2 2 0.50 bextrq $16384, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * bextrq $16384, (%rbx), %rcx +# CHECK-NEXT: 2 2 0.50 blcfilll %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blcfilll (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blcfillq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blcfillq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blcfillq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blcil %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blcil %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blcil (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blciq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blciq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blciq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blcicl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blcicl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blcicl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blcicq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blcicq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blcicq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blcmskl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blcmskl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blcmskl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blcmskq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blcmskq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blcmskq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blcsl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blcsl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blcsl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blcsq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blcsq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blcsq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blsfilll %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blsfilll %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blsfilll (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blsfillq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blsfillq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blsfillq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 blsicl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 blsicl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * blsicl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 blsicq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 blsicq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * blsicq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 t1mskcl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 t1mskcl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * t1mskcl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 t1mskcq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 t1mskcq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * t1mskcq (%rax), %rcx -# CHECK-NEXT: 1 1 0.33 tzmskl %eax, %ecx +# CHECK-NEXT: 2 2 0.50 tzmskl %eax, %ecx # CHECK-NEXT: 2 6 0.50 * tzmskl (%rax), %ecx -# CHECK-NEXT: 1 1 0.33 tzmskq %rax, %rcx +# CHECK-NEXT: 2 2 0.50 tzmskq %rax, %rcx # CHECK-NEXT: 2 6 0.50 * tzmskq (%rax), %rcx # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 14.00 16.00 - 14.00 10.00 10.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 1.00 1.00 - - - 20.00 20.00 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrl $8192, %ebx, %ecx -# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrl $8192, (%rbx), %ecx -# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrq $16384, %rbx, %rcx -# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrq $16384, (%rbx), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcfilll %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcfilll (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcfillq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcfillq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcil %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcil (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blciq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blciq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcicl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcicl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcicq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcicq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcmskl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcmskl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcmskq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcmskq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcsl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcsl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blcsq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blcsq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsfilll %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsfilll (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsfillq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsfillq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsicl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsicl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsicq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsicq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - t1mskcl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 t1mskcl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - t1mskcq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 t1mskcq (%rax), %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - tzmskl %eax, %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 tzmskl (%rax), %ecx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - tzmskq %rax, %rcx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 tzmskq (%rax), %rcx +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - bextrl $8192, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - bextrl $8192, (%rbx), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - bextrq $16384, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - bextrq $16384, (%rbx), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcfilll %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcfilll (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcfillq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcfillq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcil %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcil (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blciq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blciq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcicl %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcicl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcicq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcicq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcmskl %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcmskl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcmskq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcmskq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcsl %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcsl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcsq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blcsq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsfilll %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsfilll (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsfillq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsfillq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsicl %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsicl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsicq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - blsicq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - t1mskcl %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - t1mskcl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - t1mskcq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - t1mskcq (%rax), %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - tzmskl %eax, %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - tzmskl (%rax), %ecx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - tzmskq %rax, %rcx +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - tzmskq (%rax), %rcx Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x86_32.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x86_32.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x86_32.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=i686-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=i686-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s aaa @@ -33,46 +33,58 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 100 0.33 aaa -# CHECK-NEXT: 1 100 0.33 aad -# CHECK-NEXT: 1 100 0.33 aad $7 -# CHECK-NEXT: 1 100 0.33 aam -# CHECK-NEXT: 1 100 0.33 aam $7 -# CHECK-NEXT: 1 100 0.33 aas -# CHECK-NEXT: 1 100 0.33 U bound %bx, (%eax) -# CHECK-NEXT: 1 100 0.33 U bound %ebx, (%eax) -# CHECK-NEXT: 1 100 0.33 daa -# CHECK-NEXT: 1 100 0.33 das -# CHECK-NEXT: 1 100 0.33 U into -# CHECK-NEXT: 3 7 0.67 * leave -# CHECK-NEXT: 1 1 0.33 U salc +# CHECK-NEXT: 1 100 0.50 aaa +# CHECK-NEXT: 1 100 0.50 aad +# CHECK-NEXT: 1 100 0.50 aad $7 +# CHECK-NEXT: 1 100 0.50 aam +# CHECK-NEXT: 1 100 0.50 aam $7 +# CHECK-NEXT: 1 100 0.50 aas +# CHECK-NEXT: 1 100 0.50 U bound %bx, (%eax) +# CHECK-NEXT: 1 100 0.50 U bound %ebx, (%eax) +# CHECK-NEXT: 1 100 0.50 daa +# CHECK-NEXT: 1 100 0.50 das +# CHECK-NEXT: 1 100 0.50 U into +# CHECK-NEXT: 1 1 0.50 * leave +# CHECK-NEXT: 1 1 0.50 U salc # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 4.67 4.67 - 4.67 0.50 0.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 6.50 6.50 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - aaa -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - aad -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - aad $7 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - aam -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - aam $7 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - aas -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - bound %bx, (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - bound %ebx, (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - daa -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - das -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - into -# CHECK-NEXT: - - 0.67 0.67 - 0.67 0.50 0.50 leave -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - salc +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - aaa +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - aad +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - aad $7 +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - aam +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - aam $7 +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - aas +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - bound %bx, (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - bound %ebx, (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - daa +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - das +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - into +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leave +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - salc Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s adcb $7, %al adcb $7, %dil @@ -861,1512 +861,1524 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 2 2 0.67 adcb $7, %al -# CHECK-NEXT: 2 2 0.67 adcb $7, %dil -# CHECK-NEXT: 6 9 1.00 * * adcb $7, (%rax) -# CHECK-NEXT: 2 2 0.67 adcb %sil, %dil -# CHECK-NEXT: 6 9 1.00 * * adcb %sil, (%rax) -# CHECK-NEXT: 3 7 0.67 * adcb (%rax), %dil -# CHECK-NEXT: 2 2 0.67 adcw $511, %ax -# CHECK-NEXT: 2 2 0.67 adcw $511, %di -# CHECK-NEXT: 6 9 1.00 * * adcw $511, (%rax) -# CHECK-NEXT: 2 2 0.67 adcw $7, %di -# CHECK-NEXT: 6 9 1.00 * * adcw $7, (%rax) -# CHECK-NEXT: 2 2 0.67 adcw %si, %di -# CHECK-NEXT: 6 9 1.00 * * adcw %si, (%rax) -# CHECK-NEXT: 3 7 0.67 * adcw (%rax), %di -# CHECK-NEXT: 2 2 0.67 adcl $665536, %eax -# CHECK-NEXT: 2 2 0.67 adcl $665536, %edi -# CHECK-NEXT: 6 9 1.00 * * adcl $665536, (%rax) -# CHECK-NEXT: 2 2 0.67 adcl $7, %edi -# CHECK-NEXT: 6 9 1.00 * * adcl $7, (%rax) -# CHECK-NEXT: 2 2 0.67 adcl %esi, %edi -# CHECK-NEXT: 6 9 1.00 * * adcl %esi, (%rax) -# CHECK-NEXT: 3 7 0.67 * adcl (%rax), %edi -# CHECK-NEXT: 2 2 0.67 adcq $665536, %rax -# CHECK-NEXT: 2 2 0.67 adcq $665536, %rdi -# CHECK-NEXT: 6 9 1.00 * * adcq $665536, (%rax) -# CHECK-NEXT: 2 2 0.67 adcq $7, %rdi -# CHECK-NEXT: 6 9 1.00 * * adcq $7, (%rax) -# CHECK-NEXT: 2 2 0.67 adcq %rsi, %rdi -# CHECK-NEXT: 6 9 1.00 * * adcq %rsi, (%rax) -# CHECK-NEXT: 3 7 0.67 * adcq (%rax), %rdi -# CHECK-NEXT: 1 1 0.33 addb $7, %al -# CHECK-NEXT: 1 1 0.33 addb $7, %dil -# CHECK-NEXT: 3 7 1.00 * * addb $7, (%rax) -# CHECK-NEXT: 1 1 0.33 addb %sil, %dil -# CHECK-NEXT: 3 7 1.00 * * addb %sil, (%rax) -# CHECK-NEXT: 2 6 0.50 * addb (%rax), %dil -# CHECK-NEXT: 1 1 0.33 addw $511, %ax -# CHECK-NEXT: 1 1 0.33 addw $511, %di -# CHECK-NEXT: 3 7 1.00 * * addw $511, (%rax) -# CHECK-NEXT: 1 1 0.33 addw $7, %di -# CHECK-NEXT: 3 7 1.00 * * addw $7, (%rax) -# CHECK-NEXT: 1 1 0.33 addw %si, %di -# CHECK-NEXT: 3 7 1.00 * * addw %si, (%rax) -# CHECK-NEXT: 2 6 0.50 * addw (%rax), %di -# CHECK-NEXT: 1 1 0.33 addl $665536, %eax -# CHECK-NEXT: 1 1 0.33 addl $665536, %edi -# CHECK-NEXT: 3 7 1.00 * * addl $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 addl $7, %edi -# CHECK-NEXT: 3 7 1.00 * * addl $7, (%rax) -# CHECK-NEXT: 1 1 0.33 addl %esi, %edi -# CHECK-NEXT: 3 7 1.00 * * addl %esi, (%rax) -# CHECK-NEXT: 2 6 0.50 * addl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 addq $665536, %rax -# CHECK-NEXT: 1 1 0.33 addq $665536, %rdi -# CHECK-NEXT: 3 7 1.00 * * addq $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 addq $7, %rdi -# CHECK-NEXT: 3 7 1.00 * * addq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 addq %rsi, %rdi -# CHECK-NEXT: 3 7 1.00 * * addq %rsi, (%rax) -# CHECK-NEXT: 2 6 0.50 * addq (%rax), %rdi -# CHECK-NEXT: 1 1 0.33 andb $7, %al -# CHECK-NEXT: 1 1 0.33 andb $7, %dil -# CHECK-NEXT: 3 7 1.00 * * andb $7, (%rax) -# CHECK-NEXT: 1 1 0.33 andb %sil, %dil -# CHECK-NEXT: 3 7 1.00 * * andb %sil, (%rax) -# CHECK-NEXT: 2 6 0.50 * andb (%rax), %dil -# CHECK-NEXT: 1 1 0.33 andw $511, %ax -# CHECK-NEXT: 1 1 0.33 andw $511, %di -# CHECK-NEXT: 3 7 1.00 * * andw $511, (%rax) -# CHECK-NEXT: 1 1 0.33 andw $7, %di -# CHECK-NEXT: 3 7 1.00 * * andw $7, (%rax) -# CHECK-NEXT: 1 1 0.33 andw %si, %di -# CHECK-NEXT: 3 7 1.00 * * andw %si, (%rax) -# CHECK-NEXT: 2 6 0.50 * andw (%rax), %di -# CHECK-NEXT: 1 1 0.33 andl $665536, %eax -# CHECK-NEXT: 1 1 0.33 andl $665536, %edi -# CHECK-NEXT: 3 7 1.00 * * andl $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 andl $7, %edi -# CHECK-NEXT: 3 7 1.00 * * andl $7, (%rax) -# CHECK-NEXT: 1 1 0.33 andl %esi, %edi -# CHECK-NEXT: 3 7 1.00 * * andl %esi, (%rax) -# CHECK-NEXT: 2 6 0.50 * andl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 andq $665536, %rax -# CHECK-NEXT: 1 1 0.33 andq $665536, %rdi -# CHECK-NEXT: 3 7 1.00 * * andq $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 andq $7, %rdi -# CHECK-NEXT: 3 7 1.00 * * andq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 andq %rsi, %rdi -# CHECK-NEXT: 3 7 1.00 * * andq %rsi, (%rax) -# CHECK-NEXT: 2 6 0.50 * andq (%rax), %rdi -# CHECK-NEXT: 1 3 1.00 bsfw %si, %di -# CHECK-NEXT: 1 3 1.00 bsrw %si, %di -# CHECK-NEXT: 2 8 1.00 * bsfw (%rax), %di -# CHECK-NEXT: 2 8 1.00 * bsrw (%rax), %di -# CHECK-NEXT: 1 3 1.00 bsfl %esi, %edi -# CHECK-NEXT: 1 3 1.00 bsrl %esi, %edi -# CHECK-NEXT: 2 8 1.00 * bsfl (%rax), %edi -# CHECK-NEXT: 2 8 1.00 * bsrl (%rax), %edi -# CHECK-NEXT: 1 3 1.00 bsfq %rsi, %rdi -# CHECK-NEXT: 1 3 1.00 bsrq %rsi, %rdi -# CHECK-NEXT: 2 8 1.00 * bsfq (%rax), %rdi -# CHECK-NEXT: 2 8 1.00 * bsrq (%rax), %rdi +# CHECK-NEXT: 1 1 1.00 adcb $7, %al +# CHECK-NEXT: 1 1 1.00 adcb $7, %dil +# CHECK-NEXT: 2 6 1.00 * * adcb $7, (%rax) +# CHECK-NEXT: 1 1 1.00 adcb %sil, %dil +# CHECK-NEXT: 2 6 1.00 * * adcb %sil, (%rax) +# CHECK-NEXT: 1 5 1.00 * adcb (%rax), %dil +# CHECK-NEXT: 1 1 1.00 adcw $511, %ax +# CHECK-NEXT: 1 1 1.00 adcw $511, %di +# CHECK-NEXT: 2 6 1.00 * * adcw $511, (%rax) +# CHECK-NEXT: 1 1 1.00 adcw $7, %di +# CHECK-NEXT: 2 6 1.00 * * adcw $7, (%rax) +# CHECK-NEXT: 1 1 1.00 adcw %si, %di +# CHECK-NEXT: 2 6 1.00 * * adcw %si, (%rax) +# CHECK-NEXT: 1 5 1.00 * adcw (%rax), %di +# CHECK-NEXT: 1 1 1.00 adcl $665536, %eax +# CHECK-NEXT: 1 1 1.00 adcl $665536, %edi +# CHECK-NEXT: 2 6 1.00 * * adcl $665536, (%rax) +# CHECK-NEXT: 1 1 1.00 adcl $7, %edi +# CHECK-NEXT: 2 6 1.00 * * adcl $7, (%rax) +# CHECK-NEXT: 1 1 1.00 adcl %esi, %edi +# CHECK-NEXT: 2 6 1.00 * * adcl %esi, (%rax) +# CHECK-NEXT: 1 5 1.00 * adcl (%rax), %edi +# CHECK-NEXT: 1 1 1.00 adcq $665536, %rax +# CHECK-NEXT: 1 1 1.00 adcq $665536, %rdi +# CHECK-NEXT: 2 6 1.00 * * adcq $665536, (%rax) +# CHECK-NEXT: 1 1 1.00 adcq $7, %rdi +# CHECK-NEXT: 2 6 1.00 * * adcq $7, (%rax) +# CHECK-NEXT: 1 1 1.00 adcq %rsi, %rdi +# CHECK-NEXT: 2 6 1.00 * * adcq %rsi, (%rax) +# CHECK-NEXT: 1 5 1.00 * adcq (%rax), %rdi +# CHECK-NEXT: 1 1 0.50 addb $7, %al +# CHECK-NEXT: 1 1 0.50 addb $7, %dil +# CHECK-NEXT: 2 6 1.00 * * addb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 addb %sil, %dil +# CHECK-NEXT: 2 6 1.00 * * addb %sil, (%rax) +# CHECK-NEXT: 1 5 0.50 * addb (%rax), %dil +# CHECK-NEXT: 1 1 0.50 addw $511, %ax +# CHECK-NEXT: 1 1 0.50 addw $511, %di +# CHECK-NEXT: 2 6 1.00 * * addw $511, (%rax) +# CHECK-NEXT: 1 1 0.50 addw $7, %di +# CHECK-NEXT: 2 6 1.00 * * addw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 addw %si, %di +# CHECK-NEXT: 2 6 1.00 * * addw %si, (%rax) +# CHECK-NEXT: 1 5 0.50 * addw (%rax), %di +# CHECK-NEXT: 1 1 0.50 addl $665536, %eax +# CHECK-NEXT: 1 1 0.50 addl $665536, %edi +# CHECK-NEXT: 2 6 1.00 * * addl $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 addl $7, %edi +# CHECK-NEXT: 2 6 1.00 * * addl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 addl %esi, %edi +# CHECK-NEXT: 2 6 1.00 * * addl %esi, (%rax) +# CHECK-NEXT: 1 5 0.50 * addl (%rax), %edi +# CHECK-NEXT: 1 1 0.50 addq $665536, %rax +# CHECK-NEXT: 1 1 0.50 addq $665536, %rdi +# CHECK-NEXT: 2 6 1.00 * * addq $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 addq $7, %rdi +# CHECK-NEXT: 2 6 1.00 * * addq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 addq %rsi, %rdi +# CHECK-NEXT: 2 6 1.00 * * addq %rsi, (%rax) +# CHECK-NEXT: 1 5 0.50 * addq (%rax), %rdi +# CHECK-NEXT: 1 1 0.50 andb $7, %al +# CHECK-NEXT: 1 1 0.50 andb $7, %dil +# CHECK-NEXT: 2 6 1.00 * * andb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 andb %sil, %dil +# CHECK-NEXT: 2 6 1.00 * * andb %sil, (%rax) +# CHECK-NEXT: 1 5 0.50 * andb (%rax), %dil +# CHECK-NEXT: 1 1 0.50 andw $511, %ax +# CHECK-NEXT: 1 1 0.50 andw $511, %di +# CHECK-NEXT: 2 6 1.00 * * andw $511, (%rax) +# CHECK-NEXT: 1 1 0.50 andw $7, %di +# CHECK-NEXT: 2 6 1.00 * * andw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 andw %si, %di +# CHECK-NEXT: 2 6 1.00 * * andw %si, (%rax) +# CHECK-NEXT: 1 5 0.50 * andw (%rax), %di +# CHECK-NEXT: 1 1 0.50 andl $665536, %eax +# CHECK-NEXT: 1 1 0.50 andl $665536, %edi +# CHECK-NEXT: 2 6 1.00 * * andl $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 andl $7, %edi +# CHECK-NEXT: 2 6 1.00 * * andl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 andl %esi, %edi +# CHECK-NEXT: 2 6 1.00 * * andl %esi, (%rax) +# CHECK-NEXT: 1 5 0.50 * andl (%rax), %edi +# CHECK-NEXT: 1 1 0.50 andq $665536, %rax +# CHECK-NEXT: 1 1 0.50 andq $665536, %rdi +# CHECK-NEXT: 2 6 1.00 * * andq $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 andq $7, %rdi +# CHECK-NEXT: 2 6 1.00 * * andq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 andq %rsi, %rdi +# CHECK-NEXT: 2 6 1.00 * * andq %rsi, (%rax) +# CHECK-NEXT: 1 5 0.50 * andq (%rax), %rdi +# CHECK-NEXT: 6 3 2.00 bsfw %si, %di +# CHECK-NEXT: 7 4 2.00 bsrw %si, %di +# CHECK-NEXT: 8 7 2.00 * bsfw (%rax), %di +# CHECK-NEXT: 9 8 2.00 * bsrw (%rax), %di +# CHECK-NEXT: 6 3 2.00 bsfl %esi, %edi +# CHECK-NEXT: 7 4 2.00 bsrl %esi, %edi +# CHECK-NEXT: 8 7 2.00 * bsfl (%rax), %edi +# CHECK-NEXT: 9 8 2.00 * bsrl (%rax), %edi +# CHECK-NEXT: 6 3 2.00 bsfq %rsi, %rdi +# CHECK-NEXT: 7 4 2.00 bsrq %rsi, %rdi +# CHECK-NEXT: 8 7 2.00 * bsfq (%rax), %rdi +# CHECK-NEXT: 9 8 2.00 * bsrq (%rax), %rdi # CHECK-NEXT: 1 1 1.00 bswapl %eax -# CHECK-NEXT: 2 2 1.00 bswapq %rax +# CHECK-NEXT: 1 1 1.00 bswapq %rax # CHECK-NEXT: 1 1 0.50 btw %si, %di -# CHECK-NEXT: 1 1 0.50 btcw %si, %di -# CHECK-NEXT: 1 1 0.50 btrw %si, %di -# CHECK-NEXT: 1 1 0.50 btsw %si, %di -# CHECK-NEXT: 6 9 1.00 * btw %si, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btcw %si, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btrw %si, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btsw %si, (%rax) +# CHECK-NEXT: 2 2 0.50 btcw %si, %di +# CHECK-NEXT: 2 2 0.50 btrw %si, %di +# CHECK-NEXT: 2 2 0.50 btsw %si, %di +# CHECK-NEXT: 7 5 0.50 * btw %si, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btcw %si, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btrw %si, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btsw %si, (%rax) # CHECK-NEXT: 1 1 0.50 btw $7, %di -# CHECK-NEXT: 1 1 0.50 btcw $7, %di -# CHECK-NEXT: 1 1 0.50 btrw $7, %di -# CHECK-NEXT: 1 1 0.50 btsw $7, %di -# CHECK-NEXT: 2 6 0.50 * btw $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btcw $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btrw $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btsw $7, (%rax) +# CHECK-NEXT: 2 2 0.50 btcw $7, %di +# CHECK-NEXT: 2 2 0.50 btrw $7, %di +# CHECK-NEXT: 2 2 0.50 btsw $7, %di +# CHECK-NEXT: 1 5 0.50 * btw $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btcw $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btrw $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btsw $7, (%rax) # CHECK-NEXT: 1 1 0.50 btl %esi, %edi -# CHECK-NEXT: 1 1 0.50 btcl %esi, %edi -# CHECK-NEXT: 1 1 0.50 btrl %esi, %edi -# CHECK-NEXT: 1 1 0.50 btsl %esi, %edi -# CHECK-NEXT: 6 9 1.00 * btl %esi, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btcl %esi, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btrl %esi, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btsl %esi, (%rax) +# CHECK-NEXT: 2 2 0.50 btcl %esi, %edi +# CHECK-NEXT: 2 2 0.50 btrl %esi, %edi +# CHECK-NEXT: 2 2 0.50 btsl %esi, %edi +# CHECK-NEXT: 7 5 0.50 * btl %esi, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btcl %esi, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btrl %esi, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btsl %esi, (%rax) # CHECK-NEXT: 1 1 0.50 btl $7, %edi -# CHECK-NEXT: 1 1 0.50 btcl $7, %edi -# CHECK-NEXT: 1 1 0.50 btrl $7, %edi -# CHECK-NEXT: 1 1 0.50 btsl $7, %edi -# CHECK-NEXT: 2 6 0.50 * btl $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btcl $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btrl $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btsl $7, (%rax) +# CHECK-NEXT: 2 2 0.50 btcl $7, %edi +# CHECK-NEXT: 2 2 0.50 btrl $7, %edi +# CHECK-NEXT: 2 2 0.50 btsl $7, %edi +# CHECK-NEXT: 1 5 0.50 * btl $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btcl $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btrl $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btsl $7, (%rax) # CHECK-NEXT: 1 1 0.50 btq %rsi, %rdi -# CHECK-NEXT: 1 1 0.50 btcq %rsi, %rdi -# CHECK-NEXT: 1 1 0.50 btrq %rsi, %rdi -# CHECK-NEXT: 1 1 0.50 btsq %rsi, %rdi -# CHECK-NEXT: 6 9 1.00 * btq %rsi, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btcq %rsi, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btrq %rsi, (%rax) -# CHECK-NEXT: 6 9 1.00 * * btsq %rsi, (%rax) +# CHECK-NEXT: 2 2 0.50 btcq %rsi, %rdi +# CHECK-NEXT: 2 2 0.50 btrq %rsi, %rdi +# CHECK-NEXT: 2 2 0.50 btsq %rsi, %rdi +# CHECK-NEXT: 7 5 0.50 * btq %rsi, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btcq %rsi, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btrq %rsi, (%rax) +# CHECK-NEXT: 11 7 1.00 * * btsq %rsi, (%rax) # CHECK-NEXT: 1 1 0.50 btq $7, %rdi -# CHECK-NEXT: 1 1 0.50 btcq $7, %rdi -# CHECK-NEXT: 1 1 0.50 btrq $7, %rdi -# CHECK-NEXT: 1 1 0.50 btsq $7, %rdi -# CHECK-NEXT: 2 6 0.50 * btq $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btcq $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btrq $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * btsq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 cbtw -# CHECK-NEXT: 1 1 0.33 cwtl -# CHECK-NEXT: 1 1 0.33 cltq -# CHECK-NEXT: 2 2 1.00 cwtd +# CHECK-NEXT: 2 2 0.50 btcq $7, %rdi +# CHECK-NEXT: 2 2 0.50 btrq $7, %rdi +# CHECK-NEXT: 2 2 0.50 btsq $7, %rdi +# CHECK-NEXT: 1 5 0.50 * btq $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btcq $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btrq $7, (%rax) +# CHECK-NEXT: 5 7 1.00 * * btsq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 cbtw +# CHECK-NEXT: 1 1 0.50 cwtl +# CHECK-NEXT: 1 1 0.50 cltq +# CHECK-NEXT: 1 1 0.50 cwtd # CHECK-NEXT: 1 1 0.50 cltd # CHECK-NEXT: 1 1 0.50 cqto -# CHECK-NEXT: 1 1 0.25 U clc -# CHECK-NEXT: 1 1 0.33 U cld -# CHECK-NEXT: 1 1 0.33 U cmc -# CHECK-NEXT: 1 1 0.33 cmpb $7, %al -# CHECK-NEXT: 1 1 0.33 cmpb $7, %dil -# CHECK-NEXT: 2 6 0.50 * cmpb $7, (%rax) -# CHECK-NEXT: 1 1 0.33 cmpb %sil, %dil -# CHECK-NEXT: 2 6 0.50 * cmpb %sil, (%rax) -# CHECK-NEXT: 2 6 0.50 * cmpb (%rax), %dil -# CHECK-NEXT: 1 1 0.33 cmpw $511, %ax -# CHECK-NEXT: 1 1 0.33 cmpw $511, %di -# CHECK-NEXT: 2 6 0.50 * cmpw $511, (%rax) -# CHECK-NEXT: 1 1 0.33 cmpw $7, %di -# CHECK-NEXT: 2 6 0.50 * cmpw $7, (%rax) -# CHECK-NEXT: 1 1 0.33 cmpw %si, %di -# CHECK-NEXT: 2 6 0.50 * cmpw %si, (%rax) -# CHECK-NEXT: 2 6 0.50 * cmpw (%rax), %di -# CHECK-NEXT: 1 1 0.33 cmpl $665536, %eax -# CHECK-NEXT: 1 1 0.33 cmpl $665536, %edi -# CHECK-NEXT: 2 6 0.50 * cmpl $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 cmpl $7, %edi -# CHECK-NEXT: 2 6 0.50 * cmpl $7, (%rax) -# CHECK-NEXT: 1 1 0.33 cmpl %esi, %edi -# CHECK-NEXT: 2 6 0.50 * cmpl %esi, (%rax) -# CHECK-NEXT: 2 6 0.50 * cmpl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 cmpq $665536, %rax -# CHECK-NEXT: 1 1 0.33 cmpq $665536, %rdi -# CHECK-NEXT: 2 6 0.50 * cmpq $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 cmpq $7, %rdi -# CHECK-NEXT: 2 6 0.50 * cmpq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 cmpq %rsi, %rdi -# CHECK-NEXT: 2 6 0.50 * cmpq %rsi, (%rax) -# CHECK-NEXT: 2 6 0.50 * cmpq (%rax), %rdi -# CHECK-NEXT: 5 8 1.00 U cmpsb %es:(%rdi), (%rsi) -# CHECK-NEXT: 5 8 1.00 U cmpsw %es:(%rdi), (%rsi) -# CHECK-NEXT: 5 8 1.00 U cmpsl %es:(%rdi), (%rsi) -# CHECK-NEXT: 5 8 1.00 U cmpsq %es:(%rdi), (%rsi) -# CHECK-NEXT: 4 5 1.33 cmpxchgb %cl, %bl -# CHECK-NEXT: 6 8 2.00 * * cmpxchgb %cl, (%rbx) -# CHECK-NEXT: 4 5 1.33 cmpxchgw %cx, %bx -# CHECK-NEXT: 6 8 2.00 * * cmpxchgw %cx, (%rbx) -# CHECK-NEXT: 4 5 1.33 cmpxchgl %ecx, %ebx -# CHECK-NEXT: 6 8 2.00 * * cmpxchgl %ecx, (%rbx) -# CHECK-NEXT: 4 5 1.33 cmpxchgq %rcx, %rbx -# CHECK-NEXT: 6 8 2.00 * * cmpxchgq %rcx, (%rbx) -# CHECK-NEXT: 1 100 0.33 U cpuid -# CHECK-NEXT: 1 1 0.33 decb %dil -# CHECK-NEXT: 3 7 1.00 * * decb (%rax) -# CHECK-NEXT: 1 1 0.33 decw %di -# CHECK-NEXT: 3 7 1.00 * * decw (%rax) -# CHECK-NEXT: 1 1 0.33 decl %edi -# CHECK-NEXT: 3 7 1.00 * * decl (%rax) -# CHECK-NEXT: 1 1 0.33 decq %rdi -# CHECK-NEXT: 3 7 1.00 * * decq (%rax) -# CHECK-NEXT: 1 25 10.00 U divb %dil -# CHECK-NEXT: 2 30 10.00 * U divb (%rax) -# CHECK-NEXT: 1 25 10.00 U divw %si -# CHECK-NEXT: 2 30 10.00 * U divw (%rax) -# CHECK-NEXT: 1 25 10.00 U divl %edx -# CHECK-NEXT: 2 30 10.00 * U divl (%rax) -# CHECK-NEXT: 1 25 10.00 U divq %rcx -# CHECK-NEXT: 2 30 10.00 * U divq (%rax) -# CHECK-NEXT: 1 25 10.00 U idivb %dil -# CHECK-NEXT: 2 30 10.00 * U idivb (%rax) -# CHECK-NEXT: 1 25 10.00 U idivw %si -# CHECK-NEXT: 2 30 10.00 * U idivw (%rax) -# CHECK-NEXT: 1 25 10.00 U idivl %edx -# CHECK-NEXT: 2 30 10.00 * U idivl (%rax) -# CHECK-NEXT: 1 25 10.00 U idivq %rcx -# CHECK-NEXT: 2 30 10.00 * U idivq (%rax) -# CHECK-NEXT: 1 3 1.00 imulb %dil -# CHECK-NEXT: 2 8 1.00 * imulb (%rax) -# CHECK-NEXT: 4 4 1.33 imulw %di -# CHECK-NEXT: 5 9 1.33 * imulw (%rax) -# CHECK-NEXT: 1 3 1.00 imulw %si, %di -# CHECK-NEXT: 2 8 1.00 * imulw (%rax), %di -# CHECK-NEXT: 2 4 1.00 imulw $511, %si, %di -# CHECK-NEXT: 3 8 1.00 * imulw $511, (%rax), %di -# CHECK-NEXT: 2 4 1.00 imulw $7, %si, %di -# CHECK-NEXT: 3 8 1.00 * imulw $7, (%rax), %di -# CHECK-NEXT: 3 4 1.00 imull %edi -# CHECK-NEXT: 4 9 1.00 * imull (%rax) -# CHECK-NEXT: 1 3 1.00 imull %esi, %edi -# CHECK-NEXT: 2 8 1.00 * imull (%rax), %edi -# CHECK-NEXT: 1 3 1.00 imull $665536, %esi, %edi +# CHECK-NEXT: 1 1 0.50 U clc +# CHECK-NEXT: 1 1 0.50 U cld +# CHECK-NEXT: 1 1 0.50 U cmc +# CHECK-NEXT: 1 1 0.50 cmpb $7, %al +# CHECK-NEXT: 1 1 0.50 cmpb $7, %dil +# CHECK-NEXT: 1 5 0.50 * cmpb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 cmpb %sil, %dil +# CHECK-NEXT: 1 5 0.50 * cmpb %sil, (%rax) +# CHECK-NEXT: 1 5 0.50 * cmpb (%rax), %dil +# CHECK-NEXT: 1 1 0.50 cmpw $511, %ax +# CHECK-NEXT: 1 1 0.50 cmpw $511, %di +# CHECK-NEXT: 1 5 0.50 * cmpw $511, (%rax) +# CHECK-NEXT: 1 1 0.50 cmpw $7, %di +# CHECK-NEXT: 1 5 0.50 * cmpw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 cmpw %si, %di +# CHECK-NEXT: 1 5 0.50 * cmpw %si, (%rax) +# CHECK-NEXT: 1 5 0.50 * cmpw (%rax), %di +# CHECK-NEXT: 1 1 0.50 cmpl $665536, %eax +# CHECK-NEXT: 1 1 0.50 cmpl $665536, %edi +# CHECK-NEXT: 1 5 0.50 * cmpl $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 cmpl $7, %edi +# CHECK-NEXT: 1 5 0.50 * cmpl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 cmpl %esi, %edi +# CHECK-NEXT: 1 5 0.50 * cmpl %esi, (%rax) +# CHECK-NEXT: 1 5 0.50 * cmpl (%rax), %edi +# CHECK-NEXT: 1 1 0.50 cmpq $665536, %rax +# CHECK-NEXT: 1 1 0.50 cmpq $665536, %rdi +# CHECK-NEXT: 1 5 0.50 * cmpq $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 cmpq $7, %rdi +# CHECK-NEXT: 1 5 0.50 * cmpq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 cmpq %rsi, %rdi +# CHECK-NEXT: 1 5 0.50 * cmpq %rsi, (%rax) +# CHECK-NEXT: 1 5 0.50 * cmpq (%rax), %rdi +# CHECK-NEXT: 1 100 0.50 U cmpsb %es:(%rdi), (%rsi) +# CHECK-NEXT: 1 100 0.50 U cmpsw %es:(%rdi), (%rsi) +# CHECK-NEXT: 1 100 0.50 U cmpsl %es:(%rdi), (%rsi) +# CHECK-NEXT: 1 100 0.50 U cmpsq %es:(%rdi), (%rsi) +# CHECK-NEXT: 3 3 1.00 cmpxchgb %cl, %bl +# CHECK-NEXT: 5 3 1.00 * * cmpxchgb %cl, (%rbx) +# CHECK-NEXT: 5 3 1.00 cmpxchgw %cx, %bx +# CHECK-NEXT: 6 3 1.00 * * cmpxchgw %cx, (%rbx) +# CHECK-NEXT: 5 3 1.00 cmpxchgl %ecx, %ebx +# CHECK-NEXT: 6 3 1.00 * * cmpxchgl %ecx, (%rbx) +# CHECK-NEXT: 5 3 1.00 cmpxchgq %rcx, %rbx +# CHECK-NEXT: 6 3 1.00 * * cmpxchgq %rcx, (%rbx) +# CHECK-NEXT: 1 100 0.50 U cpuid +# CHECK-NEXT: 1 1 0.50 decb %dil +# CHECK-NEXT: 2 6 1.00 * * decb (%rax) +# CHECK-NEXT: 1 1 0.50 decw %di +# CHECK-NEXT: 2 6 1.00 * * decw (%rax) +# CHECK-NEXT: 1 1 0.50 decl %edi +# CHECK-NEXT: 2 6 1.00 * * decl (%rax) +# CHECK-NEXT: 1 1 0.50 decq %rdi +# CHECK-NEXT: 2 6 1.00 * * decq (%rax) +# CHECK-NEXT: 1 12 12.00 U divb %dil +# CHECK-NEXT: 1 16 12.00 * U divb (%rax) +# CHECK-NEXT: 2 15 15.00 U divw %si +# CHECK-NEXT: 2 19 15.00 * U divw (%rax) +# CHECK-NEXT: 2 14 14.00 U divl %edx +# CHECK-NEXT: 2 18 14.00 * U divl (%rax) +# CHECK-NEXT: 2 14 14.00 U divq %rcx +# CHECK-NEXT: 2 18 14.00 * U divq (%rax) +# CHECK-NEXT: 1 12 12.00 U idivb %dil +# CHECK-NEXT: 1 16 12.00 * U idivb (%rax) +# CHECK-NEXT: 2 15 17.00 U idivw %si +# CHECK-NEXT: 2 19 17.00 * U idivw (%rax) +# CHECK-NEXT: 2 14 25.00 U idivl %edx +# CHECK-NEXT: 2 18 25.00 * U idivl (%rax) +# CHECK-NEXT: 2 14 14.00 U idivq %rcx +# CHECK-NEXT: 2 18 14.00 * U idivq (%rax) +# CHECK-NEXT: 1 4 1.00 imulb %dil +# CHECK-NEXT: 1 8 1.00 * imulb (%rax) +# CHECK-NEXT: 2 4 1.00 imulw %di +# CHECK-NEXT: 2 8 1.00 * imulw (%rax) +# CHECK-NEXT: 1 4 1.00 imulw %si, %di +# CHECK-NEXT: 1 8 1.00 * imulw (%rax), %di +# CHECK-NEXT: 2 5 1.00 imulw $511, %si, %di +# CHECK-NEXT: 2 9 1.00 * imulw $511, (%rax), %di +# CHECK-NEXT: 2 5 1.00 imulw $7, %si, %di +# CHECK-NEXT: 2 9 1.00 * imulw $7, (%rax), %di +# CHECK-NEXT: 1 4 1.00 imull %edi +# CHECK-NEXT: 1 8 1.00 * imull (%rax) +# CHECK-NEXT: 1 4 1.00 imull %esi, %edi +# CHECK-NEXT: 1 8 1.00 * imull (%rax), %edi +# CHECK-NEXT: 1 4 1.00 imull $665536, %esi, %edi # CHECK-NEXT: 2 8 1.00 * imull $665536, (%rax), %edi -# CHECK-NEXT: 1 3 1.00 imull $7, %esi, %edi +# CHECK-NEXT: 1 4 1.00 imull $7, %esi, %edi # CHECK-NEXT: 2 8 1.00 * imull $7, (%rax), %edi -# CHECK-NEXT: 2 4 1.00 imulq %rdi -# CHECK-NEXT: 3 9 1.00 * imulq (%rax) -# CHECK-NEXT: 1 3 1.00 imulq %rsi, %rdi -# CHECK-NEXT: 2 8 1.00 * imulq (%rax), %rdi -# CHECK-NEXT: 1 3 1.00 imulq $665536, %rsi, %rdi -# CHECK-NEXT: 2 8 1.00 * imulq $665536, (%rax), %rdi -# CHECK-NEXT: 1 3 1.00 imulq $7, %rsi, %rdi -# CHECK-NEXT: 2 8 1.00 * imulq $7, (%rax), %rdi -# CHECK-NEXT: 1 100 0.33 U inb $7, %al -# CHECK-NEXT: 1 100 0.33 U inb %dx, %al -# CHECK-NEXT: 1 100 0.33 U inw $7, %ax -# CHECK-NEXT: 1 100 0.33 U inw %dx, %ax -# CHECK-NEXT: 1 100 0.33 U inl $7, %eax -# CHECK-NEXT: 1 100 0.33 U inl %dx, %eax -# CHECK-NEXT: 1 1 0.33 incb %dil -# CHECK-NEXT: 3 7 1.00 * * incb (%rax) -# CHECK-NEXT: 1 1 0.33 incw %di -# CHECK-NEXT: 3 7 1.00 * * incw (%rax) -# CHECK-NEXT: 1 1 0.33 incl %edi -# CHECK-NEXT: 3 7 1.00 * * incl (%rax) -# CHECK-NEXT: 1 1 0.33 incq %rdi -# CHECK-NEXT: 3 7 1.00 * * incq (%rax) -# CHECK-NEXT: 1 100 0.33 U insb %dx, %es:(%rdi) -# CHECK-NEXT: 1 100 0.33 U insw %dx, %es:(%rdi) -# CHECK-NEXT: 1 100 0.33 U insl %dx, %es:(%rdi) -# CHECK-NEXT: 1 100 0.33 * * U int $7 -# CHECK-NEXT: 1 1 0.50 lahf -# CHECK-NEXT: 3 7 0.67 U lodsb (%rsi), %al -# CHECK-NEXT: 3 7 0.67 U lodsw (%rsi), %ax -# CHECK-NEXT: 2 6 0.50 U lodsl (%rsi), %eax -# CHECK-NEXT: 2 6 0.50 U lodsq (%rsi), %rax -# CHECK-NEXT: 5 8 1.00 U movsb (%rsi), %es:(%rdi) -# CHECK-NEXT: 5 8 1.00 U movsw (%rsi), %es:(%rdi) -# CHECK-NEXT: 5 8 1.00 U movsl (%rsi), %es:(%rdi) -# CHECK-NEXT: 5 8 1.00 U movsq (%rsi), %es:(%rdi) -# CHECK-NEXT: 1 1 0.33 movsbw %al, %di -# CHECK-NEXT: 1 1 0.33 movzbw %al, %di +# CHECK-NEXT: 1 6 4.00 imulq %rdi +# CHECK-NEXT: 1 10 4.00 * imulq (%rax) +# CHECK-NEXT: 1 6 4.00 imulq %rsi, %rdi +# CHECK-NEXT: 1 10 4.00 * imulq (%rax), %rdi +# CHECK-NEXT: 1 6 4.00 imulq $665536, %rsi, %rdi +# CHECK-NEXT: 2 10 4.00 * imulq $665536, (%rax), %rdi +# CHECK-NEXT: 1 6 4.00 imulq $7, %rsi, %rdi +# CHECK-NEXT: 2 10 4.00 * imulq $7, (%rax), %rdi +# CHECK-NEXT: 1 100 0.50 U inb $7, %al +# CHECK-NEXT: 1 100 0.50 U inb %dx, %al +# CHECK-NEXT: 1 100 0.50 U inw $7, %ax +# CHECK-NEXT: 1 100 0.50 U inw %dx, %ax +# CHECK-NEXT: 1 100 0.50 U inl $7, %eax +# CHECK-NEXT: 1 100 0.50 U inl %dx, %eax +# CHECK-NEXT: 1 1 0.50 incb %dil +# CHECK-NEXT: 2 6 1.00 * * incb (%rax) +# CHECK-NEXT: 1 1 0.50 incw %di +# CHECK-NEXT: 2 6 1.00 * * incw (%rax) +# CHECK-NEXT: 1 1 0.50 incl %edi +# CHECK-NEXT: 2 6 1.00 * * incl (%rax) +# CHECK-NEXT: 1 1 0.50 incq %rdi +# CHECK-NEXT: 2 6 1.00 * * incq (%rax) +# CHECK-NEXT: 1 100 0.50 U insb %dx, %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U insw %dx, %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U insl %dx, %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 * * U int $7 +# CHECK-NEXT: 4 2 0.50 lahf +# CHECK-NEXT: 1 100 0.50 U lodsb (%rsi), %al +# CHECK-NEXT: 1 100 0.50 U lodsw (%rsi), %ax +# CHECK-NEXT: 1 100 0.50 U lodsl (%rsi), %eax +# CHECK-NEXT: 1 100 0.50 U lodsq (%rsi), %rax +# CHECK-NEXT: 1 100 0.50 U movsb (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U movsw (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U movsl (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U movsq (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 1 0.50 movsbw %al, %di +# CHECK-NEXT: 1 1 0.50 movzbw %al, %di # CHECK-NEXT: 1 5 0.50 * movsbw (%rax), %di # CHECK-NEXT: 1 5 0.50 * movzbw (%rax), %di -# CHECK-NEXT: 1 1 0.33 movsbl %al, %edi -# CHECK-NEXT: 1 1 0.33 movzbl %al, %edi +# CHECK-NEXT: 1 1 0.50 movsbl %al, %edi +# CHECK-NEXT: 1 1 0.50 movzbl %al, %edi # CHECK-NEXT: 1 5 0.50 * movsbl (%rax), %edi # CHECK-NEXT: 1 5 0.50 * movzbl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 movsbq %al, %rdi -# CHECK-NEXT: 1 1 0.33 movzbq %al, %rdi +# CHECK-NEXT: 1 1 0.50 movsbq %al, %rdi +# CHECK-NEXT: 1 1 0.50 movzbq %al, %rdi # CHECK-NEXT: 1 5 0.50 * movsbq (%rax), %rdi # CHECK-NEXT: 1 5 0.50 * movzbq (%rax), %rdi -# CHECK-NEXT: 1 1 0.33 movswl %ax, %edi -# CHECK-NEXT: 1 1 0.33 movzwl %ax, %edi +# CHECK-NEXT: 1 1 0.50 movswl %ax, %edi +# CHECK-NEXT: 1 1 0.50 movzwl %ax, %edi # CHECK-NEXT: 1 5 0.50 * movswl (%rax), %edi # CHECK-NEXT: 1 5 0.50 * movzwl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 movswq %ax, %rdi -# CHECK-NEXT: 1 1 0.33 movzwq %ax, %rdi +# CHECK-NEXT: 1 1 0.50 movswq %ax, %rdi +# CHECK-NEXT: 1 1 0.50 movzwq %ax, %rdi # CHECK-NEXT: 1 5 0.50 * movswq (%rax), %rdi # CHECK-NEXT: 1 5 0.50 * movzwq (%rax), %rdi -# CHECK-NEXT: 1 1 0.33 movslq %eax, %rdi +# CHECK-NEXT: 1 1 0.50 movslq %eax, %rdi # CHECK-NEXT: 1 5 0.50 * movslq (%rax), %rdi -# CHECK-NEXT: 1 3 1.00 mulb %dil -# CHECK-NEXT: 2 8 1.00 * mulb (%rax) -# CHECK-NEXT: 4 4 1.33 mulw %si -# CHECK-NEXT: 5 9 1.33 * mulw (%rax) -# CHECK-NEXT: 3 4 1.00 mull %edx -# CHECK-NEXT: 4 9 1.00 * mull (%rax) -# CHECK-NEXT: 2 4 1.00 mulq %rcx -# CHECK-NEXT: 3 9 1.00 * mulq (%rax) -# CHECK-NEXT: 1 1 0.33 negb %dil -# CHECK-NEXT: 3 7 1.00 * * negb (%r8) -# CHECK-NEXT: 1 1 0.33 negw %si -# CHECK-NEXT: 3 7 1.00 * * negw (%r9) -# CHECK-NEXT: 1 1 0.33 negl %edx -# CHECK-NEXT: 3 7 1.00 * * negl (%rax) -# CHECK-NEXT: 1 1 0.33 negq %rcx -# CHECK-NEXT: 3 7 1.00 * * negq (%r10) -# CHECK-NEXT: 1 1 0.25 nop -# CHECK-NEXT: 1 1 0.25 nopw %di -# CHECK-NEXT: 1 1 0.25 nopw (%rcx) -# CHECK-NEXT: 1 1 0.25 nopl %esi -# CHECK-NEXT: 1 1 0.25 nopl (%r8) -# CHECK-NEXT: 1 1 0.25 nopq %rdx -# CHECK-NEXT: 1 1 0.25 nopq (%r9) -# CHECK-NEXT: 1 1 0.33 notb %dil -# CHECK-NEXT: 3 7 1.00 * * notb (%r8) -# CHECK-NEXT: 1 1 0.33 notw %si -# CHECK-NEXT: 3 7 1.00 * * notw (%r9) -# CHECK-NEXT: 1 1 0.33 notl %edx -# CHECK-NEXT: 3 7 1.00 * * notl (%rax) -# CHECK-NEXT: 1 1 0.33 notq %rcx -# CHECK-NEXT: 3 7 1.00 * * notq (%r10) -# CHECK-NEXT: 1 1 0.33 orb $7, %al -# CHECK-NEXT: 1 1 0.33 orb $7, %dil -# CHECK-NEXT: 3 7 1.00 * * orb $7, (%rax) -# CHECK-NEXT: 1 1 0.33 orb %sil, %dil -# CHECK-NEXT: 3 7 1.00 * * orb %sil, (%rax) -# CHECK-NEXT: 2 6 0.50 * orb (%rax), %dil -# CHECK-NEXT: 1 1 0.33 orw $511, %ax -# CHECK-NEXT: 1 1 0.33 orw $511, %di -# CHECK-NEXT: 3 7 1.00 * * orw $511, (%rax) -# CHECK-NEXT: 1 1 0.33 orw $7, %di -# CHECK-NEXT: 3 7 1.00 * * orw $7, (%rax) -# CHECK-NEXT: 1 1 0.33 orw %si, %di -# CHECK-NEXT: 3 7 1.00 * * orw %si, (%rax) -# CHECK-NEXT: 2 6 0.50 * orw (%rax), %di -# CHECK-NEXT: 1 1 0.33 orl $665536, %eax -# CHECK-NEXT: 1 1 0.33 orl $665536, %edi -# CHECK-NEXT: 3 7 1.00 * * orl $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 orl $7, %edi -# CHECK-NEXT: 3 7 1.00 * * orl $7, (%rax) -# CHECK-NEXT: 1 1 0.33 orl %esi, %edi -# CHECK-NEXT: 3 7 1.00 * * orl %esi, (%rax) -# CHECK-NEXT: 2 6 0.50 * orl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 orq $665536, %rax -# CHECK-NEXT: 1 1 0.33 orq $665536, %rdi -# CHECK-NEXT: 3 7 1.00 * * orq $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 orq $7, %rdi -# CHECK-NEXT: 3 7 1.00 * * orq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 orq %rsi, %rdi -# CHECK-NEXT: 3 7 1.00 * * orq %rsi, (%rax) -# CHECK-NEXT: 2 6 0.50 * orq (%rax), %rdi -# CHECK-NEXT: 1 100 0.33 U outb %al, $7 -# CHECK-NEXT: 1 100 0.33 U outb %al, %dx -# CHECK-NEXT: 1 100 0.33 U outw %ax, $7 -# CHECK-NEXT: 1 100 0.33 U outw %ax, %dx -# CHECK-NEXT: 1 100 0.33 U outl %eax, $7 -# CHECK-NEXT: 1 100 0.33 U outl %eax, %dx -# CHECK-NEXT: 1 100 0.33 U outsb (%rsi), %dx -# CHECK-NEXT: 1 100 0.33 U outsw (%rsi), %dx -# CHECK-NEXT: 1 100 0.33 U outsl (%rsi), %dx -# CHECK-NEXT: 4 4 1.33 * * U pause -# CHECK-NEXT: 3 2 1.50 rclb %dil -# CHECK-NEXT: 3 2 1.50 rcrb %dil -# CHECK-NEXT: 11 11 3.50 * rclb (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrb (%rax) -# CHECK-NEXT: 8 5 4.00 rclb $7, %dil -# CHECK-NEXT: 8 5 4.00 rcrb $7, %dil -# CHECK-NEXT: 11 11 3.50 * rclb $7, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrb $7, (%rax) -# CHECK-NEXT: 8 5 4.00 rclb %cl, %dil -# CHECK-NEXT: 8 5 4.00 rcrb %cl, %dil -# CHECK-NEXT: 11 11 3.50 * rclb %cl, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrb %cl, (%rax) -# CHECK-NEXT: 3 2 1.50 rclw %di -# CHECK-NEXT: 3 2 1.50 rcrw %di -# CHECK-NEXT: 11 11 3.50 * rclw (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrw (%rax) -# CHECK-NEXT: 8 5 4.00 rclw $7, %di -# CHECK-NEXT: 8 5 4.00 rcrw $7, %di -# CHECK-NEXT: 11 11 3.50 * rclw $7, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrw $7, (%rax) -# CHECK-NEXT: 8 5 4.00 rclw %cl, %di -# CHECK-NEXT: 8 5 4.00 rcrw %cl, %di -# CHECK-NEXT: 11 11 3.50 * rclw %cl, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrw %cl, (%rax) -# CHECK-NEXT: 3 2 1.50 rcll %edi -# CHECK-NEXT: 3 2 1.50 rcrl %edi -# CHECK-NEXT: 11 11 3.50 * rcll (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrl (%rax) -# CHECK-NEXT: 8 5 4.00 rcll $7, %edi -# CHECK-NEXT: 8 5 4.00 rcrl $7, %edi -# CHECK-NEXT: 11 11 3.50 * rcll $7, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrl $7, (%rax) -# CHECK-NEXT: 8 5 4.00 rcll %cl, %edi -# CHECK-NEXT: 8 5 4.00 rcrl %cl, %edi -# CHECK-NEXT: 11 11 3.50 * rcll %cl, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrl %cl, (%rax) -# CHECK-NEXT: 3 2 1.50 rclq %rdi -# CHECK-NEXT: 3 2 1.50 rcrq %rdi -# CHECK-NEXT: 11 11 3.50 * rclq (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrq (%rax) -# CHECK-NEXT: 8 5 4.00 rclq $7, %rdi -# CHECK-NEXT: 8 5 4.00 rcrq $7, %rdi -# CHECK-NEXT: 11 11 3.50 * rclq $7, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrq $7, (%rax) -# CHECK-NEXT: 8 5 4.00 rclq %cl, %rdi -# CHECK-NEXT: 8 5 4.00 rcrq %cl, %rdi -# CHECK-NEXT: 11 11 3.50 * rclq %cl, (%rax) -# CHECK-NEXT: 11 11 3.50 * rcrq %cl, (%rax) -# CHECK-NEXT: 2 2 1.00 rolb %dil -# CHECK-NEXT: 2 2 1.00 rorb %dil -# CHECK-NEXT: 5 8 1.00 * * rolb (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorb (%rax) -# CHECK-NEXT: 2 2 1.00 rolb $7, %dil -# CHECK-NEXT: 2 2 1.00 rorb $7, %dil -# CHECK-NEXT: 5 8 1.00 * * rolb $7, (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorb $7, (%rax) -# CHECK-NEXT: 3 3 1.50 rolb %cl, %dil -# CHECK-NEXT: 3 3 1.50 rorb %cl, %dil -# CHECK-NEXT: 6 9 1.50 * * rolb %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * rorb %cl, (%rax) -# CHECK-NEXT: 2 2 1.00 rolw %di -# CHECK-NEXT: 2 2 1.00 rorw %di -# CHECK-NEXT: 5 8 1.00 * * rolw (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorw (%rax) -# CHECK-NEXT: 2 2 1.00 rolw $7, %di -# CHECK-NEXT: 2 2 1.00 rorw $7, %di -# CHECK-NEXT: 5 8 1.00 * * rolw $7, (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorw $7, (%rax) -# CHECK-NEXT: 3 3 1.50 rolw %cl, %di -# CHECK-NEXT: 3 3 1.50 rorw %cl, %di -# CHECK-NEXT: 6 9 1.50 * * rolw %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * rorw %cl, (%rax) -# CHECK-NEXT: 2 2 1.00 roll %edi -# CHECK-NEXT: 2 2 1.00 rorl %edi -# CHECK-NEXT: 5 8 1.00 * * roll (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorl (%rax) -# CHECK-NEXT: 2 2 1.00 roll $7, %edi -# CHECK-NEXT: 2 2 1.00 rorl $7, %edi -# CHECK-NEXT: 5 8 1.00 * * roll $7, (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorl $7, (%rax) -# CHECK-NEXT: 3 3 1.50 roll %cl, %edi -# CHECK-NEXT: 3 3 1.50 rorl %cl, %edi -# CHECK-NEXT: 6 9 1.50 * * roll %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * rorl %cl, (%rax) -# CHECK-NEXT: 2 2 1.00 rolq %rdi -# CHECK-NEXT: 2 2 1.00 rorq %rdi -# CHECK-NEXT: 5 8 1.00 * * rolq (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorq (%rax) -# CHECK-NEXT: 2 2 1.00 rolq $7, %rdi -# CHECK-NEXT: 2 2 1.00 rorq $7, %rdi -# CHECK-NEXT: 5 8 1.00 * * rolq $7, (%rax) -# CHECK-NEXT: 5 8 1.00 * * rorq $7, (%rax) -# CHECK-NEXT: 3 3 1.50 rolq %cl, %rdi -# CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi -# CHECK-NEXT: 6 9 1.50 * * rolq %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * rorq %cl, (%rax) -# CHECK-NEXT: 1 1 0.50 sahf +# CHECK-NEXT: 1 4 1.00 mulb %dil +# CHECK-NEXT: 1 8 1.00 * mulb (%rax) +# CHECK-NEXT: 2 4 1.00 mulw %si +# CHECK-NEXT: 2 8 1.00 * mulw (%rax) +# CHECK-NEXT: 1 4 1.00 mull %edx +# CHECK-NEXT: 1 8 1.00 * mull (%rax) +# CHECK-NEXT: 1 6 4.00 mulq %rcx +# CHECK-NEXT: 1 10 4.00 * mulq (%rax) +# CHECK-NEXT: 1 1 0.50 negb %dil +# CHECK-NEXT: 2 6 1.00 * * negb (%r8) +# CHECK-NEXT: 1 1 0.50 negw %si +# CHECK-NEXT: 2 6 1.00 * * negw (%r9) +# CHECK-NEXT: 1 1 0.50 negl %edx +# CHECK-NEXT: 2 6 1.00 * * negl (%rax) +# CHECK-NEXT: 1 1 0.50 negq %rcx +# CHECK-NEXT: 2 6 1.00 * * negq (%r10) +# CHECK-NEXT: 1 1 0.50 nop +# CHECK-NEXT: 1 1 0.50 nopw %di +# CHECK-NEXT: 1 1 0.50 nopw (%rcx) +# CHECK-NEXT: 1 1 0.50 nopl %esi +# CHECK-NEXT: 1 1 0.50 nopl (%r8) +# CHECK-NEXT: 1 1 0.50 nopq %rdx +# CHECK-NEXT: 1 1 0.50 nopq (%r9) +# CHECK-NEXT: 1 1 0.50 notb %dil +# CHECK-NEXT: 2 6 1.00 * * notb (%r8) +# CHECK-NEXT: 1 1 0.50 notw %si +# CHECK-NEXT: 2 6 1.00 * * notw (%r9) +# CHECK-NEXT: 1 1 0.50 notl %edx +# CHECK-NEXT: 2 6 1.00 * * notl (%rax) +# CHECK-NEXT: 1 1 0.50 notq %rcx +# CHECK-NEXT: 2 6 1.00 * * notq (%r10) +# CHECK-NEXT: 1 1 0.50 orb $7, %al +# CHECK-NEXT: 1 1 0.50 orb $7, %dil +# CHECK-NEXT: 2 6 1.00 * * orb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 orb %sil, %dil +# CHECK-NEXT: 2 6 1.00 * * orb %sil, (%rax) +# CHECK-NEXT: 1 5 0.50 * orb (%rax), %dil +# CHECK-NEXT: 1 1 0.50 orw $511, %ax +# CHECK-NEXT: 1 1 0.50 orw $511, %di +# CHECK-NEXT: 2 6 1.00 * * orw $511, (%rax) +# CHECK-NEXT: 1 1 0.50 orw $7, %di +# CHECK-NEXT: 2 6 1.00 * * orw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 orw %si, %di +# CHECK-NEXT: 2 6 1.00 * * orw %si, (%rax) +# CHECK-NEXT: 1 5 0.50 * orw (%rax), %di +# CHECK-NEXT: 1 1 0.50 orl $665536, %eax +# CHECK-NEXT: 1 1 0.50 orl $665536, %edi +# CHECK-NEXT: 2 6 1.00 * * orl $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 orl $7, %edi +# CHECK-NEXT: 2 6 1.00 * * orl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 orl %esi, %edi +# CHECK-NEXT: 2 6 1.00 * * orl %esi, (%rax) +# CHECK-NEXT: 1 5 0.50 * orl (%rax), %edi +# CHECK-NEXT: 1 1 0.50 orq $665536, %rax +# CHECK-NEXT: 1 1 0.50 orq $665536, %rdi +# CHECK-NEXT: 2 6 1.00 * * orq $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 orq $7, %rdi +# CHECK-NEXT: 2 6 1.00 * * orq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 orq %rsi, %rdi +# CHECK-NEXT: 2 6 1.00 * * orq %rsi, (%rax) +# CHECK-NEXT: 1 5 0.50 * orq (%rax), %rdi +# CHECK-NEXT: 1 100 0.50 U outb %al, $7 +# CHECK-NEXT: 1 100 0.50 U outb %al, %dx +# CHECK-NEXT: 1 100 0.50 U outw %ax, $7 +# CHECK-NEXT: 1 100 0.50 U outw %ax, %dx +# CHECK-NEXT: 1 100 0.50 U outl %eax, $7 +# CHECK-NEXT: 1 100 0.50 U outl %eax, %dx +# CHECK-NEXT: 1 100 0.50 U outsb (%rsi), %dx +# CHECK-NEXT: 1 100 0.50 U outsw (%rsi), %dx +# CHECK-NEXT: 1 100 0.50 U outsl (%rsi), %dx +# CHECK-NEXT: 1 1 0.50 * * U pause +# CHECK-NEXT: 1 1 0.50 rclb %dil +# CHECK-NEXT: 1 1 0.50 rcrb %dil +# CHECK-NEXT: 2 5 1.00 * rclb (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrb (%rax) +# CHECK-NEXT: 25 13 0.50 rclb $7, %dil +# CHECK-NEXT: 23 12 0.50 rcrb $7, %dil +# CHECK-NEXT: 2 5 1.00 * rclb $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrb $7, (%rax) +# CHECK-NEXT: 26 12 0.50 rclb %cl, %dil +# CHECK-NEXT: 24 11 0.50 rcrb %cl, %dil +# CHECK-NEXT: 2 5 1.00 * rclb %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrb %cl, (%rax) +# CHECK-NEXT: 1 1 0.50 rclw %di +# CHECK-NEXT: 1 1 0.50 rcrw %di +# CHECK-NEXT: 2 5 1.00 * rclw (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrw (%rax) +# CHECK-NEXT: 21 11 0.50 rclw $7, %di +# CHECK-NEXT: 19 10 0.50 rcrw $7, %di +# CHECK-NEXT: 2 5 1.00 * rclw $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrw $7, (%rax) +# CHECK-NEXT: 22 10 0.50 rclw %cl, %di +# CHECK-NEXT: 20 9 0.50 rcrw %cl, %di +# CHECK-NEXT: 2 5 1.00 * rclw %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrw %cl, (%rax) +# CHECK-NEXT: 1 1 0.50 rcll %edi +# CHECK-NEXT: 1 1 0.50 rcrl %edi +# CHECK-NEXT: 2 5 1.00 * rcll (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrl (%rax) +# CHECK-NEXT: 16 8 0.50 rcll $7, %edi +# CHECK-NEXT: 15 7 0.50 rcrl $7, %edi +# CHECK-NEXT: 2 5 1.00 * rcll $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrl $7, (%rax) +# CHECK-NEXT: 17 7 0.50 rcll %cl, %edi +# CHECK-NEXT: 16 7 0.50 rcrl %cl, %edi +# CHECK-NEXT: 2 5 1.00 * rcll %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrl %cl, (%rax) +# CHECK-NEXT: 1 1 0.50 rclq %rdi +# CHECK-NEXT: 1 1 0.50 rcrq %rdi +# CHECK-NEXT: 2 5 1.00 * rclq (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrq (%rax) +# CHECK-NEXT: 16 8 0.50 rclq $7, %rdi +# CHECK-NEXT: 15 7 0.50 rcrq $7, %rdi +# CHECK-NEXT: 2 5 1.00 * rclq $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrq $7, (%rax) +# CHECK-NEXT: 17 7 0.50 rclq %cl, %rdi +# CHECK-NEXT: 16 7 0.50 rcrq %cl, %rdi +# CHECK-NEXT: 2 5 1.00 * rclq %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * rcrq %cl, (%rax) +# CHECK-NEXT: 1 1 0.50 rolb %dil +# CHECK-NEXT: 1 1 0.50 rorb %dil +# CHECK-NEXT: 2 5 1.00 * * rolb (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorb (%rax) +# CHECK-NEXT: 1 1 0.50 rolb $7, %dil +# CHECK-NEXT: 1 1 0.50 rorb $7, %dil +# CHECK-NEXT: 2 5 1.00 * * rolb $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 rolb %cl, %dil +# CHECK-NEXT: 1 1 0.50 rorb %cl, %dil +# CHECK-NEXT: 2 5 1.00 * * rolb %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorb %cl, (%rax) +# CHECK-NEXT: 1 1 0.50 rolw %di +# CHECK-NEXT: 1 1 0.50 rorw %di +# CHECK-NEXT: 2 5 1.00 * * rolw (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorw (%rax) +# CHECK-NEXT: 1 1 0.50 rolw $7, %di +# CHECK-NEXT: 1 1 0.50 rorw $7, %di +# CHECK-NEXT: 2 5 1.00 * * rolw $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 rolw %cl, %di +# CHECK-NEXT: 1 1 0.50 rorw %cl, %di +# CHECK-NEXT: 2 5 1.00 * * rolw %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorw %cl, (%rax) +# CHECK-NEXT: 1 1 0.50 roll %edi +# CHECK-NEXT: 1 1 0.50 rorl %edi +# CHECK-NEXT: 2 5 1.00 * * roll (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorl (%rax) +# CHECK-NEXT: 1 1 0.50 roll $7, %edi +# CHECK-NEXT: 1 1 0.50 rorl $7, %edi +# CHECK-NEXT: 2 5 1.00 * * roll $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 roll %cl, %edi +# CHECK-NEXT: 1 1 0.50 rorl %cl, %edi +# CHECK-NEXT: 2 5 1.00 * * roll %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorl %cl, (%rax) +# CHECK-NEXT: 1 1 0.50 rolq %rdi +# CHECK-NEXT: 1 1 0.50 rorq %rdi +# CHECK-NEXT: 2 5 1.00 * * rolq (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorq (%rax) +# CHECK-NEXT: 1 1 0.50 rolq $7, %rdi +# CHECK-NEXT: 1 1 0.50 rorq $7, %rdi +# CHECK-NEXT: 2 5 1.00 * * rolq $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 rolq %cl, %rdi +# CHECK-NEXT: 1 1 0.50 rorq %cl, %rdi +# CHECK-NEXT: 2 5 1.00 * * rolq %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * rorq %cl, (%rax) +# CHECK-NEXT: 2 2 0.50 sahf # CHECK-NEXT: 1 1 0.50 sarb %dil # CHECK-NEXT: 1 1 0.50 shlb %dil # CHECK-NEXT: 1 1 0.50 shrb %dil -# CHECK-NEXT: 4 7 1.00 * * sarb (%rax) -# CHECK-NEXT: 4 7 1.00 * * shlb (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrb (%rax) +# CHECK-NEXT: 2 5 1.00 * * sarb (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlb (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrb (%rax) # CHECK-NEXT: 1 1 0.50 sarb $7, %dil # CHECK-NEXT: 1 1 0.50 shlb $7, %dil # CHECK-NEXT: 1 1 0.50 shrb $7, %dil -# CHECK-NEXT: 4 7 1.00 * * sarb $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shlb $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrb $7, (%rax) -# CHECK-NEXT: 3 3 1.50 sarb %cl, %dil -# CHECK-NEXT: 3 3 1.50 shlb %cl, %dil -# CHECK-NEXT: 3 3 1.50 shrb %cl, %dil -# CHECK-NEXT: 6 9 1.50 * * sarb %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shlb %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shrb %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * sarb $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlb $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 sarb %cl, %dil +# CHECK-NEXT: 1 1 0.50 shlb %cl, %dil +# CHECK-NEXT: 1 1 0.50 shrb %cl, %dil +# CHECK-NEXT: 2 5 1.00 * * sarb %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlb %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrb %cl, (%rax) # CHECK-NEXT: 1 1 0.50 sarw %di # CHECK-NEXT: 1 1 0.50 shlw %di # CHECK-NEXT: 1 1 0.50 shrw %di -# CHECK-NEXT: 4 7 1.00 * * sarw (%rax) -# CHECK-NEXT: 4 7 1.00 * * shlw (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrw (%rax) +# CHECK-NEXT: 2 5 1.00 * * sarw (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlw (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrw (%rax) # CHECK-NEXT: 1 1 0.50 sarw $7, %di # CHECK-NEXT: 1 1 0.50 shlw $7, %di # CHECK-NEXT: 1 1 0.50 shrw $7, %di -# CHECK-NEXT: 4 7 1.00 * * sarw $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shlw $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrw $7, (%rax) -# CHECK-NEXT: 3 3 1.50 sarw %cl, %di -# CHECK-NEXT: 3 3 1.50 shlw %cl, %di -# CHECK-NEXT: 3 3 1.50 shrw %cl, %di -# CHECK-NEXT: 6 9 1.50 * * sarw %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shlw %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shrw %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * sarw $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlw $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 sarw %cl, %di +# CHECK-NEXT: 1 1 0.50 shlw %cl, %di +# CHECK-NEXT: 1 1 0.50 shrw %cl, %di +# CHECK-NEXT: 2 5 1.00 * * sarw %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlw %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrw %cl, (%rax) # CHECK-NEXT: 1 1 0.50 sarl %edi # CHECK-NEXT: 1 1 0.50 shll %edi # CHECK-NEXT: 1 1 0.50 shrl %edi -# CHECK-NEXT: 4 7 1.00 * * sarl (%rax) -# CHECK-NEXT: 4 7 1.00 * * shll (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrl (%rax) +# CHECK-NEXT: 2 5 1.00 * * sarl (%rax) +# CHECK-NEXT: 2 5 1.00 * * shll (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrl (%rax) # CHECK-NEXT: 1 1 0.50 sarl $7, %edi # CHECK-NEXT: 1 1 0.50 shll $7, %edi # CHECK-NEXT: 1 1 0.50 shrl $7, %edi -# CHECK-NEXT: 4 7 1.00 * * sarl $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shll $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrl $7, (%rax) -# CHECK-NEXT: 3 3 1.50 sarl %cl, %edi -# CHECK-NEXT: 3 3 1.50 shll %cl, %edi -# CHECK-NEXT: 3 3 1.50 shrl %cl, %edi -# CHECK-NEXT: 6 9 1.50 * * sarl %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shll %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shrl %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * sarl $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shll $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 sarl %cl, %edi +# CHECK-NEXT: 1 1 0.50 shll %cl, %edi +# CHECK-NEXT: 1 1 0.50 shrl %cl, %edi +# CHECK-NEXT: 2 5 1.00 * * sarl %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shll %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrl %cl, (%rax) # CHECK-NEXT: 1 1 0.50 sarq %rdi # CHECK-NEXT: 1 1 0.50 shlq %rdi # CHECK-NEXT: 1 1 0.50 shrq %rdi -# CHECK-NEXT: 4 7 1.00 * * sarq (%rax) -# CHECK-NEXT: 4 7 1.00 * * shlq (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrq (%rax) +# CHECK-NEXT: 2 5 1.00 * * sarq (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlq (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrq (%rax) # CHECK-NEXT: 1 1 0.50 sarq $7, %rdi # CHECK-NEXT: 1 1 0.50 shlq $7, %rdi # CHECK-NEXT: 1 1 0.50 shrq $7, %rdi -# CHECK-NEXT: 4 7 1.00 * * sarq $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shlq $7, (%rax) -# CHECK-NEXT: 4 7 1.00 * * shrq $7, (%rax) -# CHECK-NEXT: 3 3 1.50 sarq %cl, %rdi -# CHECK-NEXT: 3 3 1.50 shlq %cl, %rdi -# CHECK-NEXT: 3 3 1.50 shrq %cl, %rdi -# CHECK-NEXT: 6 9 1.50 * * sarq %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shlq %cl, (%rax) -# CHECK-NEXT: 6 9 1.50 * * shrq %cl, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbb $7, %al -# CHECK-NEXT: 2 2 0.67 sbbb $7, %dil -# CHECK-NEXT: 6 9 1.00 * * sbbb $7, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbb %sil, %dil -# CHECK-NEXT: 6 9 1.00 * * sbbb %sil, (%rax) -# CHECK-NEXT: 3 7 0.67 * sbbb (%rax), %dil -# CHECK-NEXT: 2 2 0.67 sbbw $511, %ax -# CHECK-NEXT: 2 2 0.67 sbbw $511, %di -# CHECK-NEXT: 6 9 1.00 * * sbbw $511, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbw $7, %di -# CHECK-NEXT: 6 9 1.00 * * sbbw $7, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbw %si, %di -# CHECK-NEXT: 6 9 1.00 * * sbbw %si, (%rax) -# CHECK-NEXT: 3 7 0.67 * sbbw (%rax), %di -# CHECK-NEXT: 2 2 0.67 sbbl $665536, %eax -# CHECK-NEXT: 2 2 0.67 sbbl $665536, %edi -# CHECK-NEXT: 6 9 1.00 * * sbbl $665536, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbl $7, %edi -# CHECK-NEXT: 6 9 1.00 * * sbbl $7, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbl %esi, %edi -# CHECK-NEXT: 6 9 1.00 * * sbbl %esi, (%rax) -# CHECK-NEXT: 3 7 0.67 * sbbl (%rax), %edi -# CHECK-NEXT: 2 2 0.67 sbbq $665536, %rax -# CHECK-NEXT: 2 2 0.67 sbbq $665536, %rdi -# CHECK-NEXT: 6 9 1.00 * * sbbq $665536, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbq $7, %rdi -# CHECK-NEXT: 6 9 1.00 * * sbbq $7, (%rax) -# CHECK-NEXT: 2 2 0.67 sbbq %rsi, %rdi -# CHECK-NEXT: 6 9 1.00 * * sbbq %rsi, (%rax) -# CHECK-NEXT: 3 7 0.67 * sbbq (%rax), %rdi -# CHECK-NEXT: 2 2 0.67 U scasb %es:(%rdi), %al -# CHECK-NEXT: 2 2 0.67 U scasw %es:(%rdi), %ax -# CHECK-NEXT: 2 2 0.67 U scasl %es:(%rdi), %eax -# CHECK-NEXT: 2 2 0.67 U scasq %es:(%rdi), %rax +# CHECK-NEXT: 2 5 1.00 * * sarq $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlq $7, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 sarq %cl, %rdi +# CHECK-NEXT: 1 1 0.50 shlq %cl, %rdi +# CHECK-NEXT: 1 1 0.50 shrq %cl, %rdi +# CHECK-NEXT: 2 5 1.00 * * sarq %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shlq %cl, (%rax) +# CHECK-NEXT: 2 5 1.00 * * shrq %cl, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbb $7, %al +# CHECK-NEXT: 1 1 1.00 sbbb $7, %dil +# CHECK-NEXT: 2 6 1.00 * * sbbb $7, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbb %sil, %dil +# CHECK-NEXT: 2 6 1.00 * * sbbb %sil, (%rax) +# CHECK-NEXT: 1 5 1.00 * sbbb (%rax), %dil +# CHECK-NEXT: 1 1 1.00 sbbw $511, %ax +# CHECK-NEXT: 1 1 1.00 sbbw $511, %di +# CHECK-NEXT: 2 6 1.00 * * sbbw $511, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbw $7, %di +# CHECK-NEXT: 2 6 1.00 * * sbbw $7, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbw %si, %di +# CHECK-NEXT: 2 6 1.00 * * sbbw %si, (%rax) +# CHECK-NEXT: 1 5 1.00 * sbbw (%rax), %di +# CHECK-NEXT: 1 1 1.00 sbbl $665536, %eax +# CHECK-NEXT: 1 1 1.00 sbbl $665536, %edi +# CHECK-NEXT: 2 6 1.00 * * sbbl $665536, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbl $7, %edi +# CHECK-NEXT: 2 6 1.00 * * sbbl $7, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbl %esi, %edi +# CHECK-NEXT: 2 6 1.00 * * sbbl %esi, (%rax) +# CHECK-NEXT: 1 5 1.00 * sbbl (%rax), %edi +# CHECK-NEXT: 1 1 1.00 sbbq $665536, %rax +# CHECK-NEXT: 1 1 1.00 sbbq $665536, %rdi +# CHECK-NEXT: 2 6 1.00 * * sbbq $665536, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbq $7, %rdi +# CHECK-NEXT: 2 6 1.00 * * sbbq $7, (%rax) +# CHECK-NEXT: 1 1 1.00 sbbq %rsi, %rdi +# CHECK-NEXT: 2 6 1.00 * * sbbq %rsi, (%rax) +# CHECK-NEXT: 1 5 1.00 * sbbq (%rax), %rdi +# CHECK-NEXT: 1 100 0.50 U scasb %es:(%rdi), %al +# CHECK-NEXT: 1 100 0.50 U scasw %es:(%rdi), %ax +# CHECK-NEXT: 1 100 0.50 U scasl %es:(%rdi), %eax +# CHECK-NEXT: 1 100 0.50 U scasq %es:(%rdi), %rax # CHECK-NEXT: 1 1 0.50 seto %al -# CHECK-NEXT: 3 2 1.00 * seto (%rax) +# CHECK-NEXT: 1 1 0.50 * seto (%rax) # CHECK-NEXT: 1 1 0.50 setno %al -# CHECK-NEXT: 3 2 1.00 * setno (%rax) +# CHECK-NEXT: 1 1 0.50 * setno (%rax) # CHECK-NEXT: 1 1 0.50 setb %al -# CHECK-NEXT: 3 2 1.00 * setb (%rax) +# CHECK-NEXT: 1 1 0.50 * setb (%rax) # CHECK-NEXT: 1 1 0.50 setae %al -# CHECK-NEXT: 3 2 1.00 * setae (%rax) +# CHECK-NEXT: 1 1 0.50 * setae (%rax) # CHECK-NEXT: 1 1 0.50 sete %al -# CHECK-NEXT: 3 2 1.00 * sete (%rax) +# CHECK-NEXT: 1 1 0.50 * sete (%rax) # CHECK-NEXT: 1 1 0.50 setne %al -# CHECK-NEXT: 3 2 1.00 * setne (%rax) -# CHECK-NEXT: 2 2 1.00 seta %al -# CHECK-NEXT: 4 3 1.00 * seta (%rax) -# CHECK-NEXT: 2 2 1.00 setbe %al -# CHECK-NEXT: 4 3 1.00 * setbe (%rax) +# CHECK-NEXT: 1 1 0.50 * setne (%rax) +# CHECK-NEXT: 1 1 0.50 seta %al +# CHECK-NEXT: 1 1 0.50 * seta (%rax) +# CHECK-NEXT: 1 1 0.50 setbe %al +# CHECK-NEXT: 1 1 0.50 * setbe (%rax) # CHECK-NEXT: 1 1 0.50 sets %al -# CHECK-NEXT: 3 2 1.00 * sets (%rax) +# CHECK-NEXT: 1 1 0.50 * sets (%rax) # CHECK-NEXT: 1 1 0.50 setns %al -# CHECK-NEXT: 3 2 1.00 * setns (%rax) +# CHECK-NEXT: 1 1 0.50 * setns (%rax) # CHECK-NEXT: 1 1 0.50 setp %al -# CHECK-NEXT: 3 2 1.00 * setp (%rax) +# CHECK-NEXT: 1 1 0.50 * setp (%rax) # CHECK-NEXT: 1 1 0.50 setnp %al -# CHECK-NEXT: 3 2 1.00 * setnp (%rax) +# CHECK-NEXT: 1 1 0.50 * setnp (%rax) # CHECK-NEXT: 1 1 0.50 setl %al -# CHECK-NEXT: 3 2 1.00 * setl (%rax) +# CHECK-NEXT: 2 1 1.00 * setl (%rax) # CHECK-NEXT: 1 1 0.50 setge %al -# CHECK-NEXT: 3 2 1.00 * setge (%rax) +# CHECK-NEXT: 2 1 1.00 * setge (%rax) # CHECK-NEXT: 1 1 0.50 setg %al -# CHECK-NEXT: 3 2 1.00 * setg (%rax) +# CHECK-NEXT: 2 1 1.00 * setg (%rax) # CHECK-NEXT: 1 1 0.50 setle %al -# CHECK-NEXT: 3 2 1.00 * setle (%rax) -# CHECK-NEXT: 4 4 1.50 shldw %cl, %si, %di -# CHECK-NEXT: 4 4 1.50 shrdw %cl, %si, %di -# CHECK-NEXT: 7 10 1.50 * * shldw %cl, %si, (%rax) -# CHECK-NEXT: 7 10 1.50 * * shrdw %cl, %si, (%rax) -# CHECK-NEXT: 2 2 0.67 shldw $7, %si, %di -# CHECK-NEXT: 2 2 0.67 shrdw $7, %si, %di -# CHECK-NEXT: 5 8 1.00 * * shldw $7, %si, (%rax) -# CHECK-NEXT: 5 8 1.00 * * shrdw $7, %si, (%rax) -# CHECK-NEXT: 4 4 1.50 shldl %cl, %esi, %edi -# CHECK-NEXT: 4 4 1.50 shrdl %cl, %esi, %edi -# CHECK-NEXT: 7 10 1.50 * * shldl %cl, %esi, (%rax) -# CHECK-NEXT: 7 10 1.50 * * shrdl %cl, %esi, (%rax) -# CHECK-NEXT: 2 2 0.67 shldl $7, %esi, %edi -# CHECK-NEXT: 2 2 0.67 shrdl $7, %esi, %edi -# CHECK-NEXT: 5 8 1.00 * * shldl $7, %esi, (%rax) -# CHECK-NEXT: 5 8 1.00 * * shrdl $7, %esi, (%rax) -# CHECK-NEXT: 4 4 1.50 shldq %cl, %rsi, %rdi -# CHECK-NEXT: 4 4 1.50 shrdq %cl, %rsi, %rdi -# CHECK-NEXT: 7 10 1.50 * * shldq %cl, %rsi, (%rax) -# CHECK-NEXT: 7 10 1.50 * * shrdq %cl, %rsi, (%rax) -# CHECK-NEXT: 2 2 0.67 shldq $7, %rsi, %rdi -# CHECK-NEXT: 2 2 0.67 shrdq $7, %rsi, %rdi -# CHECK-NEXT: 5 8 1.00 * * shldq $7, %rsi, (%rax) -# CHECK-NEXT: 5 8 1.00 * * shrdq $7, %rsi, (%rax) -# CHECK-NEXT: 1 1 0.33 U stc -# CHECK-NEXT: 1 1 0.33 U std -# CHECK-NEXT: 3 5 1.00 U stosb %al, %es:(%rdi) -# CHECK-NEXT: 3 5 1.00 U stosw %ax, %es:(%rdi) -# CHECK-NEXT: 3 5 1.00 U stosl %eax, %es:(%rdi) -# CHECK-NEXT: 3 5 1.00 U stosq %rax, %es:(%rdi) -# CHECK-NEXT: 1 1 0.33 subb $7, %al -# CHECK-NEXT: 1 1 0.33 subb $7, %dil -# CHECK-NEXT: 3 7 1.00 * * subb $7, (%rax) -# CHECK-NEXT: 1 1 0.33 subb %sil, %dil -# CHECK-NEXT: 3 7 1.00 * * subb %sil, (%rax) -# CHECK-NEXT: 2 6 0.50 * subb (%rax), %dil -# CHECK-NEXT: 1 1 0.33 subw $511, %ax -# CHECK-NEXT: 1 1 0.33 subw $511, %di -# CHECK-NEXT: 3 7 1.00 * * subw $511, (%rax) -# CHECK-NEXT: 1 1 0.33 subw $7, %di -# CHECK-NEXT: 3 7 1.00 * * subw $7, (%rax) -# CHECK-NEXT: 1 1 0.33 subw %si, %di -# CHECK-NEXT: 3 7 1.00 * * subw %si, (%rax) -# CHECK-NEXT: 2 6 0.50 * subw (%rax), %di -# CHECK-NEXT: 1 1 0.33 subl $665536, %eax -# CHECK-NEXT: 1 1 0.33 subl $665536, %edi -# CHECK-NEXT: 3 7 1.00 * * subl $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 subl $7, %edi -# CHECK-NEXT: 3 7 1.00 * * subl $7, (%rax) -# CHECK-NEXT: 1 1 0.33 subl %esi, %edi -# CHECK-NEXT: 3 7 1.00 * * subl %esi, (%rax) -# CHECK-NEXT: 2 6 0.50 * subl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 subq $665536, %rax -# CHECK-NEXT: 1 1 0.33 subq $665536, %rdi -# CHECK-NEXT: 3 7 1.00 * * subq $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 subq $7, %rdi -# CHECK-NEXT: 3 7 1.00 * * subq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 subq %rsi, %rdi -# CHECK-NEXT: 3 7 1.00 * * subq %rsi, (%rax) -# CHECK-NEXT: 2 6 0.50 * subq (%rax), %rdi -# CHECK-NEXT: 1 1 0.33 testb $7, %al -# CHECK-NEXT: 1 1 0.33 testb $7, %dil -# CHECK-NEXT: 2 6 0.50 * testb $7, (%rax) -# CHECK-NEXT: 1 1 0.33 testb %sil, %dil -# CHECK-NEXT: 2 6 0.50 * testb %sil, (%rax) -# CHECK-NEXT: 1 1 0.33 testw $511, %ax -# CHECK-NEXT: 1 1 0.33 testw $511, %di -# CHECK-NEXT: 2 6 0.50 * testw $511, (%rax) -# CHECK-NEXT: 1 1 0.33 testw $7, %di -# CHECK-NEXT: 2 6 0.50 * testw $7, (%rax) -# CHECK-NEXT: 1 1 0.33 testw %si, %di -# CHECK-NEXT: 2 6 0.50 * testw %si, (%rax) -# CHECK-NEXT: 1 1 0.33 testl $665536, %eax -# CHECK-NEXT: 1 1 0.33 testl $665536, %edi -# CHECK-NEXT: 2 6 0.50 * testl $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 testl $7, %edi -# CHECK-NEXT: 2 6 0.50 * testl $7, (%rax) -# CHECK-NEXT: 1 1 0.33 testl %esi, %edi -# CHECK-NEXT: 2 6 0.50 * testl %esi, (%rax) -# CHECK-NEXT: 1 1 0.33 testq $665536, %rax -# CHECK-NEXT: 1 1 0.33 testq $665536, %rdi -# CHECK-NEXT: 2 6 0.50 * testq $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 testq $7, %rdi -# CHECK-NEXT: 2 6 0.50 * testq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 testq %rsi, %rdi -# CHECK-NEXT: 2 6 0.50 * testq %rsi, (%rax) -# CHECK-NEXT: 1 100 0.33 * U ud2 -# CHECK-NEXT: 3 2 1.00 xaddb %bl, %cl -# CHECK-NEXT: 5 8 1.00 * * xaddb %bl, (%rcx) -# CHECK-NEXT: 3 2 1.00 xaddw %bx, %cx -# CHECK-NEXT: 5 8 1.00 * * xaddw %ax, (%rbx) -# CHECK-NEXT: 3 2 1.00 xaddl %ebx, %ecx -# CHECK-NEXT: 5 8 1.00 * * xaddl %eax, (%rbx) -# CHECK-NEXT: 3 2 1.00 xaddq %rbx, %rcx -# CHECK-NEXT: 5 8 1.00 * * xaddq %rax, (%rbx) -# CHECK-NEXT: 3 2 1.00 xchgb %bl, %cl -# CHECK-NEXT: 3 6 1.00 * * xchgb %bl, (%rbx) -# CHECK-NEXT: 3 2 1.00 xchgw %bx, %ax -# CHECK-NEXT: 3 2 1.00 xchgw %bx, %cx -# CHECK-NEXT: 3 6 1.00 * * xchgw %ax, (%rbx) -# CHECK-NEXT: 3 2 1.00 xchgl %ebx, %eax -# CHECK-NEXT: 3 2 1.00 xchgl %ebx, %ecx -# CHECK-NEXT: 3 6 1.00 * * xchgl %eax, (%rbx) -# CHECK-NEXT: 3 2 1.00 xchgq %rbx, %rax -# CHECK-NEXT: 3 2 1.00 xchgq %rbx, %rcx -# CHECK-NEXT: 3 6 1.00 * * xchgq %rax, (%rbx) -# CHECK-NEXT: 1 5 0.50 * xlatb -# CHECK-NEXT: 1 1 0.33 xorb $7, %al -# CHECK-NEXT: 1 1 0.33 xorb $7, %dil -# CHECK-NEXT: 3 7 1.00 * * xorb $7, (%rax) -# CHECK-NEXT: 1 1 0.33 xorb %sil, %dil -# CHECK-NEXT: 3 7 1.00 * * xorb %sil, (%rax) -# CHECK-NEXT: 2 6 0.50 * xorb (%rax), %dil -# CHECK-NEXT: 1 1 0.33 xorw $511, %ax -# CHECK-NEXT: 1 1 0.33 xorw $511, %di -# CHECK-NEXT: 3 7 1.00 * * xorw $511, (%rax) -# CHECK-NEXT: 1 1 0.33 xorw $7, %di -# CHECK-NEXT: 3 7 1.00 * * xorw $7, (%rax) -# CHECK-NEXT: 1 1 0.33 xorw %si, %di -# CHECK-NEXT: 3 7 1.00 * * xorw %si, (%rax) -# CHECK-NEXT: 2 6 0.50 * xorw (%rax), %di -# CHECK-NEXT: 1 1 0.33 xorl $665536, %eax -# CHECK-NEXT: 1 1 0.33 xorl $665536, %edi -# CHECK-NEXT: 3 7 1.00 * * xorl $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 xorl $7, %edi -# CHECK-NEXT: 3 7 1.00 * * xorl $7, (%rax) -# CHECK-NEXT: 1 1 0.33 xorl %esi, %edi -# CHECK-NEXT: 3 7 1.00 * * xorl %esi, (%rax) -# CHECK-NEXT: 2 6 0.50 * xorl (%rax), %edi -# CHECK-NEXT: 1 1 0.33 xorq $665536, %rax -# CHECK-NEXT: 1 1 0.33 xorq $665536, %rdi -# CHECK-NEXT: 3 7 1.00 * * xorq $665536, (%rax) -# CHECK-NEXT: 1 1 0.33 xorq $7, %rdi -# CHECK-NEXT: 3 7 1.00 * * xorq $7, (%rax) -# CHECK-NEXT: 1 1 0.33 xorq %rsi, %rdi -# CHECK-NEXT: 3 7 1.00 * * xorq %rsi, (%rax) -# CHECK-NEXT: 2 6 0.50 * xorq (%rax), %rdi +# CHECK-NEXT: 2 1 1.00 * setle (%rax) +# CHECK-NEXT: 7 4 4.00 shldw %cl, %si, %di +# CHECK-NEXT: 7 4 4.00 shrdw %cl, %si, %di +# CHECK-NEXT: 8 4 11.00 * * shldw %cl, %si, (%rax) +# CHECK-NEXT: 8 4 11.00 * * shrdw %cl, %si, (%rax) +# CHECK-NEXT: 6 4 3.00 shldw $7, %si, %di +# CHECK-NEXT: 6 3 3.00 shrdw $7, %si, %di +# CHECK-NEXT: 8 4 11.00 * * shldw $7, %si, (%rax) +# CHECK-NEXT: 8 4 11.00 * * shrdw $7, %si, (%rax) +# CHECK-NEXT: 7 4 4.00 shldl %cl, %esi, %edi +# CHECK-NEXT: 7 4 4.00 shrdl %cl, %esi, %edi +# CHECK-NEXT: 8 4 11.00 * * shldl %cl, %esi, (%rax) +# CHECK-NEXT: 8 4 11.00 * * shrdl %cl, %esi, (%rax) +# CHECK-NEXT: 6 3 3.00 shldl $7, %esi, %edi +# CHECK-NEXT: 6 4 3.00 shrdl $7, %esi, %edi +# CHECK-NEXT: 8 4 11.00 * * shldl $7, %esi, (%rax) +# CHECK-NEXT: 8 4 11.00 * * shrdl $7, %esi, (%rax) +# CHECK-NEXT: 7 4 4.00 shldq %cl, %rsi, %rdi +# CHECK-NEXT: 7 4 4.00 shrdq %cl, %rsi, %rdi +# CHECK-NEXT: 8 4 11.00 * * shldq %cl, %rsi, (%rax) +# CHECK-NEXT: 8 4 11.00 * * shrdq %cl, %rsi, (%rax) +# CHECK-NEXT: 6 4 3.00 shldq $7, %rsi, %rdi +# CHECK-NEXT: 6 4 3.00 shrdq $7, %rsi, %rdi +# CHECK-NEXT: 8 4 11.00 * * shldq $7, %rsi, (%rax) +# CHECK-NEXT: 8 4 11.00 * * shrdq $7, %rsi, (%rax) +# CHECK-NEXT: 1 1 0.50 U stc +# CHECK-NEXT: 1 1 0.50 U std +# CHECK-NEXT: 1 100 0.50 U stosb %al, %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U stosw %ax, %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U stosl %eax, %es:(%rdi) +# CHECK-NEXT: 1 100 0.50 U stosq %rax, %es:(%rdi) +# CHECK-NEXT: 1 1 0.50 subb $7, %al +# CHECK-NEXT: 1 1 0.50 subb $7, %dil +# CHECK-NEXT: 2 6 1.00 * * subb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 subb %sil, %dil +# CHECK-NEXT: 2 6 1.00 * * subb %sil, (%rax) +# CHECK-NEXT: 1 5 0.50 * subb (%rax), %dil +# CHECK-NEXT: 1 1 0.50 subw $511, %ax +# CHECK-NEXT: 1 1 0.50 subw $511, %di +# CHECK-NEXT: 2 6 1.00 * * subw $511, (%rax) +# CHECK-NEXT: 1 1 0.50 subw $7, %di +# CHECK-NEXT: 2 6 1.00 * * subw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 subw %si, %di +# CHECK-NEXT: 2 6 1.00 * * subw %si, (%rax) +# CHECK-NEXT: 1 5 0.50 * subw (%rax), %di +# CHECK-NEXT: 1 1 0.50 subl $665536, %eax +# CHECK-NEXT: 1 1 0.50 subl $665536, %edi +# CHECK-NEXT: 2 6 1.00 * * subl $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 subl $7, %edi +# CHECK-NEXT: 2 6 1.00 * * subl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 subl %esi, %edi +# CHECK-NEXT: 2 6 1.00 * * subl %esi, (%rax) +# CHECK-NEXT: 1 5 0.50 * subl (%rax), %edi +# CHECK-NEXT: 1 1 0.50 subq $665536, %rax +# CHECK-NEXT: 1 1 0.50 subq $665536, %rdi +# CHECK-NEXT: 2 6 1.00 * * subq $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 subq $7, %rdi +# CHECK-NEXT: 2 6 1.00 * * subq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 subq %rsi, %rdi +# CHECK-NEXT: 2 6 1.00 * * subq %rsi, (%rax) +# CHECK-NEXT: 1 5 0.50 * subq (%rax), %rdi +# CHECK-NEXT: 1 1 0.50 testb $7, %al +# CHECK-NEXT: 1 1 0.50 testb $7, %dil +# CHECK-NEXT: 1 5 0.50 * testb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 testb %sil, %dil +# CHECK-NEXT: 1 5 0.50 * testb %sil, (%rax) +# CHECK-NEXT: 1 1 0.50 testw $511, %ax +# CHECK-NEXT: 1 1 0.50 testw $511, %di +# CHECK-NEXT: 1 5 0.50 * testw $511, (%rax) +# CHECK-NEXT: 1 1 0.50 testw $7, %di +# CHECK-NEXT: 1 5 0.50 * testw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 testw %si, %di +# CHECK-NEXT: 1 5 0.50 * testw %si, (%rax) +# CHECK-NEXT: 1 1 0.50 testl $665536, %eax +# CHECK-NEXT: 1 1 0.50 testl $665536, %edi +# CHECK-NEXT: 1 5 0.50 * testl $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 testl $7, %edi +# CHECK-NEXT: 1 5 0.50 * testl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 testl %esi, %edi +# CHECK-NEXT: 1 5 0.50 * testl %esi, (%rax) +# CHECK-NEXT: 1 1 0.50 testq $665536, %rax +# CHECK-NEXT: 1 1 0.50 testq $665536, %rdi +# CHECK-NEXT: 1 5 0.50 * testq $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 testq $7, %rdi +# CHECK-NEXT: 1 5 0.50 * testq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 testq %rsi, %rdi +# CHECK-NEXT: 1 5 0.50 * testq %rsi, (%rax) +# CHECK-NEXT: 1 100 0.50 * U ud2 +# CHECK-NEXT: 4 2 1.00 xaddb %bl, %cl +# CHECK-NEXT: 4 6 1.00 * * xaddb %bl, (%rcx) +# CHECK-NEXT: 4 2 1.00 xaddw %bx, %cx +# CHECK-NEXT: 4 6 1.00 * * xaddw %ax, (%rbx) +# CHECK-NEXT: 4 2 1.00 xaddl %ebx, %ecx +# CHECK-NEXT: 4 6 1.00 * * xaddl %eax, (%rbx) +# CHECK-NEXT: 4 2 1.00 xaddq %rbx, %rcx +# CHECK-NEXT: 4 6 1.00 * * xaddq %rax, (%rbx) +# CHECK-NEXT: 2 1 1.00 xchgb %bl, %cl +# CHECK-NEXT: 2 5 1.00 * * xchgb %bl, (%rbx) +# CHECK-NEXT: 2 1 1.00 xchgw %bx, %ax +# CHECK-NEXT: 2 2 1.00 xchgw %bx, %cx +# CHECK-NEXT: 2 5 1.00 * * xchgw %ax, (%rbx) +# CHECK-NEXT: 2 1 1.00 xchgl %ebx, %eax +# CHECK-NEXT: 2 1 1.00 xchgl %ebx, %ecx +# CHECK-NEXT: 2 5 1.00 * * xchgl %eax, (%rbx) +# CHECK-NEXT: 2 1 1.00 xchgq %rbx, %rax +# CHECK-NEXT: 2 1 1.00 xchgq %rbx, %rcx +# CHECK-NEXT: 2 5 1.00 * * xchgq %rax, (%rbx) +# CHECK-NEXT: 1 6 0.50 * xlatb +# CHECK-NEXT: 1 1 0.50 xorb $7, %al +# CHECK-NEXT: 1 1 0.50 xorb $7, %dil +# CHECK-NEXT: 2 6 1.00 * * xorb $7, (%rax) +# CHECK-NEXT: 1 1 0.50 xorb %sil, %dil +# CHECK-NEXT: 2 6 1.00 * * xorb %sil, (%rax) +# CHECK-NEXT: 1 5 0.50 * xorb (%rax), %dil +# CHECK-NEXT: 1 1 0.50 xorw $511, %ax +# CHECK-NEXT: 1 1 0.50 xorw $511, %di +# CHECK-NEXT: 2 6 1.00 * * xorw $511, (%rax) +# CHECK-NEXT: 1 1 0.50 xorw $7, %di +# CHECK-NEXT: 2 6 1.00 * * xorw $7, (%rax) +# CHECK-NEXT: 1 1 0.50 xorw %si, %di +# CHECK-NEXT: 2 6 1.00 * * xorw %si, (%rax) +# CHECK-NEXT: 1 5 0.50 * xorw (%rax), %di +# CHECK-NEXT: 1 1 0.50 xorl $665536, %eax +# CHECK-NEXT: 1 1 0.50 xorl $665536, %edi +# CHECK-NEXT: 2 6 1.00 * * xorl $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 xorl $7, %edi +# CHECK-NEXT: 2 6 1.00 * * xorl $7, (%rax) +# CHECK-NEXT: 1 1 0.50 xorl %esi, %edi +# CHECK-NEXT: 2 6 1.00 * * xorl %esi, (%rax) +# CHECK-NEXT: 1 5 0.50 * xorl (%rax), %edi +# CHECK-NEXT: 1 1 0.50 xorq $665536, %rax +# CHECK-NEXT: 1 1 0.50 xorq $665536, %rdi +# CHECK-NEXT: 2 6 1.00 * * xorq $665536, (%rax) +# CHECK-NEXT: 1 1 0.50 xorq $7, %rdi +# CHECK-NEXT: 2 6 1.00 * * xorq $7, (%rax) +# CHECK-NEXT: 1 1 0.50 xorq %rsi, %rdi +# CHECK-NEXT: 2 6 1.00 * * xorq %rsi, (%rax) +# CHECK-NEXT: 1 5 0.50 * xorq (%rax), %rdi # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: 160.00 - 571.83 221.33 222.00 571.83 316.00 316.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 262.00 262.00 - - 246.00 547.50 622.50 - - - - - - - - - - - - 64.00 # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb $7, %al -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb $7, %dil -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcb $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb %sil, %dil -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 adcb %sil, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcb (%rax), %dil -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcw $511, %ax -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcw $511, %di -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcw $511, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcw $7, %di -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcw $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcw %si, %di -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 adcw %si, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcl $665536, %eax -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcl $665536, %edi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcl $665536, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcl $7, %edi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcl $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcl %esi, %edi -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 adcl %esi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcq $665536, %rax -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcq $665536, %rdi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcq $665536, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcq $7, %rdi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcq $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcq %rsi, %rdi -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 adcq %rsi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 adcq (%rax), %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addb $7, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addb $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addb %sil, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addb %sil, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 addb (%rax), %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addw $511, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addw $511, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addw $511, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addw $7, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addw $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addw %si, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addw %si, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 addw (%rax), %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addl $665536, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addl $665536, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addl $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addl $7, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addl $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addl %esi, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addl %esi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 addl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addq $665536, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addq $665536, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addq $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addq $7, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - addq %rsi, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 addq %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 addq (%rax), %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andb $7, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andb $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andb %sil, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andb %sil, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andb (%rax), %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andw $511, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andw $511, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andw $511, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andw $7, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andw $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andw %si, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andw %si, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andw (%rax), %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andl $665536, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andl $665536, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andl $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andl $7, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andl $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andl %esi, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andl %esi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andq $665536, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andq $665536, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andq $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andq $7, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andq %rsi, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 andq %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andq (%rax), %rdi -# CHECK-NEXT: - - - 1.00 - - - - bsfw %si, %di -# CHECK-NEXT: - - - 1.00 - - - - bsrw %si, %di -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bsfw (%rax), %di -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bsrw (%rax), %di -# CHECK-NEXT: - - - 1.00 - - - - bsfl %esi, %edi -# CHECK-NEXT: - - - 1.00 - - - - bsrl %esi, %edi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bsfl (%rax), %edi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bsrl (%rax), %edi -# CHECK-NEXT: - - - 1.00 - - - - bsfq %rsi, %rdi -# CHECK-NEXT: - - - 1.00 - - - - bsrq %rsi, %rdi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bsfq (%rax), %rdi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bsrq (%rax), %rdi -# CHECK-NEXT: - - - 1.00 - - - - bswapl %eax -# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bswapq %rax -# CHECK-NEXT: - - 0.50 - - 0.50 - - btw %si, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - btcw %si, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - btrw %si, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - btsw %si, %di -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btw %si, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btcw %si, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btrw %si, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btsw %si, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - btw $7, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - btcw $7, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - btrw $7, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - btsw $7, %di -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 btw $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btcw $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btrw $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btsw $7, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - btl %esi, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btcl %esi, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btrl %esi, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btsl %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btl %esi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btcl %esi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btrl %esi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btsl %esi, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - btl $7, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btcl $7, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btrl $7, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btsl $7, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 btl $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btcl $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btrl $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btsl $7, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - btq %rsi, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btcq %rsi, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btrq %rsi, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btsq %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btq %rsi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btcq %rsi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btrq %rsi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 1.83 1.00 1.00 btsq %rsi, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - btq $7, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btcq $7, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btrq $7, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - btsq $7, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 btq $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btcq $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btrq $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 btsq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cbtw -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cwtl -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cltq -# CHECK-NEXT: - - 1.33 0.33 - 0.33 - - cwtd -# CHECK-NEXT: - - 0.50 - - 0.50 - - cltd -# CHECK-NEXT: - - 0.50 - - 0.50 - - cqto -# CHECK-NEXT: - - - - - - - - clc -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cld -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmc -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpb $7, %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpb $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpb %sil, %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpb %sil, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpb (%rax), %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpw $511, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpw $511, %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpw $511, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpw $7, %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpw $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpw %si, %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpw %si, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpw (%rax), %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpl $665536, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpl $665536, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpl $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpl $7, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpl $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpl %esi, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpl %esi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpq $665536, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpq $665536, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpq $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpq $7, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cmpq %rsi, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpq %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 cmpq (%rax), %rdi -# CHECK-NEXT: - - 1.00 1.00 - 1.00 1.00 1.00 cmpsb %es:(%rdi), (%rsi) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 1.00 1.00 cmpsw %es:(%rdi), (%rsi) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 1.00 1.00 cmpsl %es:(%rdi), (%rsi) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 1.00 1.00 cmpsq %es:(%rdi), (%rsi) -# CHECK-NEXT: - - 1.50 1.00 - 1.50 - - cmpxchgb %cl, %bl -# CHECK-NEXT: - - 0.33 0.33 1.00 2.33 1.00 1.00 cmpxchgb %cl, (%rbx) -# CHECK-NEXT: - - 1.50 1.00 - 1.50 - - cmpxchgw %cx, %bx -# CHECK-NEXT: - - 0.33 0.33 1.00 2.33 1.00 1.00 cmpxchgw %cx, (%rbx) -# CHECK-NEXT: - - 1.50 1.00 - 1.50 - - cmpxchgl %ecx, %ebx -# CHECK-NEXT: - - 0.33 0.33 1.00 2.33 1.00 1.00 cmpxchgl %ecx, (%rbx) -# CHECK-NEXT: - - 1.50 1.00 - 1.50 - - cmpxchgq %rcx, %rbx -# CHECK-NEXT: - - 0.33 0.33 1.00 2.33 1.00 1.00 cmpxchgq %rcx, (%rbx) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - cpuid -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - decb %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 decb (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - decw %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 decw (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - decl %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 decl (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - decq %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 decq (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - divb %dil -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 divb (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - divw %si -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 divw (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - divl %edx -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 divl (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - divq %rcx -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 divq (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - idivb %dil -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 idivb (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - idivw %si -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 idivw (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - idivl %edx -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 idivl (%rax) -# CHECK-NEXT: 10.00 - 1.00 - - - - - idivq %rcx -# CHECK-NEXT: 10.00 - 1.00 - - - 0.50 0.50 idivq (%rax) -# CHECK-NEXT: - - - 1.00 - - - - imulb %dil -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imulb (%rax) -# CHECK-NEXT: - - 1.17 1.67 - 1.17 - - imulw %di -# CHECK-NEXT: - - 1.17 1.67 - 1.17 0.50 0.50 imulw (%rax) -# CHECK-NEXT: - - - 1.00 - - - - imulw %si, %di -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imulw (%rax), %di -# CHECK-NEXT: - - 0.33 1.33 - 0.33 - - imulw $511, %si, %di -# CHECK-NEXT: - - 0.33 1.33 - 0.33 0.50 0.50 imulw $511, (%rax), %di -# CHECK-NEXT: - - 0.33 1.33 - 0.33 - - imulw $7, %si, %di -# CHECK-NEXT: - - 0.33 1.33 - 0.33 0.50 0.50 imulw $7, (%rax), %di -# CHECK-NEXT: - - 0.83 1.33 - 0.83 - - imull %edi -# CHECK-NEXT: - - 0.83 1.33 - 0.83 0.50 0.50 imull (%rax) -# CHECK-NEXT: - - - 1.00 - - - - imull %esi, %edi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imull (%rax), %edi -# CHECK-NEXT: - - - 1.00 - - - - imull $665536, %esi, %edi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imull $665536, (%rax), %edi -# CHECK-NEXT: - - - 1.00 - - - - imull $7, %esi, %edi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imull $7, (%rax), %edi -# CHECK-NEXT: - - 1.00 1.00 - - - - imulq %rdi -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 imulq (%rax) -# CHECK-NEXT: - - - 1.00 - - - - imulq %rsi, %rdi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imulq (%rax), %rdi -# CHECK-NEXT: - - - 1.00 - - - - imulq $665536, %rsi, %rdi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imulq $665536, (%rax), %rdi -# CHECK-NEXT: - - - 1.00 - - - - imulq $7, %rsi, %rdi -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 imulq $7, (%rax), %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - inb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - inb %dx, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - inw $7, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - inw %dx, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - inl $7, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - inl %dx, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incb %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incb (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incw %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incw (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incl %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incl (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incq %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incq (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - insb %dx, %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - insw %dx, %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - insl %dx, %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - int $7 -# CHECK-NEXT: - - 0.50 - - 0.50 - - lahf -# CHECK-NEXT: - - 0.67 0.67 - 0.67 0.50 0.50 lodsb (%rsi), %al -# CHECK-NEXT: - - 0.67 0.67 - 0.67 0.50 0.50 lodsw (%rsi), %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 lodsl (%rsi), %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 lodsq (%rsi), %rax -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 movsb (%rsi), %es:(%rdi) -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 movsw (%rsi), %es:(%rdi) -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 movsl (%rsi), %es:(%rdi) -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 movsq (%rsi), %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movsbw %al, %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movzbw %al, %di -# CHECK-NEXT: - - - - - - 0.50 0.50 movsbw (%rax), %di -# CHECK-NEXT: - - - - - - 0.50 0.50 movzbw (%rax), %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movsbl %al, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movzbl %al, %edi -# CHECK-NEXT: - - - - - - 0.50 0.50 movsbl (%rax), %edi -# CHECK-NEXT: - - - - - - 0.50 0.50 movzbl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movsbq %al, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movzbq %al, %rdi -# CHECK-NEXT: - - - - - - 0.50 0.50 movsbq (%rax), %rdi -# CHECK-NEXT: - - - - - - 0.50 0.50 movzbq (%rax), %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movswl %ax, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movzwl %ax, %edi -# CHECK-NEXT: - - - - - - 0.50 0.50 movswl (%rax), %edi -# CHECK-NEXT: - - - - - - 0.50 0.50 movzwl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movswq %ax, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movzwq %ax, %rdi -# CHECK-NEXT: - - - - - - 0.50 0.50 movswq (%rax), %rdi -# CHECK-NEXT: - - - - - - 0.50 0.50 movzwq (%rax), %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - movslq %eax, %rdi -# CHECK-NEXT: - - - - - - 0.50 0.50 movslq (%rax), %rdi -# CHECK-NEXT: - - - 1.00 - - - - mulb %dil -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulb (%rax) -# CHECK-NEXT: - - 1.17 1.67 - 1.17 - - mulw %si -# CHECK-NEXT: - - 1.17 1.67 - 1.17 0.50 0.50 mulw (%rax) -# CHECK-NEXT: - - 0.83 1.33 - 0.83 - - mull %edx -# CHECK-NEXT: - - 0.83 1.33 - 0.83 0.50 0.50 mull (%rax) -# CHECK-NEXT: - - 1.00 1.00 - - - - mulq %rcx -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 mulq (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - negb %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 negb (%r8) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - negw %si -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 negw (%r9) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - negl %edx -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 negl (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - negq %rcx -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 negq (%r10) -# CHECK-NEXT: - - - - - - - - nop -# CHECK-NEXT: - - - - - - - - nopw %di -# CHECK-NEXT: - - - - - - - - nopw (%rcx) -# CHECK-NEXT: - - - - - - - - nopl %esi -# CHECK-NEXT: - - - - - - - - nopl (%r8) -# CHECK-NEXT: - - - - - - - - nopq %rdx -# CHECK-NEXT: - - - - - - - - nopq (%r9) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - notb %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 notb (%r8) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - notw %si -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 notw (%r9) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - notl %edx -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 notl (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - notq %rcx -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 notq (%r10) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orb $7, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orb $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orb %sil, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orb %sil, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 orb (%rax), %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orw $511, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orw $511, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orw $511, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orw $7, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orw $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orw %si, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orw %si, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 orw (%rax), %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orl $665536, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orl $665536, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orl $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orl $7, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orl $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orl %esi, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orl %esi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 orl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orq $665536, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orq $665536, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orq $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orq $7, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - orq %rsi, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 orq %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 orq (%rax), %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outb %al, $7 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outb %al, %dx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outw %ax, $7 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outw %ax, %dx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outl %eax, $7 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outl %eax, %dx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outsb (%rsi), %dx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outsw (%rsi), %dx -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - outsl (%rsi), %dx -# CHECK-NEXT: - - 1.00 1.00 - 2.00 - - pause -# CHECK-NEXT: - - 1.50 - - 1.50 - - rclb %dil -# CHECK-NEXT: - - 1.50 - - 1.50 - - rcrb %dil -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclb (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrb (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rclb $7, %dil -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrb $7, %dil -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclb $7, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrb $7, (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rclb %cl, %dil -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrb %cl, %dil -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclb %cl, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrb %cl, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - rclw %di -# CHECK-NEXT: - - 1.50 - - 1.50 - - rcrw %di -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclw (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrw (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rclw $7, %di -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrw $7, %di -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclw $7, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrw $7, (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rclw %cl, %di -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrw %cl, %di -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclw %cl, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrw %cl, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - rcll %edi -# CHECK-NEXT: - - 1.50 - - 1.50 - - rcrl %edi -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcll (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrl (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcll $7, %edi -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrl $7, %edi -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcll $7, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrl $7, (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcll %cl, %edi -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrl %cl, %edi -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcll %cl, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrl %cl, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - rclq %rdi -# CHECK-NEXT: - - 1.50 - - 1.50 - - rcrq %rdi -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclq (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrq (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rclq $7, %rdi -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrq $7, %rdi -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclq $7, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrq $7, (%rax) -# CHECK-NEXT: - - 4.00 - - 4.00 - - rclq %cl, %rdi -# CHECK-NEXT: - - 4.00 - - 4.00 - - rcrq %cl, %rdi -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rclq %cl, (%rax) -# CHECK-NEXT: - - 3.50 - - 3.50 2.00 2.00 rcrq %cl, (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - rolb %dil -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorb %dil -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolb (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorb (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - rolb $7, %dil -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorb $7, %dil -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolb $7, (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorb $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - rolb %cl, %dil -# CHECK-NEXT: - - 1.50 - - 1.50 - - rorb %cl, %dil -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rolb %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rorb %cl, (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - rolw %di -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorw %di -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolw (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorw (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - rolw $7, %di -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorw $7, %di -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolw $7, (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorw $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - rolw %cl, %di -# CHECK-NEXT: - - 1.50 - - 1.50 - - rorw %cl, %di -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rolw %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rorw %cl, (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - roll %edi -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorl %edi -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 roll (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorl (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - roll $7, %edi -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorl $7, %edi -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 roll $7, (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorl $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - roll %cl, %edi -# CHECK-NEXT: - - 1.50 - - 1.50 - - rorl %cl, %edi -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 roll %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rorl %cl, (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - rolq %rdi -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorq %rdi -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolq (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorq (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - rolq $7, %rdi -# CHECK-NEXT: - - 1.00 - - 1.00 - - rorq $7, %rdi -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolq $7, (%rax) -# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorq $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - rolq %cl, %rdi -# CHECK-NEXT: - - 1.50 - - 1.50 - - rorq %cl, %rdi -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rolq %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rorq %cl, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sahf -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarb %dil -# CHECK-NEXT: - - 0.50 - - 0.50 - - shlb %dil -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrb %dil -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarb (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlb (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrb (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarb $7, %dil -# CHECK-NEXT: - - 0.50 - - 0.50 - - shlb $7, %dil -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrb $7, %dil -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarb $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlb $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrb $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - sarb %cl, %dil -# CHECK-NEXT: - - 1.50 - - 1.50 - - shlb %cl, %dil -# CHECK-NEXT: - - 1.50 - - 1.50 - - shrb %cl, %dil -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 sarb %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shlb %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shrb %cl, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarw %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - shlw %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrw %di -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarw (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlw (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrw (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarw $7, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - shlw $7, %di -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrw $7, %di -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarw $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlw $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrw $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - sarw %cl, %di -# CHECK-NEXT: - - 1.50 - - 1.50 - - shlw %cl, %di -# CHECK-NEXT: - - 1.50 - - 1.50 - - shrw %cl, %di -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 sarw %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shlw %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shrw %cl, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarl %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shll %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrl %edi -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarl (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shll (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrl (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarl $7, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shll $7, %edi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrl $7, %edi -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarl $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shll $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrl $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - sarl %cl, %edi -# CHECK-NEXT: - - 1.50 - - 1.50 - - shll %cl, %edi -# CHECK-NEXT: - - 1.50 - - 1.50 - - shrl %cl, %edi -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 sarl %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shll %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shrl %cl, (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarq %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shlq %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrq %rdi -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarq (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlq (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrq (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sarq $7, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shlq $7, %rdi -# CHECK-NEXT: - - 0.50 - - 0.50 - - shrq $7, %rdi -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarq $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlq $7, (%rax) -# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrq $7, (%rax) -# CHECK-NEXT: - - 1.50 - - 1.50 - - sarq %cl, %rdi -# CHECK-NEXT: - - 1.50 - - 1.50 - - shlq %cl, %rdi -# CHECK-NEXT: - - 1.50 - - 1.50 - - shrq %cl, %rdi -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 sarq %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shlq %cl, (%rax) -# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 shrq %cl, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbb $7, %al -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbb $7, %dil -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 sbbb $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbb %sil, %dil -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 sbbb %sil, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 sbbb (%rax), %dil -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbw $511, %ax -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbw $511, %di -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 sbbw $511, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbw $7, %di -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 sbbw $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbw %si, %di -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 sbbw %si, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 sbbw (%rax), %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbl $665536, %eax -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbl $665536, %edi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 sbbl $665536, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbl $7, %edi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 sbbl $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbl %esi, %edi -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 sbbl %esi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 sbbl (%rax), %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbq $665536, %rax -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbq $665536, %rdi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 sbbq $665536, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbq $7, %rdi -# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 sbbq $7, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - sbbq %rsi, %rdi -# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 sbbq %rsi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 0.50 0.50 sbbq (%rax), %rdi -# CHECK-NEXT: - - 0.67 0.67 - 0.67 - - scasb %es:(%rdi), %al -# CHECK-NEXT: - - 0.67 0.67 - 0.67 - - scasw %es:(%rdi), %ax -# CHECK-NEXT: - - 0.67 0.67 - 0.67 - - scasl %es:(%rdi), %eax -# CHECK-NEXT: - - 0.67 0.67 - 0.67 - - scasq %es:(%rdi), %rax -# CHECK-NEXT: - - 0.50 - - 0.50 - - seto %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 seto (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setno %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setno (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setb %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setb (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setae %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setae (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sete %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 sete (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setne %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setne (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - seta %al -# CHECK-NEXT: - - 1.00 - 1.00 1.00 0.50 0.50 seta (%rax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - setbe %al -# CHECK-NEXT: - - 1.00 - 1.00 1.00 0.50 0.50 setbe (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - sets %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 sets (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setns %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setns (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setp %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setp (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setnp %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setnp (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setl %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setl (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setge %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setge (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setg %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setg (%rax) -# CHECK-NEXT: - - 0.50 - - 0.50 - - setle %al -# CHECK-NEXT: - - 0.50 - 1.00 0.50 0.50 0.50 setle (%rax) -# CHECK-NEXT: - - 1.83 0.33 - 1.83 - - shldw %cl, %si, %di -# CHECK-NEXT: - - 1.83 0.33 - 1.83 - - shrdw %cl, %si, %di -# CHECK-NEXT: - - 1.83 0.33 1.00 1.83 1.00 1.00 shldw %cl, %si, (%rax) -# CHECK-NEXT: - - 1.83 0.33 1.00 1.83 1.00 1.00 shrdw %cl, %si, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - shldw $7, %si, %di -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - shrdw $7, %si, %di -# CHECK-NEXT: - - 0.83 0.33 1.00 0.83 1.00 1.00 shldw $7, %si, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 0.83 1.00 1.00 shrdw $7, %si, (%rax) -# CHECK-NEXT: - - 1.83 0.33 - 1.83 - - shldl %cl, %esi, %edi -# CHECK-NEXT: - - 1.83 0.33 - 1.83 - - shrdl %cl, %esi, %edi -# CHECK-NEXT: - - 1.83 0.33 1.00 1.83 1.00 1.00 shldl %cl, %esi, (%rax) -# CHECK-NEXT: - - 1.83 0.33 1.00 1.83 1.00 1.00 shrdl %cl, %esi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - shldl $7, %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - shrdl $7, %esi, %edi -# CHECK-NEXT: - - 0.83 0.33 1.00 0.83 1.00 1.00 shldl $7, %esi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 0.83 1.00 1.00 shrdl $7, %esi, (%rax) -# CHECK-NEXT: - - 1.83 0.33 - 1.83 - - shldq %cl, %rsi, %rdi -# CHECK-NEXT: - - 1.83 0.33 - 1.83 - - shrdq %cl, %rsi, %rdi -# CHECK-NEXT: - - 1.83 0.33 1.00 1.83 1.00 1.00 shldq %cl, %rsi, (%rax) -# CHECK-NEXT: - - 1.83 0.33 1.00 1.83 1.00 1.00 shrdq %cl, %rsi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - shldq $7, %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - shrdq $7, %rsi, %rdi -# CHECK-NEXT: - - 0.83 0.33 1.00 0.83 1.00 1.00 shldq $7, %rsi, (%rax) -# CHECK-NEXT: - - 0.83 0.33 1.00 0.83 1.00 1.00 shrdq $7, %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - stc -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - std -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 0.50 0.50 stosb %al, %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 0.50 0.50 stosw %ax, %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 0.50 0.50 stosl %eax, %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 0.50 0.50 stosq %rax, %es:(%rdi) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subb $7, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subb $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subb %sil, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subb %sil, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 subb (%rax), %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subw $511, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subw $511, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subw $511, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subw $7, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subw $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subw %si, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subw %si, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 subw (%rax), %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subl $665536, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subl $665536, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subl $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subl $7, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subl $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subl %esi, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subl %esi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 subl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subq $665536, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subq $665536, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subq $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subq $7, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - subq %rsi, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 subq %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 subq (%rax), %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testb $7, %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testb $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testb %sil, %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testb %sil, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testw $511, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testw $511, %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testw $511, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testw $7, %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testw $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testw %si, %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testw %si, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testl $665536, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testl $665536, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testl $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testl $7, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testl $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testl %esi, %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testl %esi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testq $665536, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testq $665536, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testq $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testq $7, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - testq %rsi, %rdi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 testq %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - ud2 -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xaddb %bl, %cl -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 xaddb %bl, (%rcx) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xaddw %bx, %cx -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 xaddw %ax, (%rbx) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xaddl %ebx, %ecx -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 xaddl %eax, (%rbx) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xaddq %rbx, %rcx -# CHECK-NEXT: - - 0.67 0.67 1.00 0.67 1.00 1.00 xaddq %rax, (%rbx) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xchgb %bl, %cl -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xchgb %bl, (%rbx) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xchgw %bx, %ax -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xchgw %bx, %cx -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xchgw %ax, (%rbx) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xchgl %ebx, %eax -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xchgl %ebx, %ecx -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xchgl %eax, (%rbx) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xchgq %rbx, %rax -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - xchgq %rbx, %rcx -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xchgq %rax, (%rbx) -# CHECK-NEXT: - - - - - - 0.50 0.50 xlatb -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorb $7, %al -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorb $7, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorb $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorb %sil, %dil -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorb %sil, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 xorb (%rax), %dil -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorw $511, %ax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorw $511, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorw $511, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorw $7, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorw $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorw %si, %di -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorw %si, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 xorw (%rax), %di -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorl $665536, %eax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorl $665536, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorl $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorl $7, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorl $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorl %esi, %edi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorl %esi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 xorl (%rax), %edi -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorq $665536, %rax -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorq $665536, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorq $665536, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorq $7, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorq $7, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - xorq %rsi, %rdi -# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 xorq %rsi, (%rax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 xorq (%rax), %rdi +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcb $7, %al +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcb $7, %dil +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcb $7, (%rax) +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcb %sil, %dil +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcb %sil, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adcb (%rax), %dil +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcw $511, %ax +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcw $511, %di +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcw $511, (%rax) +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcw $7, %di +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcw $7, (%rax) +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcw %si, %di +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcw %si, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adcw (%rax), %di +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcl $665536, %eax +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcl $665536, %edi +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcl $665536, (%rax) +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcl $7, %edi +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcl $7, (%rax) +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcl %esi, %edi +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcl %esi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adcl (%rax), %edi +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcq $665536, %rax +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcq $665536, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcq $665536, (%rax) +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcq $7, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcq $7, (%rax) +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - adcq %rsi, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 1.00 1.00 - - - - - - - - - - - - - adcq %rsi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 1.00 - - - - - - - - - - - - - adcq (%rax), %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addb $7, %al +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addb $7, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addb $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addb %sil, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addb %sil, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - addb (%rax), %dil +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addw $511, %ax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addw $511, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addw $511, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addw $7, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addw $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addw %si, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addw %si, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - addw (%rax), %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl $665536, %eax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl $665536, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addl $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl $7, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addl $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl %esi, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addl %esi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - addl (%rax), %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addq $665536, %rax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addq $665536, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addq $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addq $7, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addq $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addq %rsi, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - addq %rsi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - addq (%rax), %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andb $7, %al +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andb $7, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - andb $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andb %sil, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - andb %sil, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - andb (%rax), %dil +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andw $511, %ax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andw $511, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - andw $511, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andw $7, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - andw $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andw %si, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - andw %si, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - andw (%rax), %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andl $665536, %eax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andl $665536, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - andl $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - andl $7, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - andl $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - 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- - - - seta %al +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - seta (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setbe %al +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - setbe (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - sets %al +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - sets (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setns %al +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - setns (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setp %al +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - setp (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setnp %al +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - setnp (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setl %al +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - setl (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setge %al +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - setge (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setg %al +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - setg (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - setle %al +# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - setle (%rax) +# CHECK-NEXT: - - - - - 4.00 4.00 - - - - - - - - - - - - - shldw %cl, %si, %di +# CHECK-NEXT: - - - - - 4.00 4.00 - - - - - - - - - - - - - shrdw %cl, %si, %di +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shldw %cl, %si, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shrdw %cl, %si, (%rax) +# CHECK-NEXT: - - - - - 3.00 3.00 - - - - - - - - - - - - - shldw $7, %si, %di +# CHECK-NEXT: - - - - - 3.00 3.00 - - - - - - - - - - - - - shrdw $7, %si, %di +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shldw $7, %si, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shrdw $7, %si, (%rax) +# CHECK-NEXT: - - - - - 4.00 4.00 - - - - - - - - - - - - - shldl %cl, %esi, %edi +# CHECK-NEXT: - - - - - 4.00 4.00 - - - - - - - - - - - - - shrdl %cl, %esi, %edi +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shldl %cl, %esi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shrdl %cl, %esi, (%rax) +# CHECK-NEXT: - - - - - 3.00 3.00 - - - - - - - - - - - - - shldl $7, %esi, %edi +# CHECK-NEXT: - - - - - 3.00 3.00 - - - - - - - - - - - - - shrdl $7, %esi, %edi +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shldl $7, %esi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shrdl $7, %esi, (%rax) +# CHECK-NEXT: - - - - - 4.00 4.00 - - - - - - - - - - - - - shldq %cl, %rsi, %rdi +# CHECK-NEXT: - - - - - 4.00 4.00 - - - - - - - - - - - - - shrdq %cl, %rsi, %rdi +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shldq %cl, %rsi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shrdq %cl, %rsi, (%rax) +# CHECK-NEXT: - - - - - 3.00 3.00 - - - - - - - - - - - - - shldq $7, %rsi, %rdi +# CHECK-NEXT: - - - - - 3.00 3.00 - - - - - - - - - - - - - shrdq $7, %rsi, %rdi +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shldq $7, %rsi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 11.00 11.00 - - - - - - - - - - - - - shrdq $7, %rsi, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - stc +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - std +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - stosb %al, %es:(%rdi) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - stosw %ax, %es:(%rdi) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - stosl %eax, %es:(%rdi) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - stosq %rax, %es:(%rdi) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subb $7, %al +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subb $7, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subb $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subb %sil, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subb %sil, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - subb (%rax), %dil +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subw $511, %ax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subw $511, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subw $511, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subw $7, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subw $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subw %si, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subw %si, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - subw (%rax), %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subl $665536, %eax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subl $665536, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subl $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subl $7, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subl $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subl %esi, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subl %esi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - subl (%rax), %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subq $665536, %rax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subq $665536, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subq $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subq $7, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subq $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - subq %rsi, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - subq %rsi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - subq (%rax), %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testb $7, %al +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testb $7, %dil +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testb $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testb %sil, %dil +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testb %sil, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testw $511, %ax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testw $511, %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testw $511, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testw $7, %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testw $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testw %si, %di +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testw %si, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testl $665536, %eax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testl $665536, %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testl $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testl $7, %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testl $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testl %esi, %edi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testl %esi, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testq $665536, %rax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testq $665536, %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testq $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testq $7, %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testq $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - testq %rsi, %rdi +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - testq %rsi, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - ud2 +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddb %bl, %cl +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddb %bl, (%rcx) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddw %bx, %cx +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddw %ax, (%rbx) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddl %ebx, %ecx +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddl %eax, (%rbx) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddq %rbx, %rcx +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xaddq %rax, (%rbx) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xchgb %bl, %cl +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xchgb %bl, (%rbx) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xchgw %bx, %ax +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xchgw %bx, %cx +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xchgw %ax, (%rbx) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xchgl %ebx, %eax +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xchgl %ebx, %ecx +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xchgl %eax, (%rbx) +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xchgq %rbx, %rax +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - xchgq %rbx, %rcx +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xchgq %rax, (%rbx) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xlatb +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorb $7, %al +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorb $7, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorb $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorb %sil, %dil +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorb %sil, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - xorb (%rax), %dil +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorw $511, %ax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorw $511, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorw $511, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorw $7, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorw $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorw %si, %di +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorw %si, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - xorw (%rax), %di +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorl $665536, %eax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorl $665536, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorl $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorl $7, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorl $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorl %esi, %edi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorl %esi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - xorl (%rax), %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorq $665536, %rax +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorq $665536, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorq $665536, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorq $7, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorq $7, (%rax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - xorq %rsi, %rdi +# CHECK-NEXT: 1.00 1.00 - - - 0.50 0.50 - - - - - - - - - - - - - xorq %rsi, (%rax) +# CHECK-NEXT: 0.50 0.50 - - - 0.50 0.50 - - - - - - - - - - - - - xorq (%rax), %rdi Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x87.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x87.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-x87.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s f2xm1 @@ -206,316 +206,328 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 100 0.33 U f2xm1 +# CHECK-NEXT: 1 100 0.50 U f2xm1 # CHECK-NEXT: 1 1 1.00 U fabs -# CHECK-NEXT: 1 3 1.00 U fadd %st(0), %st(1) -# CHECK-NEXT: 1 3 1.00 U fadd %st(2) -# CHECK-NEXT: 2 10 1.00 * U fadds (%ecx) -# CHECK-NEXT: 2 10 1.00 * U faddl (%ecx) -# CHECK-NEXT: 1 3 1.00 U faddp %st(1) -# CHECK-NEXT: 1 3 1.00 U faddp %st(2) -# CHECK-NEXT: 3 13 2.00 * U fiadds (%ecx) -# CHECK-NEXT: 3 13 2.00 * U fiaddl (%ecx) -# CHECK-NEXT: 1 100 0.33 U fbld (%ecx) -# CHECK-NEXT: 1 100 0.33 U fbstp (%eax) +# CHECK-NEXT: 1 5 1.00 U fadd %st(0), %st(1) +# CHECK-NEXT: 1 5 1.00 U fadd %st(2) +# CHECK-NEXT: 1 10 1.00 * U fadds (%ecx) +# CHECK-NEXT: 1 10 1.00 * U faddl (%ecx) +# CHECK-NEXT: 1 5 1.00 U faddp %st(1) +# CHECK-NEXT: 1 5 1.00 U faddp %st(2) +# CHECK-NEXT: 1 10 1.00 * U fiadds (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fiaddl (%ecx) +# CHECK-NEXT: 1 100 0.50 U fbld (%ecx) +# CHECK-NEXT: 1 100 0.50 U fbstp (%eax) # CHECK-NEXT: 1 1 1.00 U fchs -# CHECK-NEXT: 1 100 0.33 U fnclex -# CHECK-NEXT: 3 3 2.00 U fcmovb %st(1), %st(0) -# CHECK-NEXT: 3 3 2.00 U fcmovbe %st(1), %st(0) -# CHECK-NEXT: 3 3 2.00 U fcmove %st(1), %st(0) -# CHECK-NEXT: 3 3 2.00 U fcmovnb %st(1), %st(0) -# CHECK-NEXT: 3 3 2.00 U fcmovnbe %st(1), %st(0) -# CHECK-NEXT: 3 3 2.00 U fcmovne %st(1), %st(0) -# CHECK-NEXT: 3 3 2.00 U fcmovnu %st(1), %st(0) -# CHECK-NEXT: 3 3 2.00 U fcmovu %st(1), %st(0) -# CHECK-NEXT: 1 1 1.00 U fcom %st(1) -# CHECK-NEXT: 1 1 1.00 U fcom %st(3) -# CHECK-NEXT: 2 8 1.00 U fcoms (%ecx) -# CHECK-NEXT: 2 8 1.00 U fcoml (%eax) -# CHECK-NEXT: 1 1 1.00 U fcomp %st(1) -# CHECK-NEXT: 1 1 1.00 U fcomp %st(3) -# CHECK-NEXT: 2 8 1.00 U fcomps (%ecx) -# CHECK-NEXT: 2 8 1.00 U fcompl (%eax) -# CHECK-NEXT: 1 100 0.33 U fcompp -# CHECK-NEXT: 3 3 1.00 U fcomi %st(3) -# CHECK-NEXT: 3 3 1.00 U fcompi %st(3) -# CHECK-NEXT: 1 100 0.33 U fcos -# CHECK-NEXT: 1 1 1.00 U fdecstp -# CHECK-NEXT: 1 14 14.00 U fdiv %st(0), %st(1) -# CHECK-NEXT: 1 14 14.00 U fdiv %st(2) -# CHECK-NEXT: 2 31 1.00 * U fdivs (%ecx) -# CHECK-NEXT: 2 31 1.00 * U fdivl (%eax) -# CHECK-NEXT: 1 14 14.00 U fdivp %st(1) -# CHECK-NEXT: 1 14 14.00 U fdivp %st(2) -# CHECK-NEXT: 3 34 1.00 * U fidivs (%ecx) -# CHECK-NEXT: 3 34 1.00 * U fidivl (%eax) -# CHECK-NEXT: 1 14 14.00 U fdivr %st(0), %st(1) -# CHECK-NEXT: 1 14 14.00 U fdivr %st(2) -# CHECK-NEXT: 2 31 1.00 * U fdivrs (%ecx) -# CHECK-NEXT: 2 31 1.00 * U fdivrl (%eax) -# CHECK-NEXT: 1 14 14.00 U fdivrp %st(1) -# CHECK-NEXT: 1 14 14.00 U fdivrp %st(2) -# CHECK-NEXT: 3 34 1.00 * U fidivrs (%ecx) -# CHECK-NEXT: 3 34 1.00 * U fidivrl (%eax) -# CHECK-NEXT: 1 1 1.00 U ffree %st(0) -# CHECK-NEXT: 3 11 2.00 U ficoms (%ecx) -# CHECK-NEXT: 3 11 2.00 U ficoml (%eax) -# CHECK-NEXT: 3 11 2.00 U ficomps (%ecx) -# CHECK-NEXT: 3 11 2.00 U ficompl (%eax) -# CHECK-NEXT: 2 10 1.00 * U filds (%edx) -# CHECK-NEXT: 2 10 1.00 * U fildl (%ecx) -# CHECK-NEXT: 2 10 1.00 * U fildll (%eax) -# CHECK-NEXT: 1 1 1.00 U fincstp -# CHECK-NEXT: 4 5 1.33 U fninit -# CHECK-NEXT: 4 9 1.00 * U fists (%edx) -# CHECK-NEXT: 4 9 1.00 * U fistl (%ecx) -# CHECK-NEXT: 4 9 1.00 * U fistps (%edx) -# CHECK-NEXT: 4 9 1.00 * U fistpl (%ecx) -# CHECK-NEXT: 4 9 1.00 * U fistpll (%eax) -# CHECK-NEXT: 3 5 1.00 * U fisttps (%edx) -# CHECK-NEXT: 3 5 1.00 * U fisttpl (%ecx) -# CHECK-NEXT: 3 5 1.00 * U fisttpll (%eax) -# CHECK-NEXT: 1 1 1.00 U fld %st(0) -# CHECK-NEXT: 3 9 1.00 * U flds (%edx) -# CHECK-NEXT: 3 9 1.00 * U fldl (%ecx) -# CHECK-NEXT: 3 9 1.00 * U fldt (%eax) -# CHECK-NEXT: 5 8 2.00 * U fldcw (%eax) -# CHECK-NEXT: 1 100 0.33 U fldenv (%eax) -# CHECK-NEXT: 2 1 1.00 U fld1 -# CHECK-NEXT: 2 1 1.00 U fldl2e -# CHECK-NEXT: 2 1 1.00 U fldl2t -# CHECK-NEXT: 2 1 1.00 U fldlg2 -# CHECK-NEXT: 2 1 1.00 U fldln2 -# CHECK-NEXT: 2 1 1.00 U fldpi -# CHECK-NEXT: 1 1 1.00 U fldz +# CHECK-NEXT: 1 100 0.50 U fnclex +# CHECK-NEXT: 1 1 1.00 U fcmovb %st(1), %st(0) +# CHECK-NEXT: 1 1 1.00 U fcmovbe %st(1), %st(0) +# CHECK-NEXT: 1 1 1.00 U fcmove %st(1), %st(0) +# CHECK-NEXT: 1 1 1.00 U fcmovnb %st(1), %st(0) +# CHECK-NEXT: 1 1 1.00 U fcmovnbe %st(1), %st(0) +# CHECK-NEXT: 1 1 1.00 U fcmovne %st(1), %st(0) +# CHECK-NEXT: 1 1 1.00 U fcmovnu %st(1), %st(0) +# CHECK-NEXT: 1 1 1.00 U fcmovu %st(1), %st(0) +# CHECK-NEXT: 2 1 1.00 U fcom %st(1) +# CHECK-NEXT: 2 1 1.00 U fcom %st(3) +# CHECK-NEXT: 1 6 1.00 U fcoms (%ecx) +# CHECK-NEXT: 1 6 1.00 U fcoml (%eax) +# CHECK-NEXT: 2 1 1.00 U fcomp %st(1) +# CHECK-NEXT: 2 1 1.00 U fcomp %st(3) +# CHECK-NEXT: 1 6 1.00 U fcomps (%ecx) +# CHECK-NEXT: 1 6 1.00 U fcompl (%eax) +# CHECK-NEXT: 1 100 0.50 U fcompp +# CHECK-NEXT: 2 1 1.00 U fcomi %st(3) +# CHECK-NEXT: 2 1 1.00 U fcompi %st(3) +# CHECK-NEXT: 1 100 0.50 U fcos +# CHECK-NEXT: 1 100 0.50 U fdecstp +# CHECK-NEXT: 1 9 9.50 U fdiv %st(0), %st(1) +# CHECK-NEXT: 1 9 9.50 U fdiv %st(2) +# CHECK-NEXT: 1 14 9.50 * U fdivs (%ecx) +# CHECK-NEXT: 1 14 9.50 * U fdivl (%eax) +# CHECK-NEXT: 1 9 9.50 U fdivp %st(1) +# CHECK-NEXT: 1 9 9.50 U fdivp %st(2) +# CHECK-NEXT: 1 14 9.50 * U fidivs (%ecx) +# CHECK-NEXT: 1 14 9.50 * U fidivl (%eax) +# CHECK-NEXT: 1 9 9.50 U fdivr %st(0), %st(1) +# CHECK-NEXT: 1 9 9.50 U fdivr %st(2) +# CHECK-NEXT: 1 14 9.50 * U fdivrs (%ecx) +# CHECK-NEXT: 1 14 9.50 * U fdivrl (%eax) +# CHECK-NEXT: 1 9 9.50 U fdivrp %st(1) +# CHECK-NEXT: 1 9 9.50 U fdivrp %st(2) +# CHECK-NEXT: 1 14 9.50 * U fidivrs (%ecx) +# CHECK-NEXT: 1 14 9.50 * U fidivrl (%eax) +# CHECK-NEXT: 1 100 0.50 U ffree %st(0) +# CHECK-NEXT: 2 6 1.00 U ficoms (%ecx) +# CHECK-NEXT: 2 6 1.00 U ficoml (%eax) +# CHECK-NEXT: 2 6 1.00 U ficomps (%ecx) +# CHECK-NEXT: 2 6 1.00 U ficompl (%eax) +# CHECK-NEXT: 1 5 0.50 * U filds (%edx) +# CHECK-NEXT: 1 5 0.50 * U fildl (%ecx) +# CHECK-NEXT: 1 5 0.50 * U fildll (%eax) +# CHECK-NEXT: 1 100 0.50 U fincstp +# CHECK-NEXT: 1 100 0.50 U fninit +# CHECK-NEXT: 1 1 0.50 * U fists (%edx) +# CHECK-NEXT: 1 1 0.50 * U fistl (%ecx) +# CHECK-NEXT: 1 1 0.50 * U fistps (%edx) +# CHECK-NEXT: 1 1 0.50 * U fistpl (%ecx) +# CHECK-NEXT: 1 1 0.50 * U fistpll (%eax) +# CHECK-NEXT: 1 1 0.50 * U fisttps (%edx) +# CHECK-NEXT: 1 1 0.50 * U fisttpl (%ecx) +# CHECK-NEXT: 1 1 0.50 * U fisttpll (%eax) +# CHECK-NEXT: 1 1 0.50 U fld %st(0) +# CHECK-NEXT: 1 5 0.50 * U flds (%edx) +# CHECK-NEXT: 1 5 0.50 * U fldl (%ecx) +# CHECK-NEXT: 1 5 0.50 * U fldt (%eax) +# CHECK-NEXT: 1 5 0.50 * U fldcw (%eax) +# CHECK-NEXT: 1 100 0.50 U fldenv (%eax) +# CHECK-NEXT: 1 3 1.00 U fld1 +# CHECK-NEXT: 1 3 1.00 U fldl2e +# CHECK-NEXT: 1 3 1.00 U fldl2t +# CHECK-NEXT: 1 3 1.00 U fldlg2 +# CHECK-NEXT: 1 3 1.00 U fldln2 +# CHECK-NEXT: 1 3 1.00 U fldpi +# CHECK-NEXT: 1 3 1.00 U fldz # CHECK-NEXT: 1 5 1.00 U fmul %st(0), %st(1) # CHECK-NEXT: 1 5 1.00 U fmul %st(2) -# CHECK-NEXT: 2 12 1.00 * U fmuls (%ecx) -# CHECK-NEXT: 2 12 1.00 * U fmull (%eax) +# CHECK-NEXT: 1 10 1.00 * U fmuls (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fmull (%eax) # CHECK-NEXT: 1 5 1.00 U fmulp %st(1) # CHECK-NEXT: 1 5 1.00 U fmulp %st(2) -# CHECK-NEXT: 3 15 1.00 * U fimuls (%ecx) -# CHECK-NEXT: 3 15 1.00 * U fimull (%eax) -# CHECK-NEXT: 1 1 1.00 U fnop -# CHECK-NEXT: 1 100 0.33 U fpatan -# CHECK-NEXT: 1 100 0.33 U fprem -# CHECK-NEXT: 1 100 0.33 U fprem1 -# CHECK-NEXT: 1 100 0.33 U fptan -# CHECK-NEXT: 1 100 0.33 U frndint -# CHECK-NEXT: 1 100 0.33 U frstor (%eax) -# CHECK-NEXT: 1 100 0.33 U fnsave (%eax) -# CHECK-NEXT: 1 100 0.33 U fscale -# CHECK-NEXT: 1 100 0.33 U fsin -# CHECK-NEXT: 1 100 0.33 U fsincos -# CHECK-NEXT: 1 24 24.00 U fsqrt -# CHECK-NEXT: 1 1 1.00 U fst %st(0) -# CHECK-NEXT: 3 6 1.00 * U fsts (%edx) -# CHECK-NEXT: 3 6 1.00 * U fstl (%ecx) -# CHECK-NEXT: 1 1 1.00 U fstp %st(0) -# CHECK-NEXT: 3 6 1.00 * U fstpl (%edx) -# CHECK-NEXT: 3 6 1.00 * U fstpl (%ecx) -# CHECK-NEXT: 3 6 1.00 * U fstpt (%eax) -# CHECK-NEXT: 4 7 1.00 * U fnstcw (%eax) -# CHECK-NEXT: 1 100 0.33 U fnstenv (%eax) -# CHECK-NEXT: 4 7 1.00 U fnstsw (%eax) -# CHECK-NEXT: 1 100 0.33 U frstor (%eax) -# CHECK-NEXT: 1 100 0.33 U wait -# CHECK-NEXT: 1 100 0.33 U fnsave (%eax) -# CHECK-NEXT: 1 3 1.00 U fsub %st(0), %st(1) -# CHECK-NEXT: 1 3 1.00 U fsub %st(2) -# CHECK-NEXT: 2 10 1.00 * U fsubs (%ecx) -# CHECK-NEXT: 2 10 1.00 * U fsubl (%eax) -# CHECK-NEXT: 1 3 1.00 U fsubp %st(1) -# CHECK-NEXT: 1 3 1.00 U fsubp %st(2) -# CHECK-NEXT: 3 13 2.00 * U fisubs (%ecx) -# CHECK-NEXT: 3 13 2.00 * U fisubl (%eax) -# CHECK-NEXT: 1 3 1.00 U fsubr %st(0), %st(1) -# CHECK-NEXT: 1 3 1.00 U fsubr %st(2) -# CHECK-NEXT: 2 10 1.00 * U fsubrs (%ecx) -# CHECK-NEXT: 2 10 1.00 * U fsubrl (%eax) -# CHECK-NEXT: 1 3 1.00 U fsubrp %st(1) -# CHECK-NEXT: 1 3 1.00 U fsubrp %st(2) -# CHECK-NEXT: 3 13 2.00 * U fisubrs (%ecx) -# CHECK-NEXT: 3 13 2.00 * U fisubrl (%eax) -# CHECK-NEXT: 1 3 1.00 U ftst -# CHECK-NEXT: 1 1 1.00 U fucom %st(1) -# CHECK-NEXT: 1 1 1.00 U fucom %st(3) -# CHECK-NEXT: 1 1 1.00 U fucomp %st(1) -# CHECK-NEXT: 1 1 1.00 U fucomp %st(3) -# CHECK-NEXT: 1 3 1.00 U fucompp -# CHECK-NEXT: 3 3 1.00 U fucomi %st(3) -# CHECK-NEXT: 3 3 1.00 U fucompi %st(3) -# CHECK-NEXT: 1 100 0.33 U wait -# CHECK-NEXT: 1 100 0.33 U fxam -# CHECK-NEXT: 1 1 0.33 U fxch %st(1) -# CHECK-NEXT: 1 1 0.33 U fxch %st(3) -# CHECK-NEXT: 5 5 2.00 * * U fxrstor (%eax) -# CHECK-NEXT: 1 100 0.33 * * U fxsave (%eax) -# CHECK-NEXT: 1 100 0.33 U fxtract -# CHECK-NEXT: 1 100 0.33 U fyl2x -# CHECK-NEXT: 1 100 0.33 U fyl2xp1 +# CHECK-NEXT: 1 10 1.00 * U fimuls (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fimull (%eax) +# CHECK-NEXT: 1 1 0.50 U fnop +# CHECK-NEXT: 1 100 0.50 U fpatan +# CHECK-NEXT: 1 100 0.50 U fprem +# CHECK-NEXT: 1 100 0.50 U fprem1 +# CHECK-NEXT: 1 100 0.50 U fptan +# CHECK-NEXT: 1 100 0.50 U frndint +# CHECK-NEXT: 1 100 0.50 U frstor (%eax) +# CHECK-NEXT: 1 100 0.50 U fnsave (%eax) +# CHECK-NEXT: 1 100 0.50 U fscale +# CHECK-NEXT: 1 100 0.50 U fsin +# CHECK-NEXT: 1 100 0.50 U fsincos +# CHECK-NEXT: 1 1 17.50 U fsqrt +# CHECK-NEXT: 1 1 0.50 U fst %st(0) +# CHECK-NEXT: 1 1 0.50 * U fsts (%edx) +# CHECK-NEXT: 1 1 0.50 * U fstl (%ecx) +# CHECK-NEXT: 1 1 0.50 U fstp %st(0) +# CHECK-NEXT: 1 1 0.50 * U fstpl (%edx) +# CHECK-NEXT: 1 1 0.50 * U fstpl (%ecx) +# CHECK-NEXT: 1 1 0.50 * U fstpt (%eax) +# CHECK-NEXT: 1 1 0.50 * U fnstcw (%eax) +# CHECK-NEXT: 1 100 0.50 U fnstenv (%eax) +# CHECK-NEXT: 1 100 0.50 U fnstsw (%eax) +# CHECK-NEXT: 1 100 0.50 U frstor (%eax) +# CHECK-NEXT: 1 100 0.50 U wait +# CHECK-NEXT: 1 100 0.50 U fnsave (%eax) +# CHECK-NEXT: 1 5 1.00 U fsub %st(0), %st(1) +# CHECK-NEXT: 1 5 1.00 U fsub %st(2) +# CHECK-NEXT: 1 10 1.00 * U fsubs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fsubl (%eax) +# CHECK-NEXT: 1 5 1.00 U fsubp %st(1) +# CHECK-NEXT: 1 5 1.00 U fsubp %st(2) +# CHECK-NEXT: 1 10 1.00 * U fisubs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fisubl (%eax) +# CHECK-NEXT: 1 5 1.00 U fsubr %st(0), %st(1) +# CHECK-NEXT: 1 5 1.00 U fsubr %st(2) +# CHECK-NEXT: 1 10 1.00 * U fsubrs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fsubrl (%eax) +# CHECK-NEXT: 1 5 1.00 U fsubrp %st(1) +# CHECK-NEXT: 1 5 1.00 U fsubrp %st(2) +# CHECK-NEXT: 1 10 1.00 * U fisubrs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fisubrl (%eax) +# CHECK-NEXT: 1 1 1.00 U ftst +# CHECK-NEXT: 2 1 1.00 U fucom %st(1) +# CHECK-NEXT: 2 1 1.00 U fucom %st(3) +# CHECK-NEXT: 2 1 1.00 U fucomp %st(1) +# CHECK-NEXT: 2 1 1.00 U fucomp %st(3) +# CHECK-NEXT: 1 1 1.00 U fucompp +# CHECK-NEXT: 2 1 1.00 U fucomi %st(3) +# CHECK-NEXT: 2 1 1.00 U fucompi %st(3) +# CHECK-NEXT: 1 100 0.50 U wait +# CHECK-NEXT: 1 100 0.50 U fxam +# CHECK-NEXT: 1 1 0.50 U fxch %st(1) +# CHECK-NEXT: 1 1 0.50 U fxch %st(3) +# CHECK-NEXT: 1 100 0.50 * * U fxrstor (%eax) +# CHECK-NEXT: 1 100 0.50 * * U fxsave (%eax) +# CHECK-NEXT: 1 100 0.50 U fxtract +# CHECK-NEXT: 1 100 0.50 U fyl2x +# CHECK-NEXT: 1 100 0.50 U fyl2xp1 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - 136.00 52.67 90.67 17.00 54.67 34.00 34.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 24.00 24.00 - - - 36.00 20.00 - 201.50 201.50 - - - 7.00 48.00 40.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - f2xm1 -# CHECK-NEXT: - - - - - 1.00 - - fabs -# CHECK-NEXT: - - - 1.00 - - - - fadd %st(0), %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fadd %st(2) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fadds (%ecx) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 faddl (%ecx) -# CHECK-NEXT: - - - 1.00 - - - - faddp %st(1) -# CHECK-NEXT: - - - 1.00 - - - - faddp %st(2) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fiadds (%ecx) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fiaddl (%ecx) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fbld (%ecx) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fbstp (%eax) -# CHECK-NEXT: - - - - - 1.00 - - fchs -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fnclex -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovb %st(1), %st(0) -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovbe %st(1), %st(0) -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmove %st(1), %st(0) -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnb %st(1), %st(0) -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnbe %st(1), %st(0) -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovne %st(1), %st(0) -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovnu %st(1), %st(0) -# CHECK-NEXT: - - 0.50 - - 2.50 - - fcmovu %st(1), %st(0) -# CHECK-NEXT: - - - 1.00 - - - - fcom %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fcom %st(3) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fcoms (%ecx) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fcoml (%eax) -# CHECK-NEXT: - - - 1.00 - - - - fcomp %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fcomp %st(3) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fcomps (%ecx) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fcompl (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fcompp -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fcomi %st(3) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fcompi %st(3) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fcos -# CHECK-NEXT: - - - - - 1.00 - - fdecstp -# CHECK-NEXT: - 14.00 1.00 - - - - - fdiv %st(0), %st(1) -# CHECK-NEXT: - 14.00 1.00 - - - - - fdiv %st(2) -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivs (%ecx) -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivl (%eax) -# CHECK-NEXT: - 14.00 1.00 - - - - - fdivp %st(1) -# CHECK-NEXT: - 14.00 1.00 - - - - - fdivp %st(2) -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivs (%ecx) -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivl (%eax) -# CHECK-NEXT: - 14.00 1.00 - - - - - fdivr %st(0), %st(1) -# CHECK-NEXT: - 14.00 1.00 - - - - - fdivr %st(2) -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivrs (%ecx) -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fdivrl (%eax) -# CHECK-NEXT: - 14.00 1.00 - - - - - fdivrp %st(1) -# CHECK-NEXT: - 14.00 1.00 - - - - - fdivrp %st(2) -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivrs (%ecx) -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fidivrl (%eax) -# CHECK-NEXT: - - - - - 1.00 - - ffree %st(0) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 ficoms (%ecx) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 ficoml (%eax) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 ficomps (%ecx) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 ficompl (%eax) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 filds (%edx) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fildl (%ecx) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fildll (%eax) -# CHECK-NEXT: - - - - - 1.00 - - fincstp -# CHECK-NEXT: - - 1.00 1.00 - 2.00 - - fninit -# CHECK-NEXT: - - - 1.00 1.00 - 1.00 1.00 fists (%edx) -# CHECK-NEXT: - - - 1.00 1.00 - 1.00 1.00 fistl (%ecx) -# CHECK-NEXT: - - - 1.00 1.00 - 1.00 1.00 fistps (%edx) -# CHECK-NEXT: - - - 1.00 1.00 - 1.00 1.00 fistpl (%ecx) -# CHECK-NEXT: - - - 1.00 1.00 - 1.00 1.00 fistpll (%eax) -# CHECK-NEXT: - - - 1.00 1.00 - 0.50 0.50 fisttps (%edx) -# CHECK-NEXT: - - - 1.00 1.00 - 0.50 0.50 fisttpl (%ecx) -# CHECK-NEXT: - - - 1.00 1.00 - 0.50 0.50 fisttpll (%eax) -# CHECK-NEXT: - - - - - 1.00 - - fld %st(0) -# CHECK-NEXT: - - 0.50 0.50 - 1.00 0.50 0.50 flds (%edx) -# CHECK-NEXT: - - 0.50 0.50 - 1.00 0.50 0.50 fldl (%ecx) -# CHECK-NEXT: - - 0.50 0.50 - 1.00 0.50 0.50 fldt (%eax) -# CHECK-NEXT: - - - - 1.00 2.00 1.00 1.00 fldcw (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fldenv (%eax) -# CHECK-NEXT: - - 1.00 - - 1.00 - - fld1 -# CHECK-NEXT: - - 1.00 1.00 - - - - fldl2e -# CHECK-NEXT: - - 1.00 1.00 - - - - fldl2t -# CHECK-NEXT: - - 1.00 1.00 - - - - fldlg2 -# CHECK-NEXT: - - 1.00 1.00 - - - - fldln2 -# CHECK-NEXT: - - 1.00 1.00 - - - - fldpi -# CHECK-NEXT: - - - - - 1.00 - - fldz -# CHECK-NEXT: - - 1.00 - - - - - fmul %st(0), %st(1) -# CHECK-NEXT: - - 1.00 - - - - - fmul %st(2) -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fmuls (%ecx) -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 fmull (%eax) -# CHECK-NEXT: - - 1.00 - - - - - fmulp %st(1) -# CHECK-NEXT: - - 1.00 - - - - - fmulp %st(2) -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fimuls (%ecx) -# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 fimull (%eax) -# CHECK-NEXT: - - - - - 1.00 - - fnop -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fpatan -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fprem -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fprem1 -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fptan -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - frndint -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - frstor (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fnsave (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fscale -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fsin -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fsincos -# CHECK-NEXT: - 24.00 1.00 - - - - - fsqrt -# CHECK-NEXT: - - - - - 1.00 - - fst %st(0) -# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 fsts (%edx) -# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 fstl (%ecx) -# CHECK-NEXT: - - - - - 1.00 - - fstp %st(0) -# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 fstpl (%edx) -# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 fstpl (%ecx) -# CHECK-NEXT: - - - - 1.00 - 1.00 1.00 fstpt (%eax) -# CHECK-NEXT: - - - - 1.00 1.00 1.00 1.00 fnstcw (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fnstenv (%eax) -# CHECK-NEXT: - - 1.00 - 1.00 - 1.00 1.00 fnstsw (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - frstor (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wait -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fnsave (%eax) -# CHECK-NEXT: - - - 1.00 - - - - fsub %st(0), %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fsub %st(2) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubs (%ecx) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubl (%eax) -# CHECK-NEXT: - - - 1.00 - - - - fsubp %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fsubp %st(2) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubs (%ecx) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubl (%eax) -# CHECK-NEXT: - - - 1.00 - - - - fsubr %st(0), %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fsubr %st(2) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubrs (%ecx) -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 fsubrl (%eax) -# CHECK-NEXT: - - - 1.00 - - - - fsubrp %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fsubrp %st(2) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubrs (%ecx) -# CHECK-NEXT: - - - 2.00 - - 0.50 0.50 fisubrl (%eax) -# CHECK-NEXT: - - - 1.00 - - - - ftst -# CHECK-NEXT: - - - 1.00 - - - - fucom %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fucom %st(3) -# CHECK-NEXT: - - - 1.00 - - - - fucomp %st(1) -# CHECK-NEXT: - - - 1.00 - - - - fucomp %st(3) -# CHECK-NEXT: - - - 1.00 - - - - fucompp -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fucomi %st(3) -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - fucompi %st(3) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wait -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fxam -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fxch %st(1) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fxch %st(3) -# CHECK-NEXT: - - 0.50 0.50 1.00 2.00 0.50 0.50 fxrstor (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fxsave (%eax) -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fxtract -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fyl2x -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - fyl2xp1 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - f2xm1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fabs +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fadd %st(0), %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fadd %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fadds (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - faddl (%ecx) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - faddp %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - faddp %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fiadds (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fiaddl (%ecx) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fbld (%ecx) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fbstp (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fchs +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fnclex +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmovb %st(1), %st(0) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmovbe %st(1), %st(0) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmove %st(1), %st(0) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmovnb %st(1), %st(0) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmovnbe %st(1), %st(0) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmovne %st(1), %st(0) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmovnu %st(1), %st(0) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fcmovu %st(1), %st(0) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fcom %st(1) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fcom %st(3) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fcoms (%ecx) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fcoml (%eax) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fcomp %st(1) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fcomp %st(3) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fcomps (%ecx) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fcompl (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fcompp +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fcomi %st(3) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fcompi %st(3) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fcos +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fdecstp +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdiv %st(0), %st(1) +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdiv %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivl (%eax) +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivp %st(1) +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivp %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fidivs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fidivl (%eax) +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivr %st(0), %st(1) +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivr %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivrs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivrl (%eax) +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivrp %st(1) +# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fdivrp %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fidivrs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 9.50 9.50 - - - - - 1.00 - - - - fidivrl (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - ffree %st(0) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ficoms (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ficoml (%eax) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ficomps (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - ficompl (%eax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - filds (%edx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fildl (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fildll (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fincstp +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fninit +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fists (%edx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fistl (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fistps (%edx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fistpl (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fistpll (%eax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fisttps (%edx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fisttpl (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fisttpll (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fld %st(0) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - flds (%edx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fldl (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fldt (%eax) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fldcw (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fldenv (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - fld1 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - fldl2e +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - fldl2t +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - fldlg2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - fldln2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - fldpi +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - fldz +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fmul %st(0), %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fmul %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fmuls (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fmull (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fmulp %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fmulp %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fimuls (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fimull (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fnop +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fpatan +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fprem +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fprem1 +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fptan +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - frndint +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - frstor (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fnsave (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fscale +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fsin +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fsincos +# CHECK-NEXT: - - - - - - - - 17.50 17.50 - - - - - 1.00 - - - - fsqrt +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fst %st(0) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fsts (%edx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fstl (%ecx) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fstp %st(0) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fstpl (%edx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fstpl (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - fstpt (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fnstcw (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fnstenv (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fnstsw (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - frstor (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - wait +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fnsave (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsub %st(0), %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsub %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubl (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubp %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubp %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fisubs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fisubl (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubr %st(0), %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubr %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubrs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubrl (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubrp %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fsubrp %st(2) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fisubrs (%ecx) +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - - - 1.00 - - - - - fisubrl (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - ftst +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fucom %st(1) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fucom %st(3) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fucomp %st(1) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fucomp %st(3) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 1.00 - - - - fucompp +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fucomi %st(3) +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 - - - - 1.00 - - - - - fucompi %st(3) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - wait +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fxam +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fxch %st(1) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fxch %st(3) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fxrstor (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fxsave (%eax) +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fxtract +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fyl2x +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - fyl2xp1 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-xop.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-xop.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/resources-xop.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s vfrczpd %xmm0, %xmm3 vfrczpd (%rax), %xmm3 @@ -221,314 +221,326 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vfrczpd %xmm0, %xmm3 -# CHECK-NEXT: 2 9 1.00 * vfrczpd (%rax), %xmm3 -# CHECK-NEXT: 1 3 1.00 vfrczpd %ymm0, %ymm3 -# CHECK-NEXT: 2 10 1.00 * vfrczpd (%rax), %ymm3 -# CHECK-NEXT: 1 3 1.00 vfrczps %xmm0, %xmm3 -# CHECK-NEXT: 2 9 1.00 * vfrczps (%rax), %xmm3 -# CHECK-NEXT: 1 3 1.00 vfrczps %ymm0, %ymm3 -# CHECK-NEXT: 2 10 1.00 * vfrczps (%rax), %ymm3 -# CHECK-NEXT: 1 3 1.00 vfrczsd %xmm0, %xmm3 -# CHECK-NEXT: 2 9 1.00 * vfrczsd (%rax), %xmm3 -# CHECK-NEXT: 1 3 1.00 vfrczss %xmm0, %xmm3 -# CHECK-NEXT: 2 9 1.00 * vfrczss (%rax), %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcmov %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcmov (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcmov %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 1 1.00 vpcmov %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 8 1.00 * vpcmov (%rax), %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: 2 8 1.00 * vpcmov %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: 1 1 0.50 vpcomb $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomb $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomd $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomd $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomub $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomub $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomud $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomud $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomuq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomuq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomuw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomuw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 1.00 vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 1 1.00 vpermil2pd $0, %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 8 1.00 * vpermil2pd $0, (%rax), %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: 2 8 1.00 * vpermil2pd $0, %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: 1 1 1.00 vpermil2ps $0, %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpermil2ps $0, (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpermil2ps $0, %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 1 1.00 vpermil2ps $0, %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: 2 8 1.00 * vpermil2ps $0, (%rax), %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: 2 8 1.00 * vpermil2ps $0, %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: 3 3 1.50 vphaddbd %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddbd (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddbq %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddbq (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddbw %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddbw (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphadddq %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphadddq (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddubd %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddubd (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddubq %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddubq (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddubw %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddubw (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddudq %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddudq (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphadduwd %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphadduwd (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphadduwq %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphadduwq (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddwd %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddwd (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphaddwq %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphaddwq (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphsubbw %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphsubbw (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphsubdq %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphsubdq (%rax), %xmm3 -# CHECK-NEXT: 3 3 1.50 vphsubwd %xmm0, %xmm3 -# CHECK-NEXT: 4 9 1.50 * vphsubwd (%rax), %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacsdd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacsdd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacsdqh %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacsdqh %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacsdql %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacsdql %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacssdd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacssdd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacssdqh %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacssdqh %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacssdql %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacssdql %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacsswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacsswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacssww %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacssww %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmacsww %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmacsww %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmadcsswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmadcsswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 5 1.00 vpmadcswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 11 1.00 * vpmadcswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpperm %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpperm (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpperm %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotb %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotb (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotb %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotb $0, %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotb $0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotd %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotd (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotd %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotd $0, %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotd $0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotq %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotq (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotq %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotq $0, %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotq $0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotw %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotw (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotw %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vprotw $0, %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vprotw $0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshab %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshab (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshab %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshad %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshad (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshad %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshaq %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshaq (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshaq %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshaw %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshaw (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshaw %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshlb %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshlb (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshlb %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshld %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshld (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshld %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshlq %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshlq (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshlq %xmm0, (%rax), %xmm3 -# CHECK-NEXT: 1 1 1.00 vpshlw %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshlw (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 2 7 1.00 * vpshlw %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 2 10 1.00 vfrczpd %xmm0, %xmm3 +# CHECK-NEXT: 2 15 1.00 * vfrczpd (%rax), %xmm3 +# CHECK-NEXT: 4 10 2.00 vfrczpd %ymm0, %ymm3 +# CHECK-NEXT: 8 15 2.00 * vfrczpd (%rax), %ymm3 +# CHECK-NEXT: 2 10 1.00 vfrczps %xmm0, %xmm3 +# CHECK-NEXT: 2 15 1.00 * vfrczps (%rax), %xmm3 +# CHECK-NEXT: 4 10 2.00 vfrczps %ymm0, %ymm3 +# CHECK-NEXT: 8 15 2.00 * vfrczps (%rax), %ymm3 +# CHECK-NEXT: 2 10 1.00 vfrczsd %xmm0, %xmm3 +# CHECK-NEXT: 2 15 1.00 * vfrczsd (%rax), %xmm3 +# CHECK-NEXT: 2 10 1.00 vfrczss %xmm0, %xmm3 +# CHECK-NEXT: 2 15 1.00 * vfrczss (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcmov %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcmov (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcmov %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 2 2 0.50 vpcmov %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 7 1.00 * vpcmov (%rax), %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 2 7 1.00 * vpcmov %ymm0, (%rax), %ymm1, %ymm3 +# CHECK-NEXT: 1 2 0.50 vpcomb $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomb $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomd $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomd $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomq $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomq $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomub $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomub $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomud $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomud $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomuq $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomuq $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomuw $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomuw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomw $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 3 2.00 vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 8 2.00 * vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 2.00 * vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 2 3 3.00 vpermil2pd $0, %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 8 3.00 * vpermil2pd $0, (%rax), %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 2 8 3.00 * vpermil2pd $0, %ymm0, (%rax), %ymm1, %ymm3 +# CHECK-NEXT: 1 3 2.00 vpermil2ps $0, %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 8 2.00 * vpermil2ps $0, (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 2.00 * vpermil2ps $0, %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 2 3 3.00 vpermil2ps $0, %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 8 3.00 * vpermil2ps $0, (%rax), %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 2 8 3.00 * vpermil2ps $0, %ymm0, (%rax), %ymm1, %ymm3 +# CHECK-NEXT: 1 2 0.50 vphaddbd %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddbd (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddbq %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddbq (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddbw %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddbw (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphadddq %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphadddq (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddubd %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddubd (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddubq %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddubq (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddubw %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddubw (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddudq %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddudq (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphadduwd %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphadduwd (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphadduwq %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphadduwq (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddwd %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddwd (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphaddwq %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphaddwq (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphsubbw %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphsubbw (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphsubdq %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphsubdq (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vphsubwd %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vphsubwd (%rax), %xmm3 +# CHECK-NEXT: 1 5 2.00 vpmacsdd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 2.00 * vpmacsdd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 2.00 vpmacsdqh %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 2.00 * vpmacsdqh %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 2.00 vpmacsdql %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 2.00 * vpmacsdql %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 5 2.00 vpmacssdd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 2.00 * vpmacssdd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 2.00 vpmacssdqh %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 2.00 * vpmacssdqh %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 2.00 vpmacssdql %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 10 2.00 * vpmacssdql %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 1.00 vpmacsswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 9 1.00 * vpmacsswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 1.00 vpmacssww %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 9 1.00 * vpmacssww %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 1.00 vpmacswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 9 1.00 * vpmacswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 1.00 vpmacsww %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 9 1.00 * vpmacsww %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 1.00 vpmadcsswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 9 1.00 * vpmadcsswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 4 1.00 vpmadcswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 9 1.00 * vpmadcswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 3 2.00 vpperm %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 1 8 2.00 * vpperm (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 2.00 * vpperm %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: 1 3 0.50 vprotb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotb %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vprotb $0, %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vprotb $0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vprotd %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotd (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotd %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vprotd $0, %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vprotd $0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vprotq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotq %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vprotq $0, %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vprotq $0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vprotw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vprotw %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 2 0.50 vprotw $0, %xmm0, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vprotw $0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshab %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshab (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshab %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshad %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshad (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshad %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshaq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshaq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshaq %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshaw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshaw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshaw %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshlb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshlb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshlb %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshld %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshld (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshld %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshlq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshlq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshlq %xmm0, (%rax), %xmm3 +# CHECK-NEXT: 1 3 0.50 vpshlw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshlw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 8 0.50 * vpshlw %xmm0, (%rax), %xmm3 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 68.00 68.00 - 71.00 41.50 41.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: 41.50 41.50 - - - - - - 30.00 30.00 60.00 60.00 36.00 12.00 100.50 80.50 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vfrczpd %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vfrczpd (%rax), %xmm3 -# CHECK-NEXT: - - - 1.00 - - - - vfrczpd %ymm0, %ymm3 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vfrczpd (%rax), %ymm3 -# CHECK-NEXT: - - - 1.00 - - - - vfrczps %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vfrczps (%rax), %xmm3 -# CHECK-NEXT: - - - 1.00 - - - - vfrczps %ymm0, %ymm3 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vfrczps (%rax), %ymm3 -# CHECK-NEXT: - - - 1.00 - - - - vfrczsd %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vfrczsd (%rax), %xmm3 -# CHECK-NEXT: - - - 1.00 - - - - vfrczss %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vfrczss (%rax), %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcmov %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmov (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcmov %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vpcmov %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpcmov (%rax), %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpcmov %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomb $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomb $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomd $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomd $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomub $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomub $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomud $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomud $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomuq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomuq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomuw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomuw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vpermil2pd $0, %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2pd $0, (%rax), %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2pd $0, %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: - - - - - 1.00 - - vpermil2ps $0, %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2ps $0, (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2ps $0, %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vpermil2ps $0, %ymm0, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2ps $0, (%rax), %ymm0, %ymm1, %ymm3 -# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2ps $0, %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddbd %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddbd (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddbq %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddbq (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddbw %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddbw (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphadddq %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphadddq (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddubd %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddubd (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddubq %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddubq (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddubw %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddubw (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddudq %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddudq (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphadduwd %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphadduwd (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphadduwq %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphadduwq (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddwd %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddwd (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphaddwq %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphaddwq (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphsubbw %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphsubbw (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphsubdq %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphsubdq (%rax), %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 - - vphsubwd %xmm0, %xmm3 -# CHECK-NEXT: - - - 1.50 - 1.50 0.50 0.50 vphsubwd (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacsdd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacsdd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacsdqh %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacsdqh %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacsdql %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacsdql %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacssdd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacssdd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacssdqh %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacssdqh %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacssdql %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacssdql %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacsswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacsswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacssww %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacssww %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmacsww %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmacsww %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmadcsswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmadcsswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpmadcswd %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpmadcswd %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpperm %xmm0, %xmm1, %xmm2, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpperm (%rax), %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpperm %xmm0, (%rax), %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotb %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotb (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotb %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotb $0, %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotb $0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotd %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotd (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotd %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotd $0, %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotd $0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotq %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotq (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotq %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotq $0, %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotq $0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotw %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotw (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotw %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vprotw $0, %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vprotw $0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshab %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshab (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshab %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshad %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshad (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshad %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshaq %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshaq (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshaq %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshaw %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshaw (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshaw %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshlb %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshlb (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshlb %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshld %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshld (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshld %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshlq %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshlq (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshlq %xmm0, (%rax), %xmm3 -# CHECK-NEXT: - - 1.00 - - - - - vpshlw %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshlw (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 vpshlw %xmm0, (%rax), %xmm3 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczpd %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczpd (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vfrczpd %ymm0, %ymm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vfrczpd (%rax), %ymm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczps %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczps (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vfrczps %ymm0, %ymm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 2.00 - - - - vfrczps (%rax), %ymm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczsd %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczsd (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczss %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczss (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmov %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmov (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmov %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmov %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmov (%rax), %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcmov %ymm0, (%rax), %ymm1, %ymm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomb $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomb $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomd $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomd $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomq $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomq $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomub $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomub $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomud $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomud $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomuq $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomuq $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomuw $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomuw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomw $0, %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpcomw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermil2pd $0, %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermil2pd $0, (%rax), %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermil2pd $0, %ymm0, (%rax), %ymm1, %ymm3 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermil2ps $0, %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermil2ps $0, (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - vpermil2ps $0, %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermil2ps $0, %ymm0, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermil2ps $0, (%rax), %ymm0, %ymm1, %ymm3 +# CHECK-NEXT: 1.00 1.00 - - - - - - 3.00 3.00 - - - - 1.00 1.00 - - - - vpermil2ps $0, %ymm0, (%rax), %ymm1, %ymm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddbd %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddbd (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddbq %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddbq (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddbw %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddbw (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphadddq %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphadddq (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddubd %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddubd (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddubq %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddubq (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddubw %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddubw (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddudq %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddudq (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphadduwd %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphadduwd (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphadduwq %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphadduwq (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddwd %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddwd (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddwq %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphaddwq (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubbw %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubbw (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubdq %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubdq (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubwd %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vphsubwd (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacsdd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacsdd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacsdqh %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacsdqh %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacsdql %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacsdql %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacssdd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacssdd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacssdqh %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacssdqh %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacssdql %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 2.00 - 2.50 0.50 - - - - vpmacssdql %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacsswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacsswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacssww %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacssww %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacsww %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmacsww %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmadcsswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmadcsswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - 1.00 - 1.00 - - - - - vpmadcswd %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - 1.00 - 1.00 - - - - - vpmadcswd %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - vpperm %xmm0, %xmm1, %xmm2, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - vpperm (%rax), %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 2.00 2.00 - - 0.50 0.50 - - - - vpperm %xmm0, (%rax), %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotb %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotb $0, %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotb $0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotd %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotd (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotd %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotd $0, %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotd $0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotq %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotq $0, %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotq $0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotw %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotw $0, %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vprotw $0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshab %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshab (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshab %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshad %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshad (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshad %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshaq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshaq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshaq %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshaw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshaw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshaw %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlb %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshld %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshld (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshld %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlq %xmm0, (%rax), %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - vpshlw %xmm0, (%rax), %xmm3 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/scheduler-queue-usage.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/scheduler-queue-usage.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/scheduler-queue-usage.s @@ -1,17 +1,17 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -scheduler-stats < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -scheduler-stats < %s | FileCheck %s vmulps (%rsi), %xmm0, %xmm0 add %rsi, %rsi # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 2 -# CHECK-NEXT: Total Cycles: 14 -# CHECK-NEXT: Total uOps: 3 +# CHECK-NEXT: Total Cycles: 13 +# CHECK-NEXT: Total uOps: 2 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.21 -# CHECK-NEXT: IPC: 0.14 +# CHECK-NEXT: uOps Per Cycle: 0.15 +# CHECK-NEXT: IPC: 0.15 # CHECK-NEXT: Block RThroughput: 1.0 # CHECK: Instruction Info: @@ -23,13 +23,13 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 2 11 1.00 * vmulps (%rsi), %xmm0, %xmm0 -# CHECK-NEXT: 1 1 0.33 addq %rsi, %rsi +# CHECK-NEXT: 1 10 1.00 * vmulps (%rsi), %xmm0, %xmm0 +# CHECK-NEXT: 1 1 0.50 addq %rsi, %rsi # CHECK: Schedulers - number of cycles where we saw N instructions issued: # CHECK-NEXT: [# issued], [# cycles] -# CHECK-NEXT: 0, 13 (92.9%) -# CHECK-NEXT: 2, 1 (7.1%) +# CHECK-NEXT: 0, 12 (92.3%) +# CHECK-NEXT: 2, 1 (7.7%) # CHECK: Scheduler's queue usage: # CHECK-NEXT: [1] Resource name. @@ -38,23 +38,38 @@ # CHECK-NEXT: [4] Total number of buffer entries. # CHECK: [1] [2] [3] [4] -# CHECK-NEXT: SBPortAny 0 2 54 +# CHECK-NEXT: PdEX 0 2 40 +# CHECK-NEXT: PdFPU 0 1 64 +# CHECK-NEXT: PdLoad 0 1 40 +# CHECK-NEXT: PdStore 0 1 24 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 - - 1.00 - 1.00 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - 1.00 - - - - 1.00 - - 1.00 - - - - - 1.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 1.00 - - - - 1.00 vmulps (%rsi), %xmm0, %xmm0 -# CHECK-NEXT: - - - - - 1.00 - - addq %rsi, %rsi +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - 1.00 - - - - - - - 1.00 - - - - - 1.00 - - - - vmulps (%rsi), %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - addq %rsi, %rsi Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/simple-test.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/simple-test.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/simple-test.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=100 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=100 < %s | FileCheck %s add %edi, %eax @@ -11,7 +11,7 @@ # CHECK: Dispatch Width: 4 # CHECK-NEXT: uOps Per Cycle: 0.97 # CHECK-NEXT: IPC: 0.97 -# CHECK-NEXT: Block RThroughput: 0.3 +# CHECK-NEXT: Block RThroughput: 0.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -22,22 +22,34 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.33 addl %edi, %eax +# CHECK-NEXT: 1 1 0.50 addl %edi, %eax # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 0.33 0.33 - 0.34 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 - 0.34 - - addl %edi, %eax +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - addl %edi, %eax Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vbroadcast-operand-latency.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vbroadcast-operand-latency.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vbroadcast-operand-latency.s @@ -1,18 +1,18 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 < %s | FileCheck %s leaq 8(%rsp, %rdi, 2), %rax vbroadcastss (%rax), %ymm0 # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 200 -# CHECK-NEXT: Total Cycles: 60 -# CHECK-NEXT: Total uOps: 200 +# CHECK-NEXT: Total Cycles: 206 +# CHECK-NEXT: Total uOps: 400 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 3.33 -# CHECK-NEXT: IPC: 3.33 -# CHECK-NEXT: Block RThroughput: 0.5 +# CHECK-NEXT: uOps Per Cycle: 1.94 +# CHECK-NEXT: IPC: 0.97 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -23,38 +23,50 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 0.50 leaq 8(%rsp,%rdi,2), %rax -# CHECK-NEXT: 1 7 0.50 * vbroadcastss (%rax), %ymm0 +# CHECK-NEXT: 2 1 0.50 leaq 8(%rsp,%rdi,2), %rax +# CHECK-NEXT: 2 6 2.00 * vbroadcastss (%rax), %ymm0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 0.50 0.50 - - 0.50 0.50 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - 1.00 - - - 0.50 0.50 - 2.00 2.00 - - - - 1.00 1.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.50 0.50 - - - - leaq 8(%rsp,%rdi,2), %rax -# CHECK-NEXT: - - - - - - 0.50 0.50 vbroadcastss (%rax), %ymm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - leaq 8(%rsp,%rdi,2), %rax +# CHECK-NEXT: - 1.00 - - - - - - 2.00 2.00 - - - - 1.00 1.00 - - - - vbroadcastss (%rax), %ymm0 # CHECK: Timeline view: -# CHECK-NEXT: 01 +# CHECK-NEXT: 012 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER . .. leaq 8(%rsp,%rdi,2), %rax -# CHECK-NEXT: [0,1] D=eeeeeeeER. vbroadcastss (%rax), %ymm0 -# CHECK-NEXT: [1,0] DeE-------R. leaq 8(%rsp,%rdi,2), %rax -# CHECK-NEXT: [1,1] D=eeeeeeeER. vbroadcastss (%rax), %ymm0 -# CHECK-NEXT: [2,0] .DeE------R. leaq 8(%rsp,%rdi,2), %rax -# CHECK-NEXT: [2,1] .D=eeeeeeeER vbroadcastss (%rax), %ymm0 +# CHECK: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax +# CHECK-NEXT: [0,1] DeeeeeeER . . vbroadcastss (%rax), %ymm0 +# CHECK-NEXT: [1,0] .DeE----R . . leaq 8(%rsp,%rdi,2), %rax +# CHECK-NEXT: [1,1] .DeeeeeeER. . vbroadcastss (%rax), %ymm0 +# CHECK-NEXT: [2,0] . DeE----R. . leaq 8(%rsp,%rdi,2), %rax +# CHECK-NEXT: [2,1] . D==eeeeeeER vbroadcastss (%rax), %ymm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -63,5 +75,5 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 1.0 1.0 4.3 leaq 8(%rsp,%rdi,2), %rax -# CHECK-NEXT: 1. 3 2.0 0.0 0.0 vbroadcastss (%rax), %ymm0 +# CHECK-NEXT: 0. 3 1.0 1.0 2.7 leaq 8(%rsp,%rdi,2), %rax +# CHECK-NEXT: 1. 3 1.7 0.7 0.0 vbroadcastss (%rax), %ymm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s vaddps %xmm0, %xmm0, %xmm1 vandps (%rdi), %xmm1, %xmm2 @@ -7,10 +7,10 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 2 # CHECK-NEXT: Total Cycles: 10 -# CHECK-NEXT: Total uOps: 3 +# CHECK-NEXT: Total uOps: 2 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.30 +# CHECK-NEXT: uOps Per Cycle: 0.20 # CHECK-NEXT: IPC: 0.20 # CHECK-NEXT: Block RThroughput: 1.0 @@ -23,13 +23,13 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm0, %xmm1 -# CHECK-NEXT: 2 7 1.00 * vandps (%rdi), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 1.00 vaddps %xmm0, %xmm0, %xmm1 +# CHECK-NEXT: 1 7 0.50 * vandps (%rdi), %xmm1, %xmm2 # CHECK: Timeline view: # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1 +# CHECK: [0,0] DeeeeeER . vaddps %xmm0, %xmm0, %xmm1 # CHECK-NEXT: [0,1] DeeeeeeeER vandps (%rdi), %xmm1, %xmm2 # CHECK: Average Wait times (based on the timeline view): Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/vec-logic-read-after-ld-2.s @@ -1,18 +1,18 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s vaddps %ymm0, %ymm0, %ymm1 vandps (%rdi), %ymm1, %ymm2 # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 2 -# CHECK-NEXT: Total Cycles: 11 -# CHECK-NEXT: Total uOps: 3 +# CHECK-NEXT: Total Cycles: 10 +# CHECK-NEXT: Total uOps: 4 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.27 -# CHECK-NEXT: IPC: 0.18 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 0.40 +# CHECK-NEXT: IPC: 0.20 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -23,15 +23,14 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 2 8 1.00 * vandps (%rdi), %ymm1, %ymm2 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: 2 7 1.00 * vandps (%rdi), %ymm1, %ymm2 # CHECK: Timeline view: -# CHECK-NEXT: 0 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [0,1] DeeeeeeeeER vandps (%rdi), %ymm1, %ymm2 +# CHECK: [0,0] DeeeeeER . vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [0,1] DeeeeeeeER vandps (%rdi), %ymm1, %ymm2 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-1.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=2 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=2 < %s | FileCheck %s vmulps %ymm0, %ymm1, %ymm2 vfrczpd %xmm1, %xmm2 @@ -10,13 +10,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 600 -# CHECK-NEXT: Total Cycles: 318 -# CHECK-NEXT: Total uOps: 600 +# CHECK-NEXT: Total Cycles: 717 +# CHECK-NEXT: Total uOps: 1200 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.89 -# CHECK-NEXT: IPC: 1.89 -# CHECK-NEXT: Block RThroughput: 3.0 +# CHECK-NEXT: uOps Per Cycle: 1.67 +# CHECK-NEXT: IPC: 0.84 +# CHECK-NEXT: Block RThroughput: 7.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -27,52 +27,64 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 5 1.00 vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1 3 1.00 vfrczpd %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: 1 5 1.00 vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: 2 5 2.00 vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 vfrczpd %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: 2 5 2.00 vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm4, %ymm5, %ymm0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 3.00 3.00 - - - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 0.04 4.96 - - - 1.00 4.00 7.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - 1.00 - - - - vfrczpd %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - 2.00 - - - - vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - 1.00 - - - - vfrczpd %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.01 0.99 - - - - - 2.00 - - - - vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: - - - - - - - - 0.01 0.99 - - - - 2.00 - - - - - vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: - - - - - - - - 0.02 0.98 - - - - - 2.00 - - - - vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - 2.00 - - - - - vaddps %ymm4, %ymm5, %ymm0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 -# CHECK-NEXT: Index 0123456789 0123456 +# CHECK-NEXT: 0123456789 0123456789 +# CHECK-NEXT: Index 0123456789 0123456789 0 -# CHECK: [0,0] DeeeeeER . . . .. vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [0,1] DeeeE--R . . . .. vfrczpd %xmm1, %xmm2 -# CHECK-NEXT: [0,2] D===eeeeeER . . .. vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: [0,3] D========eeeER . . .. vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: [0,4] .D==========eeeeeER . .. vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: [0,5] .D===============eeeER .. vaddps %ymm4, %ymm5, %ymm0 -# CHECK-NEXT: [1,0] .D==================eeeeeER vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [1,1] .DeeeE--------------------R vfrczpd %xmm1, %xmm2 -# CHECK-NEXT: [1,2] . D==eeeeeE---------------R vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: [1,3] . D=======eeeE------------R vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: [1,4] . D==========eeeeeE-------R vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: [1,5] . D===============eeeE----R vaddps %ymm4, %ymm5, %ymm0 +# CHECK: [0,0] DeeeeeER . . . . . . . vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [0,1] D==eeeeeeeeeeER. . . . . . vfrczpd %xmm1, %xmm2 +# CHECK-NEXT: [0,2] .D===========eeeeeER. . . . . vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: [0,3] .D================eeeeeER. . . . vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: [0,4] . D====================eeeeeER. . . vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: [0,5] . D=========================eeeeeER. . vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: [1,0] . D=============================eeeeeER. vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [1,1] . DeeeeeeeeeeE------------------------R. vfrczpd %xmm1, %xmm2 +# CHECK-NEXT: [1,2] . D==========eeeeeE------------------R. vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: [1,3] . D===============eeeeeE-------------R. vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: [1,4] . D===================eeeeeE---------R vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: [1,5] . D========================eeeeeE----R vaddps %ymm4, %ymm5, %ymm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -81,9 +93,9 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 2 10.0 0.5 0.0 vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1. 2 1.0 1.0 11.0 vfrczpd %xmm1, %xmm2 -# CHECK-NEXT: 2. 2 3.5 0.0 7.5 vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: 3. 2 8.5 0.0 6.0 vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: 4. 2 11.0 0.0 3.5 vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: 5. 2 16.0 0.0 2.0 vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: 0. 2 15.5 0.5 0.0 vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1. 2 2.0 2.0 12.0 vfrczpd %xmm1, %xmm2 +# CHECK-NEXT: 2. 2 11.5 0.5 9.0 vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: 3. 2 16.5 0.0 6.5 vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: 4. 2 20.5 0.0 4.5 vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: 5. 2 25.5 0.0 2.0 vaddps %ymm4, %ymm5, %ymm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/xop-super-registers-2.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=2 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=2 < %s | FileCheck %s vmulps %ymm0, %ymm1, %ymm2 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 @@ -10,13 +10,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 600 -# CHECK-NEXT: Total Cycles: 316 -# CHECK-NEXT: Total uOps: 600 +# CHECK-NEXT: Total Cycles: 653 +# CHECK-NEXT: Total uOps: 1100 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.90 -# CHECK-NEXT: IPC: 1.90 -# CHECK-NEXT: Block RThroughput: 3.0 +# CHECK-NEXT: uOps Per Cycle: 1.68 +# CHECK-NEXT: IPC: 0.92 +# CHECK-NEXT: Block RThroughput: 6.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -27,52 +27,64 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 5 1.00 vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 -# CHECK-NEXT: 1 5 1.00 vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: 1 5 1.00 vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: 2 5 2.00 vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 3 2.00 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 +# CHECK-NEXT: 2 5 2.00 vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: 2 5 2.00 vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm4, %ymm5, %ymm0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 3.00 2.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 4.54 4.46 - - - - 4.99 6.01 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: - - 1.00 - - - - - vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.52 0.48 - - - - - 2.00 - - - - vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.99 0.01 - - - - vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - - 2.00 - - - - vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: - - - - - - - - 0.52 0.48 - - - - 2.00 - - - - - vaddps %ymm4, %ymm5, %ymm0 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 -# CHECK-NEXT: Index 0123456789 01234 +# CHECK-NEXT: 0123456789 012 +# CHECK-NEXT: Index 0123456789 0123456789 -# CHECK: [0,0] DeeeeeER . . . . vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [0,1] DeE----R . . . . vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 -# CHECK-NEXT: [0,2] D=eeeeeER . . . . vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: [0,3] D======eeeER . . . vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: [0,4] .D========eeeeeER . . vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: [0,5] .D=============eeeER. . vaddps %ymm4, %ymm5, %ymm0 -# CHECK-NEXT: [1,0] .D================eeeeeER vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [1,1] .DeE--------------------R vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 -# CHECK-NEXT: [1,2] . DeeeeeE---------------R vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: [1,3] . D=====eeeE------------R vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: [1,4] . D========eeeeeE-------R vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: [1,5] . D=============eeeE----R vaddps %ymm4, %ymm5, %ymm0 +# CHECK: [0,0] DeeeeeER . . . . . . vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [0,1] DeeeE--R . . . . . . vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 +# CHECK-NEXT: [0,2] .D==eeeeeER . . . . . vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: [0,3] .D=======eeeeeER . . . . vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: [0,4] . D============eeeeeER . . . vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: [0,5] . D=================eeeeeER . . vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: [1,0] . D=====================eeeeeER. vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [1,1] . D=eeeE----------------------R. vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 +# CHECK-NEXT: [1,2] . D=====eeeeeE---------------R. vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: [1,3] . D===========eeeeeE---------R. vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: [1,4] . D===============eeeeeE-----R vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: [1,5] . D====================eeeeeER vaddps %ymm4, %ymm5, %ymm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -81,9 +93,9 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 2 9.0 0.5 0.0 vmulps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1. 2 1.0 1.0 12.0 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 -# CHECK-NEXT: 2. 2 1.5 0.0 7.5 vmulps %ymm2, %ymm3, %ymm4 -# CHECK-NEXT: 3. 2 6.5 0.0 6.0 vaddps %ymm4, %ymm5, %ymm6 -# CHECK-NEXT: 4. 2 9.0 0.0 3.5 vmulps %ymm6, %ymm3, %ymm4 -# CHECK-NEXT: 5. 2 14.0 0.0 2.0 vaddps %ymm4, %ymm5, %ymm0 +# CHECK-NEXT: 0. 2 11.5 0.5 0.0 vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1. 2 1.5 1.5 12.0 vpermil2pd $16, %xmm3, %xmm5, %xmm1, %xmm2 +# CHECK-NEXT: 2. 2 4.5 1.0 7.5 vmulps %ymm2, %ymm3, %ymm4 +# CHECK-NEXT: 3. 2 10.0 0.5 4.5 vaddps %ymm4, %ymm5, %ymm6 +# CHECK-NEXT: 4. 2 14.5 0.5 2.5 vmulps %ymm6, %ymm3, %ymm4 +# CHECK-NEXT: 5. 2 19.5 0.0 0.0 vaddps %ymm4, %ymm5, %ymm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/zero-idioms-avx-256.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/zero-idioms-avx-256.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/zero-idioms-avx-256.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -timeline-max-iterations=3 < %s | FileCheck %s # TODO: Fix the processor resource usage for zero-idiom YMM XOR instructions. # Those vector XOR instructions should only consume 1cy of JFPU1 (instead @@ -40,13 +40,13 @@ # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 300 -# CHECK-NEXT: Total Cycles: 107 -# CHECK-NEXT: Total uOps: 300 +# CHECK-NEXT: Total Cycles: 305 +# CHECK-NEXT: Total uOps: 600 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 2.80 -# CHECK-NEXT: IPC: 2.80 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.97 +# CHECK-NEXT: IPC: 0.98 +# CHECK-NEXT: Block RThroughput: 2.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -57,42 +57,55 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 1 1 1.00 vxorps %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: 1 1 0.50 vblendps $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: 2 2 1.00 vxorps %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: 2 2 1.00 vblendps $2, %ymm1, %ymm2, %ymm3 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 2.52 2.48 - - - - 3.00 3.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: - - - - - 1.00 - - vxorps %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: - - 1.00 - - - - - vblendps $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 0.98 1.02 - - - - vxorps %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: - - - - - - - - 1.02 0.98 - - - - 0.02 1.98 - - - - vblendps $2, %ymm1, %ymm2, %ymm3 # CHECK: Timeline view: +# CHECK-NEXT: 012 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [0,1] D===eER . vxorps %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: [0,2] D====eER . vblendps $2, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: [1,0] D=eeeE-R . vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [1,1] .D===eER . vxorps %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: [1,2] .D====eER. vblendps $2, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: [2,0] .D=eeeE-R. vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [2,1] .D====eER. vxorps %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: [2,2] . D====eER vblendps $2, %ymm1, %ymm2, %ymm3 +# CHECK: [0,0] DeeeeeER . . vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [0,1] DeeE---R . . vxorps %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: [0,2] .D=eeE-R . . vblendps $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: [1,0] .D=eeeeeER. . vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [1,1] . D==eeE-R. . vxorps %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: [1,2] . D====eeER . vblendps $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: [2,0] . D=eeeeeER. vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [2,1] . D===eeE-R. vxorps %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: [2,2] . D====eeER vblendps $2, %ymm1, %ymm2, %ymm3 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -101,21 +114,21 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 1.7 1.7 0.7 vaddps %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 1. 3 4.3 0.0 0.0 vxorps %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: 2. 3 5.0 0.0 0.0 vblendps $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 0. 3 1.7 1.7 0.0 vaddps %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: 1. 3 2.7 2.7 1.7 vxorps %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: 2. 3 4.0 0.0 0.3 vblendps $2, %ymm1, %ymm2, %ymm3 # CHECK: [1] Code Region - ZERO-IDIOM-2 # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 300 -# CHECK-NEXT: Total Cycles: 107 -# CHECK-NEXT: Total uOps: 300 +# CHECK-NEXT: Total Cycles: 305 +# CHECK-NEXT: Total uOps: 600 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 2.80 -# CHECK-NEXT: IPC: 2.80 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.97 +# CHECK-NEXT: IPC: 0.98 +# CHECK-NEXT: Block RThroughput: 2.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -126,42 +139,55 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddpd %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 1 1 1.00 vxorpd %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: 1 1 0.50 vblendpd $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 2 5 2.00 vaddpd %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: 2 2 1.00 vxorpd %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: 2 2 1.00 vblendpd $2, %ymm1, %ymm2, %ymm3 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 1.00 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 2.52 2.48 - - - - 3.00 3.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vaddpd %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: - - - - - 1.00 - - vxorpd %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: - - 1.00 - - - - - vblendpd $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddpd %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - 0.98 1.02 - - - - vxorpd %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: - - - - - - - - 1.02 0.98 - - - - 0.02 1.98 - - - - vblendpd $2, %ymm1, %ymm2, %ymm3 # CHECK: Timeline view: +# CHECK-NEXT: 012 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . vaddpd %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [0,1] D===eER . vxorpd %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: [0,2] D====eER . vblendpd $2, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: [1,0] D=eeeE-R . vaddpd %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [1,1] .D===eER . vxorpd %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: [1,2] .D====eER. vblendpd $2, %ymm1, %ymm2, %ymm3 -# CHECK-NEXT: [2,0] .D=eeeE-R. vaddpd %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [2,1] .D====eER. vxorpd %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: [2,2] . D====eER vblendpd $2, %ymm1, %ymm2, %ymm3 +# CHECK: [0,0] DeeeeeER . . vaddpd %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [0,1] DeeE---R . . vxorpd %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: [0,2] .D=eeE-R . . vblendpd $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: [1,0] .D=eeeeeER. . vaddpd %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [1,1] . D==eeE-R. . vxorpd %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: [1,2] . D====eeER . vblendpd $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: [2,0] . D=eeeeeER. vaddpd %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [2,1] . D===eeE-R. vxorpd %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: [2,2] . D====eeER vblendpd $2, %ymm1, %ymm2, %ymm3 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -170,21 +196,21 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 1.7 1.7 0.7 vaddpd %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 1. 3 4.3 0.0 0.0 vxorpd %ymm1, %ymm1, %ymm1 -# CHECK-NEXT: 2. 3 5.0 0.0 0.0 vblendpd $2, %ymm1, %ymm2, %ymm3 +# CHECK-NEXT: 0. 3 1.7 1.7 0.0 vaddpd %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: 1. 3 2.7 2.7 1.7 vxorpd %ymm1, %ymm1, %ymm1 +# CHECK-NEXT: 2. 3 4.0 0.0 0.3 vblendpd $2, %ymm1, %ymm2, %ymm3 # CHECK: [2] Code Region - ZERO-IDIOM-3 # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 200 -# CHECK-NEXT: Total Cycles: 106 -# CHECK-NEXT: Total uOps: 200 +# CHECK-NEXT: Total Cycles: 206 +# CHECK-NEXT: Total uOps: 400 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.89 -# CHECK-NEXT: IPC: 1.89 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.94 +# CHECK-NEXT: IPC: 0.97 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -195,37 +221,50 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 2 1.00 vandnps %ymm2, %ymm2, %ymm3 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 1.50 1.50 - - - - 2.00 2.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - - 2.00 - - - - vandnps %ymm2, %ymm2, %ymm3 # CHECK: Timeline view: -# CHECK-NEXT: Index 012345678 +# CHECK-NEXT: 01 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [0,1] D===eER . vandnps %ymm2, %ymm2, %ymm3 -# CHECK-NEXT: [1,0] D=eeeER . vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [1,1] D====eER. vandnps %ymm2, %ymm2, %ymm3 -# CHECK-NEXT: [2,0] .D=eeeER. vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [2,1] .D====eER vandnps %ymm2, %ymm2, %ymm3 +# CHECK: [0,0] DeeeeeER .. vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [0,1] DeeE---R .. vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: [1,0] .D=eeeeeER.. vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [1,1] .D=eeE---R.. vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: [2,0] . D==eeeeeER vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [2,1] . D==eeE---R vandnps %ymm2, %ymm2, %ymm3 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -234,20 +273,20 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 1.7 1.7 0.0 vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1. 3 4.7 0.0 0.0 vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: 0. 3 2.0 2.0 0.0 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1. 3 2.0 2.0 3.0 vandnps %ymm2, %ymm2, %ymm3 # CHECK: [3] Code Region - ZERO-IDIOM-4 # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 200 -# CHECK-NEXT: Total Cycles: 106 -# CHECK-NEXT: Total uOps: 200 +# CHECK-NEXT: Total Cycles: 206 +# CHECK-NEXT: Total uOps: 400 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.89 -# CHECK-NEXT: IPC: 1.89 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.94 +# CHECK-NEXT: IPC: 0.97 +# CHECK-NEXT: Block RThroughput: 2.0 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -258,37 +297,50 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 3 1.00 vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1 1 1.00 vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 2 1.00 vandnps %ymm2, %ymm2, %ymm3 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - 1.50 1.50 - - - - 2.00 2.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: - - - - - 1.00 - - vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - - 2.00 - - - - - vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - - - 2.00 - - - - vandnps %ymm2, %ymm2, %ymm3 # CHECK: Timeline view: -# CHECK-NEXT: Index 012345678 +# CHECK-NEXT: 01 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeeeER . vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [0,1] D===eER . vandnps %ymm2, %ymm2, %ymm3 -# CHECK-NEXT: [1,0] D=eeeER . vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [1,1] D====eER. vandnps %ymm2, %ymm2, %ymm3 -# CHECK-NEXT: [2,0] .D=eeeER. vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: [2,1] .D====eER vandnps %ymm2, %ymm2, %ymm3 +# CHECK: [0,0] DeeeeeER .. vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [0,1] DeeE---R .. vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: [1,0] .D=eeeeeER.. vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [1,1] .D=eeE---R.. vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: [2,0] . D==eeeeeER vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: [2,1] . D==eeE---R vandnps %ymm2, %ymm2, %ymm3 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -297,20 +349,20 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 1.7 1.7 0.0 vaddps %ymm0, %ymm1, %ymm2 -# CHECK-NEXT: 1. 3 4.7 0.0 0.0 vandnps %ymm2, %ymm2, %ymm3 +# CHECK-NEXT: 0. 3 2.0 2.0 0.0 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1. 3 2.0 2.0 3.0 vandnps %ymm2, %ymm2, %ymm3 # CHECK: [4] Code Region - ZERO-IDIOM-5 # CHECK: Iterations: 100 # CHECK-NEXT: Instructions: 200 -# CHECK-NEXT: Total Cycles: 403 -# CHECK-NEXT: Total uOps: 200 +# CHECK-NEXT: Total Cycles: 903 +# CHECK-NEXT: Total uOps: 1000 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 0.50 -# CHECK-NEXT: IPC: 0.50 -# CHECK-NEXT: Block RThroughput: 1.0 +# CHECK-NEXT: uOps Per Cycle: 1.11 +# CHECK-NEXT: IPC: 0.22 +# CHECK-NEXT: Block RThroughput: 2.5 # CHECK: Instruction Info: # CHECK-NEXT: [1]: #uOps @@ -321,38 +373,50 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 1 1.00 vperm2f128 $136, %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 1 3 1.00 vaddps %ymm1, %ymm1, %ymm0 +# CHECK-NEXT: 8 4 0.50 vperm2f128 $136, %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: 2 5 2.00 vaddps %ymm1, %ymm1, %ymm0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - - 1.00 - 1.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - 2.00 - - - - 2.00 1.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - 1.00 - - vperm2f128 $136, %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: - - - 1.00 - - - - vaddps %ymm1, %ymm1, %ymm0 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - 1.00 - - - - vperm2f128 $136, %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - - 2.00 - - - - - vaddps %ymm1, %ymm1, %ymm0 # CHECK: Timeline view: -# CHECK-NEXT: 01234 -# CHECK-NEXT: Index 0123456789 +# CHECK-NEXT: 0123456789 +# CHECK-NEXT: Index 0123456789 0123456789 -# CHECK: [0,0] DeER . . . vperm2f128 $136, %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [0,1] D=eeeER . . vaddps %ymm1, %ymm1, %ymm0 -# CHECK-NEXT: [1,0] D====eER . . vperm2f128 $136, %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [1,1] D=====eeeER . vaddps %ymm1, %ymm1, %ymm0 -# CHECK-NEXT: [2,0] .D=======eER . vperm2f128 $136, %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: [2,1] .D========eeeER vaddps %ymm1, %ymm1, %ymm0 +# CHECK: [0,0] DeeeeER . . . . . vperm2f128 $136, %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [0,1] . D==eeeeeER . . . . vaddps %ymm1, %ymm1, %ymm0 +# CHECK-NEXT: [1,0] . D======eeeeER . . . vperm2f128 $136, %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [1,1] . D========eeeeeER . . vaddps %ymm1, %ymm1, %ymm0 +# CHECK-NEXT: [2,0] . .D============eeeeER. . vperm2f128 $136, %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: [2,1] . . D==============eeeeeER vaddps %ymm1, %ymm1, %ymm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -361,5 +425,5 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 4.7 0.3 0.0 vperm2f128 $136, %ymm0, %ymm0, %ymm1 -# CHECK-NEXT: 1. 3 5.7 0.0 0.0 vaddps %ymm1, %ymm1, %ymm0 +# CHECK-NEXT: 0. 3 7.0 0.3 0.0 vperm2f128 $136, %ymm0, %ymm0, %ymm1 +# CHECK-NEXT: 1. 3 9.0 0.0 0.0 vaddps %ymm1, %ymm1, %ymm0 Index: llvm/trunk/test/tools/llvm-mca/X86/BdVer2/zero-idioms.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/BdVer2/zero-idioms.s +++ llvm/trunk/test/tools/llvm-mca/X86/BdVer2/zero-idioms.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -register-file-stats -iterations=1 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -timeline -register-file-stats -iterations=1 < %s | FileCheck %s subl %eax, %eax subq %rax, %rax @@ -90,12 +90,12 @@ # CHECK: Iterations: 1 # CHECK-NEXT: Instructions: 71 -# CHECK-NEXT: Total Cycles: 39 +# CHECK-NEXT: Total Cycles: 26 # CHECK-NEXT: Total uOps: 71 # CHECK: Dispatch Width: 4 -# CHECK-NEXT: uOps Per Cycle: 1.82 -# CHECK-NEXT: IPC: 1.82 +# CHECK-NEXT: uOps Per Cycle: 2.73 +# CHECK-NEXT: IPC: 2.73 # CHECK-NEXT: Block RThroughput: 17.8 # CHECK: Instruction Info: @@ -111,25 +111,25 @@ # CHECK-NEXT: 1 0 0.25 subq %rax, %rax # CHECK-NEXT: 1 0 0.25 xorl %eax, %eax # CHECK-NEXT: 1 0 0.25 xorq %rax, %rax -# CHECK-NEXT: 1 3 1.00 pcmpgtb %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpgtd %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 pcmpgtw %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 pcmpgtb %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 pcmpgtd %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 pcmpgtw %mm2, %mm2 # CHECK-NEXT: 1 0 0.25 pcmpgtb %xmm2, %xmm2 # CHECK-NEXT: 1 0 0.25 pcmpgtd %xmm2, %xmm2 -# CHECK-NEXT: 1 0 0.25 pcmpgtq %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 pcmpgtq %xmm2, %xmm2 # CHECK-NEXT: 1 0 0.25 pcmpgtw %xmm2, %xmm2 # CHECK-NEXT: 1 0 0.25 vpcmpgtb %xmm3, %xmm3, %xmm3 # CHECK-NEXT: 1 0 0.25 vpcmpgtd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 0 0.25 vpcmpgtq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcmpgtq %xmm3, %xmm3, %xmm3 # CHECK-NEXT: 1 0 0.25 vpcmpgtw %xmm3, %xmm3, %xmm3 # CHECK-NEXT: 1 0 0.25 vpcmpgtb %xmm3, %xmm3, %xmm5 # CHECK-NEXT: 1 0 0.25 vpcmpgtd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 0 0.25 vpcmpgtq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 vpcmpgtq %xmm3, %xmm3, %xmm5 # CHECK-NEXT: 1 0 0.25 vpcmpgtw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 3 1.00 psubb %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 psubd %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 psubq %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 psubw %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 psubb %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 psubd %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 psubq %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 psubw %mm2, %mm2 # CHECK-NEXT: 1 0 0.25 psubb %xmm2, %xmm2 # CHECK-NEXT: 1 0 0.25 psubd %xmm2, %xmm2 # CHECK-NEXT: 1 0 0.25 psubq %xmm2, %xmm2 @@ -142,37 +142,37 @@ # CHECK-NEXT: 1 0 0.25 vpsubd %xmm3, %xmm3, %xmm5 # CHECK-NEXT: 1 0 0.25 vpsubq %xmm3, %xmm3, %xmm5 # CHECK-NEXT: 1 0 0.25 vpsubw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 3 1.00 psubsb %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 psubsw %mm2, %mm2 -# CHECK-NEXT: 1 1 0.50 psubsb %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 psubsw %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubsb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpsubsw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 1 0.50 vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 3 1.00 psubusb %mm2, %mm2 -# CHECK-NEXT: 1 3 1.00 psubusw %mm2, %mm2 -# CHECK-NEXT: 1 1 0.50 psubusb %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 psubusw %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.50 vpsubusb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpsubusw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 1 0.50 vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 1 1 1.00 andnps %xmm0, %xmm0 -# CHECK-NEXT: 1 1 1.00 andnpd %xmm1, %xmm1 -# CHECK-NEXT: 1 1 1.00 vandnps %xmm2, %xmm2, %xmm2 -# CHECK-NEXT: 1 1 1.00 vandnpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: 1 1 0.33 pandn %mm2, %mm2 -# CHECK-NEXT: 1 1 0.33 pandn %xmm2, %xmm2 -# CHECK-NEXT: 1 1 0.33 vpandn %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 1 1 1.00 vandnps %xmm2, %xmm2, %xmm5 -# CHECK-NEXT: 1 1 1.00 vandnpd %xmm1, %xmm1, %xmm5 -# CHECK-NEXT: 1 1 0.33 vpandn %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 psubsb %mm2, %mm2 +# CHECK-NEXT: 1 2 0.50 psubsw %mm2, %mm2 +# CHECK-NEXT: 1 2 0.50 psubsb %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 psubsw %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubsb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpsubsw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 psubusb %mm2, %mm2 +# CHECK-NEXT: 1 2 0.50 psubusw %mm2, %mm2 +# CHECK-NEXT: 1 2 0.50 psubusb %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 psubusw %xmm2, %xmm2 +# CHECK-NEXT: 1 2 0.50 vpsubusb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpsubusw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 2 0.50 vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 1 0 0.25 andnps %xmm0, %xmm0 +# CHECK-NEXT: 1 0 0.25 andnpd %xmm1, %xmm1 +# CHECK-NEXT: 1 0 0.25 vandnps %xmm2, %xmm2, %xmm2 +# CHECK-NEXT: 1 0 0.25 vandnpd %xmm1, %xmm1, %xmm1 +# CHECK-NEXT: 1 0 0.25 pandn %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 pandn %xmm2, %xmm2 +# CHECK-NEXT: 1 0 0.25 vpandn %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 1 0 0.25 vandnps %xmm2, %xmm2, %xmm5 +# CHECK-NEXT: 1 0 0.25 vandnpd %xmm1, %xmm1, %xmm5 +# CHECK-NEXT: 1 0 0.25 vpandn %xmm3, %xmm3, %xmm5 # CHECK-NEXT: 1 0 0.25 xorps %xmm0, %xmm0 # CHECK-NEXT: 1 0 0.25 xorpd %xmm1, %xmm1 # CHECK-NEXT: 1 0 0.25 vxorps %xmm2, %xmm2, %xmm2 # CHECK-NEXT: 1 0 0.25 vxorpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: 1 1 0.33 pxor %mm2, %mm2 +# CHECK-NEXT: 1 0 0.25 pxor %mm2, %mm2 # CHECK-NEXT: 1 0 0.25 pxor %xmm2, %xmm2 # CHECK-NEXT: 1 0 0.25 vpxor %xmm3, %xmm3, %xmm3 # CHECK-NEXT: 1 0 0.25 vxorps %xmm4, %xmm4, %xmm5 @@ -180,172 +180,194 @@ # CHECK-NEXT: 1 0 0.25 vpxor %xmm3, %xmm3, %xmm5 # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 75 -# CHECK-NEXT: Max number of mappings used: 51 +# CHECK-NEXT: Total number of mappings created: 1 +# CHECK-NEXT: Max number of mappings used: 1 + +# CHECK: * Register File #1 -- PdFpuPRF: +# CHECK-NEXT: Number of physical registers: 160 +# CHECK-NEXT: Total number of mappings created: 1 +# CHECK-NEXT: Max number of mappings used: 1 + +# CHECK: * Register File #2 -- PdIntegerPRF: +# CHECK-NEXT: Number of physical registers: 96 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Resources: -# CHECK-NEXT: [0] - SBDivider -# CHECK-NEXT: [1] - SBFPDivider -# CHECK-NEXT: [2] - SBPort0 -# CHECK-NEXT: [3] - SBPort1 -# CHECK-NEXT: [4] - SBPort4 -# CHECK-NEXT: [5] - SBPort5 -# CHECK-NEXT: [6.0] - SBPort23 -# CHECK-NEXT: [6.1] - SBPort23 +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16] - PdMul # CHECK: Resource pressure per iteration: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 5.00 16.00 - 13.00 - - +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] +# CHECK-NEXT: - - - - - - - - - - 8.00 11.00 - - 9.00 10.00 - - - - # CHECK: Resource pressure by instruction: -# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - - - - - - - subl %eax, %eax -# CHECK-NEXT: - - - - - - - - subq %rax, %rax -# CHECK-NEXT: - - - - - - - - xorl %eax, %eax -# CHECK-NEXT: - - - - - - - - xorq %rax, %rax -# CHECK-NEXT: - - - 1.00 - - - - pcmpgtb %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpgtd %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - pcmpgtw %mm2, %mm2 -# CHECK-NEXT: - - - - - - - - pcmpgtb %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - pcmpgtd %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - pcmpgtq %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - pcmpgtw %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - vpcmpgtb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpcmpgtd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpcmpgtq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpcmpgtw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpcmpgtb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - - - - vpcmpgtd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - - - - vpcmpgtq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - - - - vpcmpgtw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - 1.00 - - - - psubb %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubd %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubq %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubw %mm2, %mm2 -# CHECK-NEXT: - - - - - - - - psubb %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - psubd %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - psubq %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - psubw %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - vpsubb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpsubd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpsubq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpsubw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vpsubb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - - - - vpsubd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - - - - vpsubq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - - - - vpsubw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - 1.00 - - - - psubsb %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubsw %mm2, %mm2 -# CHECK-NEXT: - - - - - 1.00 - - psubsb %xmm2, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - psubsw %xmm2, %xmm2 -# CHECK-NEXT: - - - 1.00 - - - - vpsubsb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vpsubsw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - 1.00 - - - - vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - 1.00 - - vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - 1.00 - - - - psubusb %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubusw %mm2, %mm2 -# CHECK-NEXT: - - - 1.00 - - - - psubusb %xmm2, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - psubusw %xmm2, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vpsubusb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - 1.00 - - - - vpsubusw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - 1.00 - - - - vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - 1.00 - - andnps %xmm0, %xmm0 -# CHECK-NEXT: - - - - - 1.00 - - andnpd %xmm1, %xmm1 -# CHECK-NEXT: - - - - - 1.00 - - vandnps %xmm2, %xmm2, %xmm2 -# CHECK-NEXT: - - - - - 1.00 - - vandnpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: - - 1.00 - - - - - pandn %mm2, %mm2 -# CHECK-NEXT: - - 1.00 - - - - - pandn %xmm2, %xmm2 -# CHECK-NEXT: - - 1.00 - - - - - vpandn %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - 1.00 - - vandnps %xmm2, %xmm2, %xmm5 -# CHECK-NEXT: - - - - - 1.00 - - vandnpd %xmm1, %xmm1, %xmm5 -# CHECK-NEXT: - - 1.00 - - - - - vpandn %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: - - - - - - - - xorps %xmm0, %xmm0 -# CHECK-NEXT: - - - - - - - - xorpd %xmm1, %xmm1 -# CHECK-NEXT: - - - - - - - - vxorps %xmm2, %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - vxorpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: - - 1.00 - - - - - pxor %mm2, %mm2 -# CHECK-NEXT: - - - - - - - - pxor %xmm2, %xmm2 -# CHECK-NEXT: - - - - - - - - vpxor %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: - - - - - - - - vxorps %xmm4, %xmm4, %xmm5 -# CHECK-NEXT: - - - - - - - - vxorpd %xmm1, %xmm1, %xmm3 -# CHECK-NEXT: - - - - - - - - vpxor %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - subl %eax, %eax +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - subq %rax, %rax +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - xorl %eax, %eax +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - xorq %rax, %rax +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pcmpgtb %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pcmpgtd %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pcmpgtw %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pcmpgtb %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pcmpgtd %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - pcmpgtq %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pcmpgtw %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 1.00 - - - - - vpcmpgtq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - vpcmpgtq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpcmpgtw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubb %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubd %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubq %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubw %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubb %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubd %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubq %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - psubw %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpsubw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 1.00 - - - - - psubsb %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - psubsw %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - psubsb %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - 1.00 - - - - psubsw %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 1.00 - - - - - vpsubsb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - vpsubsw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - 1.00 - - - - vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 1.00 - - - - - psubusb %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - psubusw %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - psubusb %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - 1.00 - - - - psubusw %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - 1.00 - - - - - vpsubusb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - 1.00 - - - - vpsubusw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - 1.00 - - - - - vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - 1.00 - - - - vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - andnps %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - andnpd %xmm1, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vandnps %xmm2, %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vandnpd %xmm1, %xmm1, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pandn %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pandn %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpandn %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vandnps %xmm2, %xmm2, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vandnpd %xmm1, %xmm1, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpandn %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - xorps %xmm0, %xmm0 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - xorpd %xmm1, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vxorps %xmm2, %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vxorpd %xmm1, %xmm1, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pxor %mm2, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - pxor %xmm2, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpxor %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vxorps %xmm4, %xmm4, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vxorpd %xmm1, %xmm1, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - vpxor %xmm3, %xmm3, %xmm5 # CHECK: Timeline view: -# CHECK-NEXT: 0123456789 012345678 -# CHECK-NEXT: Index 0123456789 0123456789 +# CHECK-NEXT: 0123456789 +# CHECK-NEXT: Index 0123456789 012345 -# CHECK: [0,0] DR . . . . . . . . subl %eax, %eax -# CHECK-NEXT: [0,1] DR . . . . . . . . subq %rax, %rax -# CHECK-NEXT: [0,2] DR . . . . . . . . xorl %eax, %eax -# CHECK-NEXT: [0,3] DR . . . . . . . . xorq %rax, %rax -# CHECK-NEXT: [0,4] .DeeeER . . . . . . . pcmpgtb %mm2, %mm2 -# CHECK-NEXT: [0,5] .D===eeeER. . . . . . . pcmpgtd %mm2, %mm2 -# CHECK-NEXT: [0,6] .D======eeeER . . . . . . pcmpgtw %mm2, %mm2 -# CHECK-NEXT: [0,7] .D----------R . . . . . . pcmpgtb %xmm2, %xmm2 -# CHECK-NEXT: [0,8] . D---------R . . . . . . pcmpgtd %xmm2, %xmm2 -# CHECK-NEXT: [0,9] . D---------R . . . . . . pcmpgtq %xmm2, %xmm2 -# CHECK-NEXT: [0,10] . D---------R . . . . . . pcmpgtw %xmm2, %xmm2 -# CHECK-NEXT: [0,11] . D---------R . . . . . . vpcmpgtb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,12] . D--------R . . . . . . vpcmpgtd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,13] . D--------R . . . . . . vpcmpgtq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,14] . D--------R . . . . . . vpcmpgtw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,15] . D--------R . . . . . . vpcmpgtb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,16] . D-------R . . . . . . vpcmpgtd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,17] . D-------R . . . . . . vpcmpgtq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,18] . D-------R . . . . . . vpcmpgtw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,19] . D======eeeER . . . . . psubb %mm2, %mm2 -# CHECK-NEXT: [0,20] . D========eeeER . . . . . psubd %mm2, %mm2 -# CHECK-NEXT: [0,21] . D===========eeeER . . . . psubq %mm2, %mm2 -# CHECK-NEXT: [0,22] . D==============eeeER. . . . psubw %mm2, %mm2 -# CHECK-NEXT: [0,23] . D------------------R. . . . psubb %xmm2, %xmm2 -# CHECK-NEXT: [0,24] . .D-----------------R. . . . psubd %xmm2, %xmm2 -# CHECK-NEXT: [0,25] . .D-----------------R. . . . psubq %xmm2, %xmm2 -# CHECK-NEXT: [0,26] . .D-----------------R. . . . psubw %xmm2, %xmm2 -# CHECK-NEXT: [0,27] . .D-----------------R. . . . vpsubb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,28] . . D----------------R. . . . vpsubd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,29] . . D----------------R. . . . vpsubq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,30] . . D----------------R. . . . vpsubw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,31] . . D----------------R. . . . vpsubb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,32] . . D---------------R. . . . vpsubd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,33] . . D---------------R. . . . vpsubq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,34] . . D---------------R. . . . vpsubw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,35] . . D==============eeeER . . . psubsb %mm2, %mm2 -# CHECK-NEXT: [0,36] . . D================eeeER . . psubsw %mm2, %mm2 -# CHECK-NEXT: [0,37] . . DeE------------------R . . psubsb %xmm2, %xmm2 -# CHECK-NEXT: [0,38] . . D==eE----------------R . . psubsw %xmm2, %xmm2 -# CHECK-NEXT: [0,39] . . DeE------------------R . . vpsubsb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,40] . . DeE-----------------R . . vpsubsw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,41] . . D=eE----------------R . . vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,42] . . D==eE---------------R . . vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,43] . . D==================eeeER . . psubusb %mm2, %mm2 -# CHECK-NEXT: [0,44] . . .D====================eeeER . psubusw %mm2, %mm2 -# CHECK-NEXT: [0,45] . . .D=eE---------------------R . psubusb %xmm2, %xmm2 -# CHECK-NEXT: [0,46] . . .D==eE--------------------R . psubusw %xmm2, %xmm2 -# CHECK-NEXT: [0,47] . . .D===eE-------------------R . vpsubusb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,48] . . . D===eE------------------R . vpsubusw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,49] . . . D====eE-----------------R . vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,50] . . . D=====eE----------------R . vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,51] . . . D===eE------------------R . andnps %xmm0, %xmm0 -# CHECK-NEXT: [0,52] . . . D====eE----------------R . andnpd %xmm1, %xmm1 -# CHECK-NEXT: [0,53] . . . D======eE--------------R . vandnps %xmm2, %xmm2, %xmm2 -# CHECK-NEXT: [0,54] . . . D=====eE---------------R . vandnpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: [0,55] . . . D=====================eER. pandn %mm2, %mm2 -# CHECK-NEXT: [0,56] . . . D======eE--------------R. pandn %xmm2, %xmm2 -# CHECK-NEXT: [0,57] . . . D==eE------------------R. vpandn %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,58] . . . D=======eE-------------R. vandnps %xmm2, %xmm2, %xmm5 -# CHECK-NEXT: [0,59] . . . D======eE--------------R. vandnpd %xmm1, %xmm1, %xmm5 -# CHECK-NEXT: [0,60] . . . D==eE-----------------R. vpandn %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: [0,61] . . . D=E-------------------R. xorps %xmm0, %xmm0 -# CHECK-NEXT: [0,62] . . . D====E----------------R. xorpd %xmm1, %xmm1 -# CHECK-NEXT: [0,63] . . . D======E--------------R. vxorps %xmm2, %xmm2, %xmm2 -# CHECK-NEXT: [0,64] . . . .D===E----------------R. vxorpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: [0,65] . . . .D===================eER pxor %mm2, %mm2 -# CHECK-NEXT: [0,66] . . . .D=====E---------------R pxor %xmm2, %xmm2 -# CHECK-NEXT: [0,67] . . . .D=E-------------------R vpxor %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: [0,68] . . . . D--------------------R vxorps %xmm4, %xmm4, %xmm5 -# CHECK-NEXT: [0,69] . . . . D==E-----------------R vxorpd %xmm1, %xmm1, %xmm3 -# CHECK-NEXT: [0,70] . . . . D==E-----------------R vpxor %xmm3, %xmm3, %xmm5 +# CHECK: [0,0] DR . . . . . subl %eax, %eax +# CHECK-NEXT: [0,1] DR . . . . . subq %rax, %rax +# CHECK-NEXT: [0,2] DR . . . . . xorl %eax, %eax +# CHECK-NEXT: [0,3] DR . . . . . xorq %rax, %rax +# CHECK-NEXT: [0,4] .DR . . . . . pcmpgtb %mm2, %mm2 +# CHECK-NEXT: [0,5] .DR . . . . . pcmpgtd %mm2, %mm2 +# CHECK-NEXT: [0,6] .DR . . . . . pcmpgtw %mm2, %mm2 +# CHECK-NEXT: [0,7] .DR . . . . . pcmpgtb %xmm2, %xmm2 +# CHECK-NEXT: [0,8] . DR . . . . . pcmpgtd %xmm2, %xmm2 +# CHECK-NEXT: [0,9] . DeeER . . . . pcmpgtq %xmm2, %xmm2 +# CHECK-NEXT: [0,10] . D---R . . . . pcmpgtw %xmm2, %xmm2 +# CHECK-NEXT: [0,11] . D---R . . . . vpcmpgtb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,12] . D--R . . . . vpcmpgtd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,13] . DeeER . . . . vpcmpgtq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,14] . D---R . . . . vpcmpgtw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,15] . D---R . . . . vpcmpgtb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,16] . D--R . . . . vpcmpgtd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,17] . DeeER . . . . vpcmpgtq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,18] . D---R . . . . vpcmpgtw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,19] . D---R . . . . psubb %mm2, %mm2 +# CHECK-NEXT: [0,20] . D--R . . . . psubd %mm2, %mm2 +# CHECK-NEXT: [0,21] . D---R. . . . psubq %mm2, %mm2 +# CHECK-NEXT: [0,22] . D---R. . . . psubw %mm2, %mm2 +# CHECK-NEXT: [0,23] . D---R. . . . psubb %xmm2, %xmm2 +# CHECK-NEXT: [0,24] . .D--R. . . . psubd %xmm2, %xmm2 +# CHECK-NEXT: [0,25] . .D---R . . . psubq %xmm2, %xmm2 +# CHECK-NEXT: [0,26] . .D---R . . . psubw %xmm2, %xmm2 +# CHECK-NEXT: [0,27] . .D---R . . . vpsubb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,28] . . D--R . . . vpsubd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,29] . . D---R . . . vpsubq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,30] . . D---R . . . vpsubw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,31] . . D---R . . . vpsubb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,32] . . D--R . . . vpsubd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,33] . . D---R . . . vpsubq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,34] . . D---R . . . vpsubw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,35] . . DeeER . . . psubsb %mm2, %mm2 +# CHECK-NEXT: [0,36] . . DeeER . . . psubsw %mm2, %mm2 +# CHECK-NEXT: [0,37] . . DeeER . . . psubsb %xmm2, %xmm2 +# CHECK-NEXT: [0,38] . . D=eeER. . . psubsw %xmm2, %xmm2 +# CHECK-NEXT: [0,39] . . D=eeER. . . vpsubsb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,40] . . D=eeER . . vpsubsw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,41] . . D=eeER . . vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,42] . . D==eeER . . vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,43] . . D==eeER . . psubusb %mm2, %mm2 +# CHECK-NEXT: [0,44] . . .D==eeER . . psubusw %mm2, %mm2 +# CHECK-NEXT: [0,45] . . .D==eeER . . psubusb %xmm2, %xmm2 +# CHECK-NEXT: [0,46] . . .D===eeER . . psubusw %xmm2, %xmm2 +# CHECK-NEXT: [0,47] . . .D===eeER . . vpsubusb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,48] . . . D===eeER. . vpsubusw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,49] . . . D===eeER. . vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,50] . . . D====eeER . vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,51] . . . D-------R . andnps %xmm0, %xmm0 +# CHECK-NEXT: [0,52] . . . D------R . andnpd %xmm1, %xmm1 +# CHECK-NEXT: [0,53] . . . D------R . vandnps %xmm2, %xmm2, %xmm2 +# CHECK-NEXT: [0,54] . . . D-------R . vandnpd %xmm1, %xmm1, %xmm1 +# CHECK-NEXT: [0,55] . . . D-------R . pandn %mm2, %mm2 +# CHECK-NEXT: [0,56] . . . D------R . pandn %xmm2, %xmm2 +# CHECK-NEXT: [0,57] . . . D------R . vpandn %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,58] . . . D-------R . vandnps %xmm2, %xmm2, %xmm5 +# CHECK-NEXT: [0,59] . . . D-------R . vandnpd %xmm1, %xmm1, %xmm5 +# CHECK-NEXT: [0,60] . . . D------R . vpandn %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: [0,61] . . . D------R . xorps %xmm0, %xmm0 +# CHECK-NEXT: [0,62] . . . D-------R . xorpd %xmm1, %xmm1 +# CHECK-NEXT: [0,63] . . . D-------R . vxorps %xmm2, %xmm2, %xmm2 +# CHECK-NEXT: [0,64] . . . .D------R . vxorpd %xmm1, %xmm1, %xmm1 +# CHECK-NEXT: [0,65] . . . .D------R . pxor %mm2, %mm2 +# CHECK-NEXT: [0,66] . . . .D-------R. pxor %xmm2, %xmm2 +# CHECK-NEXT: [0,67] . . . .D-------R. vpxor %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: [0,68] . . . . D------R. vxorps %xmm4, %xmm4, %xmm5 +# CHECK-NEXT: [0,69] . . . . D------R. vxorpd %xmm1, %xmm1, %xmm3 +# CHECK-NEXT: [0,70] . . . . D-------R vpxor %xmm3, %xmm3, %xmm5 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -358,70 +380,70 @@ # CHECK-NEXT: 1. 1 0.0 0.0 0.0 subq %rax, %rax # CHECK-NEXT: 2. 1 0.0 0.0 0.0 xorl %eax, %eax # CHECK-NEXT: 3. 1 0.0 0.0 0.0 xorq %rax, %rax -# CHECK-NEXT: 4. 1 1.0 1.0 0.0 pcmpgtb %mm2, %mm2 -# CHECK-NEXT: 5. 1 4.0 0.0 0.0 pcmpgtd %mm2, %mm2 -# CHECK-NEXT: 6. 1 7.0 0.0 0.0 pcmpgtw %mm2, %mm2 -# CHECK-NEXT: 7. 1 0.0 0.0 10.0 pcmpgtb %xmm2, %xmm2 -# CHECK-NEXT: 8. 1 0.0 0.0 9.0 pcmpgtd %xmm2, %xmm2 -# CHECK-NEXT: 9. 1 0.0 0.0 9.0 pcmpgtq %xmm2, %xmm2 -# CHECK-NEXT: 10. 1 0.0 0.0 9.0 pcmpgtw %xmm2, %xmm2 -# CHECK-NEXT: 11. 1 0.0 0.0 9.0 vpcmpgtb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 12. 1 0.0 0.0 8.0 vpcmpgtd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 13. 1 0.0 0.0 8.0 vpcmpgtq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 14. 1 0.0 0.0 8.0 vpcmpgtw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 15. 1 0.0 0.0 8.0 vpcmpgtb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 16. 1 0.0 0.0 7.0 vpcmpgtd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 17. 1 0.0 0.0 7.0 vpcmpgtq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 18. 1 0.0 0.0 7.0 vpcmpgtw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 19. 1 7.0 0.0 0.0 psubb %mm2, %mm2 -# CHECK-NEXT: 20. 1 9.0 0.0 0.0 psubd %mm2, %mm2 -# CHECK-NEXT: 21. 1 12.0 0.0 0.0 psubq %mm2, %mm2 -# CHECK-NEXT: 22. 1 15.0 0.0 0.0 psubw %mm2, %mm2 -# CHECK-NEXT: 23. 1 0.0 0.0 18.0 psubb %xmm2, %xmm2 -# CHECK-NEXT: 24. 1 0.0 0.0 17.0 psubd %xmm2, %xmm2 -# CHECK-NEXT: 25. 1 0.0 0.0 17.0 psubq %xmm2, %xmm2 -# CHECK-NEXT: 26. 1 0.0 0.0 17.0 psubw %xmm2, %xmm2 -# CHECK-NEXT: 27. 1 0.0 0.0 17.0 vpsubb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 28. 1 0.0 0.0 16.0 vpsubd %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 29. 1 0.0 0.0 16.0 vpsubq %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 30. 1 0.0 0.0 16.0 vpsubw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 31. 1 0.0 0.0 16.0 vpsubb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 32. 1 0.0 0.0 15.0 vpsubd %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 33. 1 0.0 0.0 15.0 vpsubq %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 34. 1 0.0 0.0 15.0 vpsubw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 35. 1 15.0 0.0 0.0 psubsb %mm2, %mm2 -# CHECK-NEXT: 36. 1 17.0 0.0 0.0 psubsw %mm2, %mm2 -# CHECK-NEXT: 37. 1 1.0 1.0 18.0 psubsb %xmm2, %xmm2 -# CHECK-NEXT: 38. 1 3.0 1.0 16.0 psubsw %xmm2, %xmm2 -# CHECK-NEXT: 39. 1 1.0 1.0 18.0 vpsubsb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 40. 1 1.0 0.0 17.0 vpsubsw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 41. 1 2.0 0.0 16.0 vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 42. 1 3.0 1.0 15.0 vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 43. 1 19.0 0.0 0.0 psubusb %mm2, %mm2 -# CHECK-NEXT: 44. 1 21.0 0.0 0.0 psubusw %mm2, %mm2 -# CHECK-NEXT: 45. 1 2.0 0.0 21.0 psubusb %xmm2, %xmm2 -# CHECK-NEXT: 46. 1 3.0 0.0 20.0 psubusw %xmm2, %xmm2 -# CHECK-NEXT: 47. 1 4.0 3.0 19.0 vpsubusb %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 48. 1 4.0 0.0 18.0 vpsubusw %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 49. 1 5.0 0.0 17.0 vpsubsb %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 50. 1 6.0 1.0 16.0 vpsubsw %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 51. 1 4.0 4.0 18.0 andnps %xmm0, %xmm0 -# CHECK-NEXT: 52. 1 5.0 5.0 16.0 andnpd %xmm1, %xmm1 -# CHECK-NEXT: 53. 1 7.0 5.0 14.0 vandnps %xmm2, %xmm2, %xmm2 -# CHECK-NEXT: 54. 1 6.0 0.0 15.0 vandnpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: 55. 1 22.0 0.0 0.0 pandn %mm2, %mm2 -# CHECK-NEXT: 56. 1 7.0 0.0 14.0 pandn %xmm2, %xmm2 -# CHECK-NEXT: 57. 1 3.0 0.0 18.0 vpandn %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 58. 1 8.0 0.0 13.0 vandnps %xmm2, %xmm2, %xmm5 -# CHECK-NEXT: 59. 1 7.0 1.0 14.0 vandnpd %xmm1, %xmm1, %xmm5 -# CHECK-NEXT: 60. 1 3.0 0.0 17.0 vpandn %xmm3, %xmm3, %xmm5 -# CHECK-NEXT: 61. 1 2.0 0.0 19.0 xorps %xmm0, %xmm0 -# CHECK-NEXT: 62. 1 5.0 0.0 16.0 xorpd %xmm1, %xmm1 -# CHECK-NEXT: 63. 1 7.0 0.0 14.0 vxorps %xmm2, %xmm2, %xmm2 -# CHECK-NEXT: 64. 1 4.0 0.0 16.0 vxorpd %xmm1, %xmm1, %xmm1 -# CHECK-NEXT: 65. 1 20.0 0.0 0.0 pxor %mm2, %mm2 -# CHECK-NEXT: 66. 1 6.0 0.0 15.0 pxor %xmm2, %xmm2 -# CHECK-NEXT: 67. 1 2.0 0.0 19.0 vpxor %xmm3, %xmm3, %xmm3 -# CHECK-NEXT: 68. 1 0.0 0.0 20.0 vxorps %xmm4, %xmm4, %xmm5 -# CHECK-NEXT: 69. 1 3.0 0.0 17.0 vxorpd %xmm1, %xmm1, %xmm3 -# CHECK-NEXT: 70. 1 3.0 0.0 17.0 vpxor %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 4. 1 0.0 0.0 0.0 pcmpgtb %mm2, %mm2 +# CHECK-NEXT: 5. 1 0.0 0.0 0.0 pcmpgtd %mm2, %mm2 +# CHECK-NEXT: 6. 1 0.0 0.0 0.0 pcmpgtw %mm2, %mm2 +# CHECK-NEXT: 7. 1 0.0 0.0 0.0 pcmpgtb %xmm2, %xmm2 +# CHECK-NEXT: 8. 1 0.0 0.0 0.0 pcmpgtd %xmm2, %xmm2 +# CHECK-NEXT: 9. 1 1.0 1.0 0.0 pcmpgtq %xmm2, %xmm2 +# CHECK-NEXT: 10. 1 0.0 0.0 3.0 pcmpgtw %xmm2, %xmm2 +# CHECK-NEXT: 11. 1 0.0 0.0 3.0 vpcmpgtb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 12. 1 0.0 0.0 2.0 vpcmpgtd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 13. 1 1.0 1.0 0.0 vpcmpgtq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 14. 1 0.0 0.0 3.0 vpcmpgtw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 15. 1 0.0 0.0 3.0 vpcmpgtb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 16. 1 0.0 0.0 2.0 vpcmpgtd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 17. 1 1.0 1.0 0.0 vpcmpgtq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 18. 1 0.0 0.0 3.0 vpcmpgtw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 19. 1 0.0 0.0 3.0 psubb %mm2, %mm2 +# CHECK-NEXT: 20. 1 0.0 0.0 2.0 psubd %mm2, %mm2 +# CHECK-NEXT: 21. 1 0.0 0.0 3.0 psubq %mm2, %mm2 +# CHECK-NEXT: 22. 1 0.0 0.0 3.0 psubw %mm2, %mm2 +# CHECK-NEXT: 23. 1 0.0 0.0 3.0 psubb %xmm2, %xmm2 +# CHECK-NEXT: 24. 1 0.0 0.0 2.0 psubd %xmm2, %xmm2 +# CHECK-NEXT: 25. 1 0.0 0.0 3.0 psubq %xmm2, %xmm2 +# CHECK-NEXT: 26. 1 0.0 0.0 3.0 psubw %xmm2, %xmm2 +# CHECK-NEXT: 27. 1 0.0 0.0 3.0 vpsubb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 28. 1 0.0 0.0 2.0 vpsubd %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 29. 1 0.0 0.0 3.0 vpsubq %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 30. 1 0.0 0.0 3.0 vpsubw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 31. 1 0.0 0.0 3.0 vpsubb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 32. 1 0.0 0.0 2.0 vpsubd %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 33. 1 0.0 0.0 3.0 vpsubq %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 34. 1 0.0 0.0 3.0 vpsubw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 35. 1 1.0 1.0 0.0 psubsb %mm2, %mm2 +# CHECK-NEXT: 36. 1 1.0 1.0 0.0 psubsw %mm2, %mm2 +# CHECK-NEXT: 37. 1 1.0 1.0 0.0 psubsb %xmm2, %xmm2 +# CHECK-NEXT: 38. 1 2.0 2.0 0.0 psubsw %xmm2, %xmm2 +# CHECK-NEXT: 39. 1 2.0 2.0 0.0 vpsubsb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 40. 1 2.0 2.0 0.0 vpsubsw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 41. 1 2.0 2.0 0.0 vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 42. 1 3.0 3.0 0.0 vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 43. 1 3.0 3.0 0.0 psubusb %mm2, %mm2 +# CHECK-NEXT: 44. 1 3.0 3.0 0.0 psubusw %mm2, %mm2 +# CHECK-NEXT: 45. 1 3.0 3.0 0.0 psubusb %xmm2, %xmm2 +# CHECK-NEXT: 46. 1 4.0 4.0 0.0 psubusw %xmm2, %xmm2 +# CHECK-NEXT: 47. 1 4.0 4.0 0.0 vpsubusb %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 48. 1 4.0 4.0 0.0 vpsubusw %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 49. 1 4.0 4.0 0.0 vpsubsb %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 50. 1 5.0 5.0 0.0 vpsubsw %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 51. 1 0.0 0.0 7.0 andnps %xmm0, %xmm0 +# CHECK-NEXT: 52. 1 0.0 0.0 6.0 andnpd %xmm1, %xmm1 +# CHECK-NEXT: 53. 1 0.0 0.0 6.0 vandnps %xmm2, %xmm2, %xmm2 +# CHECK-NEXT: 54. 1 0.0 0.0 7.0 vandnpd %xmm1, %xmm1, %xmm1 +# CHECK-NEXT: 55. 1 0.0 0.0 7.0 pandn %mm2, %mm2 +# CHECK-NEXT: 56. 1 0.0 0.0 6.0 pandn %xmm2, %xmm2 +# CHECK-NEXT: 57. 1 0.0 0.0 6.0 vpandn %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 58. 1 0.0 0.0 7.0 vandnps %xmm2, %xmm2, %xmm5 +# CHECK-NEXT: 59. 1 0.0 0.0 7.0 vandnpd %xmm1, %xmm1, %xmm5 +# CHECK-NEXT: 60. 1 0.0 0.0 6.0 vpandn %xmm3, %xmm3, %xmm5 +# CHECK-NEXT: 61. 1 0.0 0.0 6.0 xorps %xmm0, %xmm0 +# CHECK-NEXT: 62. 1 0.0 0.0 7.0 xorpd %xmm1, %xmm1 +# CHECK-NEXT: 63. 1 0.0 0.0 7.0 vxorps %xmm2, %xmm2, %xmm2 +# CHECK-NEXT: 64. 1 0.0 0.0 6.0 vxorpd %xmm1, %xmm1, %xmm1 +# CHECK-NEXT: 65. 1 0.0 0.0 6.0 pxor %mm2, %mm2 +# CHECK-NEXT: 66. 1 0.0 0.0 7.0 pxor %xmm2, %xmm2 +# CHECK-NEXT: 67. 1 0.0 0.0 7.0 vpxor %xmm3, %xmm3, %xmm3 +# CHECK-NEXT: 68. 1 0.0 0.0 6.0 vxorps %xmm4, %xmm4, %xmm5 +# CHECK-NEXT: 69. 1 0.0 0.0 6.0 vxorpd %xmm1, %xmm1, %xmm3 +# CHECK-NEXT: 70. 1 0.0 0.0 7.0 vpxor %xmm3, %xmm3, %xmm5 Index: llvm/trunk/test/tools/llvm-mca/X86/bextr-read-after-ld.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/bextr-read-after-ld.s +++ llvm/trunk/test/tools/llvm-mca/X86/bextr-read-after-ld.s @@ -2,7 +2,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=HASWELL # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDWELL # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=SKYLAKE -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 @@ -12,8 +12,8 @@ # ALL: Iterations: 1 # ALL-NEXT: Instructions: 2 -# BDVER2-NEXT: Total Cycles: 10 -# BDVER2-NEXT: Total uOps: 4 +# BDVER2-NEXT: Total Cycles: 9 +# BDVER2-NEXT: Total uOps: 3 # BDWELL-NEXT: Total Cycles: 10 # BDWELL-NEXT: Total uOps: 4 @@ -31,8 +31,8 @@ # ZNVER1-NEXT: Total uOps: 3 # BDVER2: Dispatch Width: 4 -# BDVER2-NEXT: uOps Per Cycle: 0.40 -# BDVER2-NEXT: IPC: 0.20 +# BDVER2-NEXT: uOps Per Cycle: 0.33 +# BDVER2-NEXT: IPC: 0.22 # BDVER2-NEXT: Block RThroughput: 1.0 # BDWELL: Dispatch Width: 4 @@ -70,8 +70,8 @@ # ALL: [1] [2] [3] [4] [5] [6] Instructions: -# BDVER2-NEXT: 1 1 0.33 addl %edi, %esi -# BDVER2-NEXT: 3 7 1.00 * bextrl %esi, (%rdi), %eax +# BDVER2-NEXT: 1 1 0.50 addl %edi, %esi +# BDVER2-NEXT: 2 6 0.50 * bextrl %esi, (%rdi), %eax # BDWELL-NEXT: 1 1 0.25 addl %edi, %esi # BDWELL-NEXT: 3 7 0.50 * bextrl %esi, (%rdi), %eax @@ -90,15 +90,15 @@ # ALL: Timeline view: -# BDVER2-NEXT: Index 0123456789 +# BDVER2-NEXT: Index 012345678 # BDWELL-NEXT: Index 0123456789 # BTVER2-NEXT: Index 0123456 # HASWELL-NEXT: Index 0123456789 # SKYLAKE-NEXT: Index 0123456789 # ZNVER1-NEXT: Index 01234567 -# BDVER2: [0,0] DeER . . addl %edi, %esi -# BDVER2-NEXT: [0,1] DeeeeeeeER bextrl %esi, (%rdi), %eax +# BDVER2: [0,0] DeER . . addl %edi, %esi +# BDVER2-NEXT: [0,1] DeeeeeeER bextrl %esi, (%rdi), %eax # BDWELL: [0,0] DeER . . addl %edi, %esi # BDWELL-NEXT: [0,1] DeeeeeeeER bextrl %esi, (%rdi), %eax Index: llvm/trunk/test/tools/llvm-mca/X86/cpus.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/cpus.s +++ llvm/trunk/test/tools/llvm-mca/X86/cpus.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=BDVER2 %s +# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=BDVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=BTVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=ZNVER1 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=SANDYBRIDGE %s @@ -21,7 +21,7 @@ # BDVER2: Dispatch Width: 4 # BDVER2-NEXT: uOps Per Cycle: 0.97 # BDVER2-NEXT: IPC: 0.97 -# BDVER2-NEXT: Block RThroughput: 0.3 +# BDVER2-NEXT: Block RThroughput: 0.5 # BROADWELL: Dispatch Width: 4 # BROADWELL-NEXT: uOps Per Cycle: 0.97 Index: llvm/trunk/test/tools/llvm-mca/X86/read-after-ld-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/read-after-ld-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/read-after-ld-1.s @@ -3,7 +3,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=HASWELL # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDWELL # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=SKYLAKE -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 @@ -13,8 +13,8 @@ # ALL: Iterations: 1 # ALL-NEXT: Instructions: 2 -# BDVER2-NEXT: Total Cycles: 20 -# BDVER2-NEXT: Total uOps: 3 +# BDVER2-NEXT: Total Cycles: 17 +# BDVER2-NEXT: Total uOps: 2 # BDWELL-NEXT: Total Cycles: 17 # BDWELL-NEXT: Total uOps: 3 @@ -35,9 +35,9 @@ # ZNVER1-NEXT: Total uOps: 2 # BDVER2: Dispatch Width: 4 -# BDVER2-NEXT: uOps Per Cycle: 0.15 -# BDVER2-NEXT: IPC: 0.10 -# BDVER2-NEXT: Block RThroughput: 14.0 +# BDVER2-NEXT: uOps Per Cycle: 0.12 +# BDVER2-NEXT: IPC: 0.12 +# BDVER2-NEXT: Block RThroughput: 10.0 # BDWELL: Dispatch Width: 4 # BDWELL-NEXT: uOps Per Cycle: 0.18 @@ -71,7 +71,7 @@ # ALL: Timeline view: -# BDVER2-NEXT: 0123456789 +# BDVER2-NEXT: 0123456 # BDVER2-NEXT: Index 0123456789 # BDWELL-NEXT: 0123456 @@ -92,8 +92,8 @@ # ZNVER1-NEXT: 0123456789 # ZNVER1-NEXT: Index 0123456789 -# BDVER2: [0,0] DeeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 -# BDVER2-NEXT: [0,1] D========eeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 +# BDVER2: [0,0] DeeeeeeeeeER .. vdivps %xmm0, %xmm1, %xmm1 +# BDVER2-NEXT: [0,1] D====eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 # BDWELL: [0,0] DeeeeeeeeeeeER .. vdivps %xmm0, %xmm1, %xmm1 # BDWELL-NEXT: [0,1] D======eeeeeeeeER vaddps (%rax), %xmm1, %xmm1 @@ -122,7 +122,7 @@ # ALL: [0] [1] [2] [3] # ALL-NEXT: 0. 1 1.0 1.0 0.0 vdivps %xmm0, %xmm1, %xmm1 -# BDVER2-NEXT: 1. 1 9.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 +# BDVER2-NEXT: 1. 1 5.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 # BDWELL-NEXT: 1. 1 7.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 # BTVER2-NEXT: 1. 1 15.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 # HASWELL-NEXT: 1. 1 8.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 Index: llvm/trunk/test/tools/llvm-mca/X86/scheduler-queue-usage.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/scheduler-queue-usage.s +++ llvm/trunk/test/tools/llvm-mca/X86/scheduler-queue-usage.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BDVER2 %s +# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BDVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BTVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,ZNVER1 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,SNB %s @@ -82,7 +82,10 @@ # ZNVER1-NEXT: [4] Total number of buffer entries. # BDVER2: [1] [2] [3] [4] -# BDVER2-NEXT: SBPortAny 0 1 54 +# BDVER2-NEXT: PdEX 0 1 40 +# BDVER2-NEXT: PdFPU 0 0 64 +# BDVER2-NEXT: PdLoad 0 0 40 +# BDVER2-NEXT: PdStore 0 0 24 # BDW: [1] [2] [3] [4] # BDW-NEXT: BWPortAny 0 1 60 Index: llvm/trunk/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s +++ llvm/trunk/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py -# ZZZ: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=HASWELL @@ -30,6 +30,9 @@ # ALL: Timeline view: +# BDVER2-NEXT: 01234567 +# BDVER2-NEXT: Index 0123456789 + # BROADWELL-NEXT: 0123456789 # BROADWELL-NEXT: Index 0123456789 @@ -45,6 +48,9 @@ # ZNVER1-NEXT: 0123456789 0 # ZNVER1-NEXT: Index 0123456789 0123456789 +# BDVER2: [0,0] DeER . . . . leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: [0,1] D=eeeeeeeeeeeeeeER sqrtss (%rax), %xmm1 + # BROADWELL: [0,0] DeER . . . . leaq 8(%rsp,%rdi,2), %rax # BROADWELL-NEXT: [0,1] D=eeeeeeeeeeeeeeeeER sqrtss (%rax), %xmm1 @@ -69,6 +75,7 @@ # ALL: [0] [1] [2] [3] # ALL-NEXT: 0. 1 1.0 1.0 0.0 leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: 1. 1 2.0 0.0 0.0 sqrtss (%rax), %xmm1 # BROADWELL-NEXT: 1. 1 2.0 0.0 0.0 sqrtss (%rax), %xmm1 # BTVER2-NEXT: 1. 1 3.0 0.0 0.0 sqrtss (%rax), %xmm1 # HASWELL-NEXT: 1. 1 2.0 0.0 0.0 sqrtss (%rax), %xmm1 @@ -79,6 +86,9 @@ # ALL: Timeline view: +# BDVER2-NEXT: 01234567 +# BDVER2-NEXT: Index 0123456789 + # BROADWELL-NEXT: 0123456789 # BROADWELL-NEXT: Index 0123456789 01234 @@ -94,6 +104,9 @@ # ZNVER1-NEXT: 0123456789 0 # ZNVER1-NEXT: Index 0123456789 0123456789 +# BDVER2: [0,0] DeER . . . . leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: [0,1] D=eeeeeeeeeeeeeeER sqrtsd (%rax), %xmm1 + # BROADWELL: [0,0] DeER . . . . . leaq 8(%rsp,%rdi,2), %rax # BROADWELL-NEXT: [0,1] D=eeeeeeeeeeeeeeeeeeeeeER sqrtsd (%rax), %xmm1 @@ -118,6 +131,7 @@ # ALL: [0] [1] [2] [3] # ALL-NEXT: 0. 1 1.0 1.0 0.0 leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: 1. 1 2.0 0.0 0.0 sqrtsd (%rax), %xmm1 # BROADWELL-NEXT: 1. 1 2.0 0.0 0.0 sqrtsd (%rax), %xmm1 # BTVER2-NEXT: 1. 1 3.0 0.0 0.0 sqrtsd (%rax), %xmm1 # HASWELL-NEXT: 1. 1 2.0 0.0 0.0 sqrtsd (%rax), %xmm1 @@ -128,6 +142,7 @@ # ALL: Timeline view: +# BDVER2-NEXT: 0123 # BROADWELL-NEXT: 0123 # BTVER2-NEXT: 01 # HASWELL-NEXT: 0123 @@ -136,6 +151,9 @@ # ALL-NEXT: Index 0123456789 +# BDVER2: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: [0,1] D=eeeeeeeeeeER rsqrtss (%rax), %xmm1 + # BROADWELL: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax # BROADWELL-NEXT: [0,1] D=eeeeeeeeeeER rsqrtss (%rax), %xmm1 @@ -160,6 +178,7 @@ # ALL: [0] [1] [2] [3] # ALL-NEXT: 0. 1 1.0 1.0 0.0 leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: 1. 1 2.0 0.0 0.0 rsqrtss (%rax), %xmm1 # BROADWELL-NEXT: 1. 1 2.0 0.0 0.0 rsqrtss (%rax), %xmm1 # BTVER2-NEXT: 1. 1 3.0 0.0 0.0 rsqrtss (%rax), %xmm1 # HASWELL-NEXT: 1. 1 2.0 0.0 0.0 rsqrtss (%rax), %xmm1 @@ -170,6 +189,7 @@ # ALL: Timeline view: +# BDVER2-NEXT: 0123 # BROADWELL-NEXT: 0123 # BTVER2-NEXT: 01 # HASWELL-NEXT: 0123 @@ -178,6 +198,9 @@ # ALL-NEXT: Index 0123456789 +# BDVER2: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: [0,1] D=eeeeeeeeeeER rcpss (%rax), %xmm1 + # BROADWELL: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax # BROADWELL-NEXT: [0,1] D=eeeeeeeeeeER rcpss (%rax), %xmm1 @@ -202,6 +225,7 @@ # ALL: [0] [1] [2] [3] # ALL-NEXT: 0. 1 1.0 1.0 0.0 leaq 8(%rsp,%rdi,2), %rax +# BDVER2-NEXT: 1. 1 2.0 0.0 0.0 rcpss (%rax), %xmm1 # BROADWELL-NEXT: 1. 1 2.0 0.0 0.0 rcpss (%rax), %xmm1 # BTVER2-NEXT: 1. 1 3.0 0.0 0.0 rcpss (%rax), %xmm1 # HASWELL-NEXT: 1. 1 2.0 0.0 0.0 rcpss (%rax), %xmm1 Index: llvm/trunk/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s +++ llvm/trunk/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s @@ -9,7 +9,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=SKYLAKE -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 @@ -21,8 +21,8 @@ # ALL: Iterations: 1 # ALL-NEXT: Instructions: 2 -# BDVER2-NEXT: Total Cycles: 11 -# BDVER2-NEXT: Total uOps: 4 +# BDVER2-NEXT: Total Cycles: 10 +# BDVER2-NEXT: Total uOps: 2 # BDWELL-NEXT: Total Cycles: 10 # BDWELL-NEXT: Total uOps: 4 @@ -46,9 +46,9 @@ # ZNVER1-NEXT: Total uOps: 2 # BDVER2: Dispatch Width: 4 -# BDVER2-NEXT: uOps Per Cycle: 0.36 -# BDVER2-NEXT: IPC: 0.18 -# BDVER2-NEXT: Block RThroughput: 1.0 +# BDVER2-NEXT: uOps Per Cycle: 0.20 +# BDVER2-NEXT: IPC: 0.20 +# BDVER2-NEXT: Block RThroughput: 2.5 # BDWELL: Dispatch Width: 4 # BDWELL-NEXT: uOps Per Cycle: 0.40 @@ -86,7 +86,6 @@ # ZNVER1-NEXT: Block RThroughput: 1.0 # BDVER2: Timeline view: -# BDVER2-NEXT: 0 # BDVER2-NEXT: Index 0123456789 # BDWELL: Timeline view: @@ -116,8 +115,8 @@ # ZNVER1-NEXT: 0 # ZNVER1-NEXT: Index 0123456789 -# BDVER2: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1 -# BDVER2-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 +# BDVER2: [0,0] DeeeeeER . vaddps %xmm0, %xmm0, %xmm1 +# BDVER2-NEXT: [0,1] DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 # BDWELL: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1 # BDWELL-NEXT: [0,1] DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 Index: llvm/trunk/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s +++ llvm/trunk/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s @@ -9,7 +9,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=SKYLAKE -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 @@ -21,8 +21,8 @@ # ALL: Iterations: 1 # ALL-NEXT: Instructions: 2 -# BDVER2-NEXT: Total Cycles: 11 -# BDVER2-NEXT: Total uOps: 4 +# BDVER2-NEXT: Total Cycles: 10 +# BDVER2-NEXT: Total uOps: 2 # BDWELL-NEXT: Total Cycles: 10 # BDWELL-NEXT: Total uOps: 4 @@ -46,9 +46,9 @@ # ZNVER1-NEXT: Total uOps: 2 # BDVER2: Dispatch Width: 4 -# BDVER2-NEXT: uOps Per Cycle: 0.36 -# BDVER2-NEXT: IPC: 0.18 -# BDVER2-NEXT: Block RThroughput: 1.0 +# BDVER2-NEXT: uOps Per Cycle: 0.20 +# BDVER2-NEXT: IPC: 0.20 +# BDVER2-NEXT: Block RThroughput: 2.5 # BDWELL: Dispatch Width: 4 # BDWELL-NEXT: uOps Per Cycle: 0.40 @@ -86,7 +86,6 @@ # ZNVER1-NEXT: Block RThroughput: 1.0 # BDVER2: Timeline view: -# BDVER2-NEXT: 0 # BDVER2-NEXT: Index 0123456789 # BDWELL: Timeline view: @@ -116,8 +115,8 @@ # ZNVER1-NEXT: 0 # ZNVER1-NEXT: Index 0123456789 -# BDVER2: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm2 -# BDVER2-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 +# BDVER2: [0,0] DeeeeeER . vaddps %xmm0, %xmm0, %xmm2 +# BDVER2-NEXT: [0,1] DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 # BDWELL: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm2 # BDWELL-NEXT: [0,1] DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3