Index: lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
===================================================================
--- lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -387,14 +387,14 @@
 defm "" : SIMDSqrt<v4f32, "f32x4", 141>;
 defm "" : SIMDSqrt<v2f64, "f64x2", 142>;
 
-defm "" : SIMDConvert<v4f32, v4i32, sint_to_fp, "f32x4.convert_s?i32x4", 143>;
-defm "" : SIMDConvert<v4f32, v4i32, uint_to_fp, "f32x4.convert_u?i32x4", 144>;
-defm "" : SIMDConvert<v2f64, v2i64, sint_to_fp, "f64x2.convert_s?i64x2", 145>;
-defm "" : SIMDConvert<v2f64, v2i64, uint_to_fp, "f64x2.convert_u?i64x2", 146>;
-defm "" : SIMDConvert<v4i32, v4f32, fp_to_sint, "i32x4.trunc_saturating_s?f32x4", 143>;
-defm "" : SIMDConvert<v4i32, v4f32, fp_to_uint, "i32x4.trunc_saturating_u?f32x4", 144>;
-defm "" : SIMDConvert<v2i64, v2f64, fp_to_sint, "i64x2.trunc_saturating_s?f64x2", 145>;
-defm "" : SIMDConvert<v2i64, v2f64, fp_to_uint, "i64x2.trunc_saturating_u?f64x2", 146>;
+defm "" : SIMDConvert<v4f32, v4i32, sint_to_fp, "f32x4.convert_s/i32x4", 143>;
+defm "" : SIMDConvert<v4f32, v4i32, uint_to_fp, "f32x4.convert_u/i32x4", 144>;
+defm "" : SIMDConvert<v2f64, v2i64, sint_to_fp, "f64x2.convert_s/i64x2", 145>;
+defm "" : SIMDConvert<v2f64, v2i64, uint_to_fp, "f64x2.convert_u/i64x2", 146>;
+defm "" : SIMDConvert<v4i32, v4f32, fp_to_sint, "i32x4.trunc_s/f32x4:sat", 143>;
+defm "" : SIMDConvert<v4i32, v4f32, fp_to_uint, "i32x4.trunc_u/f32x4:sat", 144>;
+defm "" : SIMDConvert<v2i64, v2f64, fp_to_sint, "i64x2.trunc_s/f64x2:sat", 145>;
+defm "" : SIMDConvert<v2i64, v2f64, fp_to_uint, "i64x2.trunc_u/f64x2:sat", 146>;
 
 } // Defs = [ARGUMENTS]
 
Index: test/CodeGen/WebAssembly/simd-conversions.ll
===================================================================
--- test/CodeGen/WebAssembly/simd-conversions.ll
+++ test/CodeGen/WebAssembly/simd-conversions.ll
@@ -11,7 +11,7 @@
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: f32x4.convert_s?i32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f32x4.convert_s/i32x4 $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
   %a = sitofp <4 x i32> %x to <4 x float>
@@ -22,7 +22,7 @@
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: f32x4.convert_u?i32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f32x4.convert_u/i32x4 $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
   %a = uitofp <4 x i32> %x to <4 x float>
@@ -31,10 +31,10 @@
 
 ; CHECK-LABEL: convert_s_v2f64:
 ; NO-SIMD128-NOT: i64x2
-; SIMD128-VM-NOT: f64x2.convert_s?i64x2
+; SIMD128-VM-NOT: f64x2.convert_s/i64x2
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: f64x2.convert_s?i64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f64x2.convert_s/i64x2 $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
   %a = sitofp <2 x i64> %x to <2 x double>
@@ -43,58 +43,58 @@
 
 ; CHECK-LABEL: convert_u_v2f64:
 ; NO-SIMD128-NOT: i64x2
-; SIMD128-VM-NOT: f64x2.convert_u?i64x2
+; SIMD128-VM-NOT: f64x2.convert_u/i64x2
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: f64x2.convert_u?i64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f64x2.convert_u/i64x2 $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
   %a = uitofp <2 x i64> %x to <2 x double>
   ret <2 x double> %a
 }
 
-; CHECK-LABEL: trunc_saturating_s_v4i32:
+; CHECK-LABEL: trunc_s_v4i32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: i32x4.trunc_saturating_s?f32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i32x4.trunc_s/f32x4:sat $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
-define <4 x i32> @trunc_saturating_s_v4i32(<4 x float> %x) {
+define <4 x i32> @trunc_s_v4i32(<4 x float> %x) {
   %a = fptosi <4 x float> %x to <4 x i32>
   ret <4 x i32> %a
 }
 
-; CHECK-LABEL: trunc_saturating_u_v4i32:
+; CHECK-LABEL: trunc_u_v4i32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: i32x4.trunc_saturating_u?f32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i32x4.trunc_u/f32x4:sat $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
-define <4 x i32> @trunc_saturating_u_v4i32(<4 x float> %x) {
+define <4 x i32> @trunc_u_v4i32(<4 x float> %x) {
   %a = fptoui <4 x float> %x to <4 x i32>
   ret <4 x i32> %a
 }
 
-; CHECK-LABEL: trunc_saturating_s_v2i64:
+; CHECK-LABEL: trunc_s_v2i64:
 ; NO-SIMD128-NOT: f64x2
-; SIMD128-VM-NOT: i64x2.trunc_saturating_s?f64x2
+; SIMD128-VM-NOT: i64x2.trunc_s/f64x2
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: i64x2.trunc_saturating_s?f64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i64x2.trunc_s/f64x2:sat $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
-define <2 x i64> @trunc_saturating_s_v2i64(<2 x double> %x) {
+define <2 x i64> @trunc_s_v2i64(<2 x double> %x) {
   %a = fptosi <2 x double> %x to <2 x i64>
   ret <2 x i64> %a
 }
 
-; CHECK-LABEL: trunc_saturating_u_v2i64:
+; CHECK-LABEL: trunc_u_v2i64:
 ; NO-SIMD128-NOT: f64x2
-; SIMD128-VM-NOT: i64x2.trunc_saturating_u?f64x2
+; SIMD128-VM-NOT: i64x2.trunc_u/f64x2
 ; SIMD128-NEXT: .param v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
-; SIMD128-NEXT: i64x2.trunc_saturating_u?f64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i64x2.trunc_u/f64x2:sat $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
-define <2 x i64> @trunc_saturating_u_v2i64(<2 x double> %x) {
+define <2 x i64> @trunc_u_v2i64(<2 x double> %x) {
   %a = fptoui <2 x double> %x to <2 x i64>
   ret <2 x i64> %a
 }