Index: llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll =================================================================== --- llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll +++ llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll @@ -17,8 +17,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.add $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.add $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @add_v16i8(<16 x i8> %x, <16 x i8> %y) { %a = add <16 x i8> %x, %y ret <16 x i8> %a @@ -28,8 +28,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.sub $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.sub $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) { %a = sub <16 x i8> %x, %y ret <16 x i8> %a @@ -39,8 +39,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.mul $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.mul $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) { %a = mul <16 x i8> %x, %y ret <16 x i8> %a @@ -50,8 +50,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.neg $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.neg $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @neg_v16i8(<16 x i8> %x) { %a = sub <16 x i8> , @@ -63,8 +63,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.shl $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.shl $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @shl_v16i8(<16 x i8> %v, i8 %x) { %t = insertelement <16 x i8> undef, i8 %x, i32 0 %s = shufflevector <16 x i8> %t, <16 x i8> undef, @@ -92,8 +92,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.shr_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @shr_s_v16i8(<16 x i8> %v, i8 %x) { %t = insertelement <16 x i8> undef, i8 %x, i32 0 %s = shufflevector <16 x i8> %t, <16 x i8> undef, @@ -107,8 +107,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.shr_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @shr_u_v16i8(<16 x i8> %v, i8 %x) { %t = insertelement <16 x i8> undef, i8 %x, i32 0 %s = shufflevector <16 x i8> %t, <16 x i8> undef, @@ -122,8 +122,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @and_v16i8(<16 x i8> %x, <16 x i8> %y) { %a = and <16 x i8> %x, %y ret <16 x i8> %a @@ -133,8 +133,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @or_v16i8(<16 x i8> %x, <16 x i8> %y) { %a = or <16 x i8> %x, %y ret <16 x i8> %a @@ -144,8 +144,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @xor_v16i8(<16 x i8> %x, <16 x i8> %y) { %a = xor <16 x i8> %x, %y ret <16 x i8> %a @@ -155,8 +155,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.not $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @not_v16i8(<16 x i8> %x) { %a = xor <16 x i8> %x, @add_v8i16(<8 x i16> %x, <8 x i16> %y) { %a = add <8 x i16> %x, %y ret <8 x i16> %a @@ -183,8 +183,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.sub $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.sub $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @sub_v8i16(<8 x i16> %x, <8 x i16> %y) { %a = sub <8 x i16> %x, %y ret <8 x i16> %a @@ -194,8 +194,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.mul $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.mul $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @mul_v8i16(<8 x i16> %x, <8 x i16> %y) { %a = mul <8 x i16> %x, %y ret <8 x i16> %a @@ -205,8 +205,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.neg $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.neg $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @neg_v8i16(<8 x i16> %x) { %a = sub <8 x i16> , %x @@ -217,8 +217,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.shl $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.shl $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @shl_v8i16(<8 x i16> %v, i16 %x) { %t = insertelement <8 x i16> undef, i16 %x, i32 0 %s = shufflevector <8 x i16> %t, <8 x i16> undef, @@ -244,8 +244,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.shr_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @shr_s_v8i16(<8 x i16> %v, i16 %x) { %t = insertelement <8 x i16> undef, i16 %x, i32 0 %s = shufflevector <8 x i16> %t, <8 x i16> undef, @@ -258,8 +258,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.shr_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @shr_u_v8i16(<8 x i16> %v, i16 %x) { %t = insertelement <8 x i16> undef, i16 %x, i32 0 %s = shufflevector <8 x i16> %t, <8 x i16> undef, @@ -272,8 +272,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @and_v8i16(<8 x i16> %x, <8 x i16> %y) { %a = and <8 x i16> %x, %y ret <8 x i16> %a @@ -283,8 +283,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @or_v8i16(<8 x i16> %x, <8 x i16> %y) { %a = or <8 x i16> %x, %y ret <8 x i16> %a @@ -294,8 +294,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @xor_v8i16(<8 x i16> %x, <8 x i16> %y) { %a = xor <8 x i16> %x, %y ret <8 x i16> %a @@ -305,8 +305,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.not $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @not_v8i16(<8 x i16> %x) { %a = xor <8 x i16> %x, @@ -320,8 +320,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.add $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.add $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @add_v4i32(<4 x i32> %x, <4 x i32> %y) { %a = add <4 x i32> %x, %y ret <4 x i32> %a @@ -331,8 +331,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.sub $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.sub $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @sub_v4i32(<4 x i32> %x, <4 x i32> %y) { %a = sub <4 x i32> %x, %y ret <4 x i32> %a @@ -342,8 +342,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.mul $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.mul $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @mul_v4i32(<4 x i32> %x, <4 x i32> %y) { %a = mul <4 x i32> %x, %y ret <4 x i32> %a @@ -353,8 +353,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.neg $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.neg $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @neg_v4i32(<4 x i32> %x) { %a = sub <4 x i32> , %x ret <4 x i32> %a @@ -364,8 +364,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.shl $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.shl $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @shl_v4i32(<4 x i32> %v, i32 %x) { %t = insertelement <4 x i32> undef, i32 %x, i32 0 %s = shufflevector <4 x i32> %t, <4 x i32> undef, @@ -390,8 +390,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.shr_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @shr_s_v4i32(<4 x i32> %v, i32 %x) { %t = insertelement <4 x i32> undef, i32 %x, i32 0 %s = shufflevector <4 x i32> %t, <4 x i32> undef, @@ -404,8 +404,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.shr_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @shr_u_v4i32(<4 x i32> %v, i32 %x) { %t = insertelement <4 x i32> undef, i32 %x, i32 0 %s = shufflevector <4 x i32> %t, <4 x i32> undef, @@ -418,8 +418,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @and_v4i32(<4 x i32> %x, <4 x i32> %y) { %a = and <4 x i32> %x, %y ret <4 x i32> %a @@ -429,8 +429,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @or_v4i32(<4 x i32> %x, <4 x i32> %y) { %a = or <4 x i32> %x, %y ret <4 x i32> %a @@ -440,8 +440,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @xor_v4i32(<4 x i32> %x, <4 x i32> %y) { %a = xor <4 x i32> %x, %y ret <4 x i32> %a @@ -451,8 +451,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.not $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @not_v4i32(<4 x i32> %x) { %a = xor <4 x i32> %x, ret <4 x i32> %a @@ -466,8 +466,8 @@ ; SIMD128-VM-NOT: i64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.add $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.add $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @add_v2i64(<2 x i64> %x, <2 x i64> %y) { %a = add <2 x i64> %x, %y ret <2 x i64> %a @@ -478,8 +478,8 @@ ; SIMD128-VM-NOT: i64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.sub $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.sub $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @sub_v2i64(<2 x i64> %x, <2 x i64> %y) { %a = sub <2 x i64> %x, %y ret <2 x i64> %a @@ -501,8 +501,8 @@ ; NO-SIMD128-NOT: i64x2 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.neg $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.neg $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @neg_v2i64(<2 x i64> %x) { %a = sub <2 x i64> , %x ret <2 x i64> %a @@ -512,8 +512,8 @@ ; NO-SIMD128-NOT: i64x2 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.shl $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.shl $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @shl_v2i64(<2 x i64> %v, i32 %x) { %x2 = zext i32 %x to i64 %t = insertelement <2 x i64> undef, i64 %x2, i32 0 @@ -553,8 +553,8 @@ ; NO-SIMD128-NOT: i64x2 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.shr_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.shr_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @shr_s_v2i64(<2 x i64> %v, i32 %x) { %x2 = zext i32 %x to i64 %t = insertelement <2 x i64> undef, i64 %x2, i32 0 @@ -581,8 +581,8 @@ ; NO-SIMD128-NOT: i64x2 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.shr_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.shr_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @shr_u_v2i64(<2 x i64> %v, i32 %x) { %x2 = zext i32 %x to i64 %t = insertelement <2 x i64> undef, i64 %x2, i32 0 @@ -610,8 +610,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @and_v2i64(<2 x i64> %x, <2 x i64> %y) { %a = and <2 x i64> %x, %y ret <2 x i64> %a @@ -622,8 +622,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @or_v2i64(<2 x i64> %x, <2 x i64> %y) { %a = or <2 x i64> %x, %y ret <2 x i64> %a @@ -634,8 +634,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.xor $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @xor_v2i64(<2 x i64> %x, <2 x i64> %y) { %a = xor <2 x i64> %x, %y ret <2 x i64> %a @@ -646,8 +646,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.not $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @not_v2i64(<2 x i64> %x) { %a = xor <2 x i64> %x, ret <2 x i64> %a @@ -660,8 +660,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.neg $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.neg $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @neg_v4f32(<4 x float> %x) { %a = fsub <4 x float> , %x ret <4 x float> %a @@ -671,8 +671,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.add $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.add $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) { %a = fadd <4 x float> %x, %y ret <4 x float> %a @@ -682,8 +682,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.sub $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.sub $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @sub_v4f32(<4 x float> %x, <4 x float> %y) { %a = fsub <4 x float> %x, %y ret <4 x float> %a @@ -693,8 +693,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.div $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.div $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @div_v4f32(<4 x float> %x, <4 x float> %y) { %a = fdiv <4 x float> %x, %y ret <4 x float> %a @@ -704,8 +704,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.mul $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.mul $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) { %a = fmul <4 x float> %x, %y ret <4 x float> %a @@ -718,8 +718,8 @@ ; NO-SIMD128-NOT: f64x2 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.neg $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.neg $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @neg_v2f64(<2 x double> %x) { %a = fsub <2 x double> , %x ret <2 x double> %a @@ -730,8 +730,8 @@ ; SIMD128-VM-NOT: f62x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.add $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.add $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @add_v2f64(<2 x double> %x, <2 x double> %y) { %a = fadd <2 x double> %x, %y ret <2 x double> %a @@ -742,8 +742,8 @@ ; SIMD128-VM-NOT: f62x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.sub $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.sub $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @sub_v2f64(<2 x double> %x, <2 x double> %y) { %a = fsub <2 x double> %x, %y ret <2 x double> %a @@ -754,8 +754,8 @@ ; SIMD128-VM-NOT: f62x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.div $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.div $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @div_v2f64(<2 x double> %x, <2 x double> %y) { %a = fdiv <2 x double> %x, %y ret <2 x double> %a @@ -766,8 +766,8 @@ ; SIMD128-VM-NOT: f62x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.mul $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.mul $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @mul_v2f64(<2 x double> %x, <2 x double> %y) { %a = fmul <2 x double> %x, %y ret <2 x double> %a Index: llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll =================================================================== --- llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll +++ llvm/trunk/test/CodeGen/WebAssembly/simd-comparisons.ll @@ -11,8 +11,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.eq $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp eq <16 x i8> %x, %y ret <16 x i1> %res @@ -22,8 +22,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.ne $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.ne $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp ne <16 x i8> %x, %y ret <16 x i1> %res @@ -33,8 +33,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.lt_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp slt <16 x i8> %x, %y ret <16 x i1> %res @@ -44,8 +44,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.lt_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp ult <16 x i8> %x, %y ret <16 x i1> %res @@ -55,8 +55,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.le_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp sle <16 x i8> %x, %y ret <16 x i1> %res @@ -66,8 +66,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.le_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp ule <16 x i8> %x, %y ret <16 x i1> %res @@ -77,8 +77,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.gt_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp sgt <16 x i8> %x, %y ret <16 x i1> %res @@ -88,8 +88,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.gt_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp ugt <16 x i8> %x, %y ret <16 x i1> %res @@ -99,8 +99,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.ge_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp sge <16 x i8> %x, %y ret <16 x i1> %res @@ -110,8 +110,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.ge_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i1> @compare_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) { %res = icmp uge <16 x i8> %x, %y ret <16 x i1> %res @@ -121,8 +121,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.eq $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.eq $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp eq <8 x i16> %x, %y ret <8 x i1> %res @@ -132,8 +132,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.ne $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.ne $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp ne <8 x i16> %x, %y ret <8 x i1> %res @@ -143,8 +143,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.lt_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp slt <8 x i16> %x, %y ret <8 x i1> %res @@ -154,8 +154,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.lt_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp ult <8 x i16> %x, %y ret <8 x i1> %res @@ -165,8 +165,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.le_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp sle <8 x i16> %x, %y ret <8 x i1> %res @@ -176,8 +176,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.le_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp ule <8 x i16> %x, %y ret <8 x i1> %res @@ -187,8 +187,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.gt_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp sgt <8 x i16> %x, %y ret <8 x i1> %res @@ -198,8 +198,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.gt_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp ugt <8 x i16> %x, %y ret <8 x i1> %res @@ -209,8 +209,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.ge_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp sge <8 x i16> %x, %y ret <8 x i1> %res @@ -220,8 +220,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.ge_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i1> @compare_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) { %res = icmp uge <8 x i16> %x, %y ret <8 x i1> %res @@ -231,8 +231,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.eq $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp eq <4 x i32> %x, %y ret <4 x i1> %res @@ -242,8 +242,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.ne $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp ne <4 x i32> %x, %y ret <4 x i1> %res @@ -253,8 +253,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.lt_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp slt <4 x i32> %x, %y ret <4 x i1> %res @@ -264,8 +264,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.lt_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp ult <4 x i32> %x, %y ret <4 x i1> %res @@ -275,8 +275,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.le_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp sle <4 x i32> %x, %y ret <4 x i1> %res @@ -286,8 +286,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.le_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp ule <4 x i32> %x, %y ret <4 x i1> %res @@ -297,8 +297,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.gt_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp sgt <4 x i32> %x, %y ret <4 x i1> %res @@ -308,8 +308,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.gt_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp ugt <4 x i32> %x, %y ret <4 x i1> %res @@ -319,8 +319,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.ge_s $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp sge <4 x i32> %x, %y ret <4 x i1> %res @@ -330,8 +330,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.ge_u $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) { %res = icmp uge <4 x i32> %x, %y ret <4 x i1> %res @@ -341,8 +341,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.eq $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_oeq_v4f32 (<4 x float> %x, <4 x float> %y) { %res = fcmp oeq <4 x float> %x, %y ret <4 x i1> %res @@ -352,8 +352,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.gt $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_ogt_v4f32 (<4 x float> %x, <4 x float> %y) { %res = fcmp ogt <4 x float> %x, %y ret <4 x i1> %res @@ -363,8 +363,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.ge $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_oge_v4f32 (<4 x float> %x, <4 x float> %y) { %res = fcmp oge <4 x float> %x, %y ret <4 x i1> %res @@ -374,8 +374,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.lt $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_olt_v4f32 (<4 x float> %x, <4 x float> %y) { %res = fcmp olt <4 x float> %x, %y ret <4 x i1> %res @@ -385,8 +385,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.le $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_ole_v4f32 (<4 x float> %x, <4 x float> %y) { %res = fcmp ole <4 x float> %x, %y ret <4 x i1> %res @@ -466,8 +466,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.ne $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i1> @compare_une_v4f32 (<4 x float> %x, <4 x float> %y) { %res = fcmp une <4 x float> %x, %y ret <4 x i1> %res @@ -488,8 +488,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.eq $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i1> @compare_oeq_v2f64 (<2 x double> %x, <2 x double> %y) { %res = fcmp oeq <2 x double> %x, %y ret <2 x i1> %res @@ -500,8 +500,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.gt $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i1> @compare_ogt_v2f64 (<2 x double> %x, <2 x double> %y) { %res = fcmp ogt <2 x double> %x, %y ret <2 x i1> %res @@ -512,8 +512,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.ge $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i1> @compare_oge_v2f64 (<2 x double> %x, <2 x double> %y) { %res = fcmp oge <2 x double> %x, %y ret <2 x i1> %res @@ -524,8 +524,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.lt $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i1> @compare_olt_v2f64 (<2 x double> %x, <2 x double> %y) { %res = fcmp olt <2 x double> %x, %y ret <2 x i1> %res @@ -536,8 +536,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.le $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i1> @compare_ole_v2f64 (<2 x double> %x, <2 x double> %y) { %res = fcmp ole <2 x double> %x, %y ret <2 x i1> %res @@ -625,8 +625,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.ne $push0=, $0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i1> @compare_une_v2f64 (<2 x double> %x, <2 x double> %y) { %res = fcmp une <2 x double> %x, %y ret <2 x i1> %res Index: llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll =================================================================== --- llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll +++ llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll @@ -14,8 +14,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 0($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @load_v16i8(<16 x i8>* %p) { %v = load <16 x i8>, <16 x i8>* %p ret <16 x i8> %v @@ -25,8 +25,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @load_v16i8_with_folded_offset(<16 x i8>* %p) { %q = ptrtoint <16 x i8>* %p to i32 %r = add nuw i32 %q, 16 @@ -39,8 +39,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @load_v16i8_with_folded_gep_offset(<16 x i8>* %p) { %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1 %v = load <16 x i8>, <16 x i8>* %s @@ -51,10 +51,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @load_v16i8_with_unfolded_gep_negative_offset(<16 x i8>* %p) { %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1 %v = load <16 x i8>, <16 x i8>* %s @@ -65,10 +65,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @load_v16i8_with_unfolded_offset(<16 x i8>* %p) { %q = ptrtoint <16 x i8>* %p to i32 %r = add nsw i32 %q, 16 @@ -81,10 +81,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @load_v16i8_with_unfolded_gep_offset(<16 x i8>* %p) { %s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1 %v = load <16 x i8>, <16 x i8>* %s @@ -94,9 +94,9 @@ ; CHECK-LABEL: load_v16i8_from_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, 32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @load_v16i8_from_numeric_address() { %s = inttoptr i32 32 to <16 x i8>* %v = load <16 x i8>, <16 x i8>* %s @@ -106,9 +106,9 @@ ; CHECK-LABEL: load_v16i8_from_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, gv_v16i8($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v16i8($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} @gv_v16i8 = global <16 x i8> define <16 x i8> @load_v16i8_from_global_address() { %v = load <16 x i8>, <16 x i8>* @gv_v16i8 @@ -149,9 +149,9 @@ ; CHECK-LABEL: store_v16i8_with_unfolded_gep_negative_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v16i8_with_unfolded_gep_negative_offset(<16 x i8> %v, <16 x i8>* %p) { %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1 store <16 x i8> %v , <16 x i8>* %s @@ -161,9 +161,9 @@ ; CHECK-LABEL: store_v16i8_with_unfolded_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v16i8_with_unfolded_offset(<16 x i8> %v, <16 x i8>* %p) { %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1 store <16 x i8> %v , <16 x i8>* %s @@ -173,9 +173,9 @@ ; CHECK-LABEL: store_v16i8_with_unfolded_gep_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v16i8_with_unfolded_gep_offset(<16 x i8> %v, <16 x i8>* %p) { %s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1 store <16 x i8> %v , <16 x i8>* %s @@ -185,8 +185,8 @@ ; CHECK-LABEL: store_v16i8_to_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store 32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store 32($pop[[R]]):p2align=0, $0{{$}} define void @store_v16i8_to_numeric_address(<16 x i8> %v) { %s = inttoptr i32 32 to <16 x i8>* store <16 x i8> %v , <16 x i8>* %s @@ -196,8 +196,8 @@ ; CHECK-LABEL: store_v16i8_to_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store gv_v16i8($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store gv_v16i8($pop[[R]]):p2align=0, $0{{$}} define void @store_v16i8_to_global_address(<16 x i8> %v) { store <16 x i8> %v , <16 x i8>* @gv_v16i8 ret void @@ -210,8 +210,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 0($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @load_v8i16(<8 x i16>* %p) { %v = load <8 x i16>, <8 x i16>* %p ret <8 x i16> %v @@ -221,8 +221,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @load_v8i16_with_folded_offset(<8 x i16>* %p) { %q = ptrtoint <8 x i16>* %p to i32 %r = add nuw i32 %q, 16 @@ -235,8 +235,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @load_v8i16_with_folded_gep_offset(<8 x i16>* %p) { %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1 %v = load <8 x i16>, <8 x i16>* %s @@ -247,10 +247,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @load_v8i16_with_unfolded_gep_negative_offset(<8 x i16>* %p) { %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1 %v = load <8 x i16>, <8 x i16>* %s @@ -261,10 +261,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[L0:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[L0]]{{$}} define <8 x i16> @load_v8i16_with_unfolded_offset(<8 x i16>* %p) { %q = ptrtoint <8 x i16>* %p to i32 %r = add nsw i32 %q, 16 @@ -277,10 +277,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @load_v8i16_with_unfolded_gep_offset(<8 x i16>* %p) { %s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1 %v = load <8 x i16>, <8 x i16>* %s @@ -290,9 +290,9 @@ ; CHECK-LABEL: load_v8i16_from_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, 32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @load_v8i16_from_numeric_address() { %s = inttoptr i32 32 to <8 x i16>* %v = load <8 x i16>, <8 x i16>* %s @@ -302,9 +302,9 @@ ; CHECK-LABEL: load_v8i16_from_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, gv_v8i16($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v8i16($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} @gv_v8i16 = global <8 x i16> define <8 x i16> @load_v8i16_from_global_address() { %v = load <8 x i16>, <8 x i16>* @gv_v8i16 @@ -345,9 +345,9 @@ ; CHECK-LABEL: store_v8i16_with_unfolded_gep_negative_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v8i16_with_unfolded_gep_negative_offset(<8 x i16> %v, <8 x i16>* %p) { %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1 store <8 x i16> %v , <8 x i16>* %s @@ -357,9 +357,9 @@ ; CHECK-LABEL: store_v8i16_with_unfolded_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v8i16_with_unfolded_offset(<8 x i16> %v, <8 x i16>* %p) { %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1 store <8 x i16> %v , <8 x i16>* %s @@ -369,9 +369,9 @@ ; CHECK-LABEL: store_v8i16_with_unfolded_gep_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v8i16_with_unfolded_gep_offset(<8 x i16> %v, <8 x i16>* %p) { %s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1 store <8 x i16> %v , <8 x i16>* %s @@ -381,8 +381,8 @@ ; CHECK-LABEL: store_v8i16_to_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store 32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store 32($pop[[L0]]):p2align=0, $0{{$}} define void @store_v8i16_to_numeric_address(<8 x i16> %v) { %s = inttoptr i32 32 to <8 x i16>* store <8 x i16> %v , <8 x i16>* %s @@ -392,8 +392,8 @@ ; CHECK-LABEL: store_v8i16_to_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store gv_v8i16($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store gv_v8i16($pop[[R]]):p2align=0, $0{{$}} define void @store_v8i16_to_global_address(<8 x i16> %v) { store <8 x i16> %v , <8 x i16>* @gv_v8i16 ret void @@ -406,8 +406,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 0($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @load_v4i32(<4 x i32>* %p) { %v = load <4 x i32>, <4 x i32>* %p ret <4 x i32> %v @@ -417,8 +417,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @load_v4i32_with_folded_offset(<4 x i32>* %p) { %q = ptrtoint <4 x i32>* %p to i32 %r = add nuw i32 %q, 16 @@ -431,8 +431,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @load_v4i32_with_folded_gep_offset(<4 x i32>* %p) { %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1 %v = load <4 x i32>, <4 x i32>* %s @@ -443,10 +443,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @load_v4i32_with_unfolded_gep_negative_offset(<4 x i32>* %p) { %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1 %v = load <4 x i32>, <4 x i32>* %s @@ -457,10 +457,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @load_v4i32_with_unfolded_offset(<4 x i32>* %p) { %q = ptrtoint <4 x i32>* %p to i32 %r = add nsw i32 %q, 16 @@ -473,10 +473,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @load_v4i32_with_unfolded_gep_offset(<4 x i32>* %p) { %s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1 %v = load <4 x i32>, <4 x i32>* %s @@ -486,9 +486,9 @@ ; CHECK-LABEL: load_v4i32_from_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, 32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @load_v4i32_from_numeric_address() { %s = inttoptr i32 32 to <4 x i32>* %v = load <4 x i32>, <4 x i32>* %s @@ -498,9 +498,9 @@ ; CHECK-LABEL: load_v4i32_from_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, gv_v4i32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v4i32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} @gv_v4i32 = global <4 x i32> define <4 x i32> @load_v4i32_from_global_address() { %v = load <4 x i32>, <4 x i32>* @gv_v4i32 @@ -541,9 +541,9 @@ ; CHECK-LABEL: store_v4i32_with_unfolded_gep_negative_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v4i32_with_unfolded_gep_negative_offset(<4 x i32> %v, <4 x i32>* %p) { %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1 store <4 x i32> %v , <4 x i32>* %s @@ -553,9 +553,9 @@ ; CHECK-LABEL: store_v4i32_with_unfolded_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v4i32_with_unfolded_offset(<4 x i32> %v, <4 x i32>* %p) { %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1 store <4 x i32> %v , <4 x i32>* %s @@ -565,9 +565,9 @@ ; CHECK-LABEL: store_v4i32_with_unfolded_gep_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v4i32_with_unfolded_gep_offset(<4 x i32> %v, <4 x i32>* %p) { %s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1 store <4 x i32> %v , <4 x i32>* %s @@ -577,8 +577,8 @@ ; CHECK-LABEL: store_v4i32_to_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store 32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store 32($pop[[L0]]):p2align=0, $0{{$}} define void @store_v4i32_to_numeric_address(<4 x i32> %v) { %s = inttoptr i32 32 to <4 x i32>* store <4 x i32> %v , <4 x i32>* %s @@ -588,8 +588,8 @@ ; CHECK-LABEL: store_v4i32_to_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store gv_v4i32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store gv_v4i32($pop[[R]]):p2align=0, $0{{$}} define void @store_v4i32_to_global_address(<4 x i32> %v) { store <4 x i32> %v , <4 x i32>* @gv_v4i32 ret void @@ -603,8 +603,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 0($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @load_v2i64(<2 x i64>* %p) { %v = load <2 x i64>, <2 x i64>* %p ret <2 x i64> %v @@ -615,8 +615,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @load_v2i64_with_folded_offset(<2 x i64>* %p) { %q = ptrtoint <2 x i64>* %p to i32 %r = add nuw i32 %q, 16 @@ -630,8 +630,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @load_v2i64_with_folded_gep_offset(<2 x i64>* %p) { %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1 %v = load <2 x i64>, <2 x i64>* %s @@ -643,10 +643,10 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @load_v2i64_with_unfolded_gep_negative_offset(<2 x i64>* %p) { %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1 %v = load <2 x i64>, <2 x i64>* %s @@ -658,10 +658,10 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @load_v2i64_with_unfolded_offset(<2 x i64>* %p) { %q = ptrtoint <2 x i64>* %p to i32 %r = add nsw i32 %q, 16 @@ -675,10 +675,10 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @load_v2i64_with_unfolded_gep_offset(<2 x i64>* %p) { %s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1 %v = load <2 x i64>, <2 x i64>* %s @@ -689,9 +689,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, 32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @load_v2i64_from_numeric_address() { %s = inttoptr i32 32 to <2 x i64>* %v = load <2 x i64>, <2 x i64>* %s @@ -702,9 +702,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, gv_v2i64($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v2i64($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} @gv_v2i64 = global <2 x i64> define <2 x i64> @load_v2i64_from_global_address() { %v = load <2 x i64>, <2 x i64>* @gv_v2i64 @@ -749,9 +749,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v2i64_with_unfolded_gep_negative_offset(<2 x i64> %v, <2 x i64>* %p) { %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1 store <2 x i64> %v , <2 x i64>* %s @@ -762,9 +762,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v2i64_with_unfolded_offset(<2 x i64> %v, <2 x i64>* %p) { %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1 store <2 x i64> %v , <2 x i64>* %s @@ -775,9 +775,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v2i64_with_unfolded_gep_offset(<2 x i64> %v, <2 x i64>* %p) { %s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1 store <2 x i64> %v , <2 x i64>* %s @@ -788,8 +788,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store 32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store 32($pop[[L0]]):p2align=0, $0{{$}} define void @store_v2i64_to_numeric_address(<2 x i64> %v) { %s = inttoptr i32 32 to <2 x i64>* store <2 x i64> %v , <2 x i64>* %s @@ -800,8 +800,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store gv_v2i64($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store gv_v2i64($pop[[R]]):p2align=0, $0{{$}} define void @store_v2i64_to_global_address(<2 x i64> %v) { store <2 x i64> %v , <2 x i64>* @gv_v2i64 ret void @@ -814,8 +814,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 0($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @load_v4f32(<4 x float>* %p) { %v = load <4 x float>, <4 x float>* %p ret <4 x float> %v @@ -825,8 +825,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @load_v4f32_with_folded_offset(<4 x float>* %p) { %q = ptrtoint <4 x float>* %p to i32 %r = add nuw i32 %q, 16 @@ -839,8 +839,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @load_v4f32_with_folded_gep_offset(<4 x float>* %p) { %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1 %v = load <4 x float>, <4 x float>* %s @@ -851,10 +851,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @load_v4f32_with_unfolded_gep_negative_offset(<4 x float>* %p) { %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1 %v = load <4 x float>, <4 x float>* %s @@ -865,10 +865,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @load_v4f32_with_unfolded_offset(<4 x float>* %p) { %q = ptrtoint <4 x float>* %p to i32 %r = add nsw i32 %q, 16 @@ -881,10 +881,10 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @load_v4f32_with_unfolded_gep_offset(<4 x float>* %p) { %s = getelementptr <4 x float>, <4 x float>* %p, i32 1 %v = load <4 x float>, <4 x float>* %s @@ -894,9 +894,9 @@ ; CHECK-LABEL: load_v4f32_from_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, 32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @load_v4f32_from_numeric_address() { %s = inttoptr i32 32 to <4 x float>* %v = load <4 x float>, <4 x float>* %s @@ -906,9 +906,9 @@ ; CHECK-LABEL: load_v4f32_from_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, gv_v4f32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v4f32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} @gv_v4f32 = global <4 x float> define <4 x float> @load_v4f32_from_global_address() { %v = load <4 x float>, <4 x float>* @gv_v4f32 @@ -949,9 +949,9 @@ ; CHECK-LABEL: store_v4f32_with_unfolded_gep_negative_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v4f32_with_unfolded_gep_negative_offset(<4 x float> %v, <4 x float>* %p) { %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1 store <4 x float> %v , <4 x float>* %s @@ -961,9 +961,9 @@ ; CHECK-LABEL: store_v4f32_with_unfolded_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v4f32_with_unfolded_offset(<4 x float> %v, <4 x float>* %p) { %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1 store <4 x float> %v , <4 x float>* %s @@ -973,9 +973,9 @@ ; CHECK-LABEL: store_v4f32_with_unfolded_gep_offset: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v4f32_with_unfolded_gep_offset(<4 x float> %v, <4 x float>* %p) { %s = getelementptr <4 x float>, <4 x float>* %p, i32 1 store <4 x float> %v , <4 x float>* %s @@ -985,8 +985,8 @@ ; CHECK-LABEL: store_v4f32_to_numeric_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store 32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store 32($pop[[L0]]):p2align=0, $0{{$}} define void @store_v4f32_to_numeric_address(<4 x float> %v) { %s = inttoptr i32 32 to <4 x float>* store <4 x float> %v , <4 x float>* %s @@ -996,8 +996,8 @@ ; CHECK-LABEL: store_v4f32_to_global_address: ; NO-SIMD128-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store gv_v4f32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store gv_v4f32($pop[[R]]):p2align=0, $0{{$}} define void @store_v4f32_to_global_address(<4 x float> %v) { store <4 x float> %v , <4 x float>* @gv_v4f32 ret void @@ -1011,8 +1011,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 0($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @load_v2f64(<2 x double>* %p) { %v = load <2 x double>, <2 x double>* %p ret <2 x double> %v @@ -1023,8 +1023,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @load_v2f64_with_folded_offset(<2 x double>* %p) { %q = ptrtoint <2 x double>* %p to i32 %r = add nuw i32 %q, 16 @@ -1038,8 +1038,8 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.load $push0=, 16($0):p2align=0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 16($0):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @load_v2f64_with_folded_gep_offset(<2 x double>* %p) { %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1 %v = load <2 x double>, <2 x double>* %s @@ -1051,10 +1051,10 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @load_v2f64_with_unfolded_gep_negative_offset(<2 x double>* %p) { %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1 %v = load <2 x double>, <2 x double>* %s @@ -1066,10 +1066,10 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @load_v2f64_with_unfolded_offset(<2 x double>* %p) { %q = ptrtoint <2 x double>* %p to i32 %r = add nsw i32 %q, 16 @@ -1083,10 +1083,10 @@ ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $0, $pop0{{$}} -; SIMD128-NEXT: v128.load $push2=, 0($pop1):p2align=0{{$}} -; SIMD128-NEXT: return $pop2{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($pop[[L1]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @load_v2f64_with_unfolded_gep_offset(<2 x double>* %p) { %s = getelementptr <2 x double>, <2 x double>* %p, i32 1 %v = load <2 x double>, <2 x double>* %s @@ -1097,9 +1097,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, 32($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 32($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @load_v2f64_from_numeric_address() { %s = inttoptr i32 32 to <2 x double>* %v = load <2 x double>, <2 x double>* %s @@ -1110,9 +1110,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.load $push1=, gv_v2f64($pop0):p2align=0{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, gv_v2f64($pop[[L0]]):p2align=0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} @gv_v2f64 = global <2 x double> define <2 x double> @load_v2f64_from_global_address() { %v = load <2 x double>, <2 x double>* @gv_v2f64 @@ -1157,9 +1157,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v2f64_with_unfolded_gep_negative_offset(<2 x double> %v, <2 x double>* %p) { %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1 store <2 x double> %v , <2 x double>* %s @@ -1170,9 +1170,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, -16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, -16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v2f64_with_unfolded_offset(<2 x double> %v, <2 x double>* %p) { %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1 store <2 x double> %v , <2 x double>* %s @@ -1183,9 +1183,9 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128, i32{{$}} -; SIMD128-NEXT: i32.const $push0=, 16{{$}} -; SIMD128-NEXT: i32.add $push1=, $1, $pop0{{$}} -; SIMD128-NEXT: v128.store 0($pop1):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 16{{$}} +; SIMD128-NEXT: i32.add $push[[R:[0-9]+]]=, $1, $pop[[L0]]{{$}} +; SIMD128-NEXT: v128.store 0($pop[[R]]):p2align=0, $0{{$}} define void @store_v2f64_with_unfolded_gep_offset(<2 x double> %v, <2 x double>* %p) { %s = getelementptr <2 x double>, <2 x double>* %p, i32 1 store <2 x double> %v , <2 x double>* %s @@ -1196,8 +1196,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store 32($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store 32($pop[[L0]]):p2align=0, $0{{$}} define void @store_v2f64_to_numeric_address(<2 x double> %v) { %s = inttoptr i32 32 to <2 x double>* store <2 x double> %v , <2 x double>* %s @@ -1208,8 +1208,8 @@ ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 ; SIMD128-NEXT: .param v128{{$}} -; SIMD128-NEXT: i32.const $push0=, 0{{$}} -; SIMD128-NEXT: v128.store gv_v2f64($pop0):p2align=0, $0{{$}} +; SIMD128-NEXT: i32.const $push[[R:[0-9]+]]=, 0{{$}} +; SIMD128-NEXT: v128.store gv_v2f64($pop[[R]]):p2align=0, $0{{$}} define void @store_v2f64_to_global_address(<2 x double> %v) { store <2 x double> %v , <2 x double>* @gv_v2f64 ret void Index: llvm/trunk/test/CodeGen/WebAssembly/simd.ll =================================================================== --- llvm/trunk/test/CodeGen/WebAssembly/simd.ll +++ llvm/trunk/test/CodeGen/WebAssembly/simd.ll @@ -13,9 +13,9 @@ ; CHECK-LABEL: const_v16i8: ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.const $push0=, +; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, ; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @const_v16i8() { ret <16 x i8> @@ -25,8 +25,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.splat $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @splat_v16i8(i8 %x) { %v = insertelement <16 x i8> undef, i8 %x, i32 0 %res = shufflevector <16 x i8> %v, <16 x i8> undef, @@ -46,8 +46,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i32{{$}} -; SIMD128-NEXT: i8x16.extract_lane_s $push0=, $0, 13{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i32 @extract_v16i8_s(<16 x i8> %v) { %elem = extractelement <16 x i8> %v, i8 13 %a = sext i8 %elem to i32 @@ -58,8 +58,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i32{{$}} -; SIMD128-NEXT: i8x16.extract_lane_u $push0=, $0, 13{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i32 @extract_v16i8_u(<16 x i8> %v) { %elem = extractelement <16 x i8> %v, i8 13 %a = zext i8 %elem to i32 @@ -70,8 +70,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i32{{$}} -; SIMD128-NEXT: i8x16.extract_lane_u $push0=, $0, 13{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i8 @extract_v16i8(<16 x i8> %v) { %elem = extractelement <16 x i8> %v, i8 13 ret i8 %elem @@ -81,8 +81,8 @@ ; NO-SIMD128-NOT: i8x16 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i8x16.replace_lane $push0=, $0, 11, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) { %res = insertelement <16 x i8> %v, i8 %x, i32 11 ret <16 x i8> %res @@ -92,9 +92,9 @@ ; NO-SIMD128-NOT: v8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1, +; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, ; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) { %res = shufflevector <16 x i8> %x, <16 x i8> %y, <16 x i32> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3, i8 %x4, i8 %x5, i8 %x6, i8 %x7, i8 %x8, i8 %x9, i8 %x10, i8 %x11, @@ -152,8 +152,8 @@ ; CHECK-LABEL: const_v8i16: ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.const $push0=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @const_v8i16() { ret <8 x i16> @@ -163,8 +163,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.splat $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @splat_v8i16(i16 %x) { %v = insertelement <8 x i16> undef, i16 %x, i32 0 %res = shufflevector <8 x i16> %v, <8 x i16> undef, @@ -182,8 +182,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i32{{$}} -; SIMD128-NEXT: i16x8.extract_lane_s $push0=, $0, 5{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i32 @extract_v8i16_s(<8 x i16> %v) { %elem = extractelement <8 x i16> %v, i16 5 %a = sext i16 %elem to i32 @@ -194,8 +194,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i32{{$}} -; SIMD128-NEXT: i16x8.extract_lane_u $push0=, $0, 5{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i32 @extract_v8i16_u(<8 x i16> %v) { %elem = extractelement <8 x i16> %v, i16 5 %a = zext i16 %elem to i32 @@ -206,8 +206,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i32{{$}} -; SIMD128-NEXT: i16x8.extract_lane_u $push0=, $0, 5{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i16 @extract_v8i16(<8 x i16> %v) { %elem = extractelement <8 x i16> %v, i16 5 ret i16 %elem @@ -217,8 +217,8 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push0=, $0, 7, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) { %res = insertelement <8 x i16> %v, i16 %x, i32 7 ret <8 x i16> %res @@ -228,9 +228,9 @@ ; NO-SIMD128-NOT: v8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1, +; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, ; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) { %res = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> @@ -241,15 +241,15 @@ ; NO-SIMD128-NOT: i16x8 ; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i16x8.splat $push0=, $0{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push1=, $pop0, 1, $1{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push2=, $pop1, 2, $2{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push3=, $pop2, 3, $3{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push4=, $pop3, 4, $4{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push5=, $pop4, 5, $5{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push6=, $pop5, 6, $6{{$}} -; SIMD128-NEXT: i16x8.replace_lane $push7=, $pop6, 7, $7{{$}} -; SIMD128-NEXT: return $pop7{{$}} +; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}} +; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3, i16 %x4, i16 %x5, i16 %x6, i16 %x7) { %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0 @@ -269,8 +269,8 @@ ; CHECK-LABEL: const_v4i32: ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.const $push0=, 50462976, 117835012, 185207048, 252579084{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @const_v4i32() { ret <4 x i32> } @@ -279,8 +279,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.splat $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @splat_v4i32(i32 %x) { %v = insertelement <4 x i32> undef, i32 %x, i32 0 %res = shufflevector <4 x i32> %v, <4 x i32> undef, @@ -298,8 +298,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i32{{$}} -; SIMD128-NEXT: i32x4.extract_lane $push0=, $0, 3{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i32 @extract_v4i32(<4 x i32> %v) { %elem = extractelement <4 x i32> %v, i32 3 ret i32 %elem @@ -309,8 +309,8 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param v128, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.replace_lane $push0=, $0, 2, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) { %res = insertelement <4 x i32> %v, i32 %x, i32 2 ret <4 x i32> %res @@ -320,9 +320,9 @@ ; NO-SIMD128-NOT: v8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1, +; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, ; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) { %res = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> @@ -333,11 +333,11 @@ ; NO-SIMD128-NOT: i32x4 ; SIMD128-NEXT: .param i32, i32, i32, i32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i32x4.splat $push0=, $0{{$}} -; SIMD128-NEXT: i32x4.replace_lane $push1=, $pop0, 1, $1{{$}} -; SIMD128-NEXT: i32x4.replace_lane $push2=, $pop1, 2, $2{{$}} -; SIMD128-NEXT: i32x4.replace_lane $push3=, $pop2, 3, $3{{$}} -; SIMD128-NEXT: return $pop3{{$}} +; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} +; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} +; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) { %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0 %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1 @@ -353,8 +353,8 @@ ; NO-SIMD128-NOT: i64x2 ; SIMD128-VM-NOT: i64x2 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.const $push0=, 506097522914230528, 1084818905618843912{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @const_v2i64() { ret <2 x i64> } @@ -364,8 +364,8 @@ ; SIMD128-VM-NOT: i64x2 ; SIMD128-NEXT: .param i64{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.splat $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @splat_v2i64(i64 %x) { %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 %res = insertelement <2 x i64> %t1, i64 %x, i32 1 @@ -383,8 +383,8 @@ ; SIMD128-VM-NOT: i64x2 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result i64{{$}} -; SIMD128-NEXT: i64x2.extract_lane $push0=, $0, 1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define i64 @extract_v2i64(<2 x i64> %v) { %elem = extractelement <2 x i64> %v, i64 1 ret i64 %elem @@ -395,8 +395,8 @@ ; SIMD128-VM-NOT: i64x2 ; SIMD128-NEXT: .param v128, i64{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.replace_lane $push0=, $0, 0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) { %res = insertelement <2 x i64> %v, i64 %x, i32 0 ret <2 x i64> %res @@ -406,9 +406,9 @@ ; NO-SIMD128-NOT: v8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1, +; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, ; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) { %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> ret <2 x i64> %res @@ -419,9 +419,9 @@ ; SIMD128-VM-NOT: i64x2 ; SIMD128-NEXT: .param i64, i64{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64x2.splat $push0=, $0{{$}} -; SIMD128-NEXT: i64x2.replace_lane $push1=, $pop0, 1, $1{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) { %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0 %res = insertelement <2 x i64> %t0, i64 %x1, i32 1 @@ -434,9 +434,9 @@ ; CHECK-LABEL: const_v4f32: ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.const $push0=, +; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, ; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @const_v4f32() { ret <4 x float> @@ -446,8 +446,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param f32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.splat $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @splat_v4f32(float %x) { %v = insertelement <4 x float> undef, float %x, i32 0 %res = shufflevector <4 x float> %v, <4 x float> undef, @@ -465,8 +465,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result f32{{$}} -; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 3{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define float @extract_v4f32(<4 x float> %v) { %elem = extractelement <4 x float> %v, i32 3 ret float %elem @@ -476,8 +476,8 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param v128, f32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.replace_lane $push0=, $0, 2, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @replace_v4f32(<4 x float> %v, float %x) { %res = insertelement <4 x float> %v, float %x, i32 2 ret <4 x float> %res @@ -487,9 +487,9 @@ ; NO-SIMD128-NOT: v8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1, +; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, ; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) { %res = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> @@ -500,11 +500,11 @@ ; NO-SIMD128-NOT: f32x4 ; SIMD128-NEXT: .param f32, f32, f32, f32{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f32x4.splat $push0=, $0{{$}} -; SIMD128-NEXT: f32x4.replace_lane $push1=, $pop0, 1, $1{{$}} -; SIMD128-NEXT: f32x4.replace_lane $push2=, $pop1, 2, $2{{$}} -; SIMD128-NEXT: f32x4.replace_lane $push3=, $pop2, 3, $3{{$}} -; SIMD128-NEXT: return $pop3{{$}} +; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} +; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} +; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) { %t0 = insertelement <4 x float> undef, float %x0, i32 0 %t1 = insertelement <4 x float> %t0, float %x1, i32 1 @@ -519,8 +519,8 @@ ; CHECK-LABEL: const_v2f64: ; NO-SIMD128-NOT: f64x2 ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v128.const $push0=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @const_v2f64() { ret <2 x double> } @@ -530,8 +530,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param f64{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.splat $push0=, $0{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @splat_v2f64(double %x) { %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0 %res = insertelement <2 x double> %t1, double %x, i32 1 @@ -549,8 +549,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result f64{{$}} -; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define double @extract_v2f64(<2 x double> %v) { %elem = extractelement <2 x double> %v, i32 1 ret double %elem @@ -561,8 +561,8 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param v128, f64{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.replace_lane $push0=, $0, 0, $1{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @replace_v2f64(<2 x double> %v, double %x) { %res = insertelement <2 x double> %v, double %x, i32 0 ret <2 x double> %res @@ -572,9 +572,9 @@ ; NO-SIMD128-NOT: v8x16 ; SIMD128-NEXT: .param v128, v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1, +; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, ; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}} -; SIMD128-NEXT: return $pop0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) { %res = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> @@ -586,9 +586,9 @@ ; SIMD128-VM-NOT: f64x2 ; SIMD128-NEXT: .param f64, f64{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: f64x2.splat $push0=, $0{{$}} -; SIMD128-NEXT: f64x2.replace_lane $push1=, $pop0, 1, $1{{$}} -; SIMD128-NEXT: return $pop1{{$}} +; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x double> @build_v2f64(double %x0, double %x1) { %t0 = insertelement <2 x double> undef, double %x0, i32 0 %res = insertelement <2 x double> %t0, double %x1, i32 1