Index: lib/Target/Mips/MicroMipsInstrFormats.td =================================================================== --- lib/Target/Mips/MicroMipsInstrFormats.td +++ lib/Target/Mips/MicroMipsInstrFormats.td @@ -794,3 +794,12 @@ let Inst{10-6} = 0x0; let Inst{5-0} = 0x0; } + +class COP0_TLB_FM_MM op> : MMArch { + bits<32> Inst; + + let Inst{31-26} = 0x0; + let Inst{25-16} = 1; + let Inst{15-6} = op; + let Inst{5-0} = 0x3c; +} Index: lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsInstrInfo.td +++ lib/Target/Mips/MicroMipsInstrInfo.td @@ -558,6 +558,11 @@ def SSNOP_MM : MMRel, Barrier<"ssnop">, BARRIER_FM_MM<0x1>; def EHB_MM : MMRel, Barrier<"ehb">, BARRIER_FM_MM<0x2>; def PAUSE_MM : MMRel, Barrier<"pause">, BARRIER_FM_MM<0x5>; + + def TLBP_MM : MMRel, TLB<"tlbp">, COP0_TLB_FM_MM<0x0d>; + def TLBR_MM : MMRel, TLB<"tlbr">, COP0_TLB_FM_MM<0x4d>; + def TLBWI_MM : MMRel, TLB<"tlbwi">, COP0_TLB_FM_MM<0x8d>; + def TLBWR_MM : MMRel, TLB<"tlbwr">, COP0_TLB_FM_MM<0xcd>; } //===----------------------------------------------------------------------===// Index: lib/Target/Mips/MipsInstrInfo.td =================================================================== --- lib/Target/Mips/MipsInstrInfo.td +++ lib/Target/Mips/MipsInstrInfo.td @@ -1409,11 +1409,11 @@ def JALR_HB : JALR_HB_DESC, JALR_HB_ENC, ISA_MIPS32; class TLB : InstSE<(outs), (ins), asmstr, [], NoItinerary, - FrmOther>; -def TLBP : TLB<"tlbp">, COP0_TLB_FM<0x08>; -def TLBR : TLB<"tlbr">, COP0_TLB_FM<0x01>; -def TLBWI : TLB<"tlbwi">, COP0_TLB_FM<0x02>; -def TLBWR : TLB<"tlbwr">, COP0_TLB_FM<0x06>; + FrmOther, asmstr>; +def TLBP : MMRel, TLB<"tlbp">, COP0_TLB_FM<0x08>; +def TLBR : MMRel, TLB<"tlbr">, COP0_TLB_FM<0x01>; +def TLBWI : MMRel, TLB<"tlbwi">, COP0_TLB_FM<0x02>; +def TLBWR : MMRel, TLB<"tlbwr">, COP0_TLB_FM<0x06>; class CacheOp : InstSE<(outs), (ins MemOpnd:$addr, uimm5:$hint), Index: test/MC/Mips/micromips-control-instructions.s =================================================================== --- test/MC/Mips/micromips-control-instructions.s +++ test/MC/Mips/micromips-control-instructions.s @@ -14,6 +14,10 @@ # CHECK-EL: ssnop # encoding: [0x00,0x00,0x40,0x00] # CHECK-EL: ehb # encoding: [0x00,0x00,0xc0,0x00] # CHECK-EL: pause # encoding: [0x00,0x00,0x40,0x01] +# CHECK-EL: tlbp # encoding: [0x01,0x00,0x7c,0x03] +# CHECK-EL: tlbr # encoding: [0x01,0x00,0x7c,0x13] +# CHECK-EL: tlbwi # encoding: [0x01,0x00,0x7c,0x23] +# CHECK-EL: tlbwr # encoding: [0x01,0x00,0x7c,0x33] # CHECK-EL: break # encoding: [0x00,0x00,0x07,0x00] # CHECK-EL: break 7 # encoding: [0x07,0x00,0x07,0x00] # CHECK-EL: break 7, 5 # encoding: [0x07,0x00,0x47,0x01] @@ -37,6 +41,10 @@ # CHECK-EB: ssnop # encoding: [0x00,0x00,0x00,0x40] # CHECK-EB: ehb # encoding: [0x00,0x00,0x00,0xc0] # CHECK-EB: pause # encoding: [0x00,0x00,0x01,0x40] +# CHECK-EB: tlbp # encoding: [0x00,0x01,0x03,0x7c] +# CHECK-EB: tlbr # encoding: [0x00,0x01,0x13,0x7c] +# CHECK-EB: tlbwi # encoding: [0x00,0x01,0x23,0x7c] +# CHECK-EB: tlbwr # encoding: [0x00,0x01,0x33,0x7c] # CHECK-EB: break # encoding: [0x00,0x00,0x00,0x07] # CHECK-EB: break 7 # encoding: [0x00,0x07,0x00,0x07] # CHECK-EB: break 7, 5 # encoding: [0x00,0x07,0x01,0x47] @@ -58,6 +66,10 @@ ssnop ehb pause + tlbp + tlbr + tlbwi + tlbwr break break 7 break 7,5