Index: llvm/lib/Target/PowerPC/PPCScheduleP7.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCScheduleP7.td
+++ llvm/lib/Target/PowerPC/PPCScheduleP7.td
@@ -114,6 +114,10 @@
                                                   P7_DU3, P7_DU4], 0>,
                                    InstrStage<1, [P7_FX1, P7_FX2]>],
                                   [4, 1, 1]>,
+  InstrItinData<IIC_IntMulHD    , [InstrStage<1, [P7_DU1, P7_DU2,
+                                                  P7_DU3, P7_DU4], 0>,
+                                   InstrStage<1, [P7_FX1, P7_FX2]>],
+                                  [4, 1, 1]>,
   InstrItinData<IIC_IntMulLI    , [InstrStage<1, [P7_DU1, P7_DU2,
                                                   P7_DU3, P7_DU4], 0>,
                                    InstrStage<1, [P7_FX1, P7_FX2]>],
Index: llvm/lib/Target/PowerPC/PPCScheduleP8.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCScheduleP8.td
+++ llvm/lib/Target/PowerPC/PPCScheduleP8.td
@@ -90,6 +90,10 @@
                                                   P8_DU4, P8_DU5, P8_DU6], 0>,
                                    InstrStage<1, [P8_FXU1, P8_FXU2]>],
                                   [4, 1, 1]>,
+  InstrItinData<IIC_IntMulHD    , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
+                                                  P8_DU4, P8_DU5, P8_DU6], 0>,
+                                   InstrStage<1, [P8_FXU1, P8_FXU2]>],
+                                  [4, 1, 1]>,
   InstrItinData<IIC_IntMulLI    , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
                                                   P8_DU4, P8_DU5, P8_DU6], 0>,
                                    InstrStage<1, [P8_FXU1, P8_FXU2]>],
Index: llvm/test/CodeGen/PowerPC/mulld.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/mulld.ll
+++ llvm/test/CodeGen/PowerPC/mulld.ll
@@ -18,10 +18,10 @@
 
 ; CHECK-ITIN-LABEL: bn_mul_comba8:
 ; CHECK-ITIN:    mulhdu
-; CHECK-ITIN-NEXT:    mulhdu
 ; CHECK-ITIN-NEXT:    mulld
 ; CHECK-ITIN-NEXT:    mulhdu
 ; CHECK-ITIN-NEXT:    mulld
+; CHECK-ITIN-NEXT:    mulhdu
 
   %1 = load i64, i64* %a, align 8
   %conv = zext i64 %1 to i128