Index: test/CodeGen/WebAssembly/simd-arith.ll
===================================================================
--- test/CodeGen/WebAssembly/simd-arith.ll
+++ test/CodeGen/WebAssembly/simd-arith.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
-; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
-; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
-; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
-; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
-; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=-simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=-simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test that basic SIMD128 arithmetic operations assemble as expected.
 
@@ -17,8 +17,11 @@
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i8x16.add $push0=, $0, $1 # encoding: [0xfd,0x18]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i8x16.add $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x18]{{$}}
+; SIMD128: return $pop[[R]] #
 define <16 x i8> @add_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = add <16 x i8> %x, %y
   ret <16 x i8> %a
@@ -28,8 +31,11 @@
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i8x16.sub $push0=, $0, $1 # encoding: [0xfd,0x1c]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i8x16.sub $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x1c]{{$}}
+; SIMD128: return $pop[[R]] #
 define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = sub <16 x i8> %x, %y
   ret <16 x i8> %a
@@ -39,8 +45,11 @@
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i8x16.mul $push0=, $0, $1 # encoding: [0xfd,0x20]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i8x16.mul $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x20]{{$}}
+; SIMD128: return $pop[[R]] #
 define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = mul <16 x i8> %x, %y
   ret <16 x i8> %a
@@ -50,8 +59,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.and $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3b]{{$}}
+; SIMD128: return $pop[[R]] #
 define <16 x i8> @and_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = and <16 x i8> %x, %y
   ret <16 x i8> %a
@@ -61,8 +73,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.or $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3c]{{$}}
+; SIMD128: return $pop[[R]] #
 define <16 x i8> @or_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = or <16 x i8> %x, %y
   ret <16 x i8> %a
@@ -72,8 +87,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.xor $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3d]{{$}}
+; SIMD128: return $pop[[R]] #
 define <16 x i8> @xor_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = xor <16 x i8> %x, %y
   ret <16 x i8> %a
@@ -83,8 +101,9 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: v128.not $push[[R:[0-9]+]]=, $pop[[L0]] # encoding: [0xfd,0x3e]{{$}}
+; SIMD128: return $pop[[R]] #
 define <16 x i8> @not_v16i8(<16 x i8> %x) {
   %a = xor <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1,
                           i8 -1, i8 -1, i8 -1, i8 -1,
@@ -100,8 +119,11 @@
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i16x8.add $push0=, $0, $1 # encoding: [0xfd,0x19]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i16x8.add $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x19]{{$}}
+; SIMD128: return $pop[[R]] #
 define <8 x i16> @add_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %a = add <8 x i16> %x, %y
   ret <8 x i16> %a
@@ -111,8 +133,11 @@
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i16x8.sub $push0=, $0, $1 # encoding: [0xfd,0x1d]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i16x8.sub $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x1d]{{$}}
+; SIMD128: return $pop[[R]] #
 define <8 x i16> @sub_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %a = sub <8 x i16> %x, %y
   ret <8 x i16> %a
@@ -122,8 +147,11 @@
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i16x8.mul $push0=, $0, $1 # encoding: [0xfd,0x21]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i16x8.mul $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x21]{{$}}
+; SIMD128: return $pop[[R]] #
 define <8 x i16> @mul_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %a = mul <8 x i16> %x, %y
   ret <8 x i16> %a
@@ -133,8 +161,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.and $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3b]{{$}}
+; SIMD128: return $pop[[R]] #
 define <8 x i16> @and_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %a = and <8 x i16> %x, %y
   ret <8 x i16> %a
@@ -144,8 +175,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.or $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3c]{{$}}
+; SIMD128: return $pop[[R]] #
 define <8 x i16> @or_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %a = or <8 x i16> %x, %y
   ret <8 x i16> %a
@@ -155,8 +189,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.xor $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3d]{{$}}
+; SIMD128: return $pop[[R]] #
 define <8 x i16> @xor_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %a = xor <8 x i16> %x, %y
   ret <8 x i16> %a
@@ -166,8 +203,9 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: v128.not $push[[R:[0-9]+]]=, $pop[[L0]] # encoding: [0xfd,0x3e]{{$}}
+; SIMD128: return $pop[[R]] #
 define <8 x i16> @not_v8i16(<8 x i16> %x) {
   %a = xor <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1,
                           i16 -1, i16 -1, i16 -1, i16 -1>
@@ -181,8 +219,11 @@
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i32x4.add $push0=, $0, $1 # encoding: [0xfd,0x1a]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i32x4.add $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x1a]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x i32> @add_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %a = add <4 x i32> %x, %y
   ret <4 x i32> %a
@@ -192,8 +233,11 @@
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i32x4.sub $push0=, $0, $1 # encoding: [0xfd,0x1e]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i32x4.sub $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x1e]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x i32> @sub_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %a = sub <4 x i32> %x, %y
   ret <4 x i32> %a
@@ -203,8 +247,11 @@
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i32x4.mul $push0=, $0, $1 # encoding: [0xfd,0x22]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i32x4.mul $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x22]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x i32> @mul_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %a = mul <4 x i32> %x, %y
   ret <4 x i32> %a
@@ -214,8 +261,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.and $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3b]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x i32> @and_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %a = and <4 x i32> %x, %y
   ret <4 x i32> %a
@@ -225,8 +275,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.or $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3c]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x i32> @or_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %a = or <4 x i32> %x, %y
   ret <4 x i32> %a
@@ -236,8 +289,11 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.xor $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3d]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x i32> @xor_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %a = xor <4 x i32> %x, %y
   ret <4 x i32> %a
@@ -247,8 +303,9 @@
 ; NO-SIMD128-NOT: v128
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: v128.not $push[[R:[0-9]+]]=, $pop[[L0]] # encoding: [0xfd,0x3e]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x i32> @not_v4i32(<4 x i32> %x) {
   %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
   ret <4 x i32> %a
@@ -262,8 +319,11 @@
 ; SIMD128-VM-NOT: i64x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i64x2.add $push0=, $0, $1 # encoding: [0xfd,0x1b]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i64x2.add $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x1b]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x i64> @add_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %a = add <2 x i64> %x, %y
   ret <2 x i64> %a
@@ -274,8 +334,11 @@
 ; SIMD128-VM-NOT: i64x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: i64x2.sub $push0=, $0, $1 # encoding: [0xfd,0x1f]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: i64x2.sub $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x1f]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x i64> @sub_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %a = sub <2 x i64> %x, %y
   ret <2 x i64> %a
@@ -286,6 +349,8 @@
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
 ; SIMD128-NOT: i64x2.mul
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
 ; SIMD128: i64x2.extract_lane
 ; SIMD128: i64.mul
 define <2 x i64> @mul_v2i64(<2 x i64> %x, <2 x i64> %y) {
@@ -298,8 +363,11 @@
 ; SIMD128-VM-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.and $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3b]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x i64> @and_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %a = and <2 x i64> %x, %y
   ret <2 x i64> %a
@@ -310,8 +378,11 @@
 ; SIMD128-VM-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.or $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3c]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x i64> @or_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %a = or <2 x i64> %x, %y
   ret <2 x i64> %a
@@ -322,8 +393,11 @@
 ; SIMD128-VM-NOT: v128
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: v128.xor $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x3d]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x i64> @xor_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %a = xor <2 x i64> %x, %y
   ret <2 x i64> %a
@@ -334,8 +408,9 @@
 ; SIMD128-VM-NOT: v128
 ; SIMD128: .param v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: v128.not $push[[R:[0-9]+]]=, $pop[[L0]] # encoding: [0xfd,0x3e]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x i64> @not_v2i64(<2 x i64> %x) {
   %a = xor <2 x i64> %x, <i64 -1, i64 -1>
   ret <2 x i64> %a
@@ -348,8 +423,11 @@
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f32x4.add $push0=, $0, $1 # encoding: [0xfd,0x7a]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f32x4.add $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x7a]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) {
   %a = fadd <4 x float> %x, %y
   ret <4 x float> %a
@@ -359,8 +437,11 @@
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f32x4.sub $push0=, $0, $1 # encoding: [0xfd,0x7c]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f32x4.sub $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x7c]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x float> @sub_v4f32(<4 x float> %x, <4 x float> %y) {
   %a = fsub <4 x float> %x, %y
   ret <4 x float> %a
@@ -370,8 +451,11 @@
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f32x4.div $push0=, $0, $1 # encoding: [0xfd,0x7e]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f32x4.div $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x7e]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x float> @div_v4f32(<4 x float> %x, <4 x float> %y) {
   %a = fdiv <4 x float> %x, %y
   ret <4 x float> %a
@@ -381,8 +465,11 @@
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f32x4.mul $push0=, $0, $1 # encoding: [0xfd,0x80]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f32x4.mul $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x80]{{$}}
+; SIMD128: return $pop[[R]] #
 define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) {
   %a = fmul <4 x float> %x, %y
   ret <4 x float> %a
@@ -396,8 +483,11 @@
 ; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f64x2.add $push0=, $0, $1 # encoding: [0xfd,0x7b]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f64x2.add $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x7b]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x double> @add_v2f64(<2 x double> %x, <2 x double> %y) {
   %a = fadd <2 x double> %x, %y
   ret <2 x double> %a
@@ -408,8 +498,11 @@
 ; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f64x2.sub $push0=, $0, $1 # encoding: [0xfd,0x7d]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f64x2.sub $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x7d]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x double> @sub_v2f64(<2 x double> %x, <2 x double> %y) {
   %a = fsub <2 x double> %x, %y
   ret <2 x double> %a
@@ -420,8 +513,11 @@
 ; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f64x2.div $push0=, $0, $1 # encoding: [0xfd,0x7f]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f64x2.div $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x7f]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x double> @div_v2f64(<2 x double> %x, <2 x double> %y) {
   %a = fdiv <2 x double> %x, %y
   ret <2 x double> %a
@@ -432,8 +528,11 @@
 ; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
-; SIMD128: f64x2.mul $push0=, $0, $1 # encoding: [0xfd,0x81]{{$}}
-; SIMD128: return $pop0 #
+; SIMD128: get_local $push[[L0:[0-9]+]]=, 0 #
+; SIMD128: get_local $push[[L1:[0-9]+]]=, 1 #
+; SIMD128: f64x2.mul $push[[R:[0-9]+]]=, $pop[[L0]], $pop[[L1]] #
+; SIMD128-SAME: encoding: [0xfd,0x81]{{$}}
+; SIMD128: return $pop[[R]] #
 define <2 x double> @mul_v2f64(<2 x double> %x, <2 x double> %y) {
   %a = fmul <2 x double> %x, %y
   ret <2 x double> %a