Index: lib/Target/X86/X86InstrArithmetic.td =================================================================== --- lib/Target/X86/X86InstrArithmetic.td +++ lib/Target/X86/X86InstrArithmetic.td @@ -1284,21 +1284,16 @@ // ADCX and ADOX Instructions // let Predicates = [HasADX], Defs = [EFLAGS], Uses = [EFLAGS], - Constraints = "$src1 = $dst", AddedComplexity = 10 in { + Constraints = "$src1 = $dst", hasSideEffects = 0 in { let SchedRW = [WriteADC] in { def ADCX32rr : I<0xF6, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "adcx{l}\t{$src2, $dst|$dst, $src2}", - [(set GR32:$dst, EFLAGS, - (X86adc_flag GR32:$src1, GR32:$src2, EFLAGS))]>, T8PD; + "adcx{l}\t{$src2, $dst|$dst, $src2}", []>, T8PD; def ADCX64rr : RI<0xF6, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "adcx{q}\t{$src2, $dst|$dst, $src2}", - [(set GR64:$dst, EFLAGS, - (X86adc_flag GR64:$src1, GR64:$src2, EFLAGS))]>, T8PD; + "adcx{q}\t{$src2, $dst|$dst, $src2}", []>, T8PD; // We don't have patterns for ADOX yet. - let hasSideEffects = 0 in { def ADOX32rr : I<0xF6, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "adox{l}\t{$src2, $dst|$dst, $src2}", []>, T8XS; @@ -1306,26 +1301,18 @@ def ADOX64rr : RI<0xF6, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), "adox{q}\t{$src2, $dst|$dst, $src2}", []>, T8XS; - } // hasSideEffects = 0 } // SchedRW let mayLoad = 1, SchedRW = [WriteADCLd, ReadAfterLd] in { def ADCX32rm : I<0xF6, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "adcx{l}\t{$src2, $dst|$dst, $src2}", - [(set GR32:$dst, EFLAGS, - (X86adc_flag GR32:$src1, (loadi32 addr:$src2), EFLAGS))]>, - T8PD; + "adcx{l}\t{$src2, $dst|$dst, $src2}", []>, T8PD; def ADCX64rm : RI<0xF6, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "adcx{q}\t{$src2, $dst|$dst, $src2}", - [(set GR64:$dst, EFLAGS, - (X86adc_flag GR64:$src1, (loadi64 addr:$src2), EFLAGS))]>, - T8PD; + "adcx{q}\t{$src2, $dst|$dst, $src2}", []>, T8PD; // We don't have patterns for ADOX yet. - let hasSideEffects = 0 in { def ADOX32rm : I<0xF6, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), "adox{l}\t{$src2, $dst|$dst, $src2}", []>, T8XS; @@ -1333,6 +1320,5 @@ def ADOX64rm : RI<0xF6, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), "adox{q}\t{$src2, $dst|$dst, $src2}", []>, T8XS; - } // hasSideEffects = 0 } // mayLoad = 1, SchedRW = [WriteADCLd] } Index: test/CodeGen/X86/adx-intrinsics.ll =================================================================== --- test/CodeGen/X86/adx-intrinsics.ll +++ test/CodeGen/X86/adx-intrinsics.ll @@ -5,21 +5,13 @@ declare i8 @llvm.x86.addcarryx.u32(i8, i32, i32, i8*) define i8 @test_addcarryx_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u32: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] -; NOADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u32: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl %edx, %esi ## encoding: [0x66,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u32: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] +; CHECK-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarryx.u32(i8 %c, i32 %a, i32 %b, i8* %ptr) ret i8 %ret; } @@ -27,21 +19,13 @@ declare i8 @llvm.x86.addcarryx.u64(i8, i64, i64, i8*) define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u64: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] -; NOADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u64: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxq %rdx, %rsi ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u64: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] +; CHECK-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarryx.u64(i8 %c, i64 %a, i64 %b, i8* %ptr) ret i8 %ret; } @@ -49,21 +33,13 @@ declare i8 @llvm.x86.addcarry.u32(i8, i32, i32, i8*) define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarry_u32: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] -; NOADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarry_u32: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl %edx, %esi ## encoding: [0x66,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarry_u32: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] +; CHECK-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarry.u32(i8 %c, i32 %a, i32 %b, i8* %ptr) ret i8 %ret; } @@ -71,21 +47,13 @@ declare i8 @llvm.x86.addcarry.u64(i8, i64, i64, i8*) define i8 @test_addcarry_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarry_u64: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] -; NOADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarry_u64: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxq %rdx, %rsi ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarry_u64: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] +; CHECK-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarry.u64(i8 %c, i64 %a, i64 %b, i8* %ptr) ret i8 %ret; } @@ -120,27 +88,16 @@ ; Try a version with loads. Previously we crashed on this. define i32 @load_crash(i64* nocapture readonly %a, i64* nocapture readonly %b, i64* %res) { -; NOADX-LABEL: load_crash: -; NOADX: ## %bb.0: -; NOADX-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] -; NOADX-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] -; NOADX-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] -; NOADX-NEXT: adcq (%rsi), %rax ## encoding: [0x48,0x13,0x06] -; NOADX-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movzbl %al, %eax ## encoding: [0x0f,0xb6,0xc0] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: load_crash: -; ADX: ## %bb.0: -; ADX-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] -; ADX-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] -; ADX-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] -; ADX-NEXT: adcxq (%rsi), %rax ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0x06] -; ADX-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movzbl %al, %eax ## encoding: [0x0f,0xb6,0xc0] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: load_crash: +; CHECK: ## %bb.0: +; CHECK-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] +; CHECK-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] +; CHECK-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] +; CHECK-NEXT: adcq (%rsi), %rax ## encoding: [0x48,0x13,0x06] +; CHECK-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movzbl %al, %eax ## encoding: [0x0f,0xb6,0xc0] +; CHECK-NEXT: retq ## encoding: [0xc3] %1 = load i64, i64* %a, align 8 %2 = load i64, i64* %b, align 8 %3 = bitcast i64* %res to i8* Index: test/CodeGen/X86/pr32282.ll =================================================================== --- test/CodeGen/X86/pr32282.ll +++ test/CodeGen/X86/pr32282.ll @@ -23,9 +23,8 @@ ; X86-NEXT: shrdl $21, %ecx, %eax ; X86-NEXT: shrl $21, %ecx ; X86-NEXT: andl $-2, %eax -; X86-NEXT: xorl %edx, %edx ; X86-NEXT: addl $7, %eax -; X86-NEXT: adcxl %edx, %ecx +; X86-NEXT: adcl $0, %ecx ; X86-NEXT: pushl %ecx ; X86-NEXT: .cfi_adjust_cfa_offset 4 ; X86-NEXT: pushl %eax Index: test/CodeGen/X86/pr32284.ll =================================================================== --- test/CodeGen/X86/pr32284.ll +++ test/CodeGen/X86/pr32284.ll @@ -207,9 +207,8 @@ ; 686-O0-NEXT: subl $-1, %esi ; 686-O0-NEXT: sete %bl ; 686-O0-NEXT: movzbl %bl, %edi -; 686-O0-NEXT: xorl %ebp, %ebp ; 686-O0-NEXT: addl $7093, %ecx # imm = 0x1BB5 -; 686-O0-NEXT: adcxl %ebp, %edx +; 686-O0-NEXT: adcl $0, %edx ; 686-O0-NEXT: subl %edi, %ecx ; 686-O0-NEXT: sbbl $0, %edx ; 686-O0-NEXT: setl %bl @@ -223,8 +222,8 @@ ; 686-O0-NEXT: movl %ebp, _ZN8struct_210member_2_0E ; 686-O0-NEXT: movl $0, _ZN8struct_210member_2_0E+4 ; 686-O0-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; 686-O0-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 686-O0-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; 686-O0-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 686-O0-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 686-O0-NEXT: movl %edi, (%esp) # 4-byte Spill ; 686-O0-NEXT: addl $24, %esp @@ -241,14 +240,11 @@ ; ; 686-LABEL: f1: ; 686: # %bb.0: # %entry -; 686-NEXT: pushl %edi -; 686-NEXT: .cfi_def_cfa_offset 8 ; 686-NEXT: pushl %esi -; 686-NEXT: .cfi_def_cfa_offset 12 +; 686-NEXT: .cfi_def_cfa_offset 8 ; 686-NEXT: subl $1, %esp -; 686-NEXT: .cfi_def_cfa_offset 13 -; 686-NEXT: .cfi_offset %esi, -12 -; 686-NEXT: .cfi_offset %edi, -8 +; 686-NEXT: .cfi_def_cfa_offset 9 +; 686-NEXT: .cfi_offset %esi, -8 ; 686-NEXT: movl var_5, %edx ; 686-NEXT: movl %edx, %eax ; 686-NEXT: xorl $208307499, %eax # imm = 0xC6A852B @@ -266,9 +262,8 @@ ; 686-NEXT: xorl %ecx, %ecx ; 686-NEXT: cmpl $-1, %edx ; 686-NEXT: sete %cl -; 686-NEXT: xorl %edi, %edi ; 686-NEXT: addl $7093, %edx # imm = 0x1BB5 -; 686-NEXT: adcxl %edi, %esi +; 686-NEXT: adcl $0, %esi ; 686-NEXT: cmpl %ecx, %edx ; 686-NEXT: sbbl $0, %esi ; 686-NEXT: setl %cl @@ -278,10 +273,8 @@ ; 686-NEXT: movl %eax, _ZN8struct_210member_2_0E ; 686-NEXT: movl $0, _ZN8struct_210member_2_0E+4 ; 686-NEXT: addl $1, %esp -; 686-NEXT: .cfi_def_cfa_offset 12 -; 686-NEXT: popl %esi ; 686-NEXT: .cfi_def_cfa_offset 8 -; 686-NEXT: popl %edi +; 686-NEXT: popl %esi ; 686-NEXT: .cfi_def_cfa_offset 4 ; 686-NEXT: retl entry: Index: test/CodeGen/X86/stack-folding-adx-x86_64.ll =================================================================== --- test/CodeGen/X86/stack-folding-adx-x86_64.ll +++ test/CodeGen/X86/stack-folding-adx-x86_64.ll @@ -10,7 +10,7 @@ define i8 @stack_fold_addcarry_u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarry_u32 - ;CHECK: adcxl {{-?[0-9]*}}(%rsp), %ecx {{.*#+}} 4-byte Folded Reload + ;CHECK: adcl {{-?[0-9]*}}(%rsp), %ecx {{.*#+}} 4-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarry.u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) ret i8 %2; @@ -19,7 +19,7 @@ define i8 @stack_fold_addcarry_u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarry_u64 - ;CHECK: adcxq {{-?[0-9]*}}(%rsp), %rcx {{.*#+}} 8-byte Folded Reload + ;CHECK: adcq {{-?[0-9]*}}(%rsp), %rcx {{.*#+}} 8-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarry.u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) ret i8 %2; @@ -28,7 +28,7 @@ define i8 @stack_fold_addcarryx_u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarryx_u32 - ;CHECK: adcxl {{-?[0-9]*}}(%rsp), %ecx {{.*#+}} 4-byte Folded Reload + ;CHECK: adcl {{-?[0-9]*}}(%rsp), %ecx {{.*#+}} 4-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarryx.u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) ret i8 %2; @@ -37,7 +37,7 @@ define i8 @stack_fold_addcarryx_u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarryx_u64 - ;CHECK: adcxq {{-?[0-9]*}}(%rsp), %rcx {{.*#+}} 8-byte Folded Reload + ;CHECK: adcq {{-?[0-9]*}}(%rsp), %rcx {{.*#+}} 8-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarryx.u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) ret i8 %2;