Index: lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- lib/CodeGen/GlobalISel/IRTranslator.cpp +++ lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -758,9 +758,12 @@ // instructions (in fact, they get ignored if they *do* exist). MF->setVariableDbgInfo(DI.getVariable(), DI.getExpression(), getOrCreateFrameIndex(*AI), DI.getDebugLoc()); - } else - MIRBuilder.buildDirectDbgValue(getOrCreateVReg(*Address), - DI.getVariable(), DI.getExpression()); + } else { + // A dbg.declare describes the address of a source variable, so lower it + // into an indirect DBG_VALUE. + MIRBuilder.buildIndirectDbgValue(getOrCreateVReg(*Address), + DI.getVariable(), DI.getExpression()); + } return true; } case Intrinsic::dbg_label: { Index: test/CodeGen/AArch64/GlobalISel/debug-insts.ll =================================================================== --- test/CodeGen/AArch64/GlobalISel/debug-insts.ll +++ test/CodeGen/AArch64/GlobalISel/debug-insts.ll @@ -6,7 +6,7 @@ ; CHECK: - { id: {{.*}}, name: in.addr, type: default, offset: 0, size: {{.*}}, alignment: {{.*}}, ; CHECK-NEXT: callee-saved-register: '', callee-saved-restored: true, ; CHECK-NEXT: debug-info-variable: '!11', debug-info-expression: '!DIExpression()', -; CHECK: DBG_VALUE debug-use %0(s32), debug-use $noreg, !11, !DIExpression(), debug-location !12 +; CHECK: DBG_VALUE debug-use %0(s32), 0, !11, !DIExpression(), debug-location !12 define void @debug_declare(i32 %in) #0 !dbg !7 { entry: %in.addr = alloca i32, align 4 @@ -17,7 +17,7 @@ } ; CHECK-LABEL: name: debug_declare_vla -; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), debug-use $noreg, !14, !DIExpression(), debug-location !15 +; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15 define void @debug_declare_vla(i32 %in) #0 !dbg !13 { entry: %vla.addr = alloca i32, i32 %in