Index: llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h =================================================================== --- llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h +++ llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h @@ -79,13 +79,6 @@ return Opc <= TargetOpcode::GENERIC_OP_END; } - // Simple struct describing access to a FrameIndex. - struct FrameAccess { - const MachineMemOperand *MMO; - int FI; - FrameAccess(const MachineMemOperand *MMO, int FI) : MMO(MMO), FI(FI) {} - }; - /// Given a machine instruction descriptor, returns the register /// class constraint for OpNum, or NULL. const TargetRegisterClass *getRegClass(const MCInstrDesc &MCID, unsigned OpNum, @@ -258,8 +251,9 @@ /// If not, return false. Unlike isLoadFromStackSlot, this returns true for /// any instructions that loads from the stack. This is just a hint, as some /// cases may be missed. - virtual bool hasLoadFromStackSlot(const MachineInstr &MI, - SmallVectorImpl &Accesses) const; + virtual bool hasLoadFromStackSlot( + const MachineInstr &MI, + SmallVectorImpl &Accesses) const; /// If the specified machine instruction is a direct /// store to a stack slot, return the virtual or physical register number of @@ -295,8 +289,9 @@ /// If not, return false. Unlike isStoreToStackSlot, /// this returns true for any instructions that stores to the /// stack. This is just a hint, as some cases may be missed. - virtual bool hasStoreToStackSlot(const MachineInstr &MI, - SmallVectorImpl &Accesses) const; + virtual bool hasStoreToStackSlot( + const MachineInstr &MI, + SmallVectorImpl &Accesses) const; /// Return true if the specified machine instruction /// is a copy of one stack slot to another and has no other effect. Index: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp =================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -750,19 +750,21 @@ const MachineFrameInfo &MFI = MF->getFrameInfo(); bool Commented = false; - auto getSize = [&MFI]( - const SmallVectorImpl &Accesses) { - unsigned Size = 0; - for (auto &A : Accesses) - if (MFI.isSpillSlotObjectIndex(A.FI)) - Size += A.MMO->getSize(); - return Size; - }; + auto getSize = + [&MFI](const SmallVectorImpl &Accesses) { + unsigned Size = 0; + for (auto A : Accesses) + if (MFI.isSpillSlotObjectIndex( + cast(A->getPseudoValue()) + ->getFrameIndex())) + Size += A->getSize(); + return Size; + }; // We assume a single instruction only has a spill or reload, not // both. const MachineMemOperand *MMO; - SmallVector Accesses; + SmallVector Accesses; if (TII->isLoadFromStackSlotPostFE(MI, FI)) { if (MFI.isSpillSlotObjectIndex(FI)) { MMO = *MI.memoperands_begin(); Index: llvm/trunk/lib/CodeGen/LiveDebugValues.cpp =================================================================== --- llvm/trunk/lib/CodeGen/LiveDebugValues.cpp +++ llvm/trunk/lib/CodeGen/LiveDebugValues.cpp @@ -470,7 +470,7 @@ MachineFunction *MF, unsigned &Reg) { const MachineFrameInfo &FrameInfo = MF->getFrameInfo(); int FI; - SmallVector Accesses; + SmallVector Accesses; // TODO: Handle multiple stores folded into one. if (!MI.hasOneMemOperand()) @@ -480,8 +480,10 @@ if (!((TII->isStoreToStackSlotPostFE(MI, FI) && FrameInfo.isSpillSlotObjectIndex(FI)) || (TII->hasStoreToStackSlot(MI, Accesses) && - llvm::any_of(Accesses, [&FrameInfo](TargetInstrInfo::FrameAccess &FA) { - return FrameInfo.isSpillSlotObjectIndex(FA.FI); + llvm::any_of(Accesses, [&FrameInfo](const MachineMemOperand *MMO) { + return FrameInfo.isSpillSlotObjectIndex( + cast(MMO->getPseudoValue()) + ->getFrameIndex()); })))) return false; Index: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp =================================================================== --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp @@ -3120,24 +3120,23 @@ // Handle blocks that were not included in subloops. if (Loops->getLoopFor(MBB) == L) for (MachineInstr &MI : *MBB) { - SmallVector Accesses; + SmallVector Accesses; + auto isSpillSlotAccess = [&MFI](const MachineMemOperand *A) { + return MFI.isSpillSlotObjectIndex( + cast(A->getPseudoValue()) + ->getFrameIndex()); + }; if (TII->isLoadFromStackSlot(MI, FI) && MFI.isSpillSlotObjectIndex(FI)) ++Reloads; else if (TII->hasLoadFromStackSlot(MI, Accesses) && - llvm::any_of(Accesses, - [&MFI](const TargetInstrInfo::FrameAccess &A) { - return MFI.isSpillSlotObjectIndex(A.FI); - })) + llvm::any_of(Accesses, isSpillSlotAccess)) ++FoldedReloads; else if (TII->isStoreToStackSlot(MI, FI) && MFI.isSpillSlotObjectIndex(FI)) ++Spills; else if (TII->hasStoreToStackSlot(MI, Accesses) && - llvm::any_of(Accesses, - [&MFI](const TargetInstrInfo::FrameAccess &A) { - return MFI.isSpillSlotObjectIndex(A.FI); - })) + llvm::any_of(Accesses, isSpillSlotAccess)) ++FoldedSpills; } Index: llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp =================================================================== --- llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp +++ llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp @@ -340,34 +340,29 @@ } bool TargetInstrInfo::hasLoadFromStackSlot( - const MachineInstr &MI, SmallVectorImpl &Accesses) const { - + const MachineInstr &MI, + SmallVectorImpl &Accesses) const { size_t StartSize = Accesses.size(); for (MachineInstr::mmo_iterator o = MI.memoperands_begin(), oe = MI.memoperands_end(); o != oe; ++o) { - if ((*o)->isLoad()) { - if (const FixedStackPseudoSourceValue *Value = - dyn_cast_or_null( - (*o)->getPseudoValue())) - Accesses.emplace_back(*o, Value->getFrameIndex()); - } + if ((*o)->isLoad() && + dyn_cast_or_null((*o)->getPseudoValue())) + Accesses.push_back(*o); } return Accesses.size() != StartSize; } bool TargetInstrInfo::hasStoreToStackSlot( - const MachineInstr &MI, SmallVectorImpl &Accesses) const { + const MachineInstr &MI, + SmallVectorImpl &Accesses) const { size_t StartSize = Accesses.size(); for (MachineInstr::mmo_iterator o = MI.memoperands_begin(), oe = MI.memoperands_end(); o != oe; ++o) { - if ((*o)->isStore()) { - if (const FixedStackPseudoSourceValue *Value = - dyn_cast_or_null( - (*o)->getPseudoValue())) - Accesses.emplace_back(*o, Value->getFrameIndex()); - } + if ((*o)->isStore() && + dyn_cast_or_null((*o)->getPseudoValue())) + Accesses.push_back(*o); } return Accesses.size() != StartSize; } Index: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp =================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1172,9 +1172,11 @@ unsigned ARMBaseInstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const { - SmallVector Accesses; + SmallVector Accesses; if (MI.mayStore() && hasStoreToStackSlot(MI, Accesses)) { - FrameIndex = Accesses.begin()->FI; + FrameIndex = + cast(Accesses.front()->getPseudoValue()) + ->getFrameIndex(); return true; } return false; @@ -1390,9 +1392,11 @@ unsigned ARMBaseInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const { - SmallVector Accesses; + SmallVector Accesses; if (MI.mayLoad() && hasLoadFromStackSlot(MI, Accesses)) { - FrameIndex = Accesses.begin()->FI; + FrameIndex = + cast(Accesses.front()->getPseudoValue()) + ->getFrameIndex(); return true; } return false; Index: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.h =================================================================== --- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.h +++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.h @@ -71,14 +71,14 @@ /// if true. bool hasLoadFromStackSlot( const MachineInstr &MI, - SmallVectorImpl &Accesses) const override; + SmallVectorImpl &Accesses) const override; /// Check if the instruction or the bundle of instructions has /// store to stack slots. Return the frameindex and machine memory operand /// if true. bool hasStoreToStackSlot( const MachineInstr &MI, - SmallVectorImpl &Accesses) const override; + SmallVectorImpl &Accesses) const override; /// Analyze the branching code at the end of MBB, returning /// true if it cannot be understood (e.g. it's a switch dispatch or isn't Index: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp =================================================================== --- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -337,7 +337,7 @@ /// operand of that instruction if true. bool HexagonInstrInfo::hasLoadFromStackSlot( const MachineInstr &MI, - SmallVectorImpl &Accesses) const { + SmallVectorImpl &Accesses) const { if (MI.isBundle()) { const MachineBasicBlock *MBB = MI.getParent(); MachineBasicBlock::const_instr_iterator MII = MI.getIterator(); @@ -355,7 +355,7 @@ /// operand of that instruction if true. bool HexagonInstrInfo::hasStoreToStackSlot( const MachineInstr &MI, - SmallVectorImpl &Accesses) const { + SmallVectorImpl &Accesses) const { if (MI.isBundle()) { const MachineBasicBlock *MBB = MI.getParent(); MachineBasicBlock::const_instr_iterator MII = MI.getIterator(); Index: llvm/trunk/lib/Target/Lanai/LanaiInstrInfo.cpp =================================================================== --- llvm/trunk/lib/Target/Lanai/LanaiInstrInfo.cpp +++ llvm/trunk/lib/Target/Lanai/LanaiInstrInfo.cpp @@ -733,9 +733,11 @@ if ((Reg = isLoadFromStackSlot(MI, FrameIndex))) return Reg; // Check for post-frame index elimination operations - SmallVector Accesses; + SmallVector Accesses; if (hasLoadFromStackSlot(MI, Accesses)){ - FrameIndex = Accesses.begin()->FI; + FrameIndex = + cast(Accesses.front()->getPseudoValue()) + ->getFrameIndex(); return 1; } } Index: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp @@ -411,9 +411,11 @@ if ((Reg = isLoadFromStackSlot(MI, FrameIndex))) return Reg; // Check for post-frame index elimination operations - SmallVector Accesses; + SmallVector Accesses; if (hasLoadFromStackSlot(MI, Accesses)) { - FrameIndex = Accesses.begin()->FI; + FrameIndex = + cast(Accesses.front()->getPseudoValue()) + ->getFrameIndex(); return 1; } } @@ -444,9 +446,11 @@ if ((Reg = isStoreToStackSlot(MI, FrameIndex))) return Reg; // Check for post-frame index elimination operations - SmallVector Accesses; + SmallVector Accesses; if (hasStoreToStackSlot(MI, Accesses)) { - FrameIndex = Accesses.begin()->FI; + FrameIndex = + cast(Accesses.front()->getPseudoValue()) + ->getFrameIndex(); return 1; } }