Index: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp =================================================================== --- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp +++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -4063,9 +4063,17 @@ getNamedOperand(*Add, SrcNames[i]); if (Src->isReg()) { - auto Mov = MRI.getUniqueVRegDef(Src->getReg()); - if (Mov && Mov->getOpcode() == AMDGPU::S_MOV_B32) - Src = &Mov->getOperand(1); + MachineInstr *Def = MRI.getUniqueVRegDef(Src->getReg()); + if (Def) { + if (Def->isMoveImmediate()) + Src = &Def->getOperand(1); + else if (Def->isCopy()) { + auto Mov = MRI.getUniqueVRegDef(Def->getOperand(1).getReg()); + if (Mov && Mov->isMoveImmediate()) { + Src = &Mov->getOperand(1); + } + } + } } if (Src) { Index: llvm/trunk/test/CodeGen/AMDGPU/smrd-fold-offset.mir =================================================================== --- llvm/trunk/test/CodeGen/AMDGPU/smrd-fold-offset.mir +++ llvm/trunk/test/CodeGen/AMDGPU/smrd-fold-offset.mir @@ -0,0 +1,23 @@ +# RUN: llc -march=amdgcn -run-pass si-fix-sgpr-copies -o - %s | FileCheck -check-prefix=GCN %s + +# GCN: BUFFER_LOAD_DWORD_OFFEN %{{[0-9]+}}, killed %{{[0-9]+}}, 0, 4095 +--- +name: smrd_vgpr_offset_imm +body: | + bb.0: + liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0 + + %4:vgpr_32 = COPY $vgpr0 + %3:sgpr_32 = COPY $sgpr3 + %2:sgpr_32 = COPY $sgpr2 + %1:sgpr_32 = COPY $sgpr1 + %0:sgpr_32 = COPY $sgpr0 + %5:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3 + %6:sreg_32_xm0 = S_MOV_B32 4095 + %8:vgpr_32 = COPY %6 + %7:vgpr_32 = V_ADD_I32_e32 %4, killed %8, implicit-def dead $vcc, implicit $exec + %10:sreg_32 = COPY %7 + %9:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR killed %5, killed %10, 0 + $vgpr0 = COPY %9 + SI_RETURN_TO_EPILOG $vgpr0 +...