Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1163,6 +1163,14 @@ ((Imm % 4 == 0) && Imm < 28 && Imm > 0))) return Error(IDLoc, "immediate operand value out of range"); break; + case Mips::ADDIUR1SP_MM: + Opnd = Inst.getOperand(1); + if (!Opnd.isImm()) + return Error(IDLoc, "expected immediate operand kind"); + UImm = Opnd.getImm(); + if (OffsetToAlignment(UImm, 4LL)) + return Error(IDLoc, "immediate operand value out of range"); + break; } } Index: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h +++ lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h @@ -80,6 +80,12 @@ SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const; + // getAddiur1SPValue - Return binary encoding of the microMIPS addius5 + // instruction immediate operand. + unsigned getAddiur1SPValue(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + // getAddiur2Value - Return binary encoding of the microMIPS addius5 // instruction immediate operand. unsigned getAddiur2Value(const MCInst &MI, unsigned OpNo, Index: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp +++ lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp @@ -360,6 +360,20 @@ } unsigned MipsMCCodeEmitter:: +getAddiur1SPValue(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + + const MCOperand &MO = MI.getOperand(OpNo); + if (MO.isImm()) { + unsigned Value = MO.getImm(); + return Value >> 2; + } + + return 0; +} + +unsigned MipsMCCodeEmitter:: getAddiur2Value(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const { Index: lib/Target/Mips/MicroMipsInstrFormats.td =================================================================== --- lib/Target/Mips/MicroMipsInstrFormats.td +++ lib/Target/Mips/MicroMipsInstrFormats.td @@ -93,6 +93,18 @@ let Inst{3-0} = addr{3-0}; } +class ADDIUR1SP_FM_MM16 { + bits<3> rd; + bits<6> imm; + + bits<16> Inst; + + let Inst{15-10} = 0x1b; + let Inst{9-7} = rd; + let Inst{6-1} = imm; + let Inst{0} = 1; +} + class ADDIUR2_FM_MM16 { bits<3> rd; bits<3> rs; Index: lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsInstrInfo.td +++ lib/Target/Mips/MicroMipsInstrInfo.td @@ -10,6 +10,10 @@ let EncoderMethod = "getImm5Shr2Value"; } +def addiur1sp_imm : Operand { + let EncoderMethod = "getAddiur1SPValue"; +} + def addiur2_imm : Operand { let EncoderMethod = "getAddiur2Value"; } @@ -150,6 +154,10 @@ !strconcat(opstr, "\t$rd, $rt, $shamt"), [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], Itin, FrmR>; +class AddImmUR1SP : + MicroMipsInst16<(outs RO:$rd), (ins addiur1sp_imm:$imm), + !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR>; + class AddImmUR2 : MicroMipsInst16<(outs RO:$rd), (ins RO:$rs, addiur2_imm:$imm), !strconcat(opstr, "\t$rd, $rs, $imm"), @@ -300,6 +308,7 @@ LOAD_STORE_FM_MM16<0x2a>; def SW16_MM : StoreMM16<"sw16", GPRMM16Opnd, store, II_SW>, LOAD_STORE_FM_MM16<0x3a>; +def ADDIUR1SP_MM : AddImmUR1SP<"addiur1sp", GPRMM16Opnd>, ADDIUR1SP_FM_MM16; def ADDIUR2_MM : AddImmUR2<"addiur2", GPRMM16Opnd>, ADDIUR2_FM_MM16; def ADDIUS5_MM : AddImmUS5<"addius5", GPR32Opnd>, ADDIUS5_FM_MM16; def ADDIUSP_MM : AddImmUSP<"addiusp">, ADDIUSP_FM_MM16; Index: lib/Target/Mips/MipsCodeEmitter.cpp =================================================================== --- lib/Target/Mips/MipsCodeEmitter.cpp +++ lib/Target/Mips/MipsCodeEmitter.cpp @@ -108,6 +108,7 @@ unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const; unsigned getImm5Shr2Value(const MachineInstr &MI, unsigned OpNo) const; + unsigned getAddiur1SPValue(const MachineInstr &MI, unsigned OpNo) const; unsigned getAddiur2Value(const MachineInstr &MI, unsigned OpNo) const; unsigned getAddius5Value(const MachineInstr &MI, unsigned OpNo) const; unsigned getAddiuspValue(const MachineInstr &MI, unsigned OpNo) const; @@ -221,6 +222,12 @@ return 0; } +unsigned MipsCodeEmitter::getAddiur1SPValue(const MachineInstr &MI, + unsigned OpNo) const { + llvm_unreachable("Unimplemented function."); + return 0; +} + unsigned MipsCodeEmitter::getAddiur2Value(const MachineInstr &MI, unsigned OpNo) const { llvm_unreachable("Unimplemented function."); Index: test/MC/Mips/micromips-16-bit-instructions.s =================================================================== --- test/MC/Mips/micromips-16-bit-instructions.s +++ test/MC/Mips/micromips-16-bit-instructions.s @@ -24,6 +24,7 @@ # CHECK-EL: sw16 $4, 4($17) # encoding: [0x11,0xea] # CHECK-EL: li16 $3, -1 # encoding: [0xff,0xed] # CHECK-EL: li16 $3, 126 # encoding: [0xfe,0xed] +# CHECK-EL: addiur1sp $7, 4 # encoding: [0x83,0x6f] # CHECK-EL: addiur2 $6, $7, -1 # encoding: [0x7e,0x6f] # CHECK-EL: addiur2 $6, $7, 12 # encoding: [0x76,0x6f] # CHECK-EL: addius5 $7, -2 # encoding: [0xfc,0x4c] @@ -58,6 +59,7 @@ # CHECK-EB: sw16 $4, 4($17) # encoding: [0xea,0x11] # CHECK-EB: li16 $3, -1 # encoding: [0xed,0xff] # CHECK-EB: li16 $3, 126 # encoding: [0xed,0xfe] +# CHECK-EB: addiur1sp $7, 4 # encoding: [0x6f,0x83] # CHECK-EB: addiur2 $6, $7, -1 # encoding: [0x6f,0x7e] # CHECK-EB: addiur2 $6, $7, 12 # encoding: [0x6f,0x76] # CHECK-EB: addius5 $7, -2 # encoding: [0x4c,0xfc] @@ -90,6 +92,7 @@ sw16 $4, 4($17) li16 $3, -1 li16 $3, 126 + addiur1sp $7, 4 addiur2 $6, $7, -1 addiur2 $6, $7, 12 addius5 $7, -2 Index: test/MC/Mips/micromips-invalid.s =================================================================== --- test/MC/Mips/micromips-invalid.s +++ test/MC/Mips/micromips-invalid.s @@ -23,5 +23,7 @@ sw16 $4, 64($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range li16 $8, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction li16 $4, -2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addiur1sp $9, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + addiur1sp $7, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range