Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1154,6 +1154,15 @@ if (Imm < -1 || Imm > 126) return Error(IDLoc, "immediate operand value out of range"); break; + case Mips::ADDIUR2_MM: + Opnd = Inst.getOperand(2); + if (!Opnd.isImm()) + return Error(IDLoc, "expected immediate operand kind"); + Imm = Opnd.getImm(); + if (!(Imm == 1 || Imm == -1 || + ((Imm % 4 == 0) && Imm < 28 && Imm > 0))) + return Error(IDLoc, "immediate operand value out of range"); + break; } } Index: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h +++ lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h @@ -80,6 +80,12 @@ SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const; + // getAddiur2Value - Return binary encoding of the microMIPS addius5 + // instruction immediate operand. + unsigned getAddiur2Value(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + // getAddius5Value - Return binary encoding of the microMIPS addius5 // instruction immediate operand. unsigned getAddius5Value(const MCInst &MI, unsigned OpNo, Index: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp +++ lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp @@ -360,6 +360,20 @@ } unsigned MipsMCCodeEmitter:: +getAddiur2Value(const MCInst &MI, unsigned OpNo, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + + const MCOperand &MO = MI.getOperand(OpNo); + if (MO.isImm()) { + int Value = MO.getImm(); + return (Value >> 2) & 0x7; + } + + return 0; +} + +unsigned MipsMCCodeEmitter:: getAddius5Value(const MCInst &MI, unsigned OpNo, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const { Index: lib/Target/Mips/MicroMipsInstrFormats.td =================================================================== --- lib/Target/Mips/MicroMipsInstrFormats.td +++ lib/Target/Mips/MicroMipsInstrFormats.td @@ -93,6 +93,20 @@ let Inst{3-0} = addr{3-0}; } +class ADDIUR2_FM_MM16 { + bits<3> rd; + bits<3> rs; + bits<3> imm; + + bits<16> Inst; + + let Inst{15-10} = 0x1b; + let Inst{9-7} = rd; + let Inst{6-4} = rs; + let Inst{3-1} = imm; + let Inst{0} = 0; +} + class ADDIUS5_FM_MM16 { bits<5> rd; bits<4> imm; Index: lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsInstrInfo.td +++ lib/Target/Mips/MicroMipsInstrInfo.td @@ -10,6 +10,10 @@ let EncoderMethod = "getImm5Shr2Value"; } +def addiur2_imm : Operand { + let EncoderMethod = "getAddiur2Value"; +} + def addius5_imm : Operand { let EncoderMethod = "getAddius5Value"; } @@ -146,6 +150,13 @@ !strconcat(opstr, "\t$rd, $rt, $shamt"), [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], Itin, FrmR>; +class AddImmUR2 : + MicroMipsInst16<(outs RO:$rd), (ins RO:$rs, addiur2_imm:$imm), + !strconcat(opstr, "\t$rd, $rs, $imm"), + [], NoItinerary, FrmR> { + let isCommutable = 1; +} + class AddImmUS5 : MicroMipsInst16<(outs RO:$dst), (ins RO:$rd, addius5_imm:$imm), !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR> { @@ -289,6 +300,7 @@ LOAD_STORE_FM_MM16<0x2a>; def SW16_MM : StoreMM16<"sw16", GPRMM16Opnd, store, II_SW>, LOAD_STORE_FM_MM16<0x3a>; +def ADDIUR2_MM : AddImmUR2<"addiur2", GPRMM16Opnd>, ADDIUR2_FM_MM16; def ADDIUS5_MM : AddImmUS5<"addius5", GPR32Opnd>, ADDIUS5_FM_MM16; def ADDIUSP_MM : AddImmUSP<"addiusp">, ADDIUSP_FM_MM16; def MFHI16_MM : MoveFromHILOMM<"mfhi", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x10>; Index: lib/Target/Mips/MipsCodeEmitter.cpp =================================================================== --- lib/Target/Mips/MipsCodeEmitter.cpp +++ lib/Target/Mips/MipsCodeEmitter.cpp @@ -108,6 +108,7 @@ unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const; unsigned getImm5Shr2Value(const MachineInstr &MI, unsigned OpNo) const; + unsigned getAddiur2Value(const MachineInstr &MI, unsigned OpNo) const; unsigned getAddius5Value(const MachineInstr &MI, unsigned OpNo) const; unsigned getAddiuspValue(const MachineInstr &MI, unsigned OpNo) const; unsigned getBranchTargetOpValueMM(const MachineInstr &MI, @@ -220,6 +221,12 @@ return 0; } +unsigned MipsCodeEmitter::getAddiur2Value(const MachineInstr &MI, + unsigned OpNo) const { + llvm_unreachable("Unimplemented function."); + return 0; +} + unsigned MipsCodeEmitter::getAddius5Value(const MachineInstr &MI, unsigned OpNo) const { llvm_unreachable("Unimplemented function."); Index: test/MC/Mips/micromips-16-bit-instructions.s =================================================================== --- test/MC/Mips/micromips-16-bit-instructions.s +++ test/MC/Mips/micromips-16-bit-instructions.s @@ -24,6 +24,8 @@ # CHECK-EL: sw16 $4, 4($17) # encoding: [0x11,0xea] # CHECK-EL: li16 $3, -1 # encoding: [0xff,0xed] # CHECK-EL: li16 $3, 126 # encoding: [0xfe,0xed] +# CHECK-EL: addiur2 $6, $7, -1 # encoding: [0x7e,0x6f] +# CHECK-EL: addiur2 $6, $7, 12 # encoding: [0x76,0x6f] # CHECK-EL: addius5 $7, -2 # encoding: [0xfc,0x4c] # CHECK-EL: addiusp -255 # encoding: [0x03,0x4e] # CHECK-EL: mfhi $9 # encoding: [0x09,0x46] @@ -56,6 +58,8 @@ # CHECK-EB: sw16 $4, 4($17) # encoding: [0xea,0x11] # CHECK-EB: li16 $3, -1 # encoding: [0xed,0xff] # CHECK-EB: li16 $3, 126 # encoding: [0xed,0xfe] +# CHECK-EB: addiur2 $6, $7, -1 # encoding: [0x6f,0x7e] +# CHECK-EB: addiur2 $6, $7, 12 # encoding: [0x6f,0x76] # CHECK-EB: addius5 $7, -2 # encoding: [0x4c,0xfc] # CHECK-EB: addiusp -255 # encoding: [0x4e,0x03] # CHECK-EB: mfhi $9 # encoding: [0x46,0x09] @@ -86,6 +90,8 @@ sw16 $4, 4($17) li16 $3, -1 li16 $3, 126 + addiur2 $6, $7, -1 + addiur2 $6, $7, 12 addius5 $7, -2 addiusp -255 mfhi $9 Index: test/MC/Mips/micromips-invalid.s =================================================================== --- test/MC/Mips/micromips-invalid.s +++ test/MC/Mips/micromips-invalid.s @@ -23,3 +23,5 @@ sw16 $4, 64($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range li16 $8, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction li16 $4, -2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range