Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -41118,8 +41118,9 @@
           Size == 8 ? (is64Bit ? &X86::GR8RegClass : &X86::GR8_NOREXRegClass)
         : Size == 16 ? (is64Bit ? &X86::GR16RegClass : &X86::GR16_NOREXRegClass)
         : Size == 32 ? (is64Bit ? &X86::GR32RegClass : &X86::GR32_NOREXRegClass)
-        : &X86::GR64RegClass;
-      if (RC->contains(DestReg))
+        : Size == 64 ? (is64Bit ? &X86::GR64RegClass : nullptr)
+        : nullptr; 
+      if (RC && RC->contains(DestReg))
         Res = std::make_pair(DestReg, RC);
     } else {
       // No register found/type mismatch.
Index: llvm/test/CodeGen/X86/pr38730.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/pr38730.ll
@@ -0,0 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -o - %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+
+@a = common dso_local local_unnamed_addr global i32 0, align 4
+
+; Function Attrs: nounwind
+define dso_local i32 @b() local_unnamed_addr {
+; CHECK-LABEL: b:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    pushl %esi
+; CHECK-NEXT:    .cfi_def_cfa_offset 8
+; CHECK-NEXT:    .cfi_offset %esi, -8
+; CHECK-NEXT:    movl a, %eax
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    movl %eax, a
+; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    .cfi_def_cfa_offset 4
+; CHECK-NEXT:    retl
+entry:
+  %0 = load i32, i32* @a, align 4
+  %1 = tail call { i64, i32 } asm "", "={edx},=r,1,~{dirflag},~{fpsr},~{flags}"(i32 %0)
+  %asmresult1 = extractvalue { i64, i32 } %1, 1
+  store i32 %asmresult1, i32* @a, align 4
+  ret i32 undef
+}