Index: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp =================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp @@ -3148,7 +3148,7 @@ // that are strings for simplicity. auto *CDAInit = dyn_cast(Init); unsigned Size = DAG.getDataLayout().getTypeAllocSize(Init->getType()); - unsigned Align = GVar->getAlignment(); + unsigned Align = DAG.getDataLayout().getPreferredAlignment(GVar); unsigned RequiredPadding = 4 - (Size % 4); bool PaddingPossible = RequiredPadding == 4 || (CDAInit && CDAInit->isString()); Index: llvm/trunk/test/CodeGen/ARM/constantpool-promote.ll =================================================================== --- llvm/trunk/test/CodeGen/ARM/constantpool-promote.ll +++ llvm/trunk/test/CodeGen/ARM/constantpool-promote.ll @@ -22,6 +22,7 @@ @.ptr = private unnamed_addr constant [2 x i16*] [i16* getelementptr inbounds ([2 x i16], [2 x i16]* @.arr2, i32 0, i32 0), i16* null], align 2 @.arr4 = private unnamed_addr constant [2 x i16] [i16 3, i16 4], align 16 @.zerosize = private unnamed_addr constant [0 x i16] zeroinitializer, align 4 +@implicit_alignment_vector = private unnamed_addr constant <4 x i32> ; CHECK-LABEL: @test1 ; CHECK: adr r0, [[x:.*]] @@ -178,9 +179,19 @@ ret void } +; Promotion only works with globals with alignment 4 or less; a vector has +; implicit alignment 16. +; CHECK-LABEL: @test12 +; CHECK-NOT: adr +define void @test12() local_unnamed_addr #0 { + call void @d(<4 x i32>* @implicit_alignment_vector) + ret void +} + declare void @b(i8*) #1 declare void @c(i16*) #1 +declare void @d(<4 x i32>*) #1 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1) declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i1) local_unnamed_addr declare void @llvm.memmove.p0i16.p0i16.i32(i16*, i16*, i32, i1) local_unnamed_addr