Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -177,6 +177,7 @@ bool parseSetNoMacroDirective(); bool parseSetMsaDirective(); bool parseSetNoMsaDirective(); + bool parseSetNoDspDirective(); bool parseSetReorderDirective(); bool parseSetNoReorderDirective(); bool parseSetNoMips16Directive(); @@ -2606,6 +2607,20 @@ return false; } +bool MipsAsmParser::parseSetNoDspDirective() { + Parser.Lex(); // Eat "nodsp". + + // If this is not the end of the statement, report an error. + if (getLexer().isNot(AsmToken::EndOfStatement)) { + reportParseError("unexpected token, expected end of statement"); + return false; + } + + clearFeatureBits(Mips::FeatureDSP, "dsp"); + getTargetStreamer().emitDirectiveSetNoDsp(); + return false; +} + bool MipsAsmParser::parseSetNoMips16Directive() { Parser.Lex(); // If this is not the end of the statement, report an error. @@ -2938,6 +2953,8 @@ return parseSetFeature(Mips::FeatureMips64r6); } else if (Tok.getString() == "dsp") { return parseSetFeature(Mips::FeatureDSP); + } else if (Tok.getString() == "nodsp") { + return parseSetNoDspDirective(); } else if (Tok.getString() == "msa") { return parseSetMsaDirective(); } else if (Tok.getString() == "nomsa") { Index: lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp +++ lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp @@ -71,6 +71,7 @@ void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); } void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); } void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); } +void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); } void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {} void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) { @@ -241,6 +242,12 @@ OS << "\t.set\tdsp\n"; MipsTargetStreamer::emitDirectiveSetDsp(); } + +void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() { + OS << "\t.set\tnodsp\n"; + MipsTargetStreamer::emitDirectiveSetNoDsp(); +} + // Print a 32 bit hex number with all numbers. static void printHex32(unsigned Value, raw_ostream &OS) { OS << "0x"; Index: lib/Target/Mips/MipsTargetStreamer.h =================================================================== --- lib/Target/Mips/MipsTargetStreamer.h +++ lib/Target/Mips/MipsTargetStreamer.h @@ -61,6 +61,7 @@ virtual void emitDirectiveSetMips64R2(); virtual void emitDirectiveSetMips64R6(); virtual void emitDirectiveSetDsp(); + virtual void emitDirectiveSetNoDsp(); // PIC support virtual void emitDirectiveCpload(unsigned RegNo); @@ -161,6 +162,7 @@ void emitDirectiveSetMips64R2() override; void emitDirectiveSetMips64R6() override; void emitDirectiveSetDsp() override; + void emitDirectiveSetNoDsp() override; // PIC support void emitDirectiveCpload(unsigned RegNo) override; Index: test/MC/Mips/set-nodsp.s =================================================================== --- /dev/null +++ test/MC/Mips/set-nodsp.s @@ -0,0 +1,12 @@ +# RUN: not llvm-mc %s -mcpu=mips32 -mattr=+dsp -triple mips-unknown-linux 2>%t1 +# RUN: FileCheck %s < %t1 + + lbux $7, $10($11) + + .set nodsp + lbux $6, $10($11) + # CHECK: error: instruction requires a CPU feature not currently enabled + + .set dsp + lbux $5, $10($11) + # CHECK-NOT: error: instruction requires a CPU feature not currently enabled