Index: test/CodeGen/WebAssembly/simd-arith.ll =================================================================== --- test/CodeGen/WebAssembly/simd-arith.ll +++ test/CodeGen/WebAssembly/simd-arith.ll @@ -47,7 +47,7 @@ } ; CHECK-LABEL: and_v16i8 -; NO-SIMD128-NOT: i8x16 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}} @@ -58,7 +58,7 @@ } ; CHECK-LABEL: or_v16i8 -; NO-SIMD128-NOT: i8x16 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}} @@ -69,7 +69,7 @@ } ; CHECK-LABEL: xor_v16i8 -; NO-SIMD128-NOT: i8x16 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}} @@ -116,7 +116,7 @@ } ; CHECK-LABEL: and_v8i16 -; NO-SIMD128-NOT: i16x8 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}} @@ -127,7 +127,7 @@ } ; CHECK-LABEL: or_v8i16 -; NO-SIMD128-NOT: i16x8 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}} @@ -138,7 +138,7 @@ } ; CHECK-LABEL: xor_v8i16 -; NO-SIMD128-NOT: i16x8 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}} @@ -185,7 +185,7 @@ } ; CHECK-LABEL: and_v4i32 -; NO-SIMD128-NOT: i32x4 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}} @@ -196,7 +196,7 @@ } ; CHECK-LABEL: or_v4i32 -; NO-SIMD128-NOT: i32x4 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}} @@ -207,7 +207,7 @@ } ; CHECK-LABEL: xor_v4i32 -; NO-SIMD128-NOT: i32x4 +; NO-SIMD128-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}} @@ -257,7 +257,8 @@ } ; CHECK-LABEL: and_v2i64 -; NO-SIMD128-NOT: i64x2 +; NO-SIMD128-NOT: v128 +; SIMD128-VM-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}} @@ -268,7 +269,8 @@ } ; CHECK-LABEL: or_v2i64 -; NO-SIMD128-NOT: i64x2 +; NO-SIMD128-NOT: v128 +; SIMD128-VM-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}} @@ -279,7 +281,8 @@ } ; CHECK-LABEL: xor_v2i64 -; NO-SIMD128-NOT: i64x2 +; NO-SIMD128-NOT: v128 +; SIMD128-VM-NOT: v128 ; SIMD128: .param v128, v128{{$}} ; SIMD128: .result v128{{$}} ; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}