Index: lib/Target/ARM/ARMBaseInstrInfo.h =================================================================== --- lib/Target/ARM/ARMBaseInstrInfo.h +++ lib/Target/ARM/ARMBaseInstrInfo.h @@ -331,6 +331,13 @@ /// Get the number of addresses by LDM or VLDM or zero for unknown. unsigned getNumLDMAddresses(const MachineInstr &MI) const; + std::pair + decomposeMachineOperandsTargetFlags(unsigned TF) const override; + ArrayRef> + getSerializableDirectMachineOperandTargetFlags() const override; + ArrayRef> + getSerializableBitmaskMachineOperandTargetFlags() const override; + private: unsigned getInstBundleLength(const MachineInstr &MI) const; Index: lib/Target/ARM/ARMBaseInstrInfo.cpp =================================================================== --- lib/Target/ARM/ARMBaseInstrInfo.cpp +++ lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -5060,3 +5060,31 @@ } llvm_unreachable("Target dependent opcode missing"); } + +std::pair +ARMBaseInstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const { + const unsigned Mask = ARMII::MO_OPTION_MASK; + return std::make_pair(TF & Mask, TF & ~Mask); +} + +ArrayRef> +ARMBaseInstrInfo::getSerializableDirectMachineOperandTargetFlags() const { + using namespace ARMII; + + static const std::pair TargetFlags[] = { + {MO_LO16, "arm-lo16"}, {MO_HI16, "arm-hi16"}}; + return makeArrayRef(TargetFlags); +} + +ArrayRef> +ARMBaseInstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const { + using namespace ARMII; + + static const std::pair TargetFlags[] = { + {MO_GOT, "arm-got"}, + {MO_SBREL, "arm-sbrel"}, + {MO_DLLIMPORT, "arm-dllimport"}, + {MO_SECREL, "arm-secrel"}, + {MO_NONLAZY, "arm-nonlazy"}}; + return makeArrayRef(TargetFlags); +} Index: lib/Target/ARM/ARMConstantIslandPass.cpp =================================================================== --- lib/Target/ARM/ARMConstantIslandPass.cpp +++ lib/Target/ARM/ARMConstantIslandPass.cpp @@ -1420,6 +1420,22 @@ MI = LastIT; } + // Avoid splitting a MOVW+MOVT pair with a relocation on Windows. + // On Windows, this instruction pair is covered by one single + // IMAGE_REL_ARM_MOV32T relocation which covers both instructions. If a + // constant island is injected inbetween them, the relocation will clobber + // the instruction and fail to update the MOVT instruction. + // (These instructions are bundled up until right before the ConstantIslands + // pass.) + if (STI->isTargetWindows() && isThumb && MI->getOpcode() == ARM::t2MOVTi16 && + (MI->getOperand(2).getTargetFlags() & ARMII::MO_OPTION_MASK) == + ARMII::MO_HI16) { + --MI; + assert(MI->getOpcode() == ARM::t2MOVi16 && + (MI->getOperand(1).getTargetFlags() & ARMII::MO_OPTION_MASK) == + ARMII::MO_LO16); + } + // We really must not split an IT block. LLVM_DEBUG(unsigned PredReg; assert( !isThumb || getITInstrPredicate(*MI, PredReg) == ARMCC::AL)); Index: lib/Target/ARM/ARMInstrInfo.h =================================================================== --- lib/Target/ARM/ARMInstrInfo.h +++ lib/Target/ARM/ARMInstrInfo.h @@ -38,13 +38,6 @@ /// const ARMRegisterInfo &getRegisterInfo() const override { return RI; } - std::pair - decomposeMachineOperandsTargetFlags(unsigned TF) const override; - ArrayRef> - getSerializableDirectMachineOperandTargetFlags() const override; - ArrayRef> - getSerializableBitmaskMachineOperandTargetFlags() const override; - private: void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override; }; Index: lib/Target/ARM/ARMInstrInfo.cpp =================================================================== --- lib/Target/ARM/ARMInstrInfo.cpp +++ lib/Target/ARM/ARMInstrInfo.cpp @@ -135,31 +135,3 @@ .cloneMemRefs(*MI) .add(predOps(ARMCC::AL)); } - -std::pair -ARMInstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const { - const unsigned Mask = ARMII::MO_OPTION_MASK; - return std::make_pair(TF & Mask, TF & ~Mask); -} - -ArrayRef> -ARMInstrInfo::getSerializableDirectMachineOperandTargetFlags() const { - using namespace ARMII; - - static const std::pair TargetFlags[] = { - {MO_LO16, "arm-lo16"}, {MO_HI16, "arm-hi16"}}; - return makeArrayRef(TargetFlags); -} - -ArrayRef> -ARMInstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const { - using namespace ARMII; - - static const std::pair TargetFlags[] = { - {MO_GOT, "arm-got"}, - {MO_SBREL, "arm-sbrel"}, - {MO_DLLIMPORT, "arm-dllimport"}, - {MO_SECREL, "arm-secrel"}, - {MO_NONLAZY, "arm-nonlazy"}}; - return makeArrayRef(TargetFlags); -} Index: test/CodeGen/ARM/constant-island-movwt.mir =================================================================== --- /dev/null +++ test/CodeGen/ARM/constant-island-movwt.mir @@ -0,0 +1,897 @@ +# RUN: llc -mtriple=thumbv7-win32-gnu -run-pass=arm-cp-islands -o - %s | FileCheck %s + +--- | + ; ModuleID = '' + source_filename = "" + target datalayout = "e-m:w-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" + target triple = "thumbv7-unknown-windows-gnu" + + %struct.A = type { [201 x i8*] } + + @.str.17 = private unnamed_addr constant [10 x i8] c"__ashlhi3\00", align 1 + @.str.18 = private unnamed_addr constant [10 x i8] c"__ashlsi3\00", align 1 + @.str.19 = private unnamed_addr constant [10 x i8] c"__ashldi3\00", align 1 + @.str.20 = private unnamed_addr constant [10 x i8] c"__ashlti3\00", align 1 + @.str.21 = private unnamed_addr constant [10 x i8] c"__lshrhi3\00", align 1 + @.str.22 = private unnamed_addr constant [10 x i8] c"__lshrsi3\00", align 1 + @.str.23 = private unnamed_addr constant [10 x i8] c"__lshrdi3\00", align 1 + @.str.24 = private unnamed_addr constant [10 x i8] c"__lshrti3\00", align 1 + @.str.25 = private unnamed_addr constant [10 x i8] c"__ashrhi3\00", align 1 + @.str.26 = private unnamed_addr constant [10 x i8] c"__ashrsi3\00", align 1 + @.str.27 = private unnamed_addr constant [10 x i8] c"__ashrdi3\00", align 1 + @.str.28 = private unnamed_addr constant [10 x i8] c"__ashrti3\00", align 1 + @.str.29 = private unnamed_addr constant [9 x i8] c"__mulqi3\00", align 1 + @.str.30 = private unnamed_addr constant [9 x i8] c"__mulhi3\00", align 1 + @.str.31 = private unnamed_addr constant [9 x i8] c"__mulsi3\00", align 1 + @.str.32 = private unnamed_addr constant [9 x i8] c"__muldi3\00", align 1 + @.str.33 = private unnamed_addr constant [9 x i8] c"__multi3\00", align 1 + @.str.34 = private unnamed_addr constant [10 x i8] c"__mulosi4\00", align 1 + @.str.35 = private unnamed_addr constant [10 x i8] c"__mulodi4\00", align 1 + @.str.36 = private unnamed_addr constant [10 x i8] c"__muloti4\00", align 1 + @.str.37 = private unnamed_addr constant [9 x i8] c"__divqi3\00", align 1 + @.str.38 = private unnamed_addr constant [9 x i8] c"__divhi3\00", align 1 + @.str.39 = private unnamed_addr constant [9 x i8] c"__divsi3\00", align 1 + @.str.40 = private unnamed_addr constant [9 x i8] c"__divdi3\00", align 1 + @.str.41 = private unnamed_addr constant [9 x i8] c"__divti3\00", align 1 + @.str.42 = private unnamed_addr constant [10 x i8] c"__udivqi3\00", align 1 + @.str.43 = private unnamed_addr constant [10 x i8] c"__udivhi3\00", align 1 + @.str.44 = private unnamed_addr constant [10 x i8] c"__udivsi3\00", align 1 + @.str.45 = private unnamed_addr constant [10 x i8] c"__udivdi3\00", align 1 + @.str.46 = private unnamed_addr constant [10 x i8] c"__udivti3\00", align 1 + @.str.47 = private unnamed_addr constant [9 x i8] c"__modqi3\00", align 1 + @.str.48 = private unnamed_addr constant [9 x i8] c"__modhi3\00", align 1 + @.str.49 = private unnamed_addr constant [9 x i8] c"__modsi3\00", align 1 + @.str.50 = private unnamed_addr constant [9 x i8] c"__moddi3\00", align 1 + @.str.51 = private unnamed_addr constant [9 x i8] c"__modti3\00", align 1 + @.str.52 = private unnamed_addr constant [10 x i8] c"__umodqi3\00", align 1 + @.str.53 = private unnamed_addr constant [10 x i8] c"__umodhi3\00", align 1 + @.str.54 = private unnamed_addr constant [10 x i8] c"__umodsi3\00", align 1 + @.str.55 = private unnamed_addr constant [10 x i8] c"__umoddi3\00", align 1 + @.str.56 = private unnamed_addr constant [10 x i8] c"__umodti3\00", align 1 + @.str.57 = private unnamed_addr constant [9 x i8] c"__negsi2\00", align 1 + @.str.58 = private unnamed_addr constant [9 x i8] c"__negdi2\00", align 1 + @.str.59 = private unnamed_addr constant [9 x i8] c"__addsf3\00", align 1 + @.str.60 = private unnamed_addr constant [9 x i8] c"__adddf3\00", align 1 + @.str.61 = private unnamed_addr constant [9 x i8] c"__addxf3\00", align 1 + @.str.62 = private unnamed_addr constant [9 x i8] c"__addtf3\00", align 1 + @.str.63 = private unnamed_addr constant [11 x i8] c"__gcc_qadd\00", align 1 + @.str.64 = private unnamed_addr constant [9 x i8] c"__subsf3\00", align 1 + @.str.65 = private unnamed_addr constant [9 x i8] c"__subdf3\00", align 1 + @.str.66 = private unnamed_addr constant [9 x i8] c"__subxf3\00", align 1 + @.str.67 = private unnamed_addr constant [9 x i8] c"__subtf3\00", align 1 + @.str.68 = private unnamed_addr constant [11 x i8] c"__gcc_qsub\00", align 1 + @.str.69 = private unnamed_addr constant [9 x i8] c"__mulsf3\00", align 1 + @.str.70 = private unnamed_addr constant [9 x i8] c"__muldf3\00", align 1 + @.str.71 = private unnamed_addr constant [9 x i8] c"__mulxf3\00", align 1 + @.str.72 = private unnamed_addr constant [9 x i8] c"__multf3\00", align 1 + @.str.73 = private unnamed_addr constant [11 x i8] c"__gcc_qmul\00", align 1 + @.str.74 = private unnamed_addr constant [9 x i8] c"__divsf3\00", align 1 + @.str.75 = private unnamed_addr constant [9 x i8] c"__divdf3\00", align 1 + @.str.76 = private unnamed_addr constant [9 x i8] c"__divxf3\00", align 1 + @.str.77 = private unnamed_addr constant [9 x i8] c"__divtf3\00", align 1 + @.str.78 = private unnamed_addr constant [11 x i8] c"__gcc_qdiv\00", align 1 + @.str.79 = private unnamed_addr constant [6 x i8] c"fmodf\00", align 1 + @.str.80 = private unnamed_addr constant [5 x i8] c"fmod\00", align 1 + @.str.81 = private unnamed_addr constant [6 x i8] c"fmodl\00", align 1 + @.str.82 = private unnamed_addr constant [5 x i8] c"fmaf\00", align 1 + @.str.83 = private unnamed_addr constant [4 x i8] c"fma\00", align 1 + @.str.84 = private unnamed_addr constant [5 x i8] c"fmal\00", align 1 + @.str.85 = private unnamed_addr constant [10 x i8] c"__powisf2\00", align 1 + @.str.86 = private unnamed_addr constant [10 x i8] c"__powidf2\00", align 1 + @.str.87 = private unnamed_addr constant [10 x i8] c"__powixf2\00", align 1 + @.str.88 = private unnamed_addr constant [10 x i8] c"__powitf2\00", align 1 + @.str.89 = private unnamed_addr constant [6 x i8] c"sqrtf\00", align 1 + @.str.90 = private unnamed_addr constant [5 x i8] c"sqrt\00", align 1 + @.str.91 = private unnamed_addr constant [6 x i8] c"sqrtl\00", align 1 + @.str.92 = private unnamed_addr constant [5 x i8] c"logf\00", align 1 + @.str.93 = private unnamed_addr constant [4 x i8] c"log\00", align 1 + @.str.94 = private unnamed_addr constant [5 x i8] c"logl\00", align 1 + @.str.95 = private unnamed_addr constant [14 x i8] c"__logf_finite\00", align 1 + @.str.96 = private unnamed_addr constant [13 x i8] c"__log_finite\00", align 1 + @.str.97 = private unnamed_addr constant [14 x i8] c"__logl_finite\00", align 1 + @.str.98 = private unnamed_addr constant [6 x i8] c"log2f\00", align 1 + @.str.99 = private unnamed_addr constant [5 x i8] c"log2\00", align 1 + @.str.100 = private unnamed_addr constant [6 x i8] c"log2l\00", align 1 + @.str.101 = private unnamed_addr constant [15 x i8] c"__log2f_finite\00", align 1 + @.str.102 = private unnamed_addr constant [14 x i8] c"__log2_finite\00", align 1 + @.str.103 = private unnamed_addr constant [15 x i8] c"__log2l_finite\00", align 1 + @.str.104 = private unnamed_addr constant [7 x i8] c"log10f\00", align 1 + @.str.105 = private unnamed_addr constant [6 x i8] c"log10\00", align 1 + @.str.106 = private unnamed_addr constant [7 x i8] c"log10l\00", align 1 + @.str.107 = private unnamed_addr constant [16 x i8] c"__log10f_finite\00", align 1 + @.str.108 = private unnamed_addr constant [15 x i8] c"__log10_finite\00", align 1 + @.str.109 = private unnamed_addr constant [16 x i8] c"__log10l_finite\00", align 1 + @.str.110 = private unnamed_addr constant [5 x i8] c"expf\00", align 1 + @.str.111 = private unnamed_addr constant [4 x i8] c"exp\00", align 1 + @.str.112 = private unnamed_addr constant [5 x i8] c"expl\00", align 1 + @.str.113 = private unnamed_addr constant [14 x i8] c"__expf_finite\00", align 1 + @.str.114 = private unnamed_addr constant [13 x i8] c"__exp_finite\00", align 1 + @.str.115 = private unnamed_addr constant [14 x i8] c"__expl_finite\00", align 1 + @.str.116 = private unnamed_addr constant [6 x i8] c"exp2f\00", align 1 + @.str.117 = private unnamed_addr constant [5 x i8] c"exp2\00", align 1 + @.str.118 = private unnamed_addr constant [6 x i8] c"exp2l\00", align 1 + @.str.119 = private unnamed_addr constant [15 x i8] c"__exp2f_finite\00", align 1 + @.str.120 = private unnamed_addr constant [14 x i8] c"__exp2_finite\00", align 1 + @.str.121 = private unnamed_addr constant [15 x i8] c"__exp2l_finite\00", align 1 + @.str.122 = private unnamed_addr constant [5 x i8] c"sinf\00", align 1 + @.str.123 = private unnamed_addr constant [4 x i8] c"sin\00", align 1 + @.str.124 = private unnamed_addr constant [5 x i8] c"sinl\00", align 1 + @.str.125 = private unnamed_addr constant [5 x i8] c"cosf\00", align 1 + @.str.126 = private unnamed_addr constant [4 x i8] c"cos\00", align 1 + @.str.127 = private unnamed_addr constant [5 x i8] c"cosl\00", align 1 + @.str.128 = private unnamed_addr constant [5 x i8] c"powf\00", align 1 + @.str.129 = private unnamed_addr constant [4 x i8] c"pow\00", align 1 + @.str.130 = private unnamed_addr constant [5 x i8] c"powl\00", align 1 + @.str.131 = private unnamed_addr constant [14 x i8] c"__powf_finite\00", align 1 + @.str.132 = private unnamed_addr constant [13 x i8] c"__pow_finite\00", align 1 + @.str.133 = private unnamed_addr constant [14 x i8] c"__powl_finite\00", align 1 + @.str.134 = private unnamed_addr constant [6 x i8] c"ceilf\00", align 1 + @.str.135 = private unnamed_addr constant [5 x i8] c"ceil\00", align 1 + @.str.136 = private unnamed_addr constant [6 x i8] c"ceill\00", align 1 + @.str.137 = private unnamed_addr constant [7 x i8] c"truncf\00", align 1 + @.str.138 = private unnamed_addr constant [6 x i8] c"trunc\00", align 1 + @.str.139 = private unnamed_addr constant [7 x i8] c"truncl\00", align 1 + @.str.140 = private unnamed_addr constant [6 x i8] c"rintf\00", align 1 + @.str.141 = private unnamed_addr constant [5 x i8] c"rint\00", align 1 + @.str.142 = private unnamed_addr constant [6 x i8] c"rintl\00", align 1 + @.str.143 = private unnamed_addr constant [11 x i8] c"nearbyintf\00", align 1 + @.str.144 = private unnamed_addr constant [10 x i8] c"nearbyint\00", align 1 + @.str.145 = private unnamed_addr constant [11 x i8] c"nearbyintl\00", align 1 + @.str.146 = private unnamed_addr constant [7 x i8] c"roundf\00", align 1 + @.str.147 = private unnamed_addr constant [6 x i8] c"round\00", align 1 + @.str.148 = private unnamed_addr constant [7 x i8] c"roundl\00", align 1 + @.str.149 = private unnamed_addr constant [7 x i8] c"floorf\00", align 1 + @.str.150 = private unnamed_addr constant [6 x i8] c"floor\00", align 1 + @.str.151 = private unnamed_addr constant [7 x i8] c"floorl\00", align 1 + @.str.152 = private unnamed_addr constant [10 x i8] c"copysignf\00", align 1 + @.str.153 = private unnamed_addr constant [9 x i8] c"copysign\00", align 1 + + ; Function Attrs: nounwind + define arm_aapcs_vfpcc void @func(%struct.A* %obj) #0 { + entry: + %arrayidx.i1 = bitcast %struct.A* %obj to i8** + %0 = bitcast i8** %arrayidx.i1 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %0 + %arrayidx.i62 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 4 + %1 = bitcast i8** %arrayidx.i62 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %1 + %arrayidx.i523 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 8 + %2 = bitcast i8** %arrayidx.i523 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %2 + %arrayidx.i519 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 12 + %3 = bitcast i8** %arrayidx.i519 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %3 + %arrayidx.i515 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 16 + %4 = bitcast i8** %arrayidx.i515 to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %4, i8 0, i64 40, i1 false) + %arrayidx.i511 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 20 + %5 = bitcast i8** %arrayidx.i511 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %5 + %arrayidx.i507 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 24 + %6 = bitcast i8** %arrayidx.i507 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %6 + %arrayidx.i503 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 28 + %7 = bitcast i8** %arrayidx.i503 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %7 + %arrayidx.i499 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 32 + %8 = bitcast i8** %arrayidx.i499 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %8 + %arrayidx.i495 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 36 + %9 = bitcast i8** %arrayidx.i495 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %9 + %arrayidx.i491 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 40 + %arrayidx.i481 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 50 + %10 = bitcast i8** %arrayidx.i491 to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %10, i8 0, i64 40, i1 false) + %11 = bitcast i8** %arrayidx.i481 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %11 + %arrayidx.i477 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 54 + %12 = bitcast i8** %arrayidx.i477 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %12 + %arrayidx.i473 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 58 + %13 = bitcast i8** %arrayidx.i473 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %13 + %arrayidx.i469 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 62 + %14 = bitcast i8** %arrayidx.i469 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %14 + %arrayidx.i465 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 66 + %15 = bitcast i8** %arrayidx.i465 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %15 + %arrayidx.i461 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 70 + %16 = bitcast i8** %arrayidx.i461 to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %16, i8 0, i64 40, i1 false) + %arrayidx.i457 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 74 + %17 = bitcast i8** %arrayidx.i457 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %17 + %arrayidx.i453 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 78 + %18 = bitcast i8** %arrayidx.i453 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %18 + %arrayidx.i449 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 82 + %arrayidx.i445 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 86 + %19 = bitcast i8** %arrayidx.i445 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %19 + %arrayidx.i441 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 90 + %20 = bitcast i8** %arrayidx.i441 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %20 + %arrayidx.i437 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 94 + %21 = bitcast i8** %arrayidx.i437 to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %21, i8 0, i64 28, i1 false) + %arrayidx.i433 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 98 + %22 = bitcast i8** %arrayidx.i433 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %22 + %arrayidx.i429 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 102 + %23 = bitcast i8** %arrayidx.i429 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %23 + %arrayidx.i425 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 106 + %24 = bitcast i8** %arrayidx.i425 to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %24, i8 0, i64 28, i1 false) + %arrayidx.i421 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 110 + %25 = bitcast i8** %arrayidx.i421 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %25 + %arrayidx.i417 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 114 + %26 = bitcast i8** %arrayidx.i417 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %26 + %arrayidx.i413 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 118 + %27 = bitcast i8** %arrayidx.i413 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %27 + %arrayidx.i409 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 122 + %28 = bitcast i8** %arrayidx.i409 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %28 + %arrayidx.i405 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 126 + %29 = bitcast i8** %arrayidx.i405 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %29 + %arrayidx.i401 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 130 + %30 = bitcast i8** %arrayidx.i401 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %30 + %arrayidx.i397 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 134 + %31 = bitcast i8** %arrayidx.i397 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %31 + %arrayidx.i393 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 138 + %32 = bitcast i8** %arrayidx.i393 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %32 + %arrayidx.i389 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 142 + %33 = bitcast i8** %arrayidx.i389 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %33 + %arrayidx.i385 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 146 + %34 = bitcast i8** %arrayidx.i385 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %34 + %arrayidx.i381 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 150 + store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.127, i32 0, i32 0), i8** %arrayidx.i381 + %arrayidx.i380 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 151 + store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.127, i32 0, i32 0), i8** %arrayidx.i380 + %arrayidx.i379 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 152 + %arrayidx.i375 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 156 + %arrayidx.i374 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 157 + %arrayidx.i373 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 158 + %arrayidx.i372 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 159 + %35 = bitcast i8** %arrayidx.i379 to i8* + call void @llvm.memset.p0i8.i64(i8* align 4 %35, i8 0, i64 28, i1 false) + store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.128, i32 0, i32 0), i8** %arrayidx.i372 + %arrayidx.i371 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 160 + store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.129, i32 0, i32 0), i8** %arrayidx.i371 + %arrayidx.i370 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 161 + %36 = bitcast i8** %arrayidx.i370 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %36 + %arrayidx.i366 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 165 + %37 = bitcast i8** %arrayidx.i366 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %37 + %arrayidx.i362 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 169 + %38 = bitcast i8** %arrayidx.i362 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %38 + %arrayidx.i358 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 173 + %39 = bitcast i8** %arrayidx.i358 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %39 + %arrayidx.i354 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 177 + %40 = bitcast i8** %arrayidx.i354 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %40 + %arrayidx.i350 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 181 + %41 = bitcast i8** %arrayidx.i350 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %41 + %arrayidx.i346 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 185 + %42 = bitcast i8** %arrayidx.i346 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %42 + %arrayidx.i342 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 189 + %43 = bitcast i8** %arrayidx.i342 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %43 + %arrayidx.i338 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 193 + %44 = bitcast i8** %arrayidx.i338 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %44 + %arrayidx.i334 = getelementptr inbounds %struct.A, %struct.A* %obj, i32 0, i32 0, i32 197 + %45 = bitcast i8** %arrayidx.i334 to <4 x i8*>* + store <4 x i8*> , <4 x i8*>* %45 + ret void + } + + ; Function Attrs: argmemonly nounwind + declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1) #1 + + ; Function Attrs: nounwind + declare void @llvm.stackprotector(i8*, i8**) #2 + + attributes #0 = { nounwind "target-cpu"="cortex-a9" "target-features"="+dsp,+fp16,+neon,+strict-align,+thumb-mode,+vfp3" } + attributes #1 = { argmemonly nounwind } + attributes #2 = { nounwind } + +... +--- +name: func +alignment: 1 +exposesReturnsTwice: false +legalized: false +regBankSelected: false +selected: false +failedISel: false +tracksRegLiveness: true +registers: +liveins: + - { reg: '$r0', virtual-reg: '' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 56 + offsetAdjustment: 0 + maxAlignment: 8 + adjustsStack: false + hasCalls: false + stackProtector: '' + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false + localFrameSize: 0 + savePoint: '' + restorePoint: '' +fixedStack: +stack: + - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: false, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$r11', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$r7', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$r6', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$r5', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, + stack-id: 0, callee-saved-register: '$r4', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 6, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8, + stack-id: 0, callee-saved-register: '$d11', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 7, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8, + stack-id: 0, callee-saved-register: '$d10', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 8, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8, + stack-id: 0, callee-saved-register: '$d9', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 9, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8, + stack-id: 0, callee-saved-register: '$d8', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +constants: + - id: 0 + value: 'float 0.000000e+00' + alignment: 4 + isTargetSpecific: false +body: | + bb.0.entry: + liveins: $r0, $r4, $r5, $r6, $r7, $r11, $lr, $d8, $d9, $d10, $d11 + + $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r11, killed $lr + frame-setup CFI_INSTRUCTION def_cfa_offset 24 + frame-setup CFI_INSTRUCTION offset $lr, -4 + frame-setup CFI_INSTRUCTION offset $r11, -8 + frame-setup CFI_INSTRUCTION offset $r7, -12 + frame-setup CFI_INSTRUCTION offset $r6, -16 + frame-setup CFI_INSTRUCTION offset $r5, -20 + frame-setup CFI_INSTRUCTION offset $r4, -24 + $sp = frame-setup VSTMDDB_UPD $sp, 14, $noreg, killed $d8, killed $d9, killed $d10, killed $d11 + frame-setup CFI_INSTRUCTION def_cfa_offset 56 + frame-setup CFI_INSTRUCTION offset $d11, -32 + frame-setup CFI_INSTRUCTION offset $d10, -40 + frame-setup CFI_INSTRUCTION offset $d9, -48 + frame-setup CFI_INSTRUCTION offset $d8, -56 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.18, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.18, 14, $noreg + renamable $r4, dead $cpsr = tMOVi8 100, 14, $noreg + renamable $r6 = t2ADDri renamable $r0, 520, 14, $noreg, $noreg + $d2 = VSETLNi32 undef $d2, killed $r1, 1, 14, $noreg, implicit-def $q1, implicit-def $s5 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.71, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.71, 14, $noreg + renamable $d25 = VSETLNi32 undef renamable $d25, killed renamable $r1, 0, 14, $noreg, implicit-def $q12 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.73, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.73, 14, $noreg + renamable $d26 = VSETLNi32 undef renamable $d26, killed renamable $r1, 0, 14, $noreg, implicit-def $q13 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.75, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.75, 14, $noreg + renamable $d27 = VSETLNi32 undef renamable $d27, killed renamable $r1, 0, 14, $noreg, implicit killed $q13, implicit-def $q13 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.19, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.19, 14, $noreg + renamable $s4 = VLDRS %const.0, 0, 14, $noreg, implicit killed $q1, implicit-def $q1 :: (load 4 from constant-pool) + renamable $d3 = VSETLNi32 undef renamable $d3, killed renamable $r1, 0, 14, $noreg, implicit killed $q1, implicit-def $q1 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.61, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.61, 14, $noreg + renamable $d20 = VSETLNi32 undef renamable $d20, killed renamable $r1, 0, 14, $noreg, implicit-def $q10 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.63, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.63, 14, $noreg + renamable $d21 = VSETLNi32 undef renamable $d21, killed renamable $r1, 0, 14, $noreg, implicit killed $q10, implicit-def $q10 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.122, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.122, 14, $noreg + $r12 = t2MOVi16 target-flags(arm-lo16) @.str.112, 14, $noreg + $r12 = t2MOVTi16 $r12, target-flags(arm-hi16) @.str.112, 14, $noreg + renamable $d16 = VSETLNi32 undef renamable $d16, killed renamable $r1, 0, 14, $noreg, implicit-def $q8 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.114, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.114, 14, $noreg + renamable $d18 = VSETLNi32 undef renamable $d18, renamable $r12, 0, 14, $noreg, implicit-def $q9 + renamable $d19 = VSETLNi32 undef renamable $d19, killed renamable $r1, 0, 14, $noreg, implicit killed $q9, implicit-def $q9 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.57, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.57, 14, $noreg + renamable $d28 = VSETLNi32 undef renamable $d28, killed renamable $r1, 0, 14, $noreg, implicit-def $q14 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.53, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.53, 14, $noreg + renamable $d22 = VSETLNi32 undef renamable $d22, killed renamable $r1, 0, 14, $noreg, implicit-def $q11 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.49, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.49, 14, $noreg + renamable $d30 = VSETLNi32 undef renamable $d30, killed renamable $r1, 0, 14, $noreg, implicit-def $q15 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.45, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.45, 14, $noreg + renamable $d0 = VSETLNi32 undef renamable $d0, killed renamable $r1, 0, 14, $noreg, implicit-def $q0 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.37, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.37, 14, $noreg + renamable $d8 = VSETLNi32 undef renamable $d8, killed renamable $r1, 0, 14, $noreg, implicit-def $q4 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.25, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.25, 14, $noreg + renamable $d4 = VSETLNi32 undef renamable $d4, killed renamable $r1, 0, 14, $noreg, implicit-def $q2 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.21, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.21, 14, $noreg + renamable $d6 = VSETLNi32 undef renamable $d6, killed renamable $r1, 0, 14, $noreg, implicit-def $q3 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.27, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.27, 14, $noreg + renamable $d5 = VSETLNi32 undef renamable $d5, killed renamable $r1, 0, 14, $noreg, implicit killed $q2, implicit-def $q2 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.23, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.23, 14, $noreg + renamable $d7 = VSETLNi32 undef renamable $d7, killed renamable $r1, 0, 14, $noreg, implicit killed $q3, implicit-def $q3 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.28, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.28, 14, $noreg + renamable $d5 = VSETLNi32 killed renamable $d5, killed renamable $r1, 1, 14, $noreg, implicit $q2, implicit-def $q2 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.24, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.24, 14, $noreg + renamable $d7 = VSETLNi32 killed renamable $d7, killed renamable $r1, 1, 14, $noreg, implicit $q3, implicit-def $q3 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.22, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.22, 14, $noreg + renamable $d6 = VSETLNi32 killed renamable $d6, killed renamable $r1, 1, 14, $noreg, implicit $q3, implicit-def $q3 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.26, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.26, 14, $noreg + renamable $d4 = VSETLNi32 killed renamable $d4, killed renamable $r1, 1, 14, $noreg, implicit $q2, implicit-def $q2 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.29, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.29, 14, $noreg + renamable $d10 = VSETLNi32 undef renamable $d10, killed renamable $r1, 0, 14, $noreg, implicit-def $q5 + renamable $r1 = t2ADDri renamable $r0, 16, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q3, 14, $noreg :: (store 16 into %ir.1, align 8) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.39, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.39, 14, $noreg + renamable $d9 = VSETLNi32 undef renamable $d9, killed renamable $r1, 0, 14, $noreg, implicit killed $q4, implicit-def $q4 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.69, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.69, 14, $noreg + renamable $d24 = VSETLNi32 undef renamable $d24, killed renamable $r1, 0, 14, $noreg, implicit killed $q12, implicit-def $q12 + renamable $r1 = t2ADDri renamable $r0, 32, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q2, 14, $noreg :: (store 16 into %ir.2, align 8) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.31, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.31, 14, $noreg + renamable $d11 = VSETLNi32 undef renamable $d11, killed renamable $r1, 0, 14, $noreg, implicit killed $q5, implicit-def $q5 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.40, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.40, 14, $noreg + renamable $d9 = VSETLNi32 killed renamable $d9, killed renamable $r1, 1, 14, $noreg, implicit $q4, implicit-def $q4 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.32, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.32, 14, $noreg + renamable $d11 = VSETLNi32 killed renamable $d11, killed renamable $r1, 1, 14, $noreg, implicit $q5, implicit-def $q5 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.30, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.30, 14, $noreg + renamable $d10 = VSETLNi32 killed renamable $d10, killed renamable $r1, 1, 14, $noreg, implicit $q5, implicit-def $q5 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.38, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.38, 14, $noreg + renamable $d8 = VSETLNi32 killed renamable $d8, killed renamable $r1, 1, 14, $noreg, implicit $q4, implicit-def $q4 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.67, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.67, 14, $noreg + renamable $d5 = VSETLNi32 undef renamable $d5, killed renamable $r1, 0, 14, $noreg, implicit-def $q2 + renamable $r1 = t2ADDri renamable $r0, 48, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q5, 14, $noreg :: (store 16 into %ir.3, align 8) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.51, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.51, 14, $noreg + renamable $d31 = VSETLNi32 undef renamable $d31, killed renamable $r1, 0, 14, $noreg, implicit killed $q15, implicit-def $q15 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.43, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.43, 14, $noreg + renamable $d7 = VSETLNi32 undef renamable $d7, killed renamable $r1, 0, 14, $noreg, implicit-def $q3 + renamable $r1 = t2ADDri renamable $r0, 80, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q4, 14, $noreg :: (store 16 into %ir.5, align 8) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.47, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.47, 14, $noreg + renamable $d1 = VSETLNi32 undef renamable $d1, killed renamable $r1, 0, 14, $noreg, implicit killed $q0, implicit-def $q0 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.52, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.52, 14, $noreg + renamable $d31 = VSETLNi32 killed renamable $d31, killed renamable $r1, 1, 14, $noreg, implicit $q15, implicit-def $q15 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.48, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.48, 14, $noreg + renamable $d1 = VSETLNi32 killed renamable $d1, killed renamable $r1, 1, 14, $noreg, implicit $q0, implicit-def $q0 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.46, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.46, 14, $noreg + renamable $d0 = VSETLNi32 killed renamable $d0, killed renamable $r1, 1, 14, $noreg, implicit $q0, implicit-def $q0 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.50, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.50, 14, $noreg + renamable $d30 = VSETLNi32 killed renamable $d30, killed renamable $r1, 1, 14, $noreg, implicit $q15, implicit-def $q15 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.41, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.41, 14, $noreg + renamable $d6 = VSETLNi32 undef renamable $d6, killed renamable $r1, 0, 14, $noreg, implicit killed $q3, implicit-def $q3 + renamable $r1 = t2ADDri renamable $r0, 112, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q0, 14, $noreg :: (store 16 into %ir.7, align 8) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.59, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.59, 14, $noreg + renamable $d29 = VSETLNi32 undef renamable $d29, killed renamable $r1, 0, 14, $noreg, implicit killed $q14, implicit-def $q14 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.65, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.65, 14, $noreg + renamable $d4 = VSETLNi32 undef renamable $d4, killed renamable $r1, 0, 14, $noreg, implicit killed $q2, implicit-def $q2 + renamable $r1 = t2ADDri renamable $r0, 128, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q15, 14, $noreg :: (store 16 into %ir.8, align 8) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.55, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.55, 14, $noreg + renamable $d23 = VSETLNi32 undef renamable $d23, killed renamable $r1, 0, 14, $noreg, implicit killed $q11, implicit-def $q11 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.60, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.60, 14, $noreg + renamable $d29 = VSETLNi32 killed renamable $d29, killed renamable $r1, 1, 14, $noreg, implicit $q14, implicit-def $q14 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.56, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.56, 14, $noreg + renamable $d23 = VSETLNi32 killed renamable $d23, killed renamable $r1, 1, 14, $noreg, implicit $q11, implicit-def $q11 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.54, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.54, 14, $noreg + renamable $d22 = VSETLNi32 killed renamable $d22, killed renamable $r1, 1, 14, $noreg, implicit $q11, implicit-def $q11 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.58, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.58, 14, $noreg + renamable $d28 = VSETLNi32 killed renamable $d28, killed renamable $r1, 1, 14, $noreg, implicit $q14, implicit-def $q14 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.104, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.104, 14, $noreg + renamable $d31 = VSETLNi32 undef renamable $d31, killed renamable $r1, 0, 14, $noreg, implicit-def $q15 + renamable $r1 = t2ADDri renamable $r0, 144, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q11, 14, $noreg :: (store 16 into %ir.9, align 8) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.126, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.126, 14, $noreg + renamable $d23 = VSETLNi32 undef renamable $d23, killed renamable $r1, 0, 14, $noreg, implicit-def $q11 + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.98, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.98, 14, $noreg + renamable $d0 = VSETLNi32 undef renamable $d0, killed renamable $r1, 0, 14, $noreg, implicit-def $q0 + renamable $r1 = t2ADDri renamable $r0, 200, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q14, 14, $noreg :: (store 16 into %ir.11, align 8) + $lr = t2MOVi16 target-flags(arm-lo16) @.str.124, 14, $noreg + $lr = t2MOVTi16 $lr, target-flags(arm-hi16) @.str.124, 14, $noreg + $r2 = t2MOVi16 target-flags(arm-lo16) @.str.127, 14, $noreg + $r2 = t2MOVTi16 $r2, target-flags(arm-hi16) @.str.127, 14, $noreg + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.125, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.125, 14, $noreg + $r7 = t2MOVi16 target-flags(arm-lo16) @.str.115, 14, $noreg + $r7 = t2MOVTi16 $r7, target-flags(arm-hi16) @.str.115, 14, $noreg + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.113, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.113, 14, $noreg + renamable $d22 = VSETLNi32 undef renamable $d22, renamable $lr, 0, 14, $noreg, implicit killed $q11, implicit-def $q11 + renamable $d19 = VSETLNi32 killed renamable $d19, renamable $r7, 1, 14, $noreg, implicit $q9, implicit-def $q9 + renamable $d23 = VSETLNi32 killed renamable $d23, renamable $r2, 1, 14, $noreg, implicit $q11, implicit-def $q11 + renamable $d18 = VSETLNi32 killed renamable $d18, killed renamable $r3, 1, 14, $noreg, implicit $q9, implicit-def $q9 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.123, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.123, 14, $noreg + renamable $d16 = VSETLNi32 killed renamable $d16, killed renamable $r3, 1, 14, $noreg, implicit $q8, implicit-def $q8 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.64, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.64, 14, $noreg + renamable $d21 = VSETLNi32 killed renamable $d21, killed renamable $r3, 1, 14, $noreg, implicit $q10, implicit-def $q10 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.62, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.62, 14, $noreg + renamable $d22 = VSETLNi32 killed renamable $d22, killed renamable $r1, 1, 14, $noreg, implicit $q11, implicit-def $q11 + renamable $r1 = t2ADDri renamable $r0, 456, 14, $noreg, $noreg + renamable $d20 = VSETLNi32 killed renamable $d20, killed renamable $r3, 1, 14, $noreg, implicit $q10, implicit-def $q10 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.20, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.20, 14, $noreg + renamable $d3 = VSETLNi32 killed renamable $d3, killed renamable $r3, 1, 14, $noreg, implicit $q1, implicit-def $q1 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.121, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.121, 14, $noreg + renamable $q14 = VDUP32q killed renamable $r3, 14, $noreg + renamable $r3 = t2ADDri renamable $r0, 216, 14, $noreg, $noreg + VST1q64 killed $r3, 0, killed $q10, 14, $noreg :: (store 16 into %ir.12, align 8) + $r3 = tMOVr $r0, 14, $noreg + renamable $r3 = VST1q32wb_register killed $r3, 0, killed $r4, killed $q1, 14, $noreg :: (store 16 into %ir.0, align 8) + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.120, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.120, 14, $noreg + renamable $q10 = VMOVv4i32 0, 14, $noreg + renamable $d28 = VSETLNi32 killed renamable $d28, killed renamable $r4, 0, 14, $noreg, implicit $q14, implicit-def $q14 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.76, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.76, 14, $noreg + renamable $d27 = VSETLNi32 killed renamable $d27, killed renamable $r4, 1, 14, $noreg, implicit $q13, implicit-def $q13 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.74, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.74, 14, $noreg + renamable $d17 = VDUP32d killed renamable $lr, 14, $noreg, implicit killed $q8, implicit-def $q8 + renamable $lr = t2ADDri renamable $r0, 788, 14, $noreg, $noreg + renamable $d26 = VSETLNi32 killed renamable $d26, killed renamable $r4, 1, 14, $noreg, implicit $q13, implicit-def $q13 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.72, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.72, 14, $noreg + renamable $d25 = VSETLNi32 killed renamable $d25, killed renamable $r4, 1, 14, $noreg, implicit $q12, implicit-def $q12 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.70, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.70, 14, $noreg + renamable $d24 = VSETLNi32 killed renamable $d24, killed renamable $r4, 1, 14, $noreg, implicit $q12, implicit-def $q12 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.68, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.68, 14, $noreg + renamable $d5 = VSETLNi32 killed renamable $d5, killed renamable $r4, 1, 14, $noreg, implicit $q2, implicit-def $q2 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.44, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.44, 14, $noreg + renamable $d7 = VSETLNi32 killed renamable $d7, killed renamable $r4, 1, 14, $noreg, implicit $q3, implicit-def $q3 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.42, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.42, 14, $noreg + renamable $d6 = VSETLNi32 killed renamable $d6, killed renamable $r4, 1, 14, $noreg, implicit $q3, implicit-def $q3 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.66, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.66, 14, $noreg + renamable $d4 = VSETLNi32 killed renamable $d4, killed renamable $r4, 1, 14, $noreg, implicit $q2, implicit-def $q2 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.88, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.88, 14, $noreg + renamable $d8 = VSETLNi32 undef renamable $d8, killed renamable $r4, 0, 14, $noreg, implicit-def $q4 + renamable $r4, dead $cpsr = tMOVi8 0, 14, $noreg + tSTRi renamable $r4, killed renamable $r3, 0, 14, $noreg :: (store 4 into %ir.4 + 36) + $r3 = tMOVr $r0, 14, $noreg + t2STRDi8 $r4, $r4, $r0, 192, 14, $noreg + early-clobber renamable $r3 = t2STR_PRE renamable $r4, killed renamable $r3, 96, 14, $noreg :: (store 4 into %ir.4 + 32) + VST1q64 killed $r3, 0, killed $q3, 14, $noreg :: (store 16 into %ir.6, align 8) + renamable $r3 = t2ADDri renamable $r0, 64, 14, $noreg, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.81, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.81, 14, $noreg + VST1q32 killed $r3, 0, $q10, 14, $noreg :: (store 16 into %ir.4, align 4) + renamable $r3 = t2ADDri renamable $r0, 176, 14, $noreg, $noreg + VST1q32 killed $r3, 0, $q10, 14, $noreg :: (store 16 into %ir.10 + 16, align 4) + renamable $r3 = t2ADDri renamable $r0, 160, 14, $noreg, $noreg + renamable $q1 = VDUP32q killed renamable $r5, 14, $noreg + renamable $r5 = t2ADDri renamable $r0, 248, 14, $noreg, $noreg + VST1q32 killed $r3, 0, $q10, 14, $noreg :: (store 16 into %ir.10, align 4) + renamable $r3 = t2ADDri renamable $r0, 232, 14, $noreg, $noreg + VST1q64 killed $r3, 0, killed $q2, 14, $noreg :: (store 16 into %ir.13, align 8) + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.82, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.82, 14, $noreg + VST1q64 killed $r5, 0, killed $q12, 14, $noreg :: (store 16 into %ir.14, align 8) + renamable $d3 = VSETLNi32 killed renamable $d3, killed renamable $r3, 1, 14, $noreg, implicit $q1, implicit-def $q1 + renamable $r3 = t2ADDri renamable $r0, 264, 14, $noreg, $noreg + VST1q64 killed $r3, 0, killed $q13, 14, $noreg :: (store 16 into %ir.15, align 8) + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.91, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.91, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.90, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.90, 14, $noreg + renamable $d9 = VSETLNi32 undef renamable $d9, killed renamable $r5, 0, 14, $noreg, implicit killed $q4, implicit-def $q4 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.118, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.118, 14, $noreg + renamable $q12 = VDUP32q killed renamable $r5, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.84, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.84, 14, $noreg + renamable $q13 = VDUP32q killed renamable $r5, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.92, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.92, 14, $noreg + t2STRDi8 killed $r4, $r4, $r0, 312, 14, $noreg + renamable $r4 = t2ADDri renamable $r0, 296, 14, $noreg, $noreg + renamable $d5 = VSETLNi32 undef renamable $d5, killed renamable $r5, 0, 14, $noreg, implicit-def $q2 + renamable $r5 = t2ADDri renamable $r0, 280, 14, $noreg, $noreg + VST1q32 $r4, 0, $q10, 14, $noreg :: (store 16 into %ir.16 + 16, align 4) + VST1q32 killed $r5, 0, $q10, 14, $noreg :: (store 16 into %ir.16, align 4) + VST1q64 killed $r4, 0, killed $q1, 14, $noreg :: (store 16 into %ir.17, align 8) + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.83, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.83, 14, $noreg + renamable $d9 = VSETLNi32 killed renamable $d9, renamable $r3, 1, 14, $noreg, implicit $q4, implicit-def $q4 + renamable $r4 = t2ADDri renamable $r0, 312, 14, $noreg, $noreg + renamable $d26 = VSETLNi32 killed renamable $d26, killed renamable $r5, 0, 14, $noreg, implicit $q13, implicit-def $q13 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.89, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.89, 14, $noreg + renamable $d8 = VSETLNi32 killed renamable $d8, killed renamable $r5, 1, 14, $noreg, implicit $q4, implicit-def $q4 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.106, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.106, 14, $noreg + VST1q64 killed $r4, 0, killed $q13, 14, $noreg :: (store 16 into %ir.18, align 8) + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.119, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.119, 14, $noreg + renamable $q1 = VDUP32q killed renamable $r5, 14, $noreg + renamable $r5 = t2ADDri renamable $r0, 436, 14, $noreg, $noreg + renamable $d25 = VSETLNi32 killed renamable $d25, killed renamable $r4, 1, 14, $noreg, implicit $q12, implicit-def $q12 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.116, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.116, 14, $noreg + renamable $d27 = VSETLNi32 undef renamable $d27, killed renamable $r4, 0, 14, $noreg, implicit-def $q13 + renamable $r4 = t2ADDri renamable $r0, 344, 14, $noreg, $noreg + VST1q64 killed $r4, 0, killed $q4, 14, $noreg :: (store 16 into %ir.19, align 8) + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.107, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.107, 14, $noreg + renamable $d3 = VSETLNi32 killed renamable $d3, killed renamable $r4, 1, 14, $noreg, implicit $q1, implicit-def $q1 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.105, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.105, 14, $noreg + renamable $d31 = VSETLNi32 killed renamable $d31, killed renamable $r4, 1, 14, $noreg, implicit $q15, implicit-def $q15 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.99, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.99, 14, $noreg + renamable $d0 = VSETLNi32 killed renamable $d0, killed renamable $r4, 1, 14, $noreg, implicit $q0, implicit-def $q0 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.93, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.93, 14, $noreg + renamable $d5 = VSETLNi32 killed renamable $d5, killed renamable $r4, 1, 14, $noreg, implicit $q2, implicit-def $q2 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.117, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.117, 14, $noreg + renamable $d27 = VSETLNi32 killed renamable $d27, killed renamable $r4, 1, 14, $noreg, implicit $q13, implicit-def $q13 + renamable $r4 = t2ADDri renamable $r0, 392, 14, $noreg, $noreg + renamable $d4 = VDUP32d killed renamable $r3, 14, $noreg, implicit killed $q2, implicit-def $q2 + renamable $r3 = t2ADDri renamable $r0, 360, 14, $noreg, $noreg + renamable $d26 = VDUP32d killed renamable $r7, 14, $noreg, implicit killed $q13, implicit-def $q13 + renamable $r7 = t2ADDri renamable $r0, 504, 14, $noreg, $noreg + VST1q64 killed $r3, 0, killed $q2, 14, $noreg :: (store 16 into %ir.20, align 8) + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.97, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.97, 14, $noreg + renamable $q2 = VDUP32q killed renamable $r3, 14, $noreg + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.96, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.96, 14, $noreg + renamable $d4 = VSETLNi32 killed renamable $d4, killed renamable $r3, 0, 14, $noreg, implicit $q2, implicit-def $q2 + renamable $r3 = t2ADDri renamable $r0, 388, 14, $noreg, $noreg + VST1q32 killed $r3, 0, $q10, 14, $noreg :: (store 16 into %ir.21 + 12, align 4) + renamable $r3 = t2ADDri renamable $r0, 376, 14, $noreg, $noreg + VST1q32 killed $r3, 0, $q10, 14, $noreg :: (store 16 into %ir.21, align 4) + renamable $r3 = t2ADDri renamable $r0, 584, 14, $noreg, $noreg + VST1q64 killed $r4, 0, killed $q2, 14, $noreg :: (store 16 into %ir.22, align 8) + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.100, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.100, 14, $noreg + renamable $d1 = VDUP32d killed renamable $r4, 14, $noreg, implicit killed $q0, implicit-def $q0 + renamable $r4 = t2ADDri renamable $r0, 408, 14, $noreg, $noreg + VST1q64 killed $r4, 0, killed $q0, 14, $noreg :: (store 16 into %ir.23, align 8) + renamable $r4 = t2ADDri renamable $r0, 440, 14, $noreg, $noreg + VST1q32 killed $r5, 0, $q10, 14, $noreg :: (store 16 into %ir.24 + 12, align 4) + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.103, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.103, 14, $noreg + renamable $d30 = VDUP32d killed renamable $r5, 14, $noreg, implicit killed $q15, implicit-def $q15 + renamable $r5 = t2ADDri renamable $r0, 424, 14, $noreg, $noreg + VST1q32 killed $r5, 0, $q10, 14, $noreg :: (store 16 into %ir.24, align 4) + VST1q64 killed $r4, 0, killed $q15, 14, $noreg :: (store 16 into %ir.25, align 8) + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.111, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.111, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.110, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.110, 14, $noreg + renamable $d30 = VSETLNi32 undef renamable $d30, killed renamable $r5, 0, 14, $noreg, implicit-def $q15 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.109, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.109, 14, $noreg + renamable $q0 = VDUP32q killed renamable $r5, 14, $noreg + renamable $r5 = t2ADDri renamable $r0, 488, 14, $noreg, $noreg + renamable $d30 = VSETLNi32 killed renamable $d30, killed renamable $r4, 1, 14, $noreg, implicit $q15, implicit-def $q15 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.108, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.108, 14, $noreg + renamable $d0 = VSETLNi32 killed renamable $d0, killed renamable $r4, 0, 14, $noreg, implicit $q0, implicit-def $q0 + renamable $r4 = t2ADDri renamable $r0, 568, 14, $noreg, $noreg + renamable $d31 = VDUP32d killed renamable $r12, 14, $noreg, implicit killed $q15, implicit-def $q15 + VST1q64 killed $r1, 0, killed $q1, 14, $noreg :: (store 16 into %ir.26, align 8) + renamable $r1 = t2ADDri renamable $r0, 472, 14, $noreg, $noreg + VST1q64 killed $r1, 0, killed $q0, 14, $noreg :: (store 16 into %ir.27, align 8) + renamable $r1 = t2ADDri renamable $r0, 552, 14, $noreg, $noreg + VST1q64 killed $r5, 0, killed $q15, 14, $noreg :: (store 16 into %ir.28, align 8) + renamable $r5 = t2ADDri renamable $r0, 536, 14, $noreg, $noreg + VST1q64 killed $r7, 0, killed $q9, 14, $noreg :: (store 16 into %ir.29, align 8) + renamable $r7 = t2ADDri renamable $r0, 660, 14, $noreg, $noreg + VST1q64 killed $r6, 0, killed $q13, 14, $noreg :: (store 16 into %ir.30, align 8) + VST1q64 killed $r5, 0, killed $q12, 14, $noreg :: (store 16 into %ir.31, align 8) + VST1q64 killed $r1, 0, killed $q14, 14, $noreg :: (store 16 into %ir.32, align 8) + renamable $r1 = t2ADDri renamable $r0, 608, 14, $noreg, $noreg + VST1q64 killed $r4, 0, killed $q8, 14, $noreg :: (store 16 into %ir.33, align 8) + VST1q64 killed $r3, 0, killed $q11, 14, $noreg :: (store 16 into %ir.34, align 8) + t2STRDi8 killed $r2, $r2, $r0, 600, 14, $noreg + VST1q32 killed $r1, 0, $q10, 14, $noreg :: (store 16 into %ir.35, align 4) + $r12 = t2MOVi16 target-flags(arm-lo16) @.str.139, 14, $noreg + $r12 = t2MOVTi16 $r12, target-flags(arm-hi16) @.str.139, 14, $noreg + $r2 = t2MOVi16 target-flags(arm-lo16) @.str.151, 14, $noreg + $r2 = t2MOVTi16 $r2, target-flags(arm-hi16) @.str.151, 14, $noreg + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.134, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.134, 14, $noreg + renamable $r1 = t2ADDri renamable $r0, 620, 14, $noreg, $noreg + renamable $d24 = VSETLNi32 undef renamable $d24, killed renamable $r3, 0, 14, $noreg, implicit-def $q12 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.140, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.140, 14, $noreg + renamable $d23 = VSETLNi32 undef renamable $d23, killed renamable $r3, 0, 14, $noreg, implicit-def $q11 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.146, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.146, 14, $noreg + renamable $d18 = VSETLNi32 undef renamable $d18, killed renamable $r3, 0, 14, $noreg, implicit-def $q9 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.152, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.152, 14, $noreg + renamable $d17 = VSETLNi32 undef renamable $d17, killed renamable $r3, 0, 14, $noreg, implicit-def $q8 + $r3 = t2MOVi16 target-flags(arm-lo16) @.str.136, 14, $noreg + $r3 = t2MOVTi16 $r3, target-flags(arm-hi16) @.str.136, 14, $noreg + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.138, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.138, 14, $noreg + renamable $d28 = VSETLNi32 undef renamable $d28, renamable $r3, 0, 14, $noreg, implicit-def $q14 + renamable $d29 = VSETLNi32 undef renamable $d29, killed renamable $r4, 0, 14, $noreg, implicit killed $q14, implicit-def $q14 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.148, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.148, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.150, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.150, 14, $noreg + renamable $d26 = VSETLNi32 undef renamable $d26, renamable $r4, 0, 14, $noreg, implicit-def $q13 + renamable $d29 = VSETLNi32 killed renamable $d29, renamable $r12, 1, 14, $noreg, implicit $q14, implicit-def $q14 + renamable $d27 = VSETLNi32 undef renamable $d27, killed renamable $r5, 0, 14, $noreg, implicit killed $q13, implicit-def $q13 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.130, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.130, 14, $noreg + renamable $q1 = VDUP32q killed renamable $r5, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.142, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.142, 14, $noreg + renamable $d27 = VSETLNi32 killed renamable $d27, renamable $r2, 1, 14, $noreg, implicit $q13, implicit-def $q13 + renamable $q15 = VDUP32q killed renamable $r5, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.149, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.149, 14, $noreg + renamable $d26 = VSETLNi32 killed renamable $d26, killed renamable $r5, 1, 14, $noreg, implicit $q13, implicit-def $q13 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.145, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.145, 14, $noreg + renamable $q0 = VDUP32q killed renamable $r5, 14, $noreg + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.137, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.137, 14, $noreg + renamable $d28 = VSETLNi32 killed renamable $d28, killed renamable $r5, 1, 14, $noreg, implicit $q14, implicit-def $q14 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.153, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.153, 14, $noreg + renamable $d17 = VSETLNi32 killed renamable $d17, killed renamable $r5, 1, 14, $noreg, implicit $q8, implicit-def $q8 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.147, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.147, 14, $noreg + renamable $d18 = VSETLNi32 killed renamable $d18, killed renamable $r5, 1, 14, $noreg, implicit $q9, implicit-def $q9 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.141, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.141, 14, $noreg + renamable $d23 = VSETLNi32 killed renamable $d23, killed renamable $r5, 1, 14, $noreg, implicit $q11, implicit-def $q11 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.135, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.135, 14, $noreg + renamable $d24 = VSETLNi32 killed renamable $d24, killed renamable $r5, 1, 14, $noreg, implicit $q12, implicit-def $q12 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.144, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.144, 14, $noreg + renamable $d0 = VSETLNi32 killed renamable $d0, killed renamable $r5, 0, 14, $noreg, implicit $q0, implicit-def $q0 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.143, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.143, 14, $noreg + renamable $d31 = VSETLNi32 killed renamable $d31, killed renamable $r5, 1, 14, $noreg, implicit $q15, implicit-def $q15 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.131, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.131, 14, $noreg + renamable $d3 = VSETLNi32 killed renamable $d3, killed renamable $r5, 1, 14, $noreg, implicit $q1, implicit-def $q1 + $r5 = t2MOVi16 target-flags(arm-lo16) @.str.133, 14, $noreg + $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.133, 14, $noreg + renamable $q2 = VDUP32q killed renamable $r5, 14, $noreg + renamable $r5 = t2ADDri renamable $r0, 756, 14, $noreg, $noreg + VST1q32 killed $r1, 0, killed $q10, 14, $noreg :: (store 16 into %ir.35 + 12, align 4) + $r1 = t2MOVi16 target-flags(arm-lo16) @.str.132, 14, $noreg + $r1 = t2MOVTi16 $r1, target-flags(arm-hi16) @.str.132, 14, $noreg + renamable $d19 = VDUP32d killed renamable $r4, 14, $noreg, implicit killed $q9, implicit-def $q9 + $r4 = t2MOVi16 target-flags(arm-lo16) @.str.128, 14, $noreg + $r4 = t2MOVTi16 $r4, target-flags(arm-hi16) @.str.128, 14, $noreg + renamable $d4 = VSETLNi32 killed renamable $d4, killed renamable $r1, 0, 14, $noreg, implicit $q2, implicit-def $q2 + $r6 = t2MOVi16 target-flags(arm-lo16) @.str.129, 14, $noreg + $r6 = t2MOVTi16 $r6, target-flags(arm-hi16) @.str.129, 14, $noreg + renamable $r1 = t2ADDri renamable $r0, 772, 14, $noreg, $noreg + renamable $d16 = VDUP32d killed renamable $r2, 14, $noreg, implicit killed $q8, implicit-def $q8 + renamable $r2 = t2ADDri renamable $r0, 740, 14, $noreg, $noreg + renamable $d22 = VDUP32d killed renamable $r12, 14, $noreg, implicit killed $q11, implicit-def $q11 + renamable $d25 = VDUP32d killed renamable $r3, 14, $noreg, implicit killed $q12, implicit-def $q12 + t2STRDi8 killed $r4, killed $r6, $r0, 636, 14, $noreg + renamable $r4 = t2ADDri renamable $r0, 644, 14, $noreg, $noreg + renamable $r6 = t2ADDri renamable $r0, 692, 14, $noreg, $noreg + VST1q64 killed $r4, 0, killed $q1, 14, $noreg :: (store 16 into %ir.36, align 8) + renamable $r4 = t2ADDri renamable $r0, 724, 14, $noreg, $noreg + VST1q64 killed $r7, 0, killed $q2, 14, $noreg :: (store 16 into %ir.37, align 8) + renamable $r7 = t2ADDri renamable $r0, 708, 14, $noreg, $noreg + renamable $r0 = t2ADDri killed renamable $r0, 676, 14, $noreg, $noreg + VST1q64 killed $r0, 0, killed $q12, 14, $noreg :: (store 16 into %ir.38, align 8) + VST1q64 killed $r6, 0, killed $q14, 14, $noreg :: (store 16 into %ir.39, align 8) + VST1q64 killed $r7, 0, killed $q11, 14, $noreg :: (store 16 into %ir.40, align 8) + VST1q64 killed $r4, 0, killed $q15, 14, $noreg :: (store 16 into %ir.41, align 8) + VST1q64 killed $r2, 0, killed $q0, 14, $noreg :: (store 16 into %ir.42, align 8) + VST1q64 killed $r5, 0, killed $q9, 14, $noreg :: (store 16 into %ir.43, align 8) + VST1q64 killed $r1, 0, killed $q13, 14, $noreg :: (store 16 into %ir.44, align 8) + VST1q64 killed $lr, 0, killed $q8, 14, $noreg :: (store 16 into %ir.45, align 8) + $sp = VLDMDIA_UPD $sp, 14, $noreg, def $d8, def $d9, def $d10, def $d11 + $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r11, def $pc + +... + +# CHECK: $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.118, 14, $noreg +# CHECK-NEXT: renamable $q12 = VDUP32q killed renamable $r5, 14, $noreg +# CHECK-NEXT: t2B %bb.2, 14, $noreg +# CHECK-NEXT: {{^ $}} +# CHECK-NEXT: bb.1 (align 2): +# CHECK-NEXT: successors:{{ }} +# CHECK-NEXT: {{^ $}} +# CHECK-NEXT: CONSTPOOL_ENTRY 1, %const.0, 4 +# CHECK-NEXT: {{^ $}} +# CHECK-NEXT: bb.2.entry (align 1): +# CHECK-NEXT: $r5 = t2MOVi16 target-flags(arm-lo16) @.str.84, 14, $noreg +# CHECK-NEXT: $r5 = t2MOVTi16 $r5, target-flags(arm-hi16) @.str.84, 14, $noreg