Index: lib/Transforms/InstCombine/InstCombineCompares.cpp =================================================================== --- lib/Transforms/InstCombine/InstCombineCompares.cpp +++ lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -2337,12 +2337,15 @@ CmpInst::Predicate Pred = Cmp.getPredicate(); // If the add does not wrap, we can always adjust the compare by subtracting - // the constants. Equality comparisons are handled elsewhere. SGE/SLE are - // canonicalized to SGT/SLT. - if (Add->hasNoSignedWrap() && - (Pred == ICmpInst::ICMP_SGT || Pred == ICmpInst::ICMP_SLT)) { + // the constants. Equality comparisons are handled elsewhere. SGE/SLE/UGE/ULE + // are canonicalized to SGT/SLT/UGT/ULT. + if ((Add->hasNoSignedWrap() && + (Pred == ICmpInst::ICMP_SGT || Pred == ICmpInst::ICMP_SLT)) || + (Add->hasNoUnsignedWrap() && + (Pred == ICmpInst::ICMP_UGT || Pred == ICmpInst::ICMP_ULT))) { bool Overflow; - APInt NewC = C.ssub_ov(*C2, Overflow); + APInt NewC = + Cmp.isSigned() ? C.ssub_ov(*C2, Overflow) : C.usub_ov(*C2, Overflow); // If there is overflow, the result must be true or false. // TODO: Can we assert there is no overflow because InstSimplify always // handles those cases? Index: test/Analysis/ValueTracking/non-negative-phi-bits.ll =================================================================== --- test/Analysis/ValueTracking/non-negative-phi-bits.ll +++ test/Analysis/ValueTracking/non-negative-phi-bits.ll @@ -8,7 +8,7 @@ ; CHECK: for.body: ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 -; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], 40 +; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ult i64 [[INDVARS_IV]], 39 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]] ; CHECK: for.end: ; CHECK-NEXT: ret void Index: test/Transforms/InstCombine/icmp-add.ll =================================================================== --- test/Transforms/InstCombine/icmp-add.ll +++ test/Transforms/InstCombine/icmp-add.ll @@ -281,3 +281,50 @@ ret i1 %z } +define i1 @reduce_add_ne(i32 %in) { +;CHECK-LABEL: @reduce_add_ne( +;CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %in, 9 + %a6 = add nuw i32 %in, 3 + %a18 = icmp ne i32 %a6, 12 + ret i1 %a18 +} + +define i1 @reduce_add_eq(i32 %in) { +;CHECK-LABEL: @reduce_add_eq( +;CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %in, 9 + %a6 = add nuw i32 %in, 3 + %a18 = icmp eq i32 %a6, 12 + ret i1 %a18 +} + +define i1 @reduce_add_ult(i32 %in) { +;CHECK-LABEL: @reduce_add_ult( +;CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %in, 9 + %a6 = add nuw i32 %in, 3 + %a18 = icmp ult i32 %a6, 12 + ret i1 %a18 +} + +define i1 @reduce_add_ugt(i32 %in) { +;CHECK-LABEL: @reduce_add_ugt( +;CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %in, 9 + %a6 = add nuw i32 %in, 3 + %a18 = icmp ugt i32 %a6, 12 + ret i1 %a18 +} + +define i1 @reduce_add_ule(i32 %in) { +;CHECK-LABEL: @reduce_add_ule( +;CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %in, 10 + %a6 = add nuw i32 %in, 3 + %a18 = icmp ule i32 %a6, 12 + ret i1 %a18 +} + +define i1 @reduce_add_uge(i32 %in) { +;CHECK-LABEL: @reduce_add_uge( +;CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %in, 8 + %a6 = add nuw i32 %in, 3 + %a18 = icmp uge i32 %a6, 12 + ret i1 %a18 +} Index: test/Transforms/LoopVectorize/X86/masked_load_store.ll =================================================================== --- test/Transforms/LoopVectorize/X86/masked_load_store.ll +++ test/Transforms/LoopVectorize/X86/masked_load_store.ll @@ -1878,7 +1878,7 @@ ; AVX1-NEXT: br label [[FOR_INC]] ; AVX1: for.inc: ; AVX1-NEXT: [[INDVARS_IV_NEXT:%.*]] = or i64 [[INDVARS_IV]], 16 -; AVX1-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], 10000 +; AVX1-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV]], 9984 ; AVX1-NEXT: br i1 [[CMP]], label [[FOR_BODY_1:%.*]], label [[FOR_END:%.*]] ; AVX1: for.end: ; AVX1-NEXT: ret void @@ -1920,7 +1920,7 @@ ; AVX2-NEXT: br label [[FOR_INC]] ; AVX2: for.inc: ; AVX2-NEXT: [[INDVARS_IV_NEXT:%.*]] = or i64 [[INDVARS_IV]], 16 -; AVX2-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], 10000 +; AVX2-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV]], 9984 ; AVX2-NEXT: br i1 [[CMP]], label [[FOR_BODY_1:%.*]], label [[FOR_END:%.*]] ; AVX2: for.end: ; AVX2-NEXT: ret void @@ -2119,7 +2119,7 @@ ; AVX512-NEXT: br label [[FOR_INC_3]] ; AVX512: for.inc.3: ; AVX512-NEXT: [[INDVARS_IV_NEXT_3]] = add nsw i64 [[INDVARS_IV]], 64 -; AVX512-NEXT: [[CMP_3:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT_3]], 10000 +; AVX512-NEXT: [[CMP_3:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT_2]], 9984 ; AVX512-NEXT: br i1 [[CMP_3]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop !52 ; entry: Index: test/Transforms/LoopVectorize/if-conversion-nest.ll =================================================================== --- test/Transforms/LoopVectorize/if-conversion-nest.ll +++ test/Transforms/LoopVectorize/if-conversion-nest.ll @@ -12,7 +12,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4 +; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 3 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] ; CHECK: vector.memcheck: ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[N]], -1 Index: test/Transforms/LoopVectorize/runtime-check.ll =================================================================== --- test/Transforms/LoopVectorize/runtime-check.ll +++ test/Transforms/LoopVectorize/runtime-check.ll @@ -18,7 +18,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1, !dbg !9 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64, !dbg !9 ; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1, !dbg !9 -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4, !dbg !9 +; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 3, !dbg !9 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]], !dbg !9 ; CHECK: vector.memcheck: ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[N]], -1, !dbg !9