Index: include/llvm/ADT/Triple.h =================================================================== --- include/llvm/ADT/Triple.h +++ include/llvm/ADT/Triple.h @@ -55,10 +55,10 @@ bpfel, // eBPF or extended BPF or 64-bit BPF (little endian) bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian) hexagon, // Hexagon: hexagon - mips, // MIPS: mips, mipsallegrex - mipsel, // MIPSEL: mipsel, mipsallegrexel - mips64, // MIPS64: mips64 - mips64el, // MIPS64EL: mips64el + mips, // MIPS: mips, mipsallegrex, mipsr6 + mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el + mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6 + mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el msp430, // MSP430: msp430 nios2, // NIOSII: nios2 ppc, // PPC: powerpc @@ -125,7 +125,9 @@ KalimbaSubArch_v3, KalimbaSubArch_v4, - KalimbaSubArch_v5 + KalimbaSubArch_v5, + + MipsSubArch_r6 }; enum VendorType { UnknownVendor, Index: lib/Support/Triple.cpp =================================================================== --- lib/Support/Triple.cpp +++ lib/Support/Triple.cpp @@ -398,10 +398,14 @@ .Case("thumbeb", Triple::thumbeb) .Case("avr", Triple::avr) .Case("msp430", Triple::msp430) - .Cases("mips", "mipseb", "mipsallegrex", Triple::mips) - .Cases("mipsel", "mipsallegrexel", Triple::mipsel) - .Cases("mips64", "mips64eb", Triple::mips64) - .Case("mips64el", Triple::mips64el) + .Cases("mips", "mipseb", "mipsallegrex", "mipsisa32r6", + "mipsr6", Triple::mips) + .Cases("mipsel", "mipsallegrexel", "mipsisa32r6el", "mipsr6el", + Triple::mipsel) + .Cases("mips64", "mips64eb", "mipsn32", "mipsisa64r6", + "mips64r6", "mipsn32r6", Triple::mips64) + .Cases("mips64el", "mipsn32el", "mipsisa64r6el", "mips64r6el", + "mipsn32r6el", Triple::mips64el) .Case("nios2", Triple::nios2) .Case("r600", Triple::r600) .Case("amdgcn", Triple::amdgcn) @@ -538,6 +542,12 @@ } static Triple::SubArchType parseSubArch(StringRef SubArchName) { + if (SubArchName.startswith("mipsisa32r6") || + SubArchName.startswith("mipsisa64r6") || + (SubArchName.startswith("mips") && + (SubArchName.endswith("r6el") || SubArchName.endswith("r6")))) + return Triple::MipsSubArch_r6; + StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName); // For now, this is the small part. Early return. @@ -709,6 +719,12 @@ ObjectFormat = parseFormat(Components[3]); } } + } else { + Environment = StringSwitch(Components[0]) + .StartsWith("mipsn32", Triple::GNUABIN32) + .StartsWith("mips64", Triple::GNUABI64) + .StartsWith("mipsisa64", Triple::GNUABI64) + .Default(UnknownEnvironment); } } if (ObjectFormat == UnknownObjectFormat) Index: lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp +++ lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp @@ -55,6 +55,8 @@ return MipsABIInfo::N32(); if (Options.getABIName().startswith("n64")) return MipsABIInfo::N64(); + if(TT.getEnvironment() == llvm::Triple::GNUABIN32) + return MipsABIInfo::N32(); assert(Options.getABIName().empty() && "Unknown ABI option for MIPS"); if (TT.isMIPS64()) Index: lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -572,6 +572,13 @@ const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options) { + bool n32; + if (Options.ABIName == "n32") + n32 = true; + else if (Options.ABIName.empty() && STI.getTargetTriple().getEnvironment() == Triple::GNUABIN32) + n32 = true; + else + n32 = false; return new MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), - Options.ABIName == "n32"); + n32); } Index: lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -59,6 +59,10 @@ if (TheTriple.getEnvironment() == Triple::GNUABI64) UseIntegratedAssembler = true; + // Enable IAS by default for Debian mipsn32/mipsn32el. + if (TheTriple.getEnvironment() == Triple::GNUABIN32) + UseIntegratedAssembler = true; + // Enable IAS by default for Android mips64el that uses N64 ABI. if (TheTriple.getArch() == Triple::mips64el && TheTriple.isAndroid()) UseIntegratedAssembler = true; Index: lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -47,10 +47,17 @@ /// FIXME: Merge with the copy in MipsSubtarget.cpp StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { if (CPU.empty() || CPU == "generic") { - if (TT.isMIPS32()) - CPU = "mips32"; - else - CPU = "mips64"; + if (TT.getSubArch() == llvm::Triple::MipsSubArch_r6){ + if (TT.isMIPS32()) + CPU = "mips32r6"; + else + CPU = "mips64r6"; + } else { + if (TT.isMIPS32()) + CPU = "mips32"; + else + CPU = "mips64"; + } } return CPU; } Index: test/MC/Mips/elf-N32.s =================================================================== --- test/MC/Mips/elf-N32.s +++ test/MC/Mips/elf-N32.s @@ -2,6 +2,10 @@ // RUN: llvm-mc -filetype=obj -triple=mips64-linux-gnu -mcpu=mips3 \ // RUN: -target-abi=n32 %s -o - | llvm-readobj -r | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple=mips64-linux-gnuabin32 -mcpu=mips3 \ +// RUN: %s -o - | llvm-readobj -r | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple=mipsn32 -mcpu=mips3 \ +// RUN: %s -o - | llvm-readobj -r | FileCheck %s // CHECK: Relocations [ // CHECK-NEXT: Section (3) .rela.text { Index: test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s +++ test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips32r6/invalid-mips1.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips1.s +++ test/MC/Mips/mips32r6/invalid-mips1.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat add $9,$14,15176 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s +++ test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s @@ -4,6 +4,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips32r6/invalid-mips2.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips2.s +++ test/MC/Mips/mips32r6/invalid-mips2.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s +++ test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s @@ -4,6 +4,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips32r6/invalid-mips32.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips32.s +++ test/MC/Mips/mips32r6/invalid-mips32.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips32r6/invalid-mips32r2.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips32r2.s +++ test/MC/Mips/mips32r6/invalid-mips32r2.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s +++ test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s @@ -4,6 +4,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips32r6/invalid-mips4.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips4.s +++ test/MC/Mips/mips32r6/invalid-mips4.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s +++ test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips32r6/invalid-mips5.s =================================================================== --- test/MC/Mips/mips32r6/invalid-mips5.s +++ test/MC/Mips/mips32r6/invalid-mips5.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips32r6/invalid.s =================================================================== --- test/MC/Mips/mips32r6/invalid.s +++ test/MC/Mips/mips32r6/invalid.s @@ -3,6 +3,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r6 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .text local_label: Index: test/MC/Mips/mips32r6/valid.s =================================================================== --- test/MC/Mips/mips32r6/valid.s +++ test/MC/Mips/mips32r6/valid.s @@ -12,6 +12,12 @@ # # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -show-inst -mcpu=mips32r6 2> %t0 | FileCheck %s # RUN: FileCheck %s -check-prefix=WARNING < %t0 +# RUN: llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding -show-inst 2> %t1 | FileCheck %s +# RUN: FileCheck %s -check-prefix=WARNING < %t1 +# RUN: llvm-mc %s -triple=mipsisa32r6 -show-encoding -show-inst 2> %t2 | FileCheck %s +# RUN: FileCheck %s -check-prefix=WARNING < %t2 +# RUN: llvm-mc %s -triple=mipsr6 -show-encoding -show-inst 2> %t3 | FileCheck %s +# RUN: FileCheck %s -check-prefix=WARNING < %t3 a: .set noat # FIXME: Add the instructions carried forward from older ISA's Index: test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s +++ test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips64r6/invalid-mips1.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips1.s +++ test/MC/Mips/mips64r6/invalid-mips1.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat add $9,$14,15176 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips64r6/invalid-mips2.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips2.s +++ test/MC/Mips/mips64r6/invalid-mips2.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s +++ test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat ldl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction Index: test/MC/Mips/mips64r6/invalid-mips3.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips3.s +++ test/MC/Mips/mips64r6/invalid-mips3.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s +++ test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s @@ -4,6 +4,15 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa32r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa32r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mipsr6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 .set noat bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s +++ test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s @@ -4,6 +4,21 @@ # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips64r6/invalid-mips4.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips4.s +++ test/MC/Mips/mips64r6/invalid-mips4.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s +++ test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction Index: test/MC/Mips/mips64r6/invalid-mips5.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips5.s +++ test/MC/Mips/mips64r6/invalid-mips5.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips64r6/invalid-mips64.s =================================================================== --- test/MC/Mips/mips64r6/invalid-mips64.s +++ test/MC/Mips/mips64r6/invalid-mips64.s @@ -3,6 +3,21 @@ # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \ # RUN: 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux -show-encoding \ +# RUN: 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 -show-encoding \ +# RUN: 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 -show-encoding \ +# RUN: 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 -show-encoding \ +# RUN: 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 -show-encoding \ +# RUN: 2>%t6 +# RUN: FileCheck %s < %t6 .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled Index: test/MC/Mips/mips64r6/invalid.s =================================================================== --- test/MC/Mips/mips64r6/invalid.s +++ test/MC/Mips/mips64r6/invalid.s @@ -1,8 +1,20 @@ # Instructions that are available for the current ISA but should be rejected by # the assembler (e.g. invalid set of operands or operand's restrictions not met). +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux 2>%t0 +# RUN: FileCheck %s < %t0 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -mcpu=mips64r6 2>%t1 # RUN: FileCheck %s < %t1 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux 2>%t2 +# RUN: FileCheck %s < %t2 +# RUN: not llvm-mc %s -triple=mipsisa64r6 2>%t3 +# RUN: FileCheck %s < %t3 +# RUN: not llvm-mc %s -triple=mips64r6 2>%t4 +# RUN: FileCheck %s < %t4 +# RUN: not llvm-mc %s -triple=mipsisa64r6-unknown-linux-gnuabin32 2>%t5 +# RUN: FileCheck %s < %t5 +# RUN: not llvm-mc %s -triple=mipsn32r6 2>%t6 +# RUN: FileCheck %s < %t6 .text local_label: