Index: lib/Target/SystemZ/SystemZSubtarget.h =================================================================== --- lib/Target/SystemZ/SystemZSubtarget.h +++ lib/Target/SystemZ/SystemZSubtarget.h @@ -102,6 +102,9 @@ // Always enable the early if-conversion pass. bool enableEarlyIfConversion() const override { return true; } + // Enable tracking of subregister liveness in register allocator. + bool enableSubRegLiveness() const override; + // Automatically generated by tblgen. void ParseSubtargetFeatures(StringRef CPU, StringRef FS); Index: lib/Target/SystemZ/SystemZSubtarget.cpp =================================================================== --- lib/Target/SystemZ/SystemZSubtarget.cpp +++ lib/Target/SystemZ/SystemZSubtarget.cpp @@ -19,6 +19,11 @@ #define GET_SUBTARGETINFO_CTOR #include "SystemZGenSubtargetInfo.inc" +static cl::opt UseSubRegLiveness( + "systemz-subreg-liveness", + cl::desc("Enable subregister liveness tracking for SystemZ (experimental)"), + cl::Hidden); + // Pin the vtable to this file. void SystemZSubtarget::anchor() {} @@ -54,6 +59,11 @@ TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this), TSInfo(), FrameLowering() {} + +bool SystemZSubtarget::enableSubRegLiveness() const { + return UseSubRegLiveness; +} + bool SystemZSubtarget::isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const { // PC32DBL accesses require the low bit to be clear. Note that a zero