Index: lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
===================================================================
--- lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -35,6 +35,12 @@
 
 #define DEBUG_TYPE "wasm-lower"
 
+// Emit proposed instructions that may not have been implemented in engines
+cl::opt<bool> EnableUnimplementedWasmSIMDInstrs(
+    "wasm-enable-unimplemented-simd",
+    cl::desc("Emit potentially-unimplemented WebAssembly SIMD instructions"),
+    cl::init(false));
+
 WebAssemblyTargetLowering::WebAssemblyTargetLowering(
     const TargetMachine &TM, const WebAssemblySubtarget &STI)
     : TargetLowering(TM), Subtarget(&STI) {
@@ -59,9 +65,11 @@
     addRegisterClass(MVT::v16i8, &WebAssembly::V128RegClass);
     addRegisterClass(MVT::v8i16, &WebAssembly::V128RegClass);
     addRegisterClass(MVT::v4i32, &WebAssembly::V128RegClass);
-    addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass);
     addRegisterClass(MVT::v4f32, &WebAssembly::V128RegClass);
-    addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass);
+    if (EnableUnimplementedWasmSIMDInstrs) {
+      addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass);
+      addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass);
+    }
   }
   // Compute derived properties from the register classes.
   computeRegisterProperties(Subtarget->getRegisterInfo());
Index: test/CodeGen/WebAssembly/simd-arith.ll
===================================================================
--- test/CodeGen/WebAssembly/simd-arith.ll
+++ test/CodeGen/WebAssembly/simd-arith.ll
@@ -1,5 +1,7 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128-VM
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128-VM
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=-simd128 | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=-simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
@@ -121,6 +123,7 @@
 ; ==============================================================================
 ; CHECK-LABEL: add_v2i64
 ; NO-SIMD128-NOT: i64x2
+; SIMD128-VM-NOT: i64x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: i64x2.add $push0=, $0, $1{{$}}
@@ -132,6 +135,7 @@
 
 ; CHECK-LABEL: sub_v2i64
 ; NO-SIMD128-NOT: i64x2
+; SIMD128-VM-NOT: i64x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: i64x2.sub $push0=, $0, $1{{$}}
@@ -143,6 +147,7 @@
 
 ; CHECK-LABEL: mul_v2i64
 ; NO-SIMD128-NOT: i64x2
+; SIMD128-VM-NOT: i64x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: i64x2.mul $push0=, $0, $1{{$}}
@@ -204,6 +209,7 @@
 ; ==============================================================================
 ; CHECK-LABEL: add_v2f64
 ; NO-SIMD128-NOT: f64x2
+; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: f64x2.add $push0=, $0, $1{{$}}
@@ -215,6 +221,7 @@
 
 ; CHECK-LABEL: sub_v2f64
 ; NO-SIMD128-NOT: f64x2
+; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: f64x2.sub $push0=, $0, $1{{$}}
@@ -226,6 +233,7 @@
 
 ; CHECK-LABEL: div_v2f64
 ; NO-SIMD128-NOT: f64x2
+; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: f64x2.div $push0=, $0, $1{{$}}
@@ -237,6 +245,7 @@
 
 ; CHECK-LABEL: mul_v2f64
 ; NO-SIMD128-NOT: f64x2
+; SIMD129-VM-NOT: f62x2
 ; SIMD128: .param v128, v128{{$}}
 ; SIMD128: .result v128{{$}}
 ; SIMD128: f64x2.mul $push0=, $0, $1{{$}}