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[Thumb1] Improve base + offset materialization in the load/store optimizer
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Authored by mroth on Aug 21 2014, 6:44 AM.

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Summary

This patch improves the instruction sequence the load/store optimizer emits to materialize a new base register with offset applied.

If we have a chain of loads/stores like this:

ldr r0, [r5, #4]
ldr r1, [r5, #8]
ldr r2, [r5, #12]

The pass will always use a MOV and 8-bit immediate add (source and destination register are the same in tADDi8) to get a new base:
mov r2, r5
adds r2, #4
ldm r2, {r0, r1, r2}

However, if the immediate fits into 3 bits, as in this case, we can actually generate (with tADDi3):
adds r2, r5, #4
ldm r2, {r0, r1, r2}

I’ve also added a test case for this and made two existing load/store optimizer tests run with –verify-machineinstrs to catch any problems.

Cheers
Moritz

Diff Detail

Repository
rL LLVM

Event Timeline

mroth updated this revision to Diff 12766.Aug 21 2014, 6:44 AM
mroth retitled this revision from to [Thumb1] Improve base + offset materialization in the load/store optimizer.
mroth updated this object.
mroth edited the test plan for this revision. (Show Details)
mroth added a reviewer: rengolin.
mroth set the repository for this revision to rL LLVM.
mroth added a subscriber: Unknown Object (MLST).
rengolin accepted this revision.Aug 21 2014, 7:18 AM
rengolin edited edge metadata.

Hi Moritz,

LGTM, thanks!

--renato

This revision is now accepted and ready to land.Aug 21 2014, 7:18 AM
mroth closed this revision.Aug 21 2014, 10:20 AM
mroth updated this revision to Diff 12787.

Closed by commit rL216193 (authored by @mroth).

Thanks! Committed as r216193.

Cheers
Moritz