Index: lib/CodeGen/SelectionDAG/InstrEmitter.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+++ lib/CodeGen/SelectionDAG/InstrEmitter.cpp
@@ -248,8 +248,11 @@
             User->getOperand(2).getResNo() == i) {
           unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
           if (TargetRegisterInfo::isVirtualRegister(Reg)) {
-            const TargetRegisterClass *RegRC = MRI->getRegClass(Reg);
-            if (RegRC == RC) {
+            // Allow constraining the virtual register's class within reason,
+            // just like what AddRegisterOperand will allow.
+            const TargetRegisterClass *ConstrainedRC
+              = MRI->constrainRegClass(Reg, RC, MinRCSize);
+            if (ConstrainedRC) {
               VRBase = Reg;
               MIB.addReg(VRBase, RegState::Define);
               break;