Index: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp =================================================================== --- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -861,7 +861,28 @@ switch (CCCode) { default: llvm_unreachable("Unknown integer comparison!"); case ISD::SETEQ: - case ISD::SETNE: + case ISD::SETNE: { + SDValue OpL, OpR; + + OpL = GetPromotedInteger(NewLHS); + OpR = GetPromotedInteger(NewRHS); + + // We would prefer to promote the comparison operand with sign extension, + // if we find the operand is actually to truncate an AssertSext. With this + // optimization, we can avoid inserting real truncate instruction, which + // is redudant eventually. + if (OpL->getOpcode() == ISD::AssertSext && + NewLHS->getOpcode() == ISD::TRUNCATE && + OpR->getOpcode() == ISD::AssertSext && + NewRHS->getOpcode() == ISD::TRUNCATE) { + NewLHS = SExtPromotedInteger(NewLHS); + NewRHS = SExtPromotedInteger(NewRHS); + } else { + NewLHS = ZExtPromotedInteger(NewLHS); + NewRHS = ZExtPromotedInteger(NewRHS); + } + break; + } case ISD::SETUGE: case ISD::SETUGT: case ISD::SETULE: Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp =================================================================== --- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -766,6 +766,26 @@ const Value *V) const { const TargetLowering &TLI = DAG.getTargetLoweringInfo(); + // For the users of the source value being used for compare instruction, if + // the number of signed predicate is greater than unsigned predicate, we + // prefer to use SIGN_EXTEND. + // + // With this optimization, we would be able to reduce some redundant sign or + // zero extension instruction, and eventually more machine CSE opportunities + // can be exposed. + ISD::NodeType ExtendKind = ISD::ANY_EXTEND; + unsigned int NumOfSigned = 0, NumOfUnsigned = 0; + for (Value::const_user_iterator I = V->user_begin(), E = V->user_end(); + I != E; ++I) { + const User *UI = *I; + if (const CmpInst *CI = dyn_cast(UI)) { + NumOfSigned += CI->isSigned(); + NumOfUnsigned += CI->isUnsigned(); + } + } + if (NumOfSigned > NumOfUnsigned) + ExtendKind = ISD::SIGN_EXTEND; + // Get the list of the values's legal parts. unsigned NumRegs = Regs.size(); SmallVector Parts(NumRegs); @@ -773,8 +793,9 @@ EVT ValueVT = ValueVTs[Value]; unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), ValueVT); MVT RegisterVT = RegVTs[Value]; - ISD::NodeType ExtendKind = - TLI.isZExtFree(Val, RegisterVT)? ISD::ZERO_EXTEND: ISD::ANY_EXTEND; + + if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT)) + ExtendKind = ISD::ZERO_EXTEND; getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value), &Parts[Part], NumParts, RegisterVT, V, ExtendKind); Index: test/CodeGen/AArch64/atomic-ops.ll =================================================================== --- test/CodeGen/AArch64/atomic-ops.ll +++ test/CodeGen/AArch64/atomic-ops.ll @@ -493,6 +493,7 @@ ; CHECK-LABEL: test_atomic_load_min_i8: %old = atomicrmw min i8* @var8, i8 %offset acquire ; CHECK-NOT: dmb +; CHECK: sxtb w[[TMP:[0-9]+]], w0 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8 @@ -502,14 +503,13 @@ ; function there. ; CHECK-NEXT: sxtb w[[OLD_EXT:[0-9]+]], w[[OLD]] -; CHECK-NEXT: cmp w[[OLD_EXT]], w0, sxtb -; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, le +; CHECK-NEXT: cmp w[[OLD_EXT]], w[[TMP]] +; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w[[TMP]], le ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 ; CHECK-NOT: dmb -; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]] ret i8 %old } @@ -517,6 +517,7 @@ ; CHECK-LABEL: test_atomic_load_min_i16: %old = atomicrmw min i16* @var16, i16 %offset release ; CHECK-NOT: dmb +; CHECK: sxth w[[TMP:[0-9]+]], w0 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16 @@ -526,15 +527,14 @@ ; function there. ; CHECK-NEXT: sxth w[[OLD_EXT:[0-9]+]], w[[OLD]] -; CHECK-NEXT: cmp w[[OLD_EXT]], w0, sxth -; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, le +; CHECK-NEXT: cmp w[[OLD_EXT]], w[[TMP]] +; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w[[TMP]], le ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 ; CHECK-NOT: dmb -; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]] ret i16 %old } @@ -590,6 +590,7 @@ ; CHECK-LABEL: test_atomic_load_max_i8: %old = atomicrmw max i8* @var8, i8 %offset seq_cst ; CHECK-NOT: dmb +; CHECK: sxtb w[[TMP:[0-9]+]], w0 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8 @@ -599,15 +600,14 @@ ; function there. ; CHECK-NEXT: sxtb w[[OLD_EXT:[0-9]+]], w[[OLD]] -; CHECK-NEXT: cmp w[[OLD_EXT]], w0, sxtb -; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt +; CHECK-NEXT: cmp w[[OLD_EXT]], w[[TMP]] +; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w[[TMP]], gt ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 ; CHECK-NOT: dmb -; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]] ret i8 %old } @@ -615,6 +615,7 @@ ; CHECK-LABEL: test_atomic_load_max_i16: %old = atomicrmw max i16* @var16, i16 %offset acquire ; CHECK-NOT: dmb +; CHECK: sxth w[[TMP:[0-9]+]], w0 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16 @@ -624,15 +625,14 @@ ; function there. ; CHECK-NEXT: sxth w[[OLD_EXT:[0-9]+]], w[[OLD]] -; CHECK-NEXT: cmp w[[OLD_EXT]], w0, sxth -; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt +; CHECK-NEXT: cmp w[[OLD_EXT]], w[[TMP]] +; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w[[TMP]], gt ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 ; CHECK-NOT: dmb -; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]] ret i16 %old } Index: test/CodeGen/AArch64/rm_redundant_cmp.ll =================================================================== --- /dev/null +++ test/CodeGen/AArch64/rm_redundant_cmp.ll @@ -0,0 +1,119 @@ +; RUN: llc < %s -mtriple=aarch64-linux-gnuabi -O2 | FileCheck %s + +%struct.s_signed = type { i16, i16, i16 } +%struct.s_unsigned = type { i16, i16, i16 } + +@cost_s = common global %struct.s_signed zeroinitializer, align 2 +@cost_u = common global %struct.s_unsigned zeroinitializer, align 2 + +define void @test_2cmp_signed_1() { +; CHECK-LABEL: test_2cmp_signed_1 +; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}} +; CHECK-NEXT: b.gt +; CHECK-NOT: cmp +; CHECK: b.ne +entry: + %0 = load i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 1), align 2 + %1 = load i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 2), align 2 + %cmp = icmp sgt i16 %0, %1 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + store i16 %0, i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 0), align 2 + br label %if.end8 + +if.else: ; preds = %entry + %cmp5 = icmp eq i16 %0, %1 + br i1 %cmp5, label %if.then7, label %if.end8 + +if.then7: ; preds = %if.else + store i16 %0, i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 0), align 2 + br label %if.end8 + +if.end8: ; preds = %if.else, %if.then7, %if.then + ret void +} + +define void @test_2cmp_signed_2() { +; CHECK-LABEL: test_2cmp_signed_2 +; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}} +; CHECK-NEXT: b.le +; CHECK-NOT: cmp +; CHECK: b.ge +entry: + %0 = load i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 1), align 2 + %1 = load i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 2), align 2 + %cmp = icmp sgt i16 %0, %1 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + store i16 %0, i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 0), align 2 + br label %if.end8 + +if.else: ; preds = %entry + %cmp5 = icmp slt i16 %0, %1 + br i1 %cmp5, label %if.then7, label %if.end8 + +if.then7: ; preds = %if.else + store i16 %1, i16* getelementptr inbounds (%struct.s_signed* @cost_s, i64 0, i32 0), align 2 + br label %if.end8 + +if.end8: ; preds = %if.else, %if.then7, %if.then + ret void +} + +define void @test_2cmp_unsigned_1() { +; CHECK-LABEL: test_2cmp_unsigned_1 +; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}} +; CHECK-NEXT: b.hi +; CHECK-NOT: cmp +; CHECK: b.ne +entry: + %0 = load i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 1), align 2 + %1 = load i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 2), align 2 + %cmp = icmp ugt i16 %0, %1 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + store i16 %0, i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 0), align 2 + br label %if.end8 + +if.else: ; preds = %entry + %cmp5 = icmp eq i16 %0, %1 + br i1 %cmp5, label %if.then7, label %if.end8 + +if.then7: ; preds = %if.else + store i16 %0, i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 0), align 2 + br label %if.end8 + +if.end8: ; preds = %if.else, %if.then7, %if.then + ret void +} + +define void @test_2cmp_unsigned_2() { +; CHECK-LABEL: test_2cmp_unsigned_2 +; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}} +; CHECK-NEXT: b.ls +; CHECK-NOT: cmp +; CHECK: b.hs +entry: + %0 = load i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 1), align 2 + %1 = load i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 2), align 2 + %cmp = icmp ugt i16 %0, %1 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + store i16 %0, i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 0), align 2 + br label %if.end8 + +if.else: ; preds = %entry + %cmp5 = icmp ult i16 %0, %1 + br i1 %cmp5, label %if.then7, label %if.end8 + +if.then7: ; preds = %if.else + store i16 %1, i16* getelementptr inbounds (%struct.s_unsigned* @cost_u, i64 0, i32 0), align 2 + br label %if.end8 + +if.end8: ; preds = %if.else, %if.then7, %if.then + ret void +}