Index: llvm/include/llvm/CodeGen/Passes.h =================================================================== --- llvm/include/llvm/CodeGen/Passes.h +++ llvm/include/llvm/CodeGen/Passes.h @@ -441,6 +441,18 @@ /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp FunctionPass *createCFIInstrInserter(); + // This pass logs information about the stack (stack size, function signature,2 ​// direct & indirect calls) to a yaml file with the same name as the module. + FunctionPass *createLogStackInfo(); + + // This pass logs information from the IR of how classes are related. This supplements + // the information that LogStackInfo logs, making it possible to analyze + // indirect function calls based on their signatures. + ModulePass *createLogStackInfoClasses(); + + extern char &LogStackInfoID; + + extern char &LogStackInfoClassesID; + } // End llvm namespace #endif Index: llvm/include/llvm/InitializePasses.h =================================================================== --- llvm/include/llvm/InitializePasses.h +++ llvm/include/llvm/InitializePasses.h @@ -207,6 +207,8 @@ void initializeLoaderPassPass(PassRegistry&); void initializeLocalStackSlotPassPass(PassRegistry&); void initializeLocalizerPass(PassRegistry&); +void initializeLogStackInfoPass(PassRegistry&); +void initializeLogStackInfoClassesPass(PassRegistry&); void initializeLoopAccessLegacyAnalysisPass(PassRegistry&); void initializeLoopDataPrefetchLegacyPassPass(PassRegistry&); void initializeLoopDeletionLegacyPassPass(PassRegistry&); Index: llvm/lib/CodeGen/CMakeLists.txt =================================================================== --- llvm/lib/CodeGen/CMakeLists.txt +++ llvm/lib/CodeGen/CMakeLists.txt @@ -58,6 +58,8 @@ LiveVariables.cpp LLVMTargetMachine.cpp LocalStackSlotAllocation.cpp + LogStackInfo.cpp + LogStackInfoClasses.cpp LoopTraversal.cpp LowLevelType.cpp LowerEmuTLS.cpp Index: llvm/lib/CodeGen/CodeGen.cpp =================================================================== --- llvm/lib/CodeGen/CodeGen.cpp +++ llvm/lib/CodeGen/CodeGen.cpp @@ -50,6 +50,8 @@ initializeLiveStacksPass(Registry); initializeLiveVariablesPass(Registry); initializeLocalStackSlotPassPass(Registry); + initializeLogStackInfoPass(Registry); + initializeLogStackInfoClassesPass(Registry); initializeLowerIntrinsicsPass(Registry); initializeMIRCanonicalizerPass(Registry); initializeMachineBlockFrequencyInfoPass(Registry); Index: llvm/lib/CodeGen/LogStackInfo.h =================================================================== --- /dev/null +++ llvm/lib/CodeGen/LogStackInfo.h @@ -0,0 +1,64 @@ +//===-- LogStackInfo.h ----------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines types used by the LogStackInfo & LogStackInfoClasses passes +// +//===----------------------------------------------------------------------===// +#ifndef LLVM_LOGSTACKINFO_H +#define LLVM_LOGSTACKINFO_H + +#include "llvm/Support/YAMLTraits.h" + +struct TypeSignature { + std::string ReturnType; + std::vector ArgTypes; +}; + +template <> struct llvm::yaml::MappingTraits { + static void mapping(IO &io, TypeSignature &info) { + io.mapRequired("returnType", info.ReturnType); + io.mapOptional("argTypes", info.ArgTypes); + } +}; + +LLVM_YAML_IS_SEQUENCE_VECTOR(TypeSignature) + +struct ClassInfo { + std::string FName; + std::vector IsA; +}; + +LLVM_YAML_IS_SEQUENCE_VECTOR(ClassInfo) + +template <> struct llvm::yaml::MappingTraits { + static void mapping(IO &io, ClassInfo &info) { + io.mapRequired("fname", info.FName); + io.mapRequired("isa", info.IsA); + } +}; + +struct StackInfo { + std::string FName; + TypeSignature Signature; + int StackSize; + std::vector DirectCalls; + std::vector IndirectCallSigs; +}; + +template <> struct llvm::yaml::MappingTraits { + static void mapping(IO &io, StackInfo &info) { + io.mapRequired("fname", info.FName); + io.mapRequired("signature", info.Signature); + io.mapRequired("stackSize", info.StackSize); + io.mapRequired("directCalls", info.DirectCalls); + io.mapRequired("indirectCallSigs", info.IndirectCallSigs); + } +}; + +#endif // LLVM_LOGSTACKINFO_H Index: llvm/lib/CodeGen/LogStackInfo.cpp =================================================================== --- /dev/null +++ llvm/lib/CodeGen/LogStackInfo.cpp @@ -0,0 +1,120 @@ +//===-- LogStackInfo.cpp --------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This pass logs information about the stack (stack size, function signature, +// direct & indirect calls) to a yaml file with the same name as the module. +// +//===----------------------------------------------------------------------===// + +#include "LogStackInfo.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/Function.h" +#include "llvm/IR/Intrinsics.h" +#include "llvm/IR/Module.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Path.h" +#include "llvm/Support/YAMLTraits.h" +#include "llvm/Support/raw_ostream.h" +#include + +extern llvm::cl::opt GenerateStackAnalysis; + +using namespace llvm; + +#define LOGSTACKINFO_PASS_NAME "Log Stack Frame Info" + +namespace { +class LogStackInfo : public MachineFunctionPass { +public: + static char ID; + + LogStackInfo() : MachineFunctionPass(ID) { + initializeLogStackInfoPass(*PassRegistry::getPassRegistry()); + } + + bool runOnMachineFunction(MachineFunction &MF) override; + + StringRef getPassName() const override { return LOGSTACKINFO_PASS_NAME; } +}; // end class + +// Function to format the type signature +TypeSignature getSignature(FunctionType *FuncType) { + TypeSignature Sig; + std::string OutputString; + llvm::raw_string_ostream SOS(OutputString); + FuncType->getReturnType()->print(SOS); + SOS.str(); + Sig.ReturnType = OutputString; + + std::vector ArgTypes; + for (Type *ArgType : FuncType->params()) { + OutputString = ""; // reset the string used in the buffer + ArgType->print(SOS); + ArgTypes.push_back(SOS.str()); + } + Sig.ArgTypes = ArgTypes; + return Sig; +} + +bool LogStackInfo::runOnMachineFunction(MachineFunction &MF) { + if (GenerateStackAnalysis) { + SmallString<128> OutputFilename = MF.getMMI().getModule()->getName(); + llvm::sys::path::replace_extension(OutputFilename, "stack-info.yaml"); + std::error_code OK; + std::error_code OutErrorInfo; + llvm::raw_fd_ostream OS(OutputFilename, OutErrorInfo, + llvm::sys::fs::F_Append); + if (OutErrorInfo != OK) + llvm::errs() << "Error opening yaml file: " << OutErrorInfo.message() + << "\n"; + StackInfo Info; + std::vector DirectCalls; + std::vector IndirectCallSigs; + Info.FName = MF.getName(); + Info.StackSize = MF.getFrameInfo().getStackSize(); + Function *F = const_cast(&(MF.getFunction())); + Info.Signature = getSignature(F->getFunctionType()); + for (BasicBlock &BB : *F) { + for (Instruction &I : BB) { + if (auto CS = CallSite(&I)) { + if (CS.isIndirectCall()) + IndirectCallSigs.push_back(getSignature(CS.getFunctionType())); + else { + if (CS.getCalledFunction()) + DirectCalls.push_back(CS.getCalledFunction()->getName()); + } + } + } + } + Info.IndirectCallSigs = IndirectCallSigs; + Info.DirectCalls = DirectCalls; + llvm::yaml::Output Yout(OS); + Yout << Info; + OS.close(); + } // end if + return false; +} // end runOnMachineFunction +} // end anonymous namespace + +char LogStackInfo::ID = 0; +char &llvm::LogStackInfoID = LogStackInfo::ID; + +INITIALIZE_PASS(LogStackInfo, "logStackFrames-printer", LOGSTACKINFO_PASS_NAME, + true, // is CFG only? + true // is analysis? +) + +namespace llvm { +FunctionPass *createLogStackInfo() { return new LogStackInfo(); } +} // namespace llvm Index: llvm/lib/CodeGen/LogStackInfoClasses.cpp =================================================================== --- /dev/null +++ llvm/lib/CodeGen/LogStackInfoClasses.cpp @@ -0,0 +1,98 @@ +//===-- LogStackInfoClasses.cpp -------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This pass logs information from the IR of how classes are related. +// This supplements the information that LogStackInfo logs, making it possible +// to analyze indirect function calls based on their signatures. +// +//===----------------------------------------------------------------------===// + +#include "LogStackInfo.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/IR/DerivedTypes.h" +#include "llvm/IR/Module.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Path.h" +#include "llvm/Support/YAMLTraits.h" +#include "llvm/Support/raw_ostream.h" +#include +#include + +using namespace llvm; + +llvm::cl::opt GenerateStackAnalysis( + "gen-stack-depth-info", + cl::desc("Generate data necessary for stack depth analysis"), + cl::value_desc("")); + +#define LOGSTACKINFOCLASSES_PASS_NAME "LOG CALL GRAPH MODULE PASS" + +namespace { +class LogStackInfoClasses : public ModulePass { +public: + static char ID; + + LogStackInfoClasses() : ModulePass(ID) { + initializeLogStackInfoClassesPass(*PassRegistry::getPassRegistry()); + } + + bool runOnModule(Module &M) override; + + StringRef getPassName() const override { + return LOGSTACKINFOCLASSES_PASS_NAME; + } +}; + +bool LogStackInfoClasses::runOnModule(Module &M) { + if(GenerateStackAnalysis){ + SmallString<128> OutputFilename = M.getName(); + llvm::sys::path::replace_extension(OutputFilename, "stack-info.yaml"); + std::error_code OK; + std::error_code OutErrorInfo; + llvm::raw_fd_ostream OS(OutputFilename, OutErrorInfo, + llvm::sys::fs::F_Append); + if (OutErrorInfo != OK) + llvm::errs() << "Error opening yaml file: " << OutErrorInfo.message() + << "\n"; + std::vector AllClassData; + for (StructType *S : M.getIdentifiedStructTypes()) { + ClassInfo CI; + CI.FName = S->getName(); + std::vector IsA; + for (Type *CurrType : S->elements()) { + if (auto *ST = dyn_cast(CurrType)) + if (!ST->isLiteral()) + IsA.push_back(CurrType->getStructName()); + } + if (!IsA.empty()) { + CI.IsA = IsA; + AllClassData.push_back(CI); + } + } + llvm::yaml::Output Yout(OS); + Yout << AllClassData; + OS.close(); + } // end if + return false; +} // end of runOnModule +} // end anonymous namespace + +char LogStackInfoClasses::ID = 0; +char &llvm::LogStackInfoClassesID = LogStackInfoClasses::ID; + +INITIALIZE_PASS(LogStackInfoClasses, "logstackinfoclasses", + LOGSTACKINFOCLASSES_PASS_NAME, + true, // is CFG only? + true // is analysis? +) + +namespace llvm { +ModulePass *createLogStackInfoClasses() { return new LogStackInfoClasses(); } +} // namespace llvm Index: llvm/lib/CodeGen/TargetPassConfig.cpp =================================================================== --- llvm/lib/CodeGen/TargetPassConfig.cpp +++ llvm/lib/CodeGen/TargetPassConfig.cpp @@ -51,66 +51,79 @@ cl::opt EnableIPRA("enable-ipra", cl::init(false), cl::Hidden, cl::desc("Enable interprocedural register allocation " "to reduce load/store at procedure calls.")); -static cl::opt DisablePostRASched("disable-post-ra", cl::Hidden, - cl::desc("Disable Post Regalloc Scheduler")); +static cl::opt + DisablePostRASched("disable-post-ra", cl::Hidden, + cl::desc("Disable Post Regalloc Scheduler")); static cl::opt DisableBranchFold("disable-branch-fold", cl::Hidden, - cl::desc("Disable branch folding")); + cl::desc("Disable branch folding")); static cl::opt DisableTailDuplicate("disable-tail-duplicate", cl::Hidden, - cl::desc("Disable tail duplication")); -static cl::opt DisableEarlyTailDup("disable-early-taildup", cl::Hidden, + cl::desc("Disable tail duplication")); +static cl::opt DisableEarlyTailDup( + "disable-early-taildup", cl::Hidden, cl::desc("Disable pre-register allocation tail duplication")); -static cl::opt DisableBlockPlacement("disable-block-placement", - cl::Hidden, cl::desc("Disable probability-driven block placement")); -static cl::opt EnableBlockPlacementStats("enable-block-placement-stats", - cl::Hidden, cl::desc("Collect probability-driven block placement stats")); +static cl::opt DisableBlockPlacement( + "disable-block-placement", cl::Hidden, + cl::desc("Disable probability-driven block placement")); +static cl::opt EnableBlockPlacementStats( + "enable-block-placement-stats", cl::Hidden, + cl::desc("Collect probability-driven block placement stats")); static cl::opt DisableSSC("disable-ssc", cl::Hidden, - cl::desc("Disable Stack Slot Coloring")); -static cl::opt DisableMachineDCE("disable-machine-dce", cl::Hidden, - cl::desc("Disable Machine Dead Code Elimination")); -static cl::opt DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden, - cl::desc("Disable Early If-conversion")); + cl::desc("Disable Stack Slot Coloring")); +static cl::opt + DisableMachineDCE("disable-machine-dce", cl::Hidden, + cl::desc("Disable Machine Dead Code Elimination")); +static cl::opt + DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden, + cl::desc("Disable Early If-conversion")); static cl::opt DisableMachineLICM("disable-machine-licm", cl::Hidden, - cl::desc("Disable Machine LICM")); -static cl::opt DisableMachineCSE("disable-machine-cse", cl::Hidden, + cl::desc("Disable Machine LICM")); +static cl::opt DisableMachineCSE( + "disable-machine-cse", cl::Hidden, cl::desc("Disable Machine Common Subexpression Elimination")); static cl::opt OptimizeRegAlloc( "optimize-regalloc", cl::Hidden, cl::desc("Enable optimized register allocation compilation path.")); static cl::opt DisablePostRAMachineLICM("disable-postra-machine-licm", - cl::Hidden, - cl::desc("Disable Machine LICM")); + cl::Hidden, + cl::desc("Disable Machine LICM")); static cl::opt DisableMachineSink("disable-machine-sink", cl::Hidden, - cl::desc("Disable Machine Sinking")); -static cl::opt DisablePostRAMachineSink("disable-postra-machine-sink", - cl::Hidden, - cl::desc("Disable PostRA Machine Sinking")); -static cl::opt DisableLSR("disable-lsr", cl::Hidden, - cl::desc("Disable Loop Strength Reduction Pass")); -static cl::opt DisableConstantHoisting("disable-constant-hoisting", - cl::Hidden, cl::desc("Disable ConstantHoisting")); + cl::desc("Disable Machine Sinking")); +static cl::opt + DisablePostRAMachineSink("disable-postra-machine-sink", cl::Hidden, + cl::desc("Disable PostRA Machine Sinking")); +static cl::opt + DisableLSR("disable-lsr", cl::Hidden, + cl::desc("Disable Loop Strength Reduction Pass")); +static cl::opt + DisableConstantHoisting("disable-constant-hoisting", cl::Hidden, + cl::desc("Disable ConstantHoisting")); static cl::opt DisableCGP("disable-cgp", cl::Hidden, - cl::desc("Disable Codegen Prepare")); + cl::desc("Disable Codegen Prepare")); static cl::opt DisableCopyProp("disable-copyprop", cl::Hidden, - cl::desc("Disable Copy Propagation pass")); -static cl::opt DisablePartialLibcallInlining("disable-partial-libcall-inlining", - cl::Hidden, cl::desc("Disable Partial Libcall Inlining")); + cl::desc("Disable Copy Propagation pass")); +static cl::opt + DisablePartialLibcallInlining("disable-partial-libcall-inlining", + cl::Hidden, + cl::desc("Disable Partial Libcall Inlining")); static cl::opt EnableImplicitNullChecks( "enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false), cl::Hidden); static cl::opt DisableMergeICmps("disable-mergeicmps", - cl::desc("Disable MergeICmps Pass"), - cl::init(false), cl::Hidden); -static cl::opt PrintLSR("print-lsr-output", cl::Hidden, - cl::desc("Print LLVM IR produced by the loop-reduce pass")); -static cl::opt PrintISelInput("print-isel-input", cl::Hidden, - cl::desc("Print LLVM IR input to isel pass")); + cl::desc("Disable MergeICmps Pass"), + cl::init(false), cl::Hidden); +static cl::opt + PrintLSR("print-lsr-output", cl::Hidden, + cl::desc("Print LLVM IR produced by the loop-reduce pass")); +static cl::opt + PrintISelInput("print-isel-input", cl::Hidden, + cl::desc("Print LLVM IR input to isel pass")); static cl::opt PrintGCInfo("print-gc", cl::Hidden, - cl::desc("Dump garbage collector data")); -static cl::opt VerifyMachineCode("verify-machineinstrs", cl::Hidden, - cl::desc("Verify generated machine code"), - cl::init(false), - cl::ZeroOrMore); + cl::desc("Dump garbage collector data")); +static cl::opt + VerifyMachineCode("verify-machineinstrs", cl::Hidden, + cl::desc("Verify generated machine code"), + cl::init(false), cl::ZeroOrMore); enum RunOutliner { AlwaysOutline, NeverOutline, TargetDefault }; // Enable or disable the MachineOutliner. static cl::opt EnableMachineOutliner( @@ -125,8 +138,8 @@ // FastISel is enabled by default with -fast, and we wish to be // able to enable or disable fast-isel independently from -O0. static cl::opt -EnableFastISelOption("fast-isel", cl::Hidden, - cl::desc("Enable the \"fast\" instruction selector")); + EnableFastISelOption("fast-isel", cl::Hidden, + cl::desc("Enable the \"fast\" instruction selector")); static cl::opt EnableGlobalISelOption( "global-isel", cl::Hidden, @@ -149,11 +162,14 @@ // substitutePass(&PostRASchedulerID, &PostMachineSchedulerID). // Targets can return true in targetSchedulesPostRAScheduling() and // insert a PostRA scheduling pass wherever it wants. -cl::opt MISchedPostRA("misched-postra", cl::Hidden, - cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)")); +cl::opt MISchedPostRA( + "misched-postra", cl::Hidden, + cl::desc( + "Run MachineScheduler post regalloc (independent of preRA sched)")); // Experimental option to run live interval analysis early. -static cl::opt EarlyLiveIntervals("early-live-intervals", cl::Hidden, +static cl::opt EarlyLiveIntervals( + "early-live-intervals", cl::Hidden, cl::desc("Run live interval analysis earlier in the pipeline")); // Experimental option to use CFL-AA in codegen @@ -311,7 +327,7 @@ // user interface. For example, a target may disable a standard pass by // default by substituting a pass ID of zero, and the user may still enable // that standard pass with an explicit command line option. - DenseMap TargetPasses; + DenseMap TargetPasses; /// Store the pairs of of which the second pass /// is inserted after each instance of the first one. @@ -321,9 +337,7 @@ } // end namespace llvm // Out of line virtual method. -TargetPassConfig::~TargetPassConfig() { - delete Impl; -} +TargetPassConfig::~TargetPassConfig() { delete Impl; } static const PassInfo *getPassInfo(StringRef PassName) { if (PassName.empty()) @@ -411,8 +425,7 @@ return new TargetPassConfig(*this, PM); } -TargetPassConfig::TargetPassConfig() - : ImmutablePass(ID) { +TargetPassConfig::TargetPassConfig() : ImmutablePass(ID) { report_fatal_error("Trying to construct TargetPassConfig without a target " "machine. Scheduling a CodeGen pass without a target " "triple set?"); @@ -454,8 +467,8 @@ } IdentifyingPassPtr TargetPassConfig::getPassSubstitution(AnalysisID ID) const { - DenseMap::const_iterator - I = Impl->TargetPasses.find(ID); + DenseMap::const_iterator I = + Impl->TargetPasses.find(ID); if (I == Impl->TargetPasses.end()) return ID; return I->second; @@ -464,8 +477,7 @@ bool TargetPassConfig::isPassSubstitutedOrOverridden(AnalysisID ID) const { IdentifyingPassPtr TargetID = getPassSubstitution(ID); IdentifyingPassPtr FinalPtr = overridePass(ID, TargetID); - return !FinalPtr.isValid() || FinalPtr.isInstance() || - FinalPtr.getID() != ID; + return !FinalPtr.isValid() || FinalPtr.isInstance() || FinalPtr.getID() != ID; } /// Add a pass to the PassManager if that pass is supposed to be run. If the @@ -809,7 +821,7 @@ const PassRegistry *PR = PassRegistry::getPassRegistry(); const PassInfo *TPI = PR->getPassInfo(PrintMachineInstrs.getValue()); const PassInfo *IPI = PR->getPassInfo(StringRef("machineinstr-printer")); - assert (TPI && IPI && "Pass ID not registered!"); + assert(TPI && IPI && "Pass ID not registered!"); const char *TID = (const char *)(TPI->getTypeInfo()); const char *IID = (const char *)(IPI->getTypeInfo()); insertPass(TID, IID); @@ -843,7 +855,8 @@ else { if (RegAlloc != &useDefaultRegisterAllocator && RegAlloc != &createFastRegisterAllocator) - report_fatal_error("Must use fast (default) register allocator for unoptimized regalloc."); + report_fatal_error("Must use fast (default) register allocator for " + "unoptimized regalloc."); addFastRegAlloc(createRegAllocPass(false)); } @@ -859,7 +872,7 @@ // Prolog/Epilog inserter needs a TargetMachine to instantiate. But only // do so if it hasn't been disabled, substituted, or overridden. if (!isPassSubstitutedOrOverridden(&PrologEpilogCodeInserterID)) - addPass(createPrologEpilogInserterPass()); + addPass(createPrologEpilogInserterPass()); /// Add passes that optimize machine instructions after register allocation. if (getOptLevel() != CodeGenOpt::None) @@ -916,8 +929,8 @@ if (TM->Options.EnableMachineOutliner && getOptLevel() != CodeGenOpt::None && EnableMachineOutliner != NeverOutline) { bool RunOnAllFunctions = (EnableMachineOutliner == AlwaysOutline); - bool AddOutliner = RunOnAllFunctions || - TM->Options.SupportsDefaultOutlining; + bool AddOutliner = + RunOnAllFunctions || TM->Options.SupportsDefaultOutlining; if (AddOutliner) addPass(createMachineOutlinerPass(RunOnAllFunctions)); } @@ -925,6 +938,9 @@ // Add passes that directly emit MI after all other MI passes. addPreEmitPass2(); + addPass(&LogStackInfoID); + addPass(&LogStackInfoClassesID); + AddingMachinePasses = false; } @@ -973,9 +989,12 @@ bool TargetPassConfig::getOptimizeRegAlloc() const { switch (OptimizeRegAlloc) { - case cl::BOU_UNSET: return getOptLevel() != CodeGenOpt::None; - case cl::BOU_TRUE: return true; - case cl::BOU_FALSE: return false; + case cl::BOU_UNSET: + return getOptLevel() != CodeGenOpt::None; + case cl::BOU_TRUE: + return true; + case cl::BOU_FALSE: + return false; } llvm_unreachable("Invalid optimize-regalloc state"); } @@ -988,9 +1007,8 @@ static llvm::once_flag InitializeDefaultRegisterAllocatorFlag; static RegisterRegAlloc -defaultRegAlloc("default", - "pick register allocator based on -O option", - useDefaultRegisterAllocator); + defaultRegAlloc("default", "pick register allocator based on -O option", + useDefaultRegisterAllocator); static void initializeDefaultRegisterAllocatorOnce() { RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault();